Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU...
Transcript of Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU...
![Page 1: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/1.jpg)
Sequential logic The VLSI Systems Center - BGU 1
Digital Microelectronic
Circuits
(361-1-3021 )
Sequential LogicCircuits and Memories
Presented by: Adam Teman
Lecture 12:
![Page 2: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/2.jpg)
Sequential logic The VLSI Systems Center - BGU
Last Lecture
Dynamic Logic
» Features and Problems
» Domino Logic
2
![Page 3: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/3.jpg)
Sequential logic The VLSI Systems Center - BGU
This Lecture
An introduction to sequential circuits and
semiconductor memory, focusing on the
circuit level implementation of basic gates
and cells.
A much more in-depth study of these circuits
will be given in Introduction to VLSI.
3
![Page 4: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/4.jpg)
Sequential logic The VLSI Systems Center - BGU
What will we learn today?
4
11.1 The Latch
11.2 The Flip Flop
11.3 Read Only Memory
11.4 SRAM
11.5 DRAM
![Page 5: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/5.jpg)
Sequential logic The VLSI Systems Center - BGU 5
Sequential Logic
COMBINATIONALLOGIC
Registers
Outputs
Next state
CLK
Q D
Current State
Inputs
![Page 6: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/6.jpg)
Sequential logic The VLSI Systems Center - BGU
Memory Hierarchy
6
![Page 7: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/7.jpg)
Sequential logic The VLSI Systems Center - BGU
LATCH
The basic sequential timing element is the
7
11.111.1 The Latch
11.2 The Flip Flop
11.3 Read Only Memory
11.4 SRAM
11.5 DRAM
![Page 8: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/8.jpg)
Sequential logic The VLSI Systems Center - BGU
Latch
8
Clk D Q
0 0 Hold
0 1 Hold
1 0 0
1 1 1
![Page 9: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/9.jpg)
Sequential logic The VLSI Systems Center - BGU
Basic Static Latch
9
Clk D Q
0 0 Hold
0 1 Hold
1 0 0
1 1 1
![Page 10: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/10.jpg)
Sequential logic The VLSI Systems Center - BGU
Feedback Mux Latch
10
Clk D Q
0 0 Hold
0 1 Hold
1 0 0
1 1 1
![Page 11: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/11.jpg)
Sequential logic The VLSI Systems Center - BGU
Simple Dynamic Latch
11
![Page 12: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/12.jpg)
Sequential logic The VLSI Systems Center - BGU
C2MOS
12
![Page 13: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/13.jpg)
Sequential logic The VLSI Systems Center - BGU
TSPC
13
![Page 14: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/14.jpg)
Sequential logic The VLSI Systems Center - BGU
FLIP FLOP
The most important timing element in synchronous systems is the
14
11.211.1 The Latch
11.2 The Flip Flop
11.3 Read Only Memory
11.4 SRAM
11.5 DRAM
![Page 15: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/15.jpg)
Sequential logic The VLSI Systems Center - BGU
Flip Flop = Register
15
Clk D Q
01 0 0
01 1 1
0 X Hold
1 X Hold
![Page 16: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/16.jpg)
Sequential logic The VLSI Systems Center - BGU 16
Master-Slave (Edge-Triggered) Register
Two opposite latches trigger on edge
Also called master-slave latch pair
![Page 17: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/17.jpg)
Sequential logic The VLSI Systems Center - BGU 17
Master-Slave Register
Multiplexer-based latch pair
Clock load – 8 transistors
QM
Q
D
CLK
T 2I2
T 1I1
I3 T 4I5
T 3I4
I6
![Page 18: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/18.jpg)
Sequential logic The VLSI Systems Center - BGU
C2MOS Register
18
![Page 19: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/19.jpg)
Sequential logic The VLSI Systems Center - BGU
Pulse Triggered Register
19
![Page 20: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/20.jpg)
Sequential logic The VLSI Systems Center - BGU
READ ONLY MEMORY
Now we are ready to look at the basic memory array:
20
11.311.1 The Latch
11.2 The Flip Flop
11.3 Read Only Memory
11.4 SRAM
11.5 DRAM
![Page 21: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/21.jpg)
Sequential logic The VLSI Systems Center - BGU
Memory Architecture
21
![Page 22: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/22.jpg)
Sequential logic The VLSI Systems Center - BGU 22
Read-Only Memory Cells
1
0
WL
BL
WL
BL
Diode ROM
WL
BL
WL
BL
VDD
MOS ROM 1
WL
BL
WL
BL
GND
MOS ROM 2
![Page 23: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/23.jpg)
Sequential logic The VLSI Systems Center - BGU
MOS NOR ROM
23
![Page 24: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/24.jpg)
Sequential logic The VLSI Systems Center - BGU 24
Precharged MOS NOR ROM
![Page 25: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/25.jpg)
Sequential logic The VLSI Systems Center - BGU 25
MOS NAND ROM
All word lines high by default with exception of selected row
![Page 26: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/26.jpg)
Sequential logic The VLSI Systems Center - BGU
STATIC RANDOM ACCESS MEMORY
Most embedded memories are implemented with
26
11.411.1 The Latch
11.2 The Flip Flop
11.3 Read Only Memory
11.4 SRAM
11.5 DRAM
![Page 27: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/27.jpg)
Sequential logic The VLSI Systems Center - BGU
Random Access Memories
27
![Page 28: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/28.jpg)
Sequential logic The VLSI Systems Center - BGU
Basic Static Memory Element
28
![Page 29: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/29.jpg)
Sequential logic The VLSI Systems Center - BGU
Positive Feedback: Bi-Stability
29
![Page 30: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/30.jpg)
Sequential logic The VLSI Systems Center - BGU
Memory Cell
30
![Page 31: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/31.jpg)
Sequential logic The VLSI Systems Center - BGU 31
6-transistor CMOS SRAM Cell
WL
BL
VDD
M5M6
M4
M1
M2
M3
BL
![Page 32: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/32.jpg)
Sequential logic The VLSI Systems Center - BGU
SRAM Operation - Read
32
![Page 33: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/33.jpg)
Sequential logic The VLSI Systems Center - BGU
SRAM Operation - Write
33
![Page 34: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/34.jpg)
Sequential logic The VLSI Systems Center - BGU
DYNAMIC RANDOM ACCESS MEMORY
How about reducing the number of transistors to achieve high
density…
34
11.511.1 The Latch
11.2 The Flip Flop
11.3 Read Only Memory
11.4 SRAM
11.5 DRAM
![Page 35: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/35.jpg)
Sequential logic The VLSI Systems Center - BGU
3-Transistor DRAM Cell
35
![Page 36: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/36.jpg)
Sequential logic The VLSI Systems Center - BGU
1-Transistor DRAM Cell
36
![Page 37: Digital Microelectronic Circuits · 2017-09-28 · Sequential logic The VLSI Systems Center - BGU This Lecture An introduction to sequential circuits and semiconductor memory, focusing](https://reader030.fdocuments.net/reader030/viewer/2022040104/5f2e6ef544dff000b00f73f3/html5/thumbnails/37.jpg)
Sequential logic The VLSI Systems Center - BGU
1-Transistor DRAM Cell
37
prechargeinitial BL S SQ V C V C
prechargefor 2 :DDV V
finalfinal BL SQ V C C
DD
final
0.5'1'
T S DD BL
BL S
V V C V CV
C C
final '0 '2
DD BL
BL S
V CV
C C