Digital Logic Design (3)

ENGG1015 1st Semester, 2010

Dr. Kenneth Wong

Dr. Hayden So

Department of Electrical and Electronic Engineering

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Last lecture … •  All logic functions can be represented as

(1) truth table (2) schematics (3) Boolean expressions, interchangeably

•  Laws of Boolean algebra helps to simplify the Boolean expression

•  DeMorgan’s theorems •  NAND/NOR gates are universal gates •  Non-standard representation is equivalent

to DeMorgan’s theorems •  Canonical SOP/POS

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Today …

•  Conversion through 3 representations

•  Simplification of Boolean expressions – Boolean algebra

– Karnaugh map

•  Arithmetic Circuit – Half adder – Full adder – Subtractor

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Representing Logic Operations •  Each function can be represented

equivalently in 3 ways: – Truth table – Boolean logic expression – Schematics

Truth Table

Boolean Expression Schematics

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Example: This example illustrate the complete procedure for designing a logic circuit. Suppose the logic circuit having 3 inputs, A, B, C will have its output HIGH only when a majority of the inputs are HIGH.

Step 1 Set up the truth table

Step 2 Write the AND term for

each case where the output

is a 1.

Step 3 Write the SOP form the output

Step 4 Simplify the output expression

Step 5 Implement the circuit

A B C x

0 0 0 0

0 0 1 0

0 1 0 0

0 1 1 1

1 0 0 0

1 0 1 1

1 1 0 1

1 1 1 1

BCA→

CBA→CAB→

ABC→

( ) ( ) ( )x ABC ABC ABC ABC ABC ABCBC A A AC B B AB C CBC AC AB

= + + + + +

= + + + + +

= + +

x ABC ABC ABC ABC= + + +

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Example: Conversion through the opposite direction:

Step 1 Start from the circuit

Step 2 Obtain Boolean expression

from the circuit (in SOP form)

Step 3 Write the truth table

A B C y

0 0 0 0

0 0 1 0

0 1 0 1

0 1 1 1

1 0 0 0

1 0 1 1

1 1 0 1

1 1 1 1

BCA→

CBA→←CAB

ABC→BCACBACy ++=

←CBA

Truth Table

Boolean Expression Schematics

y

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Forms of Boolean Expressions •  There are two general forms of logic expression: SOP, POS •  Sum-of-products form (SOP)

–  first the product (AND) terms are formed then these are summed (OR)

–  eg: ABC + DEF + GHI •  Product-of-sum form (POS)

–  first the sum (OR) terms are formed then the products are taken (AND)

–  eg: (A+B+C)(D+E+F)(G+H+I) •  It is possible to convert between these two forms using

Boolean algebra

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Simplifying Logic Circuits •  Once the expression for a logic circuit is obtained, we may try to simplify

it, so that the implementation requires fewer gates •  Example: below two circuits are the same, but the second one is much

more simpler

•  Two methods for simplifying –  Algebraic method (use Boolean algebra theorems) –  Karnaugh mapping method (systematic, step-by-step approach)

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Minimization by Boolean Algebra •  Make use of relationships and theorems of Boolean algebra to simplify

the expressions –  this method relies on your algebraic skill

•  Mainly consists of two steps: –  The original expression is put into SOP form by repeated application of

DeMorgan’s theorems and multiplication of terms –  Once the original expression is in SOP form, the product terms are

checked for common factors, and factoring is performed wherever possible

•  Example: Simplify ( )z ABC AB AC= + ⋅( ) [by DeMorgan thm]( ) [cancel double inverions]

[multiply out] [ ]

( )

z ABC AB A CABC AB A CABC ABA ABCABC AB ABC A A AAC B B ABAC AB

= + ⋅ +

= + ⋅ +

= + +

= + + ⋅ =

= + +

= + [ 1]( )

B BA C B

+ =

= +

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•  Example: Simplify –  The expression is already in SOP form

•  Example: Simplify

z ABC ABC ABC= + +

( )(1)

( )( ) [by rule 11 in previous chapter]

z AB C C ABCAB ABCAB ABCA B BCA B C

= + +

= +

= +

= +

= +

( )( )x A B A B D D= + + +

[multiply out] [ 0 and 0]

( 1) [factoring]

x AAD ABD ADD BAD BBD BDDABD BAD BD AA DDBD A ABD

= + + + + +

= + + = =

= + +

= [ 1 and 1+1=1]A A+ =

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•  Example: Simplify –  First expand it into SOP form

–  Then look for the largest common factor between any two or more product terms: first and last terms have , while the second and third terms share

–  Grouping the terms gives

•  We might think that the above expression is the simplest since it cannot be simplified further

•  However, in fact, the simplest form of this equation is •  It turns out that we missed an operation earlier that could have led to

the simpler form •  Question: How could we have known that we missed a step?? •  Ans: There is no way we can know. This illustrate the frustration often

encountered in Boolean simplification

( ) ( )( ) [by 1, ]

z BC A A AD C BCBC AD C B A A C BC C B

= + + +

= + + + = + = +

( )z AC ABD ABCD ABC= + +

BCAD

( ) [DeMorgan thm] [multiply out]

[ 0]

z AC A B D ABCD ABCACA ACB ACD ABCD ABCACB ACD ABCD ABC AA

= + + + +

= + + + +

= + + + =

z ABD BC= +

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Minimization by Karnaugh Maps •  What is a Karnaugh map?

–  Karnaugh map (K map) is a graphical tool used to simplify a logic equation or to convert a truth table to its corresponding logic circuit

–  With a simple and orderly process, the resulting logic expression will be in its simplest SOP form !!!

•  K map format: –  3 Variable K map:

–  A grid of squares –  Each square represents one product term

•  eg: top-left represents , bottom-right represents –  The variables are ordered according to Gray code

•  only one variable changes between adjacent squares –  Squares on edges are considered adjacent to squares on opposite edges

A B C⋅ ⋅ A B C⋅ ⋅

A\BC 00 01 11 10

0

1

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–  4 Variable K map

–  The square marked ? represents –  The square marked ?? represents –  Note that they differ in only the C variable. –  Karnaugh maps become clumsier to use with more than 4 variables

AB\CD 00 01 11 10

00

01 ? ??

11

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A B C D⋅ ⋅ ⋅A B C D⋅ ⋅ ⋅

•  General procedure for using K map: 1.  Fill out the K map for a given Boolean expression 2.  Simplify the expression by properly combining those squares in the K map

that contains 1s. This process is called looping

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Filling out a Karnaugh Map •  Given an initial (unsimplified) logic Boolean expression •  Write the expression in SOP form •  For each product term, write a 1 in all the squares which are included

in the term, 0 elsewhere –  All variables present in the product term: one square –  One variable missing: two adjacent squares –  Two terms missing: 4 adjacent squares

•  Example 1:

•  Example 2:

•  Example 3:

A\BC 00 01 11 10

0 0 0 1 0

1 0 1 1 1

X ABC ABC ABC ABC= + + +

X BC ABC AC= + +A\BC 00 01 11 10

0 1 0 0 0

1 1 1 1 1

X B ABC A= + +A\BC 00 01 11 10

0 1 1 0 1

1 1 1 1 1

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Looping •  Minimization is done by spotting patterns of 1's and 0's •  Pairs of adjacent 1's (Looping groups of two)

–  remember that adjacent squares differ by only one variable –  hence the combination of 2 adjacent squares has the form –  this can be simplified (from before) to just P

)( AAP +

•  Example 1 (continue)

-- the adjacent squares A B C and differ only in A -- hence they can be combined into just BC, indicated by the blue loop -- looping can also be done by grouping and A B C to give AC, as indicated by the red loop -- furthermore, looping can also be done by grouping A B C and to give AB, as indicated by the yellow loop -- The simplified Boolean equation is one that sums all the terms corresponding to each of the group:

A\BC 00 01 11 10

0 0 0 1 0

1 0 1 1 1

ABC

ABC

ABC

X ABC ABC ABC ABC= + + +

ABBCACX ++=

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More examples on looping of two

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Looping group of four (quads)

•  A K map may contain a group of four 1s that are adjacent to each other. This group is called quad •  Looping a quad of adjacent 1s eliminates the two variables that appear in both complemented and uncomplemented form •  Examples:

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Looping group of eight (Octets) •  A group of eight 1s that are adjacent to one another is called an octet •  Looping an octet of adjacent 1s eliminates the three variables that

appear in both complemented and uncomplemented form •  Examples:

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Complete Simplification Process 1.  Construct the K map and place 1s and 0s in the squares according

to the truth table. 2.  Group the isolated 1s which are not adjacent to any other 1s.

(single loops) 3.  Group any pair which contains a 1 adjacent to only one other 1.

(double loops) 4.  Group any octet even if it contains one or more 1s that have already

been grouped. 5.  Group any quad that contains one or more 1s that have not already

been grouped, making sure to use the minimum number of groups. 6.  Group any pairs necessary to include any 1s that have not yet been

grouped, making sure to use the minimum number of groups. 7.  Form the OR sum of all the terms generated by each group.

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•  Examples: AB\CD 00 01 11 10

00 0 1 0 0

01 0 1 0 0

11 1 1 1 1

10 0 1 0 0

AB\CD 00 01 11 10

00 0 0 0 0

01 1 0 0 1

11 1 0 1 1

10 0 0 0 0

AB CD+ BD ABC+

Step2. Isolated 1: None Step3. Adjacent to only one 1: None Step4. Octet: None Step5. Quad: Blue and red loops Step6. All 1s have been looped => skip this step

Step2. Isolated 1: None Step3. Adjacent to only one 1: red loop Step4. Octet: None Step5. Quad: Green loops Step6. All 1s have been looped => skip this step

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•  More examples

S2. Isolated 1: loop 4 S3. Adjacent to only one 1: loop 11,15 S4. Octet: None S5. Quad: loop 6,7,10,11 S6. All 1s have been looped => skip

S2. Isolated 1: None S3. Adjacent to only one 1: loop 3,7 S4. Octet: None S5. Quad: loop 5,6,9,10 and loop 5,6,7,8 S6. All 1s have been looped => skip

S2. Isolated 1: None S3. Adjacent to only one 1: loop 2,6, loop 7,8, loop 11,15 and loop 9,10 S4-S6. All 1s have been looped => skip

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Arithmetic circuit •  Recall the binary addition process •  LS Column has 2 inputs 2 outputs

–  Inputs: –  Outputs:

•  Other Columns have 3 inputs, 2 outputs –  Inputs: –  Outputs: –  We use a "half adder" to implement the LS column –  We use a "full adder" to implement the other columns –  Each column feeds the next-most-significant column.

A 1 0 0 1

+B 0 0 1 1

S 1 1 0 0

C1S0

A0 B0

An Bn CnSn Cn+1

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Half Adder •  Truth Table •  Boolean Equations

•  Implementation

–  Note also XOR implementation possible for S

A B S C

0 0 0 00 1 1 01 0 1 01 1 0 1

ABCBABABAS

=

⊕=+=

A

B

&

& A B

≥1 S C & A

B

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Full Adder •  Truth Table •  Boolean Equations

A B Ci S Co

0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1

)(

........

BACABBCACAB

ABCCABCBABCAC

CBACBACBACBACBAS

i

ii

iiiio

i

iiii

++=

++=

+++=

⊕⊕=

+++=

•  Complete circuitry for a FA

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Parallel Adder •  The full adder obtained in the previous

slide can only add two single bit (plus a carry bit)

•  In order to add two multi-bit numbers, we use 1 full adder per bit of the numbers

•  The carry is propagated from one stage to the next most significant stage –  takes some time to work because of the

carry propagation delay which is n times the propagation delay of one stage

4-bit Parallel Binary Adders (74LS283)

2-bit Parallel Binary Adders

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Parallel Subtraction using Parallel Adder •  Subtraction can be achieve

by adding the complement –  E.g.: 6 - 3 = 6 + (-3) = 3

•  2's complement :- invert all bits and then add 1 –  Invert all the inputs bits of B –  Use Carry-in of first stage for

the "add 1"

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In conclusion …

•  Conversion through 3 representations

•  Simplification of Boolean expressions – Boolean algebra

– Karnaugh map

•  Arithmetic Circuit – Half adder – Full adder – Subtractor