Digital Electronics

Lecture 6

Combinational Logic Circuit Design

Lecture 6 outline Review of last Lecture

Design procedure for simple combinational logic circuits

Continuation of Simulation exercises

Review of Last Lecture

Simplification using K-map

Simplification using logic converter in Multisim

DESIGN PROCEDURE FOR SIMPLE COMBINATIONAL

LOGIC CIRCUIT

1- Write out the truth table for the required function.

2- From the truth table, write down the Boolean equation for the output.

3- Minimize the equation if appropriate. (using Karnough map).

4- Apply DeMorgan theorem as appropriate. 5- Draw out the circuit using NAND (or NOR)

gates. Apply rules 4 and 5 if the circuit is restricted to one type of gates only.

Example 1

Design a NAND gate Implementation of the following truth table.

A B C F0 0 0 00 0 1 00 1 0 0 Starting Point0 1 1 11 0 0 01 0 1 11 1 0 11 1 1 1

Using Boolean Algebra

2- F = A_

BC + AB_

C + ABC_

+ABC 3- Adding redundant term ABC many

times.

F = BC (A_

+ A) + AC(B_

+B) + AB (C_

+C) F = BC + AC + AB 4- Apply DeMorgan theorem F = BC . AC . AB

F

A

B

AC

AB

BC

C

Example 2

This circuit is one of many employed in the arithmetic logic unit of a digital computer. It basically generates a Sum and a Carry simultaneously whilst adding a pair of one bit numbers.

A B Sum Carry0 0 0 00 1 1 01 0 1 01 1 0 1

Sum = A_

B + AB_

Carry = A.B

AB Sum

Carry

H. A

A B

Sum Carry

FULL ADDER

C N-1

S

SUMCarry out

A B

Carry in

CN

F.A

Truth tableA B Cin Sum Carry0 0 0 0 00 0 1 1 00 1 0 1 00 1 1 0 11 0 0 1 01 0 1 0 11 1 0 0 11 1 1 1 1

S = A_

B_

C + A_

BC_

+AB_

C_

+ ABC

S = C (A_

B_

+AB) + C_

( A_

B + AB_

)

S = C (A+B) + C_

( A + B)

S = A + B + C

Co = A_

BC + AB_

C + ABC_

+ ABC

Co = C ( A_

B + AB_

) + AB

C = C(A + B) + AB

MULTIPLEXER

A multiplexer (MUX) is a device that allows digital information from several sources to be routed onto a single line for transmission over the line to a common destination.

BC

S0S1

A

D

X

MUXData select

Data Inputs

OUTPUT

------------------------------------------------------------------- Data Select Inputs Input Selected S1 S0 --------------------------------------------------------

0 0 S_

1 S_

0 A A

0 1 S_

1 S0 B B

1 0 S1 S_

0 C C 1 1 S1 S0 D D --------------------------------------------------------

X = S_

1 S_

0 A + S_

1 S0 B + S1 S_

0 C + S1 S0 D

X = S_1 S_0 A + S_1 S0 B + S1 S_0 C + S1 S0 D

Main Points

Design procedure for combinational logic circuits.

Adders

Multiplexer

Simulation exercises using logic converter

The End

Thank you for your attention.