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Project on
DIGITAL MULTIMETER DESIGN (USING VHDL)Presented by:o Mohit Mukul 1104030o Harsh Prakash Singh 1104062o Rahul Kumar 1104063
Under the supervision of : Mr. Bibhuti Bikramaditya (TekBrains Pvt.ltd.) and Dr. Bijay Kumar Sharma Deptt. Of ECE, NITP
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING,
NIT PATNA
Introduction Objectives Platforms used Mechanism Working parts Work done Conclusion Future scope References
Phases of the project
1.1 Digital Multimeter(DMM) An electronic measuring instrument that combines several
measurement functions in one unit, viz. voltage, current, resistance, beta of the transistors, etc.
Display the measured value in numerals More common than the analog multimeters. The signal under test is converted into voltage and an
amplifier with electronically controlled gain preconditions the signal.
Introduction
1.2 VHDL VHDL stands for VHSIC (Very High Speed Integrated Circuits) Hardware
Description Language A hardware description language which describes the behaviour of the circuit
based on the logic implemented Intended for circuit synthesis and circuit simulation A standard, technology/vendor independent language and so is portable and
reusable. Applications in the field of Programmable logic devices(PLD’s)
-- Complex Programmable Logic Devices (CPLD’s)-- Field Programmable Gate Arrays (FPGA’s)
and in the field of Application Specific Integrated Circuits (ASIC’s) Statements are concurrent i.e., executed parallely. So VHDL is sometimes also
called code. In VHDL, statements inside a PROCESS, FUNCTION and PROCEDURES are
processed serially.
Contd.
Summary of VHDL design flow:
Contd.
1.3 FPGA FPGA stands for Field Programmable Gate Array is an IC designed to be configured by a designer after manufacturing. So, Field Programmable. Configured using a HDL An array of programmable logic blocks which can be reconfigured Perform complex combinational functions or simple logic gates and even include simple flip-flops
Contd.
To design, build and test a multimeter comparable in performance to some extent with the multimeters available at the ECE laboratories.
Use a FPGA kit to implement the logic component of our circuit (programmed via VHDL) and also for its LED and LCD displays to showcase the functionalities of our multimeter.
The basic design of the VHDL code is a system to :-- Control the flow of the following states- Reset/Display,
Count- Up, Set-Sign, Countdown and Binary-BCD Decoding -- Manipulate the four registers to fluctuate between the
ohmmeter, voltmeter, ammeter and the Beta calculations. -- Use the LCD drivers to signal the current state.
Objective
Xilinx Vivado 2014.1 ModelSim SE 6.2g (Mentor Graphics) Xilinx SDK 2014.1 Windows 7
Platforms used
Modes of DMM: 1. Voltmeter 2. Ammeter3. Ohmmeter 4. Beta calculator
Built by chip soldering on the Electric Circuit Board (ECB) Run by FPGA kit, which is controlled by the VHDL code FPGA sends the signals to the ECB contained in a black box
Main parts of the DMM:1. VHDL code 2. Power Supply3. Voltmeter circuit 4. Ammeter circuit5. Ohmmeter circuit 6. Beta calculator
circuit7. Metal enclosure
Mechanism
The FPGA is sync. with the fundamental Voltmeter circuit to perform as per the VHDL code
Voltmeter circuit is the basic circuit and serves as a platform
Ohmmeter uses the voltmeter to know the unknown R by passing a small constant current
Ammeter uses the voltmeter and a difference and inverting amplifier to find the current
Power supply steps down the AC voltage and converts it into DC.
Contd.
VHDL code Power supply Voltmeter Ammeter Ohmmeter Beta calculator Metal enclosure
Working parts
-- serves as the brain of the DMM -- works as counters, registers, decoders, multiplexers,
range checkers, drivers and state machinesModules of the VHDL code:-- up and down counters-- range check modules (not a part of the State
machine)-- binary to BCD converter-- LCD driver -- 4 bit register to store the current mode
VHDL code
States of the state machine:1. reset/display 2. count up 3. set sign 4. count down 5. binary-bcd decodingReset mode: 1. Resets all registers to store new BCD value for display2. Resets the integrator by shortening the capacitor
Count up mode:3. Up counter measures a particular time(say 500ms) while Vin is enabled and
passed to integrator4. After time, counter signals to pass to next state
Set sign mode:5. Output from the voltmeter comparator is inverted and saved in a latch6. If Vcomparator>Vg, Vin is –ve or vice versa7. Output of latch is passed to mux to decide the Vref (+5/-5 volts)
State machine
Count down mode:1. Stays in this mode until Vcomparator changes from high to
low or vice versa2. Down counter is enabled to store time in binary
Binary to BCD converter mode:3. Time in binary is converter to BCD4. Binary is used for easier computation
Working of State machine is based on the Moore’s style state principle
Contd.
Voltmeter circuit consists of:1. Integrating op-amp2. Comparator3. Multiplexer4. Relay switches
Integrator and Comparator form the main part of the ADC Multiplexer provides the Vref as per the sign of Vin Relay switches are used to choose between Vin and Vref
and to reset the integrator Circuit communicates with the FPGA to work as a full
voltmeter
Voltmeter
Block diagram for voltmeter
Ammeter circuit consists of the following chips:1. Difference amplifier2. Inverting amplifier3. Multiplexer4. Resistors of diff. values
Difference amplifier amplifies [Vth-Vin] and is then inverted When Vth is 0, ouptut from inverting amplifier is +ve Multiplexer switches between diff. channels to get the
output voltage in the desired range
Ammeter
Ammeter circuit
Different constant current sources for different range of the resistances
4 to 1 multiplexer to choose a range
Schematic diagram of Ohmmeter circuit:Here, Re is calculated by the formula: (5-0.7)/Re=0.00001 as Vref=5V and Vbe=0.7 V and constant current=0.01mA Measuring the drop across the passive element and multiplying by 10000, we get the load resistance.
Ohmmeter
Constant base current is sent using a constant current source
Ib=0.1mA for both types npn and pnp transistors Variable resistor is used to make accurate value of resistor Transistor acts as current amplifier Ic= β x Ib Voltage across the collector resistance is measured to get
the Ic
Beta (β) Calculator
Circuit diagram for β calculator
Written VHDL codes for the following registers and simulated and synthesized them on Xilinx. --Flip-flops --Binary-BCD converter --Latches -- Ranger checker modules--Comparators -- LCD driver--Encoders -- State machines--Decoders --Multiplexers--Demultiplexers--Counters
Work done
Complete replacement of analog multimeters due to:-- higher accuracy-- higher durability-- no parallax error
Modern DMM’s have a no of measurement enhancements which include:
-- Auto ranging-- Auto polarity-- Sample and hold--Graphical representation of the quantity under test-- A low bandwidth oscilloscope-- Simple data acquisition features
Future Scope
We use VHDL to run the FPGA kit to control the different modes of DMM
Channel to these circuits is switched when button on the board is pressed
Power supply provides the various voltages to the chips in the circuits
Combining these circuits together and putting them in a black box, we build our DMM using VHDL.
Conclusion
"Slope (integrating) ADC." : DIGITAL-ANALOG CONVERSION. N.p., n.d. Fri. 20 Oct. 2012. <http://www.allaboutcircuits.com/vol_4/chpt_13/8.html>.
www.TekBrains.org (Bibhuti Vikramaditya) "Www.datasheetcatalog.com." Www.datasheetcatalog.com. 21
Oct. 2012 <http://www.datasheetcatalog.org/datasheet/stmicroelectronics/1981.pdf >.
"How Analog-to-Digital Converter (ADC) Works | Hardware Secrets." How Analog-to-Digital Converter (ADC) Works | Hardware Secrets. N.p., n.d. Sat. 21 Oct. 2012. <http://www.hardwaresecrets.com/article/How-Analog-to-Digital-Converter-ADC-Works/317/8>.
”Current Source”. Current source From Wikipedia, the free encyclopaedia N.p. 14 Nov 2012. Retrieved 20 Nov.2012< http://en.wikipedia.org/wiki/Current_source>
www.wikipedia.org
References
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RTL synthesis diagram
RTL synthesis diagram
RTL synthesis diagram
RTL synthesis diagram
RTL synthesis diagram
RTL synthesis diagram
RTL synthesis diagram
RTL synthesis diagram
RTL synthesis diagram