Differential and Multistage Amplifiers -...

Differential and Multistage Amplifiers

M2-3 DA & Multi-stage Amp, Sedra/Smith

Figure 8.15 The basic BJT differential-pair configuration.


Figure E8.9


Figure 8.18 The transfer characteristics of the BJT differential pair (a) can be linearized (b) (i.e., the linear range of operation can be extended) by including resistances in the emitters.


Figure 8.21 A differential amplifier with emitter resistances. Only signal quantities are shown (in color).


Figure 8.22 Equivalence of the BJT differential amplifier in (a) to the two common-emitter amplifiers in (b). This equivalence applies only for differential input signals. Either of the two common-emitter amplifiers in (b) can be used to find the differential gain, differential input

resistance, frequency response, and so on, of the differential amplifier.


Figure 8.23 The differential amplifier fed in a single-ended fashion.


Figure 8.24 Equivalent-circuit model of the differential half-circuit formed by Q1 in Fig. 8.22(b).


Figure 8.26 (a) Definition of the input common-mode resistance Ricm . (b) The equivalent common-mode half-circuit.


Figure 8.27 Circuit for Example 8.4.


Figure 8.30 A three-stage amplifier consisting of two differential-in, differential-out stages, A1 and A2, and a differential-in, single-ended-out stage A3.


Figure 8.31 A simple but inefficient approach for differential to single-ended conversion.


Figure 8.33 Output equivalent circuit of the amplifier in Fig. 8.32(a) for differential input signals.


Figure 8.38 Analysis of the bipolar active-loaded differential amplifier to determine the common-mode gain.


Figure 8.39 The active-loaded BJT differential pair suffers from a systematic input offset voltage resulting from the error in the current-transfer ratio of the current mirror.


Figure 8.43 A four-stage bipolar op amp.


Figure 8.44 Circuit for Example 8.6.


Figure 8.45 Equivalent circuit for calculating the gain of the input stage of the amplifier in Fig. 8.43.


Figure 8.46 Equivalent circuit for calculating the gain of the second stage of the amplifier in Fig. 8.43.


Figure 8.47 Equivalent circuit for evaluating the gain of the third stage in the amplifier circuit of Fig. 8.43.


Figure 8.48 Equivalent circuit of the output stage of the amplifier circuit of Fig. 8.43.


Figure 8.49 The circuit of the multistage amplifier of Fig. 8.43 prepared for small-signal analysis. Indicated are the signal currents throughout the amplifier and the input resistances of the four stages.


Figure P8.54


Figure P8.57


Figure P8.59


Figure P8.60


Figure P8.61


Figure P8.62


Figure P8.63


Figure P8.81


Figure P8.98


Figure P8.112


Figure P8.118


Figure P8.120


Differential and Multistage Amplifiers -...

Documents

Transcript of Differential and Multistage Amplifiers -...