Design VASG Kicks-Off VHDL 200x

Stephen BaileyChair

Agenda

• Welcome

• Review of Tuesdays Public Meeting

• What we are NOT doing today

• What we are doing today

• Schedule & Next meeting(s)

Welcome!

• I’m pleased by the interest in the future of VHDL!

• After a few false starts

I am glad to report thatI am actually being pushedby others to get this workmoving and on track!

Review of Public Meeting

• On Tuesday, we held a public meeting at DVCon

• Purpose: Publicize our work to update VHDL

• Response: (TBD)

What We are NOT Doing Today

• We are not here to gather requests

• We are not here to discuss the merits (or lack thereof) of requests

• We are not here to analyze any requests

• We are not here to design solutions to any requests

We are not prepared to jump into this level of detail!

What are we doing today?

• Glad you asked.

• Agree on an overall process

• Agree on an initial break-out of functional responsibilities

• Identify the leaders for each functional team

• Identify key milestones

• Set schedules to meet milestones

We will ship on schedule!

Chair /= Dictator

• What follows is my strawman submitted for discussion

• Please, let us not get our britches twisted in a knot

• Let’s agree on the general process

• Get started immediately (tomorrow) on enhancing VHDL

• Remain reasonable professionals during the process

The Process

• Collect requests

• Reasonableness check & assignment

• Analyze request

• Propose language change

• Review change

• Integrate change

• Update LRM

• Ballot & Publish

• Repeat (as needed)

The Process

• Validation

No recommended change will be accepted unless:• At least one EDA vendor has prototyped the change

• At least one end user has tested the change

• Discard anything that

No one cares to implement

Nor can be bothered to try (or pressure their favorite EDA vendor to prototype)

Accellera & IEEE

• IEEE owns the copyright to VHDL

Therefore, official standardization via IEEE standards balloting process

• Accellera

Facilitates: Resources, coordination and publicity

Informal (de facto) interim standardization• “Sense-of”

• System Verilog 3.0, 3.1, etc.

• Serves as a “light-weight” synchronization point

Fast-Tracking

• Can (should) we fast-track a limited set of capabilities?

• 1164 and 1076.3 could use:

vector/scalar logical operations

unary reduction operations

Standard Signal Spy / XMR capability

to_string/to_str functions added to TextIO

• I think we should try to meet their needs ASAP

Teamwork

• Must divide the work to make timely progress

How many teams?

Scope for each team?

Resolving overlaps?

Reviewing team findings and recommendations

Integrating team results into a coherent whole

• But WG can direct priorities

Proposed Team Structure

• Fast-Track (J Lewis & J Willis)

• Simulation performance (J Ries)

• Testbench/verification (W Ecker/M Bauer?)

• Assertion-based verification (R Anderson)

• Environment (D Soderberg?)

• Modeling and productivity (J Lewis)

• Data types and abstraction (P Menchini)

• Miscellaneous (J Willis)

• Steering Committee (S Bailey)

Fast-Track

• Could be ISAC

• Possible that Fast-Track becomes Misc team after fast-track is completed in 6 months

For each team

• Enumerate initial assignment of requests

• (Want to get agreement from “steering committee before I spend the time on this”)

• Also, want to allow the flexibility that more than one team can analyze the same request

Require both (all) teams to agree to proposed (re)solution

• Team members and team leader

Schedule

• DATE

Informational meeting (like DVcon mtg)

• DAC

Each team has:• Reasonableness check of all assigned requests

• Prioritized what is to be done when

• General direction for highest priority items

• Schedule to achieve draft 1

Fast-track has:• Technical proposal submitted for WG review and approval

Schedule

• DAC+1 month

WG determination of fast-track update

Will it be submitted for balloting?

• Dec 03

Draft 1 submission to VASG for approval• May or may not be submitted for IEEE balloting

• WG needs to decide if IEEE approval at that time is a good use of time

• Clearly some relationship to fast-track

Schedule

• DAC 04

Draft 2 submission to WG for review/approval

Determination if draft 2 should be submitted for IEEE balloting

WG assessment of remaining work• Development of continued work plan

• Including additional drafts

• IEEE balloting

Schedule

• Steering Committee

WG Chair, ISAC Chair, team leaders

Review progress bi-weekly

• Teams

Must meet no less frequently than bi-weekly to ensure progress

Assume virtual meetings (telecon/web)• Up to team to decide most effective way to meet