IET Power Electronics

Research Article

Design and development of single phase AC–DC discontinuous conduction mode modifiedbridgeless positive output Luo converter forpower quality improvement

ISSN 1755-4535Received on 2nd October 2018Revised 1st May 2019Accepted on 13th May 2019E-First on 7th August 2019doi: 10.1049/iet-pel.2018.6059www.ietdl.org

J. Gnanavadivel1 , P. Yogalakshmi1, Natarajan Senthil Kumar1, K.S. Krishna Veni11Department of Electrical and Electronics Engineering, Mepco Schlenk Engineering College, Sivakasi, Tamilnadu, India

E-mail: gvadivel@mepcoeng.ac.in

Abstract: Power factor corrected AC–DC converter topologies have been of research interest for DC power supplies. The maingoal of this work is to improve power quality at the supply side and maintain constant DC voltage at the output side by designinga Modified Bridge Less Positive Output Luo (MBLPOL) power factor correction (PFC) converter. Discontinuous conductionmode is also possible for input PFC with a small filter at the source side. In order to regulate the DC load voltage for variousloads and supply voltage conditions, a feedback control circuit with a single voltage sensor is proposed for the PFC converter. Aprototype of 100 W, 48 V, AC–DC MBLPOL converter is designed and tested. Proper design of controller for the converterguarantees the excellent performance and the same is validated with the help of simulation and hardware results. The proposedMBLPOL converter is tested for DC load voltage regulation for various load power and supply voltage variations. Theexperimental study shows supply current total harmonic distortion of 1.24% at rated load while maintaining unity power factor.

1 IntroductionIn recent years, research on power factor corrected AC–DCconverter topologies have been massively increasing. These AC–DC converters are widely employed in many applications likebattery charging, industries, military etc. Conventional AC–DCconversion is attained with a help of step-down transformer, diodesand capacitors. These traditional methods give rise to several issueslike power losses, circuit complexities and impart distortions ininput current and poor power factor. Hence power factor correction(PFC) plays a vital role in the design of AC–DC converter.Generally, DC–DC converters followed by the diode bridgerectifier (DBR) serve as PFC converter [1].

The main drawback associated with boost type PFC DC–DCconverter is the generation of higher output voltage with respect toapplied voltage [2, 3]. Due to the flow of high ripple currentthrough power devices in each current flow cycle, poor efficiencyis obtained. So, it is less preferable. In case of low power supplies,buck type (magnitude of output voltage < supply voltage) PFCconverter plays a vital role but, the discontinuous mode of supplycurrent generates more harmonics. Since at zero crossing timeinterval, shaping of input AC current does not take place whichleads to remarkable increase in total harmonic distortion (THD)value and very low supply side power factor. Therefore, bulkyinput filter made of passive components is mandatory to suppressthe unwanted distortions thereby efficiency gets reduced and hencecost of the system gets increased. Due to discontinuous inputcurrent in buck converter, current gets highly distorted. So, sourcecurrent harmonics is high and also input power factor is very low.Hence, buck converter is less preferable for PFC [4].

Hence, to rectify these issues, buck-boost topologies of PFCconverter like SEPIC, Cuk, Zeta have been used [5–8]. Theseconverters can be operated either in discontinuous conductionmode (DCM) or CCM mode. DCM is more likely preferable thanCCM as it involves inherent input PFC using very simple, costeffective control circuitry [6]. In spite of being operated in DCM,the input current remains continuous for Cuk, Zeta and SEPIC typePFC converter topologies. Also, desired PFC can be achievedalong with the capability of stepping up and stepping down theapplied voltage, yet it requires more number of passive devices.These passive devices result in more power loss and reducedefficiency. More number of devices lead to high system cost.

Moreover, the output current is discontinuous in case of SEPICconverter which in turn induces more ripple content in the outputside [8, 9]. Therefore, it leads to high switching loss. Cuk typeconfiguration always provides inverting output voltage [7, 10]thereby it needs an additional inverting amplifier circuitry in closedloop control circuit. Hence, control circuit will be more complexand system cost increases. Hence, Luo converter is preferred in thismanuscript for enhancement of power quality at input side withminimum number of devices compared to existing solutions. Also,any DC–DC converter topology followed by the classical DBRalways suffer from the flow of high inrush current and overloadcurrent.

Tremendous conduction losses occur while using DBR [3, 7, 8].Therefore, researchers pay attention towards bridgeless AC–DCconverter topologies to minimise conduction losses and number ofpassive components in the power circuit [11–15]. Also, no separatecontrol block has to be provided for safeguarding power switchesfrom attack of inrush/over load current [16]. Bridgelessconfigurations of Cuk, Sepic and Zeta converters are widelypreferred for power quality improvement at source side [17–23]. Inthe recent days, DC–DC Luo converter with the ability of itsvoltage lifting technique attracts many researchers. Luo convertercan be operated with a variety of voltage lifting methods like self-lift, re-lift, multiple lift, ultra-lift etc. [10, 24, 25]. Attracted bythese key features, researchers have chosen Luo converter as PFCconverter [26]. Various lifting techniques like self-lift, re-lift, ultra-lift incorporated in Luo converter with high gain are widely used inhigh power applications. Moreover, the abovementioned convertersdo not belong to the category of buck-boost configuration. Theybelong to boost type configuration [19–21]. Authors' main goal isto develop bridgeless PFC converter for low power applicationslike battery charger, LED driver etc., Therefore, buck typeconfiguration of Modified Bridge Less Positive Output Luo(MBLPOL) buck-boost converter is preferred. Also, the number ofdevices required for MBLPOL buck-boost converter is less incomparison to other existing buck-boost converter topologies likeSEPIC, Cuk, Zeta etc., Thereby, it leads to compact and cost-effective system. Also, bridgeless AC–DC Luo converter has beenpresented in [27]. This converter produces negative output voltageby stepping up / stepping down the given AC supply. THD of 4%

IET Power Electron.© The Institution of Engineering and Technology 2019

1

is obtained at rated load with the help of simple voltage followerapproach.

This paper proposes the AC–DC MBLPOL converter forenhancing input power factor and reducing AC current harmoniccontent. It is one among buck-boost configurations of powerconverter. In comparison to [27], the proposed converter isdesigned with reduced number of passive components forproviding non-inverted, DC-regulated load voltage. MBLPOLconverter can be operated under universal input voltage of 90 V to260 V with the guarantee of providing enhanced quality of ACpower at supply side. Also, for wide variation of load power,enhanced power quality is maintained at the input side. As operatedin DCM, control circuit is uncomplicated and inexpensive.

2 Circuit description and working principle ofMBLPOL PFC converterFig. 1 represents the proposed modified bridgeless positive outputLuo PFC converter. A small value of EMI filter is shown at the ACsupply side and the MBLPOL converter is fed from thecombination. PWM signals to both switches (S1, S2) are producedfrom the simple control loop involving PI voltage controller. Afterprocessing the DC link error voltage signals, PI controllerdetermines the duty cycle. This overall system proves its worthyperformance under load variation and input voltage variation byproviding reduced supply current harmonics, well-regulated DCload voltage and unity power factor. The converter operation canbe explained in three modes during positive half cycle as well as innegative half cycle. Figs. 2–4 clearly depicts the three modes ofoperation during positive half cycle. Detailed explanation forworking of MBLPOL converter during positive half cycle is givenin the following section.

The same operation of the MBLPOL converter will beperformed during negative half cycle by power flow through S2,L2, L0, D2 and D4.

2.1 First mode operation of MBLPOL (positive half cycle)

The first mode of operation of MBLPOL converter shown in Fig. 2takes place when the power MOSFET S1 is in ‘ON’ state withforward biasing of diode D1. The input current flows through D1and charges the input inductor L1 depending on value ofinductance. Meanwhile, the inductors L0 and intermediate capacitorC1 starts discharging and so the filter capacitance C0 gets chargedby the stored energy in the L0 and C1. The current and voltageequations involved in this mode are

diL1

dt = − VsL1

. (1)

diL0

dt =VC1

L0−

VC0

L0. (2)

dVC1

dt = −iL0

C1. (3)

dVC0

dt =iL0

C0−

VC0

RC0. (4)

2.2 Second mode operation of MBLPOL (positive half cycle)

Fig. 3 shows the second mode operation of MBLPOL. During thismode, power MOSFET S1 gets turned ‘OFF’ and diode D3 isforward biased. The capacitor C1 is being charged from the storedenergy by the inductor L1.

The output inductor L0 discharges its stored energy and theoutput capacitor C0 delivers its energy to DC load. The current andvoltage equations involved in this mode are

diL1

dt = −VC1

L1. (5)

diL0

dt =VC1

L0−

VC0

L0. (6)

Fig. 1  Schematic representation of MBLPOL PFC converter

Fig. 2  Mode 1 equivalent circuit

Fig. 3  Mode 2 equivalent circuit

Fig. 4  Mode 3 equivalent circuit

2 IET Power Electron.© The Institution of Engineering and Technology 2019

dVC1

dt = −iL1

C1+

iL0

C1. (7)

dVC0

dt =iL0

C0−

VC0

RC0. (8)

2.3 Third mode operation of MBLPOL (positive half cycle)

The power MOSFET S1 remains ‘OFF’ during the third mode anddiodes D1 and D3 gets reverse biased. It is represented in Fig. 4.The input inductor current becomes discontinuous since, L1transferred its whole energy. The capacitor C1 charges the outputinductor L0 and the output filter capacitor C0. The DC load voltagerises in this mode. The current and voltage equations involved inthis mode are

diL0

dt =VC1

L0−

VC0

L0. (9)

dVC1

dt =iL0

C1. (10)

dVC0

dt =iL0

C0−

VC0

RC0. (11)

Fig. 5 shows the theoretical waveforms for MBLPOL PFCconverter.

In order to produce gate pulses to switches S1 and S2, thecontrol signal Vcs obtained from PI controller is compared withhigh frequency ramp wave.

(i.e.) S1 and S2 will be turned ON; if [Ramp (t) < Vcs(t)]S1 and S2 will be turned OFF; if [Ramp (t) ≥ Vcs(t)]

3 Design consideration of MBLPOL PFCconverterThe modified bridgeless positive output Luo converter is designedto provide input PFC even with discontinuous input inductorscurrent (iL1 and iL2). Whereas input capacitor current (iC1) and theoutput inductor current (iL0) remain continuous. Controlling ofoutput voltage (from 28 V [V0mn] to 48 V [V0mx]) and outputpower (from 20 W [Pmn] to 100 W [Pmx]) is done by properdesigning of ‘L’ and ‘C’ components in the proposed MBLPOLPFC converter. Switching frequency is chosen as 20 kHz.

Using equations provided in [27], design values of inductorsand capacitors for desired power rating are computed.

The average value of input AC voltage across the EMI filter is

Va = 2 2Vsπ = 108 V . (12)

Generally, duty cycle ‘d’ can be computed from equation

d = V0

Va + V0. (13)

The input inductor value can be obtained as

L1, 2 = dmn 1 − dmn Va2 f sIdc

= 207.69 μH, (14)

where dmn and dmx are calculated as 20 and 31%, respectively,corresponding to V0mn and V0mx values.

For DCM, inductor value must be chosen less than the criticalvalue [6]. Therefore, inductor value is taken as 50 µH.

Care must be given in designing input inductor as it onlyassures discontinuous input current. Input capacitors (C1 and C2)can be designed using dmx value

C1 =dmxVC1

2R f sΔVC1= 1.68 μF . (15)

△V01 is the ripple voltage across capacitor (C1) whose value isconsidered as 20% of V01. Available capacitance value of 1.1 µF ischosen as input capacitance.

Output inductor L0 can be designed using equation

L0 = dmxIdc16Cfs

2ΔIdc= 288 μH, (16)

where △Idc is taken as 10% of Idc.Output filter capacitor can be designed from equation

C0 = Idc2ωLΔVC0

= 2166 μF . (17)

△VC0 = 5% of VC0 ,

The available capacitance value nearer to 2166 µF is 2200 µF.Therefore, input capacitor value is chosen as 2200 µF.

In order to suppress the input current ripples in the supply side,proper value of LC filter should be provided across AC voltagesource. Maximum value of filter capacitance ‘C’ can be computedas given in equation,

Cmx = ImωLVm

tan θ = 386 nF . (18)

In the same way, filter inductance value can be found from theequation

Lf = 14π2 f cut

2 Cf= 3.36 mH, (19)

(fcut = fs/5), where Vs is the applied AC rms voltage, dmn is theminimum value of duty cycle, dmx is the maximum value of dutycycle, Va is the average value of input AC voltage, Idc is the loadcurrent, fs is the switching frequency, V0 is the regulated DC loadvoltage, V01 is the voltage across capacitor (C1), R is the loadresistor, Im is the peak value of supply current, Vm is the peak valueof supply voltage, and ωL is the frequency of line in rad/s.

4 MBLPOL PFC converter modelingFig. 6 shows the power circuit of MBLPOL converter withequivalent series resistance (ESR) present in inductors andcapacitors.

State space parameters such as iL1, iL0, VC1, VC0 are consideredfor the development of state space model of proposed MBLPOLconverter. For modelling, the ESR present in inductors and

Fig. 5  Inductor current waveforms during one switching period

IET Power Electron.© The Institution of Engineering and Technology 2019

3

capacitors are taken into consideration [28–30]. Generally, statespace equations are represented as

X1 = AnX + BnVs, (20)

V0 = CX, (21)

where[AQ.3] X – state vector, An – input matrix, and Bn – statematrix

(see (22)) (see (23)) (see (24)) Here, there are three operating modes, the individual state space

equations are (see (25)) . By using the input matrix and state spacematrix, the state-space model of MBLPOL converter is derived asrepresented in the (25). d1 = 0.05 and d2 = 0.15 are duty ratios withrespect to the switch and diode ON time period. The values of rL0,

and rL1 are taken as 1 mΩ. The values of rC0 and rC1 are taken as 5mΩ.

The transfer function of the system can be found using theequation as given in [31]

G s = V0 s /V s = C(sI − A)−1B . (26)

By substituting the designed values of passive componentsprovided in the (12)–(19), the transfer function of the system isobtained as

G(s)

= 5.7 × 10−15s3 + 4.3 × 10−7s + 0.695 × 1014

s4 + 2.4s3 + 0.75 × 109s2 + 11.5 × 1011s + 0.85 × 1015 .(27)

diL1

dtdiL0

dtdVC1

dtdVC0

dt

=

−rL1

L10 0 0

0 −rL0

L0

1L0

rL0

rL0 + rC1− 1

L0

rL0

rL0 + rC0

0 1C1

0 0

0 1C0

( RR + rC0

) 0 − 1R + rC0 C0

A1

iL1

iL0

VC1

VC0

+B1

− 1L1

000

Vs .

(22)

diL1

dtdiL0

dtdVC1

dtdVC0

dt

=

−(rL1 + rC1)

L10 − 1

L10

0 −rL0

L0

1L0

rL0

rL0 + rC1− 1

L0

rL0

rL0 + rC0

− 1C1

rL1

rL1 + rC1

1C1

rL0

rL0 + rC10 0

0 1C0

RR + rC0

0 − 1(R + rC0)C0

A2

iL1

iL0

VC1

VC0

+B2

0000

Vs .

(23)

diL1, iL2

dtdiL0

dtdVC1

dtdVC0

dt

=

0 0 0 0

0 −rL0

L0

1L0

(rL0

rL0 + rC1) − 1

L0(

rL0

rL0 + rC0)

0 1C1

0 0

0 1C0

( RR + rC0

) 0 − 1(R + rC0)C0

A3

iL1 or iL2

iL0

VC1

VC0

+B3

0000

Vs .

(24)

4 IET Power Electron.© The Institution of Engineering and Technology 2019

Closed loop transfer function of PI controller is

G(s) = Kp + Kis . (28)

Using the transfer function (28), Ziegler Nichols method [23, 32]tuned values of Kp and Ki are obtained as 0.001 and 0.375,respectively. Bode plot of the whole system has been plotted usingconverter and compensator transfer function [25].

Fig. 7a shows the bode plot obtained for proposed system.Fig. 7b shows the step response obtained for proposed system.From the phase margin and gain margin, the system is proven to bewell stable one.

5 Simulation resultsFig. 8 shows that output voltage waveform of MBLPOL converterfor rated load with PI voltage controller. From this waveform, itcan be seen that the output voltage is maintained constant at 48 V.

Fig. 9 shows source current and source voltage waveformsobtained for rated load conditions. The source current waveformfollows the source voltage waveform. FFT analysis of sourcecurrent of MBLPOL PFC converter using PI controller at ratedload conditions is given in Fig. 10.

At rated load condition, source current THD is 1.24%.Fig. 11 shows the performance analysis of modified bridgeless

Luo converter with PI controller and resistive load for the variationin load power. The output voltage is maintained at 48 V and THDis <2% and the input power factor is nearly unity for wide range ofload variations. Moreover, source current THD value lies between1.24 and 1.84%. Using MBLPOL converter, source current THDdoes not exceed 2% even for low load condition.

Fig. 12 shows the performance analysis of modified bridgelessLuo converter for the source voltage variation. At rated loadconditions, source current THD is 1.24%. Input power factorbecomes 0.9999. For wide variation of source voltage from 90–260 V, THD value ranges from 1.18–1.68% and input power factorranges from 0.9942–0.9999 are obtained.

For comparative analysis, the simulation of various bridgelesstopologies of AC–DC converter of same power rating is done.Table 1 shows the comparative analysis of proposed convertertopology with conventional bridgeless converter topologies basedon performance of converters. Among the different bridgelessconverter topologies, the proposed MBLPOL PFC converterprovides enhanced power quality at AC mains with reducednumber of circuit components.

6 Experimental verificationFig. 13 shows the experimental setup of MBLPOL PFC converterbuilt for validation of simulation results. The prototype of 100 W,48 V AC–DC MBLPOL converter with PI voltage control usingPIC micro controller is developed in the laboratory.

The following equation of PI controller is implemented in PICmicrocontroller in order to generate the control signal Vcs(n):

Vcs(n) = Vcs(n − 1) + Kp Verr(n) − Verr(n − 1) + KiVerr(n), (29)

and

Verr(n) = V0*(n) − V0(n), (30)

X1 = A1X + B1Vs; Where switch′S1′ is turned ON during positive half cycleX1 = A2X + B2Vs; Where switch′S1′ is turned OFF during positive half cycleX1 = A3X + B3Vs; Discontinuous conduction state when the switches are off

A = A1d1 + A2d2 + A3(1 − d1 − d2)

B = B1d1 + B2d2 + B3(1 − d1 − d2)

C = 0001D = 0

.

(25)

Fig. 6  Power circuit of MBLPOL converter with Equivalent SeriesResistance (ESR)

Fig. 7  Stability analysis(a) Bode plot,(b) Step response

Fig. 8  Output voltage waveform with PI controller

IET Power Electron.© The Institution of Engineering and Technology 2019

5

where n represents the nth sampling instant, Verr is the outputvoltage error signal (i.e. difference between reference voltageV0*(n) and actual output voltage V0(n), Vcs is the control signalgenerated by PI controller for PWM unit, Kp and Ki areproportional and integral gain constants of PI controller. Thegenerated control signal is being compared with the ramp signal forgate pulse generation.

Figs. 14a–d represent the source current/voltage waveformswith their corresponding power factor and THD measured usingpower quality analyser for 100, 70, 50, and 20% load power,respectively. For rated load power, source current THD of 1.631%with 0.9996 input power factor is obtained. Source current THD of1.580% with input power factor of 0.9993 is obtained for 70%load. For half the rated load power, source current THD of 1.959%with 0.9990 input power factor is obtained. Even for low loadpower, source current THD value of 2.188% and input powerfactor of 0.9930 are obtained. Therefore, source current THDvalues lies within 2.5% for wide variations of load power withinput power factor nearer to unity. Also, obtained experimentalresults agree with the simulated values.

Figs. 15a–d represent the source current / voltage waveformswith their corresponding power factor and THD for AC rms supplyvoltage of 90, 120, 180 and 240 V, respectively. For supply voltageof 90 V, 2.153% THD with 0.9964 input power factor is achieved.Source current THD of 1.631 and 1.809 with input power factor of0.9996 and 0.9986 are obtained for supply voltage of 120 and 180 V, respectively. For supply voltage of 240 V, 1.978% THD with

0.9952 input power factor is achieved. Therefore, source currentTHD value lies within 3% with input power factor nearer to unityfor universal supply voltage variations. Measured experimentalresults are validated with the simulation results.

7 Transient performanceFig. 16 shows the startup transient of output voltage waveform ofMBLPOL converter at rated load power.

Fig. 17 represents the nature of input voltage waveform and thecorresponding DC load voltage waveform during the sudden

Fig. 9  Input current waveform for R load with PI controller

Fig. 10  FFT analysis for R load with PI controller

Fig. 11  Performance analysis of modified bridgeless Luo converter forwide variation of load power with PI voltage controller

Fig. 12  Performance analysis of modified bridgeless Luo converter forwide variation of source voltage with PI voltage controller

Table 1 Comparative analysis of proposed configurationwith existing PFC converters

Existing convertertopologies

Proposedconverter

power quality indices BL-Zeta BL-Cuk BL- Luo ModifiedBridge Less

Luopower factor at ratedload

0.9959 0.9999 0.9999 0.9999

power factor at lowload (20%)

0.9910 0.9856 0.9931 0.9948

source current THDat rated load (100%)

1.82 1.85 1.426 1.24

source current THDat low load (20%)

2.32 2.84 1.7 1.65

number of devices 13 13 13 11output voltage polarity  + ve −ve −ve PositivePF at low value ofinput voltage (90 V)

0.9902 0.9965 0.9970 0.9976

PF at high value ofinput voltage (260 V)

0.9990 0.9876 0.9912 0.9944

source current THDat low voltage (90 V)

1.74 1.23 1.426 1.18

source current THDat high value ofsource voltage (260 V)

2.584 2.353 1.937 1.68

Fig. 13  Photograph of the experimental prototype

6 IET Power Electron.© The Institution of Engineering and Technology 2019

Fig. 14  Experimental readings of THD and power factor along withsource voltage/current waveforms of MBLPOL converter for load power of(a)100%,(b) 70% ,(c) 50%, and(d) 20%, respectively

Fig. 15  Experimental readings of THD and power factor along withsource voltage/current waveforms of MBLPOL converter for sourcevoltages of(a) 90 V,(b) 120 V,(c) 180 V and(d) 240 V, respectively

IET Power Electron.© The Institution of Engineering and Technology 2019

7

change in rms supply voltage from 150 to 120 V. On reducingsupply voltage, load voltage gets decreased for a moment and thengets regulated to 48 V due to the controller action.

Fig. 18 shows the enlarged portion of supply voltage and supplycurrent waveforms for clear representation of decrease in supplyvoltage. Both source current and source voltage waveforms are inphase.

Fig. 19 represents the nature of input current waveform and thecorresponding DC load voltage waveform during the suddenchange in load power from 100 to 50 W. On reducing load power,load voltage gets increased for a moment and then gets regulated to48 V due to the controller action. Fig. 20 shows the enlargedportion of supply voltage and supply current waveforms for clearrepresentation of decrease in load power. From these, it has beenseen that MBLPOL converter provides better output voltageregulation during transient conditions. Also, it can be seen fromFigs. 18 and 20, source voltage and source current are in phase.Therefore, PFC is achieved during transient period.

Table 2 shows the comparative analysis of the proposedMBLPOL converter with the existing one [27]. In [27], authorshave provided the values of source current THD and input powerfactor for increase in 21% of supply voltage and decrease in 21%of supply voltage. Similarly, the performance of the proposed

converter has been analysed under same condition. It is inferredfrom the table that the proposed converter provides better powerquality than the existing converter [27].

8 ConclusionA modified bridgeless positive output Luo converter system hasbeen proposed for AC–DC applications. This front-end PFC

Fig. 16  Startup transient of output voltage at rated power

Fig. 17  Output voltage and input voltage waveforms during suddenchange in supply voltage (150–120 V)

Fig. 18  Enlarged portion of input voltage and input current waveformsduring sudden change in supply voltage (150–120 V)

Fig. 19  Output voltage and input current waveforms during suddenchange in load power (100–50 W)

Fig. 20  Enlarged portion of input voltage and input current waveformsduring sudden change in load power (100–50 W)

Table 2 Comparative analysis of proposed configurationwith [27]Powerqualityindices

Conventional bridgelessLuo converter [27]

Proposed converter

At 21%increase inratedsupplyvoltage

At 21%decrease inrated supply

voltage

At 21%increase in

ratedsupplyvoltage

At 21%decrease in

ratedsupplyvoltage

sourcecurrentTHD, %

4.5 5.6 1.713 2.096

input powerfactor

1 1 0.9991 0.9969

8 IET Power Electron.© The Institution of Engineering and Technology 2019

converter operating under DCM provides improved power qualityat the input supply side and regulated DC load voltage at outputside for wide range of load variation and universal supply voltagevariation. As operated in DCM, circuit is simple and cost effective.Moreover, even with DCM, unity power factor is achieved. Theproposed MBLPOL converter has reduced number of circuitcomponents and provides non-inverted output voltage. Theperformance of designed converter is simulated in MATLAB/Simulink and the simulation results are validated with theexperimental results.

9 References[1] Singh, B., Singh, B.N., Chandra, A., et al.: ‘A review of single-phase

improved power quality AC–DC converters’, IEEE Trans. Ind. Electron.,2003, 50, (5), pp. 962–981

[2] Balestero, J.P.R., Tofoli, F.L., Fernandes, R.C., et al.: ‘Power factor correctionboost converter based on the three-state switching cell’, IEEE Trans. Ind.Electron., 2012, 59, (3), pp. 1565–1577

[3] Chiang, H.C., Lin, F.J., Chang, J.K., et al.: ‘Control method for improving theresponse of single-phase continuous conduction mode boost power factorcorrection converter’, IET Power Electron., 2016, 9, (9), pp. 1792–1800

[4] Grigore, V., Kyyra, J.: ‘High power factor rectifier based on buck converteroperating in discontinuous capacitor voltage mode’, IEEE Trans. PowerElectron., 2000, 15, (6), pp. 1241–1249

[5] Singh, S., Singh, B., Bhuvaneswari, G., et al.: ‘Power factor corrected zetaconverter based improved power quality switched mode power supply’, IEEETrans. Ind. Electron., 2015, 62, (9), pp. 5422–5433

[6] Simonetti, D.S.L., Sebatin, J., Uceda, J.: ‘The discontinuous conduction modesepic and cuk power factor preregulators:analysis and design’, IEEE Trans.Ind. Electron., 1997, 44, (5), pp. 630–636

[7] Zhou, Q., Liu, C., Liu, X., et al.: ‘Effect of intermediate capacitance on slow-scale instability of cuk power factor correction converter operating indiscontinuous capacitor voltage mode’, IET Power Electron., 2017, 10, (14),pp. 1975–1981

[8] Durgadevi, S., Umamaheswari, M.G.: ‘Analysis and design of single phasepower factor correction with DC-DC sepic converter for fast dynamicresponse using genetic algorithm optimised pi controller’, IET CircuitsDevices Syst., 2018, 12, (2), pp. 164–174

[9] Costa Silva, P.J., Font, C.H.I., Lazzarin, T.B.: ‘A family of single-phasevoltage-doubler high-power-factor SEPIC rectifiers operating in DCM’, IEEETrans. Power Electron., 2017, 32, (6), pp. 4279–4290

[10] Akash, J., Gomathi, V., Ajith Kumar, S., et al.: ‘Comparative analysis ofnegative Luo converter and Cuk converter for harmonic reduction’. Proc. Int.Conf. Communication and Signal Processing, India, 2018, pp. 0532–0536

[11] Huber, L., Jang, Y., Jovanovic, M.M.: ‘Performance evaluation of bridgelessPFC boost rectifier’, IEEE Trans. Ind. Electron., 2008, 23, (5), pp. 1381–1390

[12] Jang, Y., Jovanovic, M.M.: ‘Bridgeless high-power-factor buck converter’,IEEE Trans. Power Electron., 2011, 26, (2), pp. 602–611

[13] Lin, X., Wang, F.: ‘AC–DC bridgeless buck converter with high PFCperformance by inherently reduced dead zones’, IET Power Electron., 2018,11, (9), pp. 1575–1581

[14] Mahdavi, M., Farzanehfard, H.: ‘Bridgeless SEPIC PFC rectifier with reducedcomponents and conduction losses’, IEEE Trans. Ind. Electron., 2011, 58, (9),pp. 4153–4160

[15] Muhammad, K.S.B., Lu, D.D.C.: ‘ZCS bridgeless boost PFC rectifier usingonly two active switches’, IEEE Trans. Ind. Electron., 2015, 62, (5), pp.2795–2806

[16] Bist, V., Singh, B.: ‘An adjustable-speed PFC bridgeless buck–boostconverter-fed BLDC motor drive’, IEEE Trans. Ind. Electron., 2014, 61, (6),pp. 2665–2677

[17] Hongbo, M., Li, Y., Lai, J.S., et al.: ‘An improved bridgeless SEPIC converterwithout circulating losses and input-voltage sensing’, IEEE J. Emerg. Sel.Top. Power Electron., 2018, 6, (3), pp. 1447–1455

[18] Yang, J.W., Do, H.L.: ‘Bridgeless SEPIC converter with a ripple-free inputcurrent’, IEEE Trans. Power Electron., 2013, 28, (7), pp. 3388–3394

[19] Singh, B., Bist, V.: ‘Improved power quality bridgeless Cuk converter fedbrushless DC motor drive for air conditioning system’, IET Power Electron.,2013, 6, (5), pp. 902–913

[20] Bist, V., Singh, B.: ‘A reduced sensor PFC BL-Zeta converter based VSI fedBLDC motor drive’, Electr. Power Syst. Res., 2013, 98, pp. 11–18

[21] Aman, J., Singh, B.: ‘Bridgeless ZETA PFC converter for low voltage highcurrent LED driver’. Proc. IEEE Conf. Computer Applications In ElectricalEngineering-Recent Advances (CERA), 2017, pp. 539–544

[22] Fardoun, A.A., Ismail, E.H., Sabzali, A.J., et al.: ‘New efficient bridgelessCuk rectifiers for PFC applications’, IEEE Trans. Power Electron., 2012, 27,(7), pp. 3292–3301

[23] Khan, S.A., Rahim, N.A., Bakar, A.H.A., et al.: ‘Single-phase bridgeless ZetaPFC converter with reduced conduction losses’, J. Power Electron., 2015, 15,(2), pp. 356–365

[24] Lu, F.L.: ‘Negative output Luo converters: voltage lift technique’, IEEElectron. Power App., 1999, 146, (2), pp. 208–224

[25] Luo, F.L.: ‘Re-lift converter: design, test, simulation and stability analysis’,IEE Proc. Elect. Power App., 1998, 145, (4), pp. 315–325

[26] Gnanavadivel, J., Senthil Kumar, N., Naga Priya, C.N., et al.: ‘Single phasepositive output super-lift Luo converter fed high power led lamp with unitypower factor and reduced source current harmonics’, J. Optoelectron. Adv.Mat., 2017, 18, (11–12), pp. 1007–1017

[27] Singh, B., Bist, V., Chandra, A., et al.: ‘Power factor correction in bridgeless-Luo converter-fed BLDC motor drive’, IEEE Trans. Ind. App., 2015, 51, (2),pp. 1179–1188

[28] Lakshmi, M., Hemamalini, S.: ‘Non isolated high gain DC-DC converter formicrogrids’, IEEE Trans. Ind. Electron., 2018, 65, (2), pp. 1205–1212

[29] Zhou, G., He, S., Zhang, X., et al.: ‘Critical output-capacitor ESR for stabilityof V2 controlled buck converter in CCM and DCM’, Electron. Lett., 2014, 50,(14), pp. 884–886

[30] Ang, S.S.: ‘Power switching converters’ (Marcel Dekker Inc, New York,1995)

[31] Kuo, B.C.: ‘Automatic control systems’ (PHI Learning, New Delhi, India,2010)

[32] Brito, A.G.: ‘On the misunderstanding of the Ziegler-nichol's formulaeusage’, IEEE/CAA J. Automatica Sinica, 2019, 6, (1), pp. 142–147

IET Power Electron.© The Institution of Engineering and Technology 2019

9