DE_Ch7-wm

Digital Electronics Chapter 7. Field-Effect Transistors

By: FARHAD FARADJI, Ph.D.

Assistant Professor, Electrical and Computer Engineering, K. N. Toosi University of Technology

http://wp.kntu.ac.ir/faradji/DigitalElectronics.htm

Reference:

DIGITAL INTEGRATED CIRCUITS: ANALYSIS and DESIGN, 2005, John E. Ayers

1

K. N. Toosi University of Technology

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7.1. Introduction Field-effect transistors (FETs) have several significant differences

compared to bipolar junction transistors.

First, they are voltage controlled rather than current controlled. This results in low levels of standby supply current and standby power

dissipation.

Second, they are majority carrier devices. Third, they can be made smaller than BJTs using same fabrication

technology.

Chapter 7. Field-Effect Transistors 2 Digital Electronics

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7.1. Introduction 3 basic types of FETs are:

metal oxidesemiconductor field-effect transistor (MOSFET),

junction field-effect transistor (JFET),

metalsemiconductor field-effect transistor (MESFET).

MOSFET is very important for ICs and is emphasized in this chapter.


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7.1. Introduction 7.1.1. MOSFET

MOSFET is also known as insulated gate field-effect transistor (IGFET). 3 terminals of this device are source, gate, and drain, labeled S, G, and D. Sometimes, a 4th terminal is used: body or substrate (labeled B). Voltage applied between G and S controls current between D and S.


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Basic operation of MOSFET:

9 If G is biased positively with respect to S, negatively charged electrons are attracted to interface between semiconductor and oxide.

9 This forms a conducting channel between D and S.

9 Then, if D is biased positively with respect to S, electrons in channel will drift from S to D.

9 This results in a conventional current from D to S. 9 Current involves only electrons. 9 It is called an n-channel MOSFET.


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There are also p-channel devices. In p-channel device, S and D are

p-type regions.

Holes drift in channel. Voltages and currents have

opposite polarities compared to those in n-channel device.


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channel.

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For device shown, no conducting channel can be between D and S unless a positive voltage is applied between G and S.

This device is normally off. These MOSFETs are called

enhancement type.

A gate bias is required to enhance a conducting channel.


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normaallly off.

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Depletion-type devices are normally on. A G-S bias is necessary to deplete

conducting channel.

Normally off enhancement-type MOSFETs are preferred in ICs for low standby dissipation.


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7.1. Introduction


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7.1.1. MOSFET

9 Some MOSFET symbols are shown. 9 Most convenient are middle four. 9 These result in simplest and neatest

circuit diagrams.

9 They eliminate body connection and avoid use of other arrows.

9 Inversion circle on G indicates a p-type device.

9 Broad line in channel indicates a depletion-type device.

9 We use these simplified symbols, except in situations for which body bias is used.

9 Take a look at this link.

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7.1. Introduction


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7.1.2. JFET

Junction field-effect transistor (JFET) takes it name from G structure.

G involves a p-n junction. For an n-channel device, S, D, and

channel regions are n-type.

With zero bias between G and S, there is a conducting channel from D to S.

JFET is a depletion-type device. If a reverse bias is applied to the G-S junction:

It widens depletion region.

It reduces channel conductivity.

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7.1. Introduction


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7.1.2. JFET

A sufficiently negative bias on G will pinch off channel entirely.

JFET is a field-effect device in which G-S bias controls D-S current.

Unlike MOSFET, no insulating oxide layer is under G.

Gate pn junction must be kept reverse biased in order to avoid a DC gate current.

rols D S current.

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7.1. Introduction


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7.1.2. JFET

A p-channel JFET utilizes p-type regions for S, D, and channel. Gate region is doped n-type. Voltages and currents are reversed in polarity compared to n-channel

device.

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7.1. Introduction


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7.1.2. JFET

9 Enhancement-type (normally off) JFETs can be fabricated but with some difficulty.

9 These devices must be made so that depletion region of G junction pinches off channel at zero G-S bias.

9 This can be done, but only with precise control of channel thickness and doping.

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7.1. Introduction


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7.1.2. JFET

JFETs are not used in digital ICs for 2 reasons. First, JFETs are inherently depletion-type devices.

This results in excessive standby dissipation, unless normally off (enhancement-type) devices are fabricated.

Second, even if normally off JFETs are used, p-n junctions used in gates are leaky compared to MOS structures used in MOSFETs.

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7.1. Introduction


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7.1.3. MESFET

Metal-semiconductor field-effect transistor (MESFET) is similar to JFET.

A metal-semiconductor junction is used for G structure.

It suffers from same drawbacks as JFET.

It is not used in silicon technology. MESFETs are used in digital ICs based on compound semiconductors like

gallium arsenide direct-coupled FET logic (DCFL) circuits.

A viable MOSFET technology does not exist in materials such as gallium arsenide and indium phosphide.

These semiconductors exhibit speed advantages over silicon.

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7.2. MOSFET Threshold Voltage


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Applying a positive bias on metal gate with respect to semiconductor will reduce hole concentration near interface.

This situation is referred to as depletion condition.

Application of a sufficiently positive bias on gate will result in inversion.

In this case, semiconductor becomes n-type near interface.

It is possible for semiconductor to be inverted to extent that electron concentration near interface is equal to hole concentration in bulk of semiconductor.

This is referred to as strong inversion.

ondition.

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In an n-channel MOSFET, G-S bias necessary to cause strong inversion in channel is called threshold voltage.

Among n-channel MOSFETs: enhancement-type transistors

have positive thresholds,

depletion-type transistors have negative thresholds.

Opposite is true for p-channel devices.

ment type transistors tive thrresholds,

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A body bias (applied between body and source) allows threshold of a MOSFET to be adjusted in the circuit.

This is exploited to overcome manufacturing tolerances in threshold voltages.

This technique is used in modern low-power, high-speed CMOS circuits.

7.3. Long-Channel MOSFET Operation


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Substrate is often shorted to source.

VGS is G-S bias. VDS is D-S bias. ID is drain current.

MOSFET has 3 modes of operation: cutoff, linear, saturation.

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Cutoff occurs if VGS is insufficiently positive to induce a conducting channel.

Cutoff results in zero drain current. If VGS is made more positive than

threshold voltage (VT): a conducting channel is induced an ID can flow.

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With a small VDS: MOSFET acts like a voltage-controlled resistance. This is linear (ohmic or triode) mode of operation.

If VDS is sufficiently large: Conducting channel will pinch off at drain end. ID saturates. This mode of operation is called saturation.

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In characteristic curves, it is customary to plot ID vs. VDS with VGS as a parameter.

This results in a family of curves, one for each particular value of VGS.

Cutoff: is associated with zero ID, its locus is on VDS axis.

In linear region: ID increases approximately linearly with VDS, its locus is to left of parabola.

Saturation: is characterized by a constant ID, its locus is to right of parabola.

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7.3.1. MOSFET Cutoff Operation



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7.3.2. MOSFET Linear Operation

VGS > VT. VDS is small enough so that channel

does not pinch off at drain end.

MOSFET acts like a voltage-controlled resistance.

RDS is controlled variable. VGS is controlling variable.

Pinch-off at D end of channel occurs when:

This condition defines boundary between linear and saturation operation

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K = device transconductance parameter.



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k is process transconductance parameter.



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For p-channel MOSFETs, p must be used instead of n.

All voltages and currents are opposite in polarity.



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7.3.3. MOSFET Saturation Operation

MOSFET acts like a voltage-controlled current source.

ID is controlled quantity. VGS is controlling quantity.

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7.3.4. MOSFET Subthreshold Operation

9 Cutoff operation: n-MOSFET: VGS < VT p-MOSFET: |VGS| < |VT| results in ID = 0 to a first approximation.

9 If VGS is close to VT, a non-negligible ID will flow. 9 This subthreshold current is important in modern low-voltage, low-power

CMOS and memory circuits.

ID = 0 to a first approximation.

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Saturation or linear operation is dominated by drift of majority carriers. Subthreshold operation occurs as result of minority carrier diffusion. Device acts as a BJT. S injects carriers into channel region. These injected carriers diffuse length of channel. They are collected by D. In an n-MOSFET:

electrons are injected into p-type channel region diffuse to D, resulting in current from D to S.

Subthreshold current flows in same direction as saturated current.

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If VDS is several times kT/q (~ 26 mV at room temperature), subthreshold current is independent of VDS:

Subthreshold current increases exponentially with VGS.

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Subthreshold swing is:

Room-temperature operation of MOSFETs is characterized by S = 100 mV. Subthreshold current changes by 1 decade for every 100-mV change in VGS. Scaling of VT below about 300 mV is accompanied by significant

subthreshold current at VGS = 0.

This is a significant issue in design of low-power CMOS circuits.

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7.3.5. Transit Time

It takes a finite time for majority carriers to traverse channel in a conducting MOSFET.

This delay is called transit time (tt). In a long-channel n-channel MOSFET, electrons are drifted in channel.

Average electric field intensity in channel is approximately:

Carriers move at a velocity of approximately:

tt increases with square of channel length:

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7.4. Short-Channel MOSFETs


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Aggressive scaling of MOSFETs and channel lengths has resulted in devices that behave differently than long channel devices.

First, VT becomes a function of channel length (short-channel effect). Second, electric field intensity in channel may be sufficiently large so that

carriers reach their saturated velocity.

Third, effective channel length becomes a function of VDS as a consequence of channel length modulation.

All these effects are of practical importance in design of high-performance CMOS circuits.

their saturated velocity.

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7.4.1. The Short-Channel Effect

|VT| decreases with decreasing channel length.

7.4.2. Channel Length Modulation

ID in a MOSFET saturates at VDS which causes channel to pinch off at D end.

Further increase in VDS causes pinch-off point to move into channel, toward S.

This increases ID by ratio L/(L L). In a long-channel MOSFET, percentage change in ID is small. Channel length modulation effect is important in short-channel MOSFETs.

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7.4.2. Channel Length Modulation

ID in a MOSFET saturates at VDS which causes channel to pinch off at D end.

Further increase in VDS causes pinch-off point to move into channel, toward S.

For linear operation:

For saturation operation:

is the empirical channel length modulation parameter.

eratioonn:



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7.4.3. Velocity Saturation

At high electric-field intensities, carrier drift velocities are no longer proportional to electric field.

Instead, there is approximately carrier velocity saturation. Onset of ID saturation occurs at a lower VDS. Magnitude of saturated ID is less than before.

turation occurs at a lower VVDDSVVV .

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7.4.4. Transit Time

In short-channel MOSFETs, carriers may travel at close to saturation velocity for entire channel length.

For electrons:

For holes:

Saturation velocities in silicon MOSFETs are typically 20% lower than bulk values.

tt is directly proportional to the channel length.

:

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