DDM-3 Specifications V01.05

UMTS 2100 DDM-3 Technical Specification

Document number: UMT/BTS/DD/016933 Document issue: V01.05/EN Document status: Standard Date: 09/02/2007 Passing on or copying of this document, use and communication of its contents not

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UMT/BTS/DD/016933 V01.05/EN Standard 09/02/2007 /84

PUBLICATION HISTORY

04/Nov/2005 AUTHOR B. BONNET Issue 01.01 / EN, Standard Creation 03/Fev/2006 AUTHOR B. BONNET Issue 01.02 / EN, Standard Minor modifications CPC code added LF Spurious limit added 19/MAY/2006 AUTHOR B. BONNET Issue 01.03 / EN, Standard § 5.2 CDDM-3 PRODUCT IDENTIFICATION § 7.1 max operating input level 0 dBm § 7.5 relaxation of accuracy threshold 30/JUN/2006 AUTHOR B. BONNET Issue 01.04 / EN, Standard § 5.2 CDDM-3 PRODUCT IDENTIFICATION § 10 Rohs label added 09/FEB/2007 AUTHOR B. BONNET Issue 01.05 / EN, Standard § 10.2 WEE Label modification



CONTENTS

1 INTRODUCTION.................................................................................................8

1.1 OBJECT..........................................................................................................8

1.2 SCOPE ...........................................................................................................8

2 APPROVALS.......................................... ............................................................9

3 RELATED DOCUMENTS .................................. .................................................9

3.1 APPLICABLES DOCUMENTS..........................................................................9

3.2 REFERENCE DOCUMENTS ..............................................................................10

4 ABBREVIATIONS & DEFINITIONS ........................ .........................................11

4.1 ABBREVIATIONS ............................................................................................11

5 GENERAL DESCRIPTION ................................ ...............................................12

5.1 GENERAL PRODUCT ARCHITECTURE...............................................................12

5.2 PRODUCT IDENTIFICATION..............................................................................13

6 BLOCK DIAGRAM & PARTITIONING ....................... ......................................14

6.1 PRINCIPAL FUNCTIONS ..................................................................................14

6.2 BLOCK DIAGRAM ...........................................................................................14

7 ELECTRICAL SPECIFICATIONS .......................... ..........................................15

7.1 OPERATING CONDITIONS ...............................................................................15

7.2 RECEIVE PASSBAND SPECIFICATIONS .............................................................16

7.3 IMD & BLOCKING REQUIREMENTS.........................................................17

7.3.1 IMD REQUIREMENTS .........................................................................17 7.3.2 BLOCKING REQUIREMENTS .............................................................18

7.4 TRANSMIT PASSBAND SPECIFICATIONS ...........................................................20

7.5 VSWR MONITOR...........................................................................................21

7.5.1 Operating RF Input Power Range.........................................................22 7.5.2 VSWR Monitor Thresholds ...................................................................23

7.6 SUPPLY VOLTAGE & DC INTERFACE ................................................................24

7.6.1 -48V DC Input Voltage Range SPECIFICATION: .................................24 7.6.2 DC/DC PROTECTION:.........................................................................24

7.7 LIGHTNING PROTECTION ................................................................................27

7.8 INTERFACE SPECIFICATIONS ..........................................................................28



7.8.1 I²C Interface ..........................................................................................28 7.9 DSUB CONNECTOR CABLING ..........................................................................32

7.9.1 DDM Cable Detect................................................................................32 7.9.2 I²C EEPROM Address ..........................................................................33 7.9.3 Software................................................................................................34 7.9.4 LEDs on Front panel.............................................................................37 7.9.5 Firmware...............................................................................................39 7.9.6 DDM main receive parameter data .......................................................42

8 MECHANICAL SPECIFICATIONS .......................... .........................................51

9 ELECTROMAGNETIC ENVIRONMENT........................ ...................................51

9.1 ELECTROMAGNETIC COMPATIBILITY REQUIREMENT ..........................................51

9.1.1 EMC Test Condition..............................................................................51

10 ENVIRONMENT ............................................................................................57

10.1 WEEE REQUIREMENTS ...........................................................................58

11 DEPENDABILITY...................................... ....................................................58

11.1 DEPENDABILITY DELIVERABLES ......................................................................60

11.2 DEPENDABILITY TARGETS ..............................................................................61

11.3 DEPENDABILITY DEFINITIONS .........................................................................61

11.4 DEPENDABILITY PROJECTION .........................................................................64

11.4.1 Failure Rate .......................................................................................64 11.4.2 Shipped Product Quality Level...........................................................64 11.4.3 Useful Life..........................................................................................65

11.5 PRODUCT RELIABILITY GROWTH.....................................................................65

11.6 FMECA .......................................................................................................66

11.7 HALT ..........................................................................................................66

11.8 ROOT CAUSE ANALYSIS.................................................................................66

11.9 STATISTICAL PROCESS MONITORING ..............................................................67

11.10 DEPENDABILITY ANALYSIS REPORT..............................................................67

12 REGULATORY REQUIREMENTS............................ ....................................68

12.1 ELECTROMAGNETIC INTERFERENCE................................................................68

12.2 PRODUCT SAFETY .........................................................................................68

12.3 MATERIAL FLAMMABILITY ...............................................................................68

13 QUALITY ASSURANCE AND QUALIFICATION................ ..........................68

13.1 DELIVERABLE DOCUMENTATION .....................................................................68



13.1.1 NON RECURRING DOCUMENTS ....................................................68 13.1.2 RECURRING DOCUMENTS.............................................................68

13.2 DESIGN CHANGE CONTROL.......................................................................69

13.2.1 Change Management Requirements .................................................69 13.2.2 Regulatory&safety Submission and Maintenance..............................70 13.2.3 Product Changes ...............................................................................70

13.3 INTERCHANGEABILITY ....................................................................................71

14 MANUFACTURING REQUIREMENTS ......................... ................................71

14.1 MEASUREMENT UNCERTAINTY........................................................................71

14.2 PRODUCTION TEST SUBSET ...........................................................................71

14.3 PRODUCTION TEST PLAN ...............................................................................71

14.4 PRODUCT QUALIFICATION TESTS....................................................................71

14.5 ACCEPTANCE TESTING ..................................................................................72

14.6 DESIGN INSPECTION ......................................................................................72

14.7 WORKMANSHIP EVALUATION ..........................................................................72

15 APPENDIX 1 : IMD LEVEL CALCULATION ................. ...............................73

16 APPENDIX 2 : IMD PRODUCTION TESTS .................. ................................74

17 APPENDIX 3 : CRC CALCULATION CODE .................. ..............................76

17.1 METHOD 1 : WITHOUT CRC TABLE ................................................................76

17.2 METHOD 2 : WITH CRC TABLE .......................................................................77

18 APPENDIX 4 : UMTS SIGNAL DESCRIPTION ............... .............................80

18.1 OVERVIEW....................................................................................................80

18.2 UMTS SIGNAL FOR DDM TEST.......................................................................80

18.2.2 other dynamic tests:...........................................................................83



L I S T O F T A B L E S

Table 1 : Approvers ................................ .....................................................................9 Table 2 : Abbreviations ............................ .................................................................11

Table 3 : DDM-3 PEC/CPC........................... .............................................................13 Table 4 : Operating Conditions ..................... ...........................................................15 Table 5 : Receive Pass-band Electrical Requirements ...........................................16 Table 6 : IMD Requirements at ANT port ............. ....................................................18

Table 7 : RX Input filter + Inter-stage filter sele ctivity ............................................ 19 Table 8 : Transmit Pass-band Electrical Requirement s .........................................20 Table 9 : VSWR Monitor Thresholds.................. ......................................................23

Table 10 : TMA operating conditions................ .......................................................26 Table 11 : Physical Interface...................... ...............................................................28 Table 12 : reading buffer .......................... .................................................................35

Table 13 : writing buffer .......................... ..................................................................36 Table 14 : DDM LEDS function ....................... ..........................................................37 Table 15 : TMA LED function ........................ ............................................................37

Table 16 : VSWR LED function ....................... ..........................................................38 Table 17 : EEPROM Configuration Format ............. .................................................40 Table 18 : EEPROM Receive Data Format .............. .................................................44

Table 19 : EEPROM Transmit Data Format............. .................................................49 Table 20 : EEPROM Absolute Group Delay Data Format . ......................................50

Table 21: E-field strength (dB µµµµV/m) for EN 55022 Class B and FCC Part 15........52

Table 22 : 3GPP Voltage limits (dB µµµµV).....................................................................53

Table 23: Quasi-Peak detector(dB µµµµV)......................................................................54

Table 24: Average detector(dB µµµµV) ...........................................................................54

Table 25 : Voltage (dB µµµµV)..........................................................................................54

Table 26: Limits for air discharges and contact dis charges..................................55 Table 27: EFT Limits............................... ...................................................................56 Table 28: Dependability deliverables ............... ........................................................60 Table 29: Dependability Targets.................... ...........................................................61



L I S T O F F I G U R E S

Figure 1 : DDM System Overview : STSR – 2 carriers ............................................12

Figure 2 : DDM System Overview : STSR – 2D carriers .........................................13

Figure 3 : DDM-Block Diagram .................................................................................14

Figure 4 : Idle mode description ..............................................................................22

Figure 5 Compress mode description .....................................................................23

Figure 6 : DDM DC supply arrangement ..................................................................27

Figure 7 : I²C Bus Architecture .................................................................................29

Figure 8 : I²C Bus Architecture : Driver part.................................................................30

Figure 9 : I²C Bus Architecture : Receiver part ............................................................31

Figure 10 : CABLE-DETECT schematic ...................................................................32

Figure 11 : Dsub Connector Cabling ........................................................................33



1 INTRODUCTION 1.1 OBJECT

This General Specification (GS) covers the detailed requirements for the UMTS Dual Duplexer and low noise amplifier (DDM) that is developed by a subcontractor.

1.2 SCOPE

The UMTS DDM defined in this document is for use in an outdoor and indoor Cellular Base Station product. Hence, it must conform to all normal regulatory and industrial-based standards and guidelines. The Duplexer component of the module provides two functions:

� Isolation among the transmit signals and receive signals thus facilitating the use of one antenna per diversity branch per sector.

� Filtering of transmit and receive signals thus reducing interfering signals. The LNA provides low noise amplification at the system front end thus reducing the overall effects of noise. After the LNA, the receive band signals are split into 3 local outputs prior to distribution, via coaxial cables, to the transceiver shelves. In addition, a VSWR monitor circuit is provided to monitor forward and reflected power at the antenna port. It supervises then the connection between the BTS and the antenna. The DDM will interface with the TRM processor via the I²C interface. LNA consumption alarms and VSWR monitor fault alarms will be monitored through an addressable I/O port expander. Calibration, manufacture and performance data will be stored and accessed through an addressable EEPROM.



2 APPROVALS This documents has to be approved by following people :

Name Function Department

Pierre-Yves Raboteau RF Architecture Prime R&D BTS Architecture

Emmanuel Froger RF Prime R&D BTS UMTS RF

Alain Gosselin Mechanical Prime Physical Concept UMTS & GSM

Luc MOULIN EMC/safety Prime HW Integration

Christian ROBIEUX Dependability Prime R&D Dependability

Table 1: Approvers

3 RELATED DOCUMENTS 3.1 APPLICABLES DOCUMENTS

[A1] TS 25.104 V.6.0 (2001-03) “UTRA (BS) FDD; Radio Transmission and Reception.”

[A2] TS 25.113 V3.2.0 (2000-06) “Base Station EMC.”

[A3] TS 25.141 V6.0 (2001-03) “Base Station Conformance Testing (FDD).”

[A4] EN55022 (Ed. December. 1994)

[A5] Corporate Standard 5014.00

[A6] UL 1950 / CSA C22.2 n°950

[A7] IEC 60950 Standard

[A8] FCC Rules, Part 15 (Ed. June 23, 1989) Sub Part B, class B, Federal Communications Commission, Radio Frequency Devices

[A9] EN 61000-4-2 (1995-01) Electromagnetic compatibility (EMC) Part 4: Testing and measurement

techniques Section 2: Electrostatic discharge immunity test. Basic CEM Publication


techniques Section 3 : Immunity to radiated field test. Basic CEM Publication


techniques Section 4 : Electrical fast transient/burst immunity test. Basic CEM Publication.



[A12] EN 61000-4-6 (1995-01)

Electromagnetic compatibility (EMC) Part 4: Testing and measurement techniques Section 6: Immunity to conducted disturbances induced by radio frequency fields test. Basic CEM Publication.

[A13] CISPR-16-1:(1993) Specification for radio disturbance and immunity measuring apparatus and

method s –part 1 : Radio disturbance and immunity measuring apparatus.

[A14] CISPR-22:(1997) Information technology equipment – radio disturbance characteristics – limits and methods of measurement

[A15] TS25.113 V2.0.1 (1999-12) 3rd generation partnership project 3GPP; technical specification group (TSG) RAN WG4; Base Station EMC.

[A16] BELLCORE, Electromagnetic compatibility and electrical safety – Generic criteria for network telecommunications equipment. Issue 2 December 1997

[A17] 2002/95/EC , Directive 2002/95/EC of the European Parliament of the Council of 27 january 2003-Restriction of the use of certain hazardous Substances in electrical and electronic equipment . ( RoHS directive )

[A18] 2002/96/EC , Directive 2002/96/EC of the European Parliament of the Council of 27 january 2003-Waste Electrical and Electronic Equipment ( WEEE directive ).

3.2 REFERENCE DOCUMENTS

[R1] UMT/BTS/DD/0520 V02.01/EN “Mechanical Requirement for a UMTS DDM-2” [R2] UMT/BTS/DD/0148 V02.01/EN “Double UMTS Tower mounted Amplifier Technical specification” [R3] UMT/BTS/DD/0107 “iBTS Memory Format and content module” [R4] UMT/BTS/DD/0207 V03.01 “Mechanical Requirement for a MKII Platform Compact DDM” [R5] NPS00200 - Supplementary Specification for Green Compliant

Components" [R6] NPS50561 - General Specification for OEM Equipment"



4 ABBREVIATIONS & DEFINITIONS 4.1 ABBREVIATIONS

Term/Abbreviation Meaning

CPC Common Product Code CPM Communication Processor Module CRC Code Requested Calculation dB deciBel dBm deciBel ref 1 milliwatt DDM Dual Duplexer Module EEPROM Electronically Erasable and Programmable Read Only Memory EMC Electro-Magnetic Compatibility EMI Electro-Magnetic Interference ESD Electrostatic Discharge FRM Flexible Radio Module GS General Specification Hz Hertz, cycles per second I²C Inter Integrated Circuit IP3 Input 3rd order Intercept Point LNA Low Noise Amplifier MCPA Multi Carrier Power Amplifier MHz Mega Hertz, 10e6 Hz MTBF Mean Time Between Failure NF Noise Figure OEM Original Equipment Manufacturer PEC Product Engineering Code Rms Root mean square

RU Replaceable Unit STSR Sectorial Transmit Sectorial Receive TMA Tower Mounted Amplifier TRM Transceiver Receiver Module Vrms Root mean square Voltage VSWR Voltage Standing Wave Ratio W Watts

Table 2: Abbreviations



5 GENERAL DESCRIPTION 5.1 GENERAL PRODUCT ARCHITECTURE

DDM operates within UMTS base station equipment frames. DDM is the last stage in the transmit section of the FRM after the MCPA and preceding the antenna and lightning surge protectors.

In the receive section, DDM is the first stage of the FRM following the antenna and lightning surge protectors.

The DDM is intended to operate in the following paired band: � 1920 – 1980 MHz: up-link � 2110 – 2170 MHz: downlink.

System design permits an easy transition from receive diversity to transmit diversity signal, and this up to four carriers per sector.

Following figures describe overviews for STSR configuration with 2 carriers BTS configuration. DDM enables 2 single antennas (Main and Div) to be used for up link and down link. In order to provide an antenna Rx diversity signal, one Diplexer/LNA and a Rx filter/LNA only are required (configuration 1). This means that DDM is not fully used. In complete diversity system, two Diplexer/LNA sets are required (configuration 2).

Figure 1 : DDM System Overview : STSR – 2 carriers

Receiver F1

Receiver F2

F1 & F2

F1 & F2

F1 & F2

Sect1 Main (F1, F2)

Sect1 Div (F1, F2)

Sect3 Div (F1, F2)

TRM1 6

6TRM2

Sect2 Main (F1, F2)

Sect2 Div (F1, F2)

Sect3 Main (F1, F2)



Figure 2 : DDM System Overview : STSR – 2D carriers Moreover, TMA can be installed close to the antenna in order to improve sensibility. This module is an external equipment. This ancillary includes a receiver amplifier which has to be DC supplied and alarm monitored. DDM has to support these functions only in the case of UMTS TMA single band is used. This excludes any other type of TMA (dual or tri bands…). See R3.

5.2 PRODUCT IDENTIFICATION

Description Referenced Mechanical specification PEC

CPC

MOD: DDM-3 2100 UMTS R1 NTU747AF N0033976

MOD: CDDM-3 2100 COMP OUT

R4 NTA570AM N0121687

Table 3 : DDM/CDDM-3 PEC/CPC

Receiver F1

F1 & F2

F1 & F2

Sect1 Main (F1, F2)

Sect1 Div (F1, F2)

Sect3 Div (F1, F2)

TRM1 6

6 TRM2

F1 & F2

F1 & F2

Sect2 Main (F1, F2)

Sect2 Div (F1, F2)

Sect3 Main (F1, F2)

F1 &F2

F1 & F2

Receiver F2



6 BLOCK DIAGRAM & PARTITIONING 6.1 PRINCIPAL FUNCTIONS

DDM provides (for Main & Diversity branches) :

� One single antenna port for Tx and Rx path and dedicated isolation between Tx and Rx frequency bands

� Tx and Rx out of band filtering � Low noise amplification in Rx frequency bands and signal splitting into four local outputs (four receivers) – LNA gain depending on TMA presence � VSWR alarm monitoring capability � TMA DC supplying � TMA alarm monitoring through I²C bus and LED on front panel � Inventory capability � Active function (LNA, VSWR monitor) monitoring through I²C bus and LED on front panel

6.2 BLOCK DIAGRAM

Figure 3 exhibits the high-level block diagram of the DDM (for information only). RX 2, 3 and 4 ports have to be loaded ( 50 ohms ).

Figure 3 : DDM-Block Diagram

Main Rx single carrier ports

Main Antenna port

Reverse Forward

VSWR monitor

VSWR monitor

Tx port – RF signal coming from MCPA

Tx port – RF signal coming from MCPA

Div Rx single carrier ports

Reverse Forward

DC & in rush current limiter Alarm

Directional Coupler

Directional Coupler

Bias Tee

Bias Tee

D-sub connector

Div Antenna port



7 ELECTRICAL SPECIFICATIONS

The DDM total allowable variation is outlined below and shall encompass the following factors:

� Unit to unit manufacturing and process � Frequency � Environmental conditions � Power (Supply) Voltage � Measurement accuracy

Measurements shall be made in a 50 ohms system.

7.1 OPERATING CONDITIONS

Parameter Specification

Nominal voltage (1) -48V nominal (-60 to –36 V variation)

Ripple 3 mV rms (DC – 20 MHz),

Noise (2),(3) –57dBm (DC – 100 MHz) Supply Voltages

No damage range 0 to –36 V & -60 to -75.0 V

Max Supply Power TMA mode

20 W

Max Tx Input Power (3) Average Power = 60 W Peak to rms ratio = 8 dB For info: Source /Load match = 18 dB

Max. Tx input peak power 380 W

Rx input Dynamic Range -108 to – 40 dBm @ 5 MHz BW

Max, Rx input level, Average no damage

0 dBm

Surge (4) (5)

8/20µs waveform 900 V peak

Temperature range Min. : 0°C Max. : +70°C

Table 4 : Operating Conditions



Notes:

1. DDM may includes one DC/DC and must be UL and CSA Certified according to UL 1950 / CSA C22.2 N°950 standard and must be VDE Certified according to IEC60950 standard.

2. Supply noise at input to the DDM.

3. Noise is measured with a spectrum analyzer using a resolution bandwidth of 5 MHz (into 50 ohms load).

4. The effective peak power resulting from the conditions stated in the peak power specification must not create arching within the DDM for 1 second with peak power and average power applied.

5. Due to residual surge through lightning protectors after lighting strike.

7.2 RECEIVE PASSBAND SPECIFICATIONS

The receive path of DDM shall meet the following electrical specifications for all operating conditions.

Parameter Test Condition Min Nom Max Unit

Pass band Frequency 1920 1980 MHz

Pass band Flatness (1) 0.3 dB

No TMA mode (6) 23 26 dB Pass band Gain

TMA mode (6) 14 17 dB

Nominal Impedance* Ant and Rx Ports (7) 50 ohms

No TMA mode (6) 2.5 dB Pass band Noise Figure

TMA mode (6) 3 dB

No TMA mode (2), (6) -10 dBm Pass band IP3 Input

TMA mode (2), (6) -5 dBm

Rx output Pass band Return loss 17 dB

Integrated Mean Square Phase Error (3) 4.0 e-4 Rad²

Antenna port Pass band Return Loss 14 dB

In band Group Delay Deviation 60 ns Isolation Rx to Ant isolation (4) Rx to Rx isolation (5)

50 20

dB dB

Table 5 : Receive Pass-band Electrical Requirements



Notes: 4. DDM may includes one DC/DC and must be UL and CSA Certified according to UL 1950 / CSA C22.2 N°950 standard and must be VDE Certified according to IEC60950 standard. 5. Supply noise at input to the DDM.

6. Noise is measured with a spectrum analyzer using a resolution bandwidth of 5 MHz (into 50 ohms load).

6. The effective peak power resulting from the conditions stated in the peak power specification must not create arching within the DDM for 1 second with peak power and average power applied.

7. Due to residual surge through lightning protectors after lighting strike.

7.3 IMD & BLOCKING REQUIREMENTS

The DDM RX filter selectivity (RX Input filter + LNA Inter-stage filter) is calculated to pass the IMD & Blocking requirements.

7.3.1 IMD REQUIREMENTS

The following tests permit to characterize the RX Input filter mask. They impose also conditions on the linearity performances (IIP3) of the first active element of the RX chain. Only some of these tests will be taken for production tests (see Appendix 2: IMD Production Tests). Carriers or interferers signals are CW.



Antenna UMTS port Measurement in RX UMTS band at ANT port

1 interferer at -15dBm (2000 to 2080) MHz 1 TDD carrier at +16dBm (2) (2010-2025) MHz

-100dBm

1 TDD carrier at +16dBm (2) (2010 to 2025) MHz 1 interferer at-15dBm (2040-2110) MHz

-100dBm

1 TDD carrier at +16dBm (2) (2010 to 2025)MHz 1 UMTS carrier at +45dBm (2130-2170)MHz

-100dBm

1 interferer at –15dBm (2025 to 2075)MHz 1 UMTS carrier at +45dBm (2130-2170)MHz

-100dBm

1 UMTS carrier at +45dBm (2110-2170) MHz 1 interferer at –15dBm (2240 to 2420) MHz

-100dBm

1 interferer at -15dBm(1422 to 1470) MHz 1 GSM carrier at +16dBm (925-960) MHz

-100dBm

2 DCS carriers at +16dBm (1805 to 1880) MHz -100dBm

1 TDD carrier at -40dBm (1900 to 1920) MHz 1 DCS carrier at +16dBm (1805 to 1880) MHz

-100dBm

1 interferer at –15dBm (1880 to 1900) MHz 1 DCS carrier at +16dBm (1805 to 1880) MHz -100dBm

1 DCS carrier at +16dBm (1805 to 1880) MHz 1 interferer at –15dBm (1630 to 1805) MHz -100dBm

Table 6 : IMD Requirements at ANT port

(1) Cf Appendix 1 for more details about the IMD level calculation at the ANT port. (2) A blocking level at +16dBm in the (2010-2025) MHz allows BS FDD-TDD co-location.

7.3.2 BLOCKING REQUIREMENTS

The following tests permit to define both RX input filter and inter-stage filter masks. The 25.104 specify a blocking level outside the RX UMTS band at –15dBm (BTS input). When GSM 900, DCS 1800 and UTRA FDD BS are co-located this level increases at +16dBm in the (925-960) MHz. When UTRA-TDD and UTRA FDD BS are co-located, the current state-of-art technology does not allow a single generic solution for the same 30 dB BS-BS coupling loss used to calculate the requirements for GSM and DCS co-location:

⇒ (1900-1920) MHz TDD band: the blocking level is defined at -40dBm (co-location not technically feasible).



In this case, certain site-engineering solutions can be used, these techniques are addressed in a TR referenced in the 25.104 document.

⇒ (2010-2025) MHz TDD band: blocking level at +16dBm, which allows BS TDD – BS FDD co-location The blocking level inside the UMTS RX band at the BTS input is -40dBm.

Frequency Band (MHz) DC -

1880

1880 -

1900

2000 -

2010

2010 -

2110

2110

-2170

2170 -

3500

3500 -12750

DDM Input Blocking level (dBm) +16 -15 -15 +16 +45 -15 -15 Minimum Duplexer + Inter-stage filter absolute rejections (1) between ANT and RX ports (dB)

56 25 25 50 90 55 35

Table 7 : RX Input filter + Inter-stage filter sele ctivity

(1) Rejections are referenced off-gain.



7.4 TRANSMIT PASSBAND SPECIFICATIONS

The transmit path of DDM shall meet the following electrical specifications for all operating conditions.

Parameter Test Condition Min Nom Max Unit

Pass band Frequency 2110 2170 MHz

Pass band Flatness (1) 0.2 dB Pass band Insertion Loss

(7) 0.9 dB

Nominal Impedance Ant and Tx 50 ohm Tx intput Pass band Return loss

Input impedances are referenced to 50 ohms. 17 dB

Integrated Mean Square Phase Error (2)

4.00 e-4 rad²

Tx Input Frequency Selectivity

DC – 1980 MHz (1980 – 2025) MHz f=(2100 – 2104.7) MHz f=(2175.3 – 2180) MHz (2237.5 - 6550) MHz (6550 – 12750) MHz

90 70

-16+3.4(f-2100) -16+3.4(2180-f)

50 35

dB dB dB dB dB dB

Antenna port Pass band Return Loss

17 dB

Duplexer Main : Tx to Rx isolation (3) - Tx Passband (4) - Rx Passband (5) Rx Diversity Passband (6) Tx to Div Ant isolation Duplexer Div : cf : Duplexer Main.

(90 – LNA gain) (90 – LNA gain) (100 –LNA gain)

30

dB dB dB dB

In band Group Delay Deviation

60 ns

Table 8 : Transmit Pass-band Electrical Requirement s

Notes: 1. Pass band flatness is determined by a 5 MHz window sliding across pass band.

2. Integrated Mean Square Phase Error is defined as the integrand over any 5 MHz intervals in the pass band of the difference between the phase and a straight line spanning the 5 MHz interval squared which minimizes the integrand.



3. VSWR at antenna port up to 1.4:1. There shall be no isolation degradation when antenna port VSWR is 1.4:1.

4. Applicable between the main transmit port and main receive ports of the Duplexer Main within the transmit pass band frequencies. Gain is defined as the gain between the main antenna port and the main receive ports.

5. Applicable between the main transmit port and main receive ports of the Duplexer Main within the receive pass band frequencies. Gain is defined as the gain between the main antenna port and the main receive ports.

6. Applicable between the main transmit port and diversity receive ports of the Duplexer Main within the receive pass band frequencies. Gain is defined as the gain between the main antenna port and the diversity receive ports.

7. Maximum insertion loss includes internal bias Tee.

7.5 VSWR MONITOR

Two VSWR monitors are included within DDM. The aim is to be able to monitor RF mismatching between antenna and BTS. This means that information coming from DDM would allow to supervise connections and cables degradation only but in any case this can not be compared to lab tool.

The reverse path of VSWR monitor have to be protected against any interferer signal coming from air antennas except UMTS co-sitted carriers in order to avoid alarms not due to a false VSWR . In this way OEM Supplier has to provide a suffisant rejection of any GSM, DCS or TDD signals present at Ant port with a maximum level of +17 dBm.

In the case where external equipment such as tri-plexer module or whatever, would be installed close to the BTS, VSWR monitor would lose a lot of part of its advantage. Indeed, the supervised matching would be reduced to cabling between BTS and external equipment only.

VSWR monitor receives from dedicated RF couplers two signals proportional to the forward and the reverse power levels. These couplers are located internally, between DDM antenna port and Filters. Two twice couplers are required for main and diversity parts. The forward and reflected powers are measured; the matching is deduced and compared to three fixed values. VSWR monitor shall provide four logical signals corresponding to the four positions of the VSWR monitor value compared with the three threshold values.



7.5.1 OPERATING RF INPUT POWER RANGE

VSWR MONITOR TX BAND POWER RANGE OF OPERATION: (Range of Tx band rms power as referenced to the Tx port of the DDM)

60 W MCPA (1) : 25,5 dBm to 47.5 dBm 45 W MCPA (1) : 24.5 dBm to 46.5 dBm 30 W MCPA (1) : 23.0 dBm to 45.0 dBm

Total Tx band power range: 23.0 dBm to 47.5 dBm

(1) with Input MCPA nominal power range = -20.5 dBm to 1.5 dBm avg

UMTS TX BAND POWER PEAK TO RMS RATIO: (Provided for vendor information only)

See Appendix 4 for more detailed information about UMTS signal description and especially HSDPA mode.

IDLE MODE: BTS stops to transmit during one slot (= 666µs = 1/15 trames) each 75 slots to allow the MS to make interference measurements. During this slot, TX input level is 20 to 30 dB below its max TX power. Idle mode must be transparent for RF detection and VSWR measurement (RC of the filter enough to avoid such modulation).

TX Input Power

level

20 – 30dB

Time

IDLE MODE

1 slot = 666µs

1 trame = 10ms = 15 slots

TRAME 1 TRAME 4 TRAME 5

Figure 4 : Idle mode description



Compress Mode: During compress mode, BTS may allocate all channel power to a few users. When only one user remains, the TX input level may decrease down to 7 dB below its max TX power during a Frame (10ms) each 6 Frames ( 60ms ). Compress mode must also be transparent for RF detection and VSWR measurement (RC of the filter enough to avoid such modulation).

TX Input Power

level

7 dB

Time

Compress MODE

1 Frame = 10ms

FRAME 1 FRAME 7

Figure 5 Compress mode description

7.5.2 VSWR MONITOR THRESHOLDS

The VSWR monitor shall provide four preset logical signals according to the following VSWR values:

Input I²C port expander signal

VSWR<1.5:1 VSWR >1.5:1 VSWR >2:1 VSWR >3:1

VSWR_threshold1_main VSWR_threshold2_main

0 0

0 1

1 0

1 1

VSWR_threshold1_div VSWR_threshold2_div

0 0

0 1

1 0

1 1

Table 9 : VSWR Monitor Thresholds



Note: 0: logical low 1: logical high The thresholds are calibrated using a set of calibrated loads and at the center pass band of the DDM.

VSWR measurement uncertainty shall be lower than:

� VSWR 1.5:1 threshold: ± 2.5 dB

� VSWR 2:1 threshold: ± 1.9 dB

� VSWR 3:1 threshold ± 1.6 dB

If VSWR Monitor Tx power input is below 23dBm (-3dB/+0dB) , the logical alarm signals will be [0 0] (VSWR_threshold1 and VSWR_threshold2).

VSWR Monitor response time shall be better than 1 second. Specific cares have to be took regarding false alarm – see [A1] document. Design has to be approved by ALU.

7.6 SUPPLY VOLTAGE & DC INTERFACE

DDM shall include one or two DC/DC converters supplied by -48V voltage. Supplier has only to prove and meet MTBF target with the chosed solution.

7.6.1 -48V DC INPUT VOLTAGE RANGE SPECIFICATION:

The nominal power supply voltage is inside the range –36 V to –60V with no damage range covering 0 to –36 V & -60 to -75.0 V.

7.6.2 DC/DC PROTECTION:

To protect DDM against bad running, the DDM must contain an internal electrical or mechanical power fuse of 1A on DC input (primary only at least).

7.6.2.1 INRUSH CURRENT

An inrush current limiter circuit must be sized to support a current surge of 5A max (hot plug manipulation). Sub-D connector (and all concerned components) shall sustain this current surge without damage. The supplier has to verify that this value meets the requirement of the power converters safety approval (this fuse requirement is also captured in DDM specification - Product Safety). The test bench is defined as following:

� The DC power source has no current limitation (capacitors must be added to supply the necessary peak surge). It is required to add capacitors close



to the DC connector of the test bench equivalent to ten to one hundred times the value of the capacitors at the –48V DDM input.

� The inductor source, including the test bench wiring, must be between 0.05 and 0.1 µH.

� The resistance source, including the test bench wiring, must be between 0.05 and 0.1 Ohms.

� The worst case is obviously by applying to the DDM a "Dirac" or square wave input DC voltage. So, to ensure this, it is mandatory to use either a mercury switch or a MOSFET circuit to strongly apply the 55V DC source voltage to the DDM.

� Between two measurements, it is mandatory to ensure that the inrush current limiter circuit is fully discharged and operational.

� Between 2 measurements, it is mandatory to ensure a complete discharge of the DDM input capacitors.

The measurement configuration is defined as following:

� The DC voltage source must be adjusted to -55V.

� The input DC current must be measured with an insulated high BW current probe (at least 1Mhz) at the –48V_IN Sub-D connector pin.

� The input DC voltage must be measured concurrently with the input current.

The Tests of inrush current is defined as following:

All the measurements may be only performed at ambient temperature of 25/35°C and with the RF input applied. This test mu st be done only to be sure that the peak surge current due to the LNAs should not be more than the inrush current mask.



7.6.2.2 TMA DC INTERFACE

TMA can be remotely DC feed through DDM T-bias. This means that DDM shall monitor current consumption. In the case where fault is detected (out of nominal range – it can be short circuit for example), DDM shall protect itself by limiting current consumption. This can be done through waste load or/and DC/DC converter voltage control for example. In any case, DC supply doesn’t have to be switched off automatically.

The aim is as soon as failure disappears (TMA is changed for example), DC supply comes back to nominal value and no DDM reset is mandatory to recover initial conditions.

Parameters Specification

Nominal Voltage range (+11 to +15) VDC

Maximum current consumption (operating mode) within 0 to 15 V DC range 120 mA

Minimum current consumption limitation 220 mA

Surge current (*) 10 mC

Maximum peak power duration 0.4 ms

Current Consumption Failure Mode (for each single section Main and Diversity) 10mA < >150 mA

Command of the switch on TMA DC Interface Switch ON = 0 Switch OFF = 1

Table 10 : TMA operating conditions

(*) defined by the product (1.1* Is * T) with - Is, the surge current at the DC ramp up. - T, the time to recover nom value.

Note : TMA DC interface functionality has to not generate any spurious from 9

KHz to 12.75 Ghz in any condition ( see doc [R1] fo r spurious limit ).



7.7 LIGHTNING PROTECTION

No quarter wave or gas tube is required within DDM. This function is provided through an external RF cable linking BTS faceplate and DDM. But residual voltage appears after such protection. So dedicated protection (one device per main and diversity branch) within DDM is mandatory.

Figure 6 : DDM DC supply arrangement

DDM will withstand electrical surges due to lightning strikes, in accordance with the exposure defined Table 2.

Main Ant Port

DC bloc

Div Ant Port

Duplexer Main path

DC/DC Convert

DC feed

DC Bloc

Fuse

Lightning Protection

Duplexer Div path DC Feed

Sub D 15 pins connector

Lightning Protection



7.8 INTERFACE SPECIFICATIONS

Signal Description PIN Type

Main Tx Transmit In Port - N Female Main Ant Antenna Port - 7/16 Female Main Rx1 Receive Out Port - SMA Female Main Rx2 Receive Out Port - SMA Female/50ohms Main Rx3 Receive Out Port - SMA Female/50ohms Div Tx Transmit In Port - N Female Div Ant Antenna Port - 7/16 Female Div Rx1 Receive Out Port - SMA Female Div Rx2 Receive Out Port - SMA Female Div Rx3 Receive Out Port - SMA Female

Pwr/Data

Battery return -48 V

FGND (Frame or Chassis) Detection_In

Detection_RTN Balanced (+) Serial Clock Line Balanced (-) Serial Clock Line

Balanced (+) Serial Data Line from µp Balanced (-) Serial Data Line from µp Balanced (+) Serial Data Line to µp Balanced (-) Serial Data Line to µp

Not Connected A1 address input A2 address input

Vcc output

Pin 15 Pin 8 Pin 7 Pin 13 Pin 14 Pin 9 Pin 1 Pin 10 Pin 2 Pin 11 Pin 3 Pin 4 Pin 5 Pin 6 Pin 12

15 pin Dsub male connector

Table 11 : Physical Interface

7.8.1 I²C INTERFACE

DDM shall support an I²C monitoring interface to I/O port expanders and EEPROM through the serial Clock and serial Data Lines. The serial data and clock lines on I²C bus are differentially driven, unidirectional serial lines. The I²C bus architecture is shown in Figure 7. Two I2C ports expanders are used : one is dedicated to writing operations (Write Protection of the EEPROM, switch command) and the second is dedicated to reading operations (alarm and presence reports). The difference between the 2 addresses is given by A0.



(*) The 300 ohms resistances between the differential line receivers are mandatory

Figure 7 : I²C Bus Architecture

The differential line receiver shall fulfill RS485 requirements (DS26C32ATM or the equivalent). The buffer shall be a National MM74HC125 or the equivalent. I²C I/O port expander device to be used is the Philips PCF8575TS (16-bit) or equivalent. The I²C EEPROM to be used is the Philips PCF8594C-2 (512*8-bit) or the equivalent (Xicor X24C04 for example).

(-) from µp

(+) from µp

Consumption alarms : LNAs Main and Div (2) VSWR_fault (1) VSWR Monitor Threshold : VSWR Main (2) VSWR Div (2) Detection of the VSWR presence (1) Detection of an RF signal at the output of the VSWR monitor : - VSWR_RF_detection_Main (1) - VSWR_RF_detection_Div (1) TMA_main_fault (1) TMA_div_fault (1)

EEPROM 4K

(-) clock

(-) to µp

Differentiel Receiver

Differentiel Driver

(+) clock SDL (1)

Clock

From µp

To µp

300ohms (*)

300ohms (*)

DDM

Write_Protection Switch_main_command Switch_div_command VSWR_LEDs_reset_command

PCF 8575

PORT EXPANDER WRITE

PCF 8575

(+) to µp

PORT EXPANDER READ

SCL (1)

Buffer



RS-485 Requirements : The differential line driver shall fulfill RS485 requirements (Linear Tech LTC1688 or the equivalent). By default, the driver I2C must be in three-state outputs and maintain “0” during transmission to the TRM or High Impedance in three-state. The reason is to avoid any conflict when the I2C (DDM – TRM) bus is shared between 3 DDMs. Additionally, a generic footprint approach for the RS-485 iBTS interfaces is recommended. It guarantees that we get the artwork right. All of the following elements (cf figures 8 and 9 below) on the receiver and driver parts may be needed and placing appropriate footprints guarantees we need no further artwork cycles.

DRIVER PART:

Figure 8 : I²C Bus Architecture : Driver part:

FOOTPRINTS : AC Termination useful for multi-drop nets

EN

Data in

-

+

DDM driver (LTC1688) in tristate mode

Transzorbs to be added to reduce DC current draw

FOOTPRINTS : RCR filtering Vdc

FOOTPRINTS : External fail/safe

FOOTPRINTS : Terminal Resistor to reduce the return wave

Keep all stubs short

pin 11 to µp

pin 3 to µp



Figure 9 : I²C Bus Architecture : Receiver part Notes on the figures 8 and 9: The footprints in blue in the design (except Transzorbs) must be equipped with Zero Ohm resistors on the board, as they are shorts across places where future components may be added. The other footprints are not equipped today. Note on the implementing footprints for further serial interface evolutions: - AC parallel terminations on driver and receiver are required as they are all stubs in a multi-drop network and to reduce DC current draw. - Failsafe pull up / pulls down resistors are for tristate bus definition (guarantee > 200mV and Thevenin impedance matching the cable (100-120 ohms)). Note on ESD Diodes: RS-485 requirements include ESD compliance inherent in device, plus external transzorb protection. SM712 TVS diode (or equivalent) is used to provide ESD protection to 15kV (air) and 8kV (contact) per IEC 61000-4-2. The differential RS485 receiver inputs must be able to withstand –7V/+12V of common mode voltage. ESD diodes, connected between one of these

+

-

DDM receiver

FOOTPRINTS : AC Termination To keep DC power dissipation down

5Vdc

300ohms already implemented

Keep all stubs short

Transzorbs to be added to reduce DC current draw

FOOTPRINTS : External fail/safe

pin 10 (data from µp) pin 9 (clock)

pin 2 (data from µp) pin 1 (clock)



differential lines and ground, should be high impedance for voltage between –7V and +12V and shunt transients outside this range to ground. In practise, the ESD diode has to be designed for a maximum protection that matches the characteristics of common mode voltage of its receiver. The minimum protection level is defined by both the TRM receiver main/safe terminations and the DDM driver 's power supply. The Digital ground on the dTRM is linked to the FGND of the DDM so ground loops between the transmitter and the receiver will result in very small voltages at the receiver which never exceed the receiver 's power supply lines. ESD diodes, which match the far end receiver, should also be placed at transmitter outputs.

7.9 DSUB CONNECTOR CABLING

7.9.1 DDM CABLE DETECT

TRM software is able to detect, via a cable detect line (CABLE-DETECT), if a DDM is physically connected at its interface. On the DDM side, pin 13 and pin 14 of the 15-pin Dsub connector are connected together.

Figure 10 : CABLE-DETECT Schematic

Vcc

CABLE-DETECT

DDM 1 DDM 2 DDM 3 TRM

+ 10

Communication Processor Module

15 pin Dsub connector

CABLE-DETECT

CABLE-DETECT

14 13



7.9.2 I²C EEPROM ADDRESS

Up to 3 DDM can be connected on the same bus. This means that DDM interface has to be tri state. The system has three device EEPROMs (one EEPROM per DDM) on I²C bus. The address of each EEPROM corresponds to a specific position of the corresponding DDM in the BTS. These three addresses are defined by the state of A1 and A2 EEPROM inputs. +Vcc (+5 V) shall be protected by a diode. Moreover, I²C interface has to be compatible with 5 V DC supply coming from Pin 12 (Vcc input). This leads to components modifications such as regulator, receiver and driver. Figure 6 describes the electrical configuration to detect the presence and the physical address of the DDM in the BTS.

Figure 11 : Dsub Connector Cabling

GND

µ C

DDM-Dsub connector

EEPROM

+5 V coming from DDM supply

A1 A2

A0 A1 A2

I/O EXPANDER WRITE

4 5

6

12

1

2 3

7 8

9

10

11

13

14

15

1.

A0 A1 A2

I/O EXPANDER READ

GND

A0 : NC



7.9.3 SOFTWARE

7.9.3.1 LNA MONITORING

The LNA monitoring shall indicate the health of the main LNA and diversity LNA. LNA_main_fault and LNA_div_fault signals input to P0 and P1 of the I²C port expander are the LNA fault alarms for the main and diversity LNAs respectively. The alarm logic is:

• 0 (logical low) indicates LNA normal operation. • 1 (logical high) indicates LNA fault.

When the LNA is not powered (no DC power) the logical signals should also indicate an alarm.

ALU (Alcatel-Lucent ) has to approve alarm circuitry design.

7.9.3.2 VSWR MONITORING

As for the LNA software paragraph (6.6.3.1), the VSWR monitor monitoring shall indicate the health of the main and diversity VSWR monitor. VSWR_fault signal input to P2 of the I²C port expander is the VSWR current consumption alarm for both main and diversity VSWR monitors.

VSWR_threshold1_main, VSWR_threshold2_main, VSWR_threshold1_div and VSWR_threshold2_div signals input to P3, P4, P5 and P6 of the I²C port expander are the VSWR monitor threshold alarms for the main and diversity VSWR monitors.

VSWR_presence signal input to P7 of the I²C port expander is the detection signal of the presence of the VSWR monitor in the DDM module. VSWR_RF_main and VSWR_RF_div signals input to P10 and P11 of the I²C port expander are the detection signals of an RF signal at the output of the VSWR monitor. The VSWR monitor shall provide an alarm if the RF signal at the output of the coupler is out of the total Tx band power range: 23dBm to 47dBm. The alarm logic is:

• 0 (logical low) indicates VSWR monitor normal operation. • 1 (logical high) indicates VSWR monitor fault.

When the VSWR monitor is not powered (no DC power) the logical signals should also indicate an alarm.

ALU is to approve alarm circuitry design.



7.9.3.3 WRITE PROTECTION

A ‘1’ indicates no writing possibility. A ‘0’ allows writing in the EEPROM.

7.9.3.4 SWITCH COMMAND MONITORING

A ‘0’ indicates a working mode with TMA configuration: • LNA gain attenuation • TMA DC supply ON

A ‘1’ indicates a working mode without TMA configuration: • no LNA gain attenuation • TMA DC supply OFF.

Value per default is 1 : no TMA mode.

7.9.3.5 TMA MONITORING

When the DDM feeds a double UMTS TMA, it shall control the current consumption and raise an alarm if the current is out of a defined working window (thresholds). A ‘0’ indicates normal operation. A ‘1’ indicates failure. This means that TMA fault is not monitored when TMA mode is not selected.

7.9.3.6 BUFFER SUMMARY

Reading Buffer :

DESCRIPTION I2C Port LNA_Main_fault P0 LNA_div_fault P1 VSWR_fault P2 VSWR_threshold1_main P3 VSWR_threshold2_main P4 VSWR_threshold1_div P5 VSWR_threshold2_div P6 VSWR_presence P7 RF_detection_main P10 RF_detection_div P11 TMA_main_fault P12 TMA_div_fault P13

Table 12 : reading buffer



Writing Buffer :

BTS must be able to write in the EEPROM when updating the last in-service date. Before writing in the EEPROM, the write protect bit should be set to 0. After writing it should be reset to 1 in order to prevent data corruption.

Description I2C Port

Write_protection P0 Switch_main_command P1 Switch_Div_command P2 VSWR_LEDs_reset_command P3 NC P4 NC P5 NC P6 NC P7 NC P10 NC P11 NC P12 NC P13

Table 13 : writing buffer



7.9.4 LEDS ON FRONT PANEL

For installation and commissioning purposes, some LEDs aim to reflect DDM and TMA status. They are located on the front panel, according to [R1&R4] documents.

7.9.4.1 DDM MONITORING

Two LEDs are required :

RED LED = DDM FAULT LED GREEN LED = POWER STATUS LED

ON

Power applied, no fault

OFF

No Fault

OFF

Power not applied or DC/DC_converter_Main failure or DC/DC_converter_Div failure or

ON

LNA_Main_fault or LNA_Div_fault or VSWR_fault

OFF

fault present

Table 14 : DDM LEDS function

7.9.4.2 TMA MONITORING

One LED is required:

LED Light status Requirements

ON Switch_main_command and TMA_Main_fault or Switch_div_command and TMA_Diversity_fault RED

OFF No fault

Table 15 : TMA LED function



7.9.4.3 VSWR MONITORING

4 LEDs are required: one orange and one red for Main and Div path.

The VSWR DDM monitor at the following conditions activates the LEDs:

VSWR alarm LEDs status

VSWR < 2:1: VSWR > 2:1 and VSWR < 3:1 VSWR > 3:1

Main ORANGE LED Main RED LED

OFF OFF

ON OFF

ON ON

Div ORANGE LED Div RED LED

OFF OFF

ON OFF

ON ON

Table 16 : VSWR LED function

When the TX Diversity is not implemented, the 2 Diversity LEDs are not activated (OFF). The VSWR LEDs alarm status of VSWR > 3:1 will be memorized as long as there is no RF input power detected or there is no reset of the LEDs alarms. The reset is generated by 2 ways:

- Power cut of the –48V DC supply - TRM software reset command sent to P03 port of the writing I2C port

expander. Per default, the P03 port state is 1 (logical high). VSWR LEDs uP will manage the LEDs reset on interruption mode at high to low transition corresponding to a TRM I2C reset command. TRM software writes a ‘1’ state on P03 port after a reset command to enable VSWR uP to manage another reset.



7.9.5 FIRMWARE

The manufacture, calibration and performance data is accessed through an I²C EEPROM within four table formats stored in the EEPROM memory. DDM unit memory location is as follows: EEPROM configuration data

The first table starts at byte 0 to byte 88 (Table 13: EEPROM Configuration Format). DDM Main receive Parameter Data

The configuration data describes hardware module specific information. The main receive parameters denote relevant receive measurements (Gain, NF, Input IP3 and Delay) from main antenna port (Main Ant) to main receive output port (Main Rx1, Main Rx2, Main Rx3 and Main Rx4). The second table starts at byte 89 to byte 143 (Table 14: EEPROM Receive Data Format). DDM Diversity receive Parameter Data

The diversity receive parameters denote relevant receive measurements (Gain, NF, Input IP3 and Delay) from div antenna port (Div Ant) to div receive output port (Div Rx1, Div Rx2, Div Rx3 and Div Rx4). The third table starts at byte 144 to byte 198 (Table 14: EEPROM Receive Data Format). DDM Main Transmit Parameter Data

The main transmit parameters denote relevant transmit measurements (IL, Delay) from main transmit in port (Main Tx) to main antenna port (Main Ant). The fourth table starts at byte 199 to byte 234 (Table 15: EEPROM Transmit Data Format). DDM Diversity Transmit Parameter Data

The div transmit parameters denote relevant transmit measurements (IL, Delay) from div transmit in port (Div Tx) to div antenna port (Div Ant). The fifth table starts at byte 235 to byte 270 (Table 15: EEPROM Transmit Data Format).

DDM Absolute Group Delay Parameter Data

The Absolute Group Delay parameters denote relevant absolute delay within both the full TX band from main and div transmit in port (Main Ant and Div Ant) to main and div antenna port (Main Ant and Div Ant) and the full RX band from Main and div antenna port (Main Ant and Div Ant) to main and div receive output port (Main Rx1, Main Rx2, Main Rx3, Main Rx4 and Div Rx1, Div Rx2, Div Rx3, Div Rx4)



The sixth table starts at byte 271 to byte 309 (Table 16: EEPROM Absolute Group Delay Data Format).

Each table requires a 16-bit CRC calculated over a specified number of data bits, which corresponds to the table data size. The calculated CRC is MSB first. The generator polynomial is g(x)=x^^16+x^^12+x^^5+1. The resultant is stored in the two byte CRC respective location (see Appendix 3 for CRC Calculation Code). All signed integer data (I8) is stored with the MSB reserved for the bit of sign. The allocated bytes within each table, which are unused, must be filled with the equivalent of a zero integer in the denoted format. The unused bytes filled with the equivalent zeros must be the most significant bytes of the allocated memory location.

7.9.5.1 EEPROM CONFIGURATION DATA

Start Byte

Stop Byte Bytes Name Format Notes

0 0 1 Configuration Format Size binary Value = 89

1 3 3 RU application/type/subtype

binary Note 1

4 33 30 RU name ASCII Note 2

34 49 16 PEC ASCII Note 3

50 74 25 Serialization number ASCII Note 4

75 78 4 Manufacturing date ASCII Note 5

79 82 4 Hardware release ASCII Note 6

83 86 4 Last in-service date ASCII Note 7

87 88 2 CRC binary Check Sum

Table 17 : EEPROM Configuration Format

Note 1 : RU APPLICATION/TYPE/SUBTYPE (3 bytes binary field) 1. RU application (1 byte) : this field indicates that the RU (Replaceable Unit)

is a UMTS dedicated module.

The value stored is : “0000 0010”

2. RU type/subtype (2 bytes): this field indicates the function of the RU in a BTS. This will be used by BTS software to process each field and could be used also by the OMC.

The value stored is: “0000 0001 1000 0001” for NTU747AF



The value stored is: “0000 0001 1000 0100” for NTA570AM

Note 2 : RU NAME (30 bytes ASCII field) This field indicates the generic name of the module family (ALU Baan reference), blank space ASCII terminated string (0x20h).

The value stored is : see Table 3 Description

Note 3 : PRODUCT ENGINEERING CODE (16 bytes of ASCII chars) The PEC code identifies uniquely a product in terms of function and fit. This field identifies only a product in terms of function and fit. The value stored is : “_ _ xxxxxxxxnnnnnn” with :

• _ _ : 2 blank spaces for future evolutions • xxxxxxxx : Product Engineering Code (PEC) see Table 1

• nnnnnn : kind of edition number (equal to 6 blank spaces).

Note 4 : SERIALIZATION NUMBER (25 ASCII chars) This field indicates the absolute number of a BTS equipment for a given PEC code. The serial number and the PEC code identify uniquely a ALU product.

• Corporate Standard 5014.00 compliant • Set at manufacturing time • Not modified

The value stored is : “_ _…_ _ NNTMxxyyyyyy” with :

• _ _…_ _ : 13 blank spaces characters for future use (13 chars) • NNTM : ALU manufacturer identifier (4 chars) – This is defined by

Supply Chain Management team as indicated on the front label sticker • xx : manufacturing location (2 chars) – This is defined by Supply Chain

Management team as indicated on the front label sticker • yyyyy : serial number (6 chars compliant with 5014.00 ALU

recommendation) as indicated on the front label sticker

Note 5 : MANUFACTURING DATE (4 ASCII chars)

• Set at manufacturing time – supplier introduction • Not modified

The value stored is : ”wwyy” • ww : week number (2 chars) • yy : last 2 digits of year number (2 chars)

example : week 03 2000 is coded : 0300



Note 6 : HARDWARE RELEASE (4 ASCII chars) This release indicates the revision level of the equipment. The hardware release is related to a PEC code. Since the DS2406 is an eprom, it is not possible to overwrite the data. Therefore, each time the hardware release is changed, another field is written.

• Corporate Standard compliant • Set at manufacturing time – supplier introduction and released after

ALU approval only • Modified during a repair operation or on-site during a retrofit operation using the TIL (ALU tool) application or from OMC-R.

The value stored is : “ttnn” • tt : 2 spaces (__) • nn : hardware release (2 chars ex : D1 or 01)

Note 7 : LAST IN-SERVICE DATE (4 ASCII chars)

• Set by iBTS SW if not available, the first time the equipment is detected in the cabinet.

• Not modified by TIL nor OMC • Cleared at R&R

The value stored is : “wwyy”

• ww : week number (2 chars) • yy : last 2 digits of year number (2 chars)

example : week 03 2000 is coded : 0300

7.9.6 DDM MAIN RECEIVE PARAMETER DATA

Start Byte

Stop Byte Bytes Name Format Units Notes

0 0 1 Receive Data Format Size

binary Value = 55

1 2 2 Mid Band Frequency binary MHz/16 Value = 1950

3 4 2 Minimum Frequency binary MHz/16 Value = 1922.5

5 6 2 Maximum Frequency binary MHz/16 Value = 1977.5

7 7 1 Nominal Gain at Mid band Freq

binary dB/64

8 8 1 Frequency Step binary MHz/16 Value = 80

9 9 1 Number of Freq binary Value = 12

10 10 1 Nominal Gain at Min Freq+(step*0)

binary dB/64

11 11 1 Nominal Gain at Min binary dB/64



Freq+(step*1)


binary dB/64


binary dB/64


binary dB/64


binary dB/64


binary dB/64


binary dB/64


binary dB/64


binary dB/64


binary dB/64


binary dB/64

22 22 1 NF at Min Freq binary dB/16

23 23 1 NF at Mid Band Freq binary dB/16

24 24 1 NF at Max Freq binary dB/16

25 25 1 Input IP3 at Min Freq binary dBm/8

26 26 1 Input IP3 at Mid Band Freq

binary dBm/8

27 27 1 Input IP3 at Max Freq binary dBm/8 28 28 1 Minimum Temp binary °C 29 29 1 Maximum Temp binary °C 30 30 1 Temperature Step binary 31 31 1 Number of Temp binary

32 32 1 Nominal Gain at Mid Freq and Min Temp + (step*0)

binary dB/64


binary dB/64


binary dB/64


binary dB/64


binary dB/64




binary dB/64


binary dB/64


binary dB/64

40 40 1 NF at Min Freq and Min Temp + (step*0)

binary dB/16

41 41 1 NF at Min Freq and Min Temp + (step*7)

binary dB/16

42 42 1 NF at Mid Band Freq and Min Temp + (step*0)

binary dB/16

43 43 1 NF at Mid Band Freq and Min Temp + (step*7)

binary dB/16

44 44 1 NF at Max Freq and Min Temp + (step*0)

binary dB/16

45 45 1 NF at Max Freq and Min Temp + (step*7)

binary dB/16

46 46 1 Input IP3 at Min Freq at Min Temp+(step*0)

binary dBm/8

47 47 1 Input IP3 at Min Freq at Min Temp+(step*7)

binary dBm/8

48 48 1 Input IP3 at Mid Band Freq at Min Temp + (step*0)

binary dBm/8

49 49 1 Input IP3 at Mid Band Freq at Min Temp + (step*7)

binary dBm/8

50 50 1 Input IP3 at Max Freq at Min Temp+(step*0)

binary dBm/8

51 51 1 Input IP3 at Max Freq at Min Temp+(step*7)

binary dBm/8

52 52 1 Delay Deviation binary nS/4

53 54 2 CRC binary N/A Check sum

Table 18 : EEPROM Receive Data Format

All receive data concern no TMA performances.

Rx Gain versus Frequency at 25°C : Using a calibrated network analyzer (full two port calibration), the gain of the



DDM in the receive band, from the main antenna port (Main Ant) to the main receive output port (Main Rx1, Rx2, Rx3, Rx4) for main receive data or from the diversity antenna port (Div Ant) to the diversity receive output port (Div Rx1, Rx2, Rx3, Rx4) for diversity receive data, is evaluated. The gain at each frequency step is the average gain of the four receives output ports Rx1, Rx2, Rx3, Rx4 (Main or Div). The average gain is evaluated at 5 MHz steps starting at 1922.5 MHz through to 1978.5 MHz. The ambient temperature during test shall be 25°C ± 2°C with a temperature stabilization time of at le ast two hours.

The result of the subtraction (Average Gain measured between the four output ports – 24.50 dB) is rounded to two decimal places and multiplied by a factor of 64. The resultant is rounded to the nearest integer and converted to a signed byte binary number.

All signed integer data (I8) is stored with the MSB reserved for the bit of sign. From 0 to 127 (MSB=0) the data stored is a positive value and from 128 to 255 (MSB=1) the data stored is a negative value. Data format to be stored is MSB first Encoding examples :

MeanGain = 23.8 Hex Value = (23.8 – 24.5) * 64 = - 44.8 (rounded to -45) Signed byte binary number = 0xD3

MeanGain = 25.8 Hex Value = (25.8 – 24.5) * 64 = 83.2 (rounded to 83) Signed byte binary number = 0x53

Conversion Hex / Gain in dB

22

22,5

23

23,5

24

24,5

25

25,5

26

26,5

27

0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 250 260 270

decimal value

Gain value in dB

211 83

25.8

23.8



Noise Figure Measurement at 25°C : The NF shall be measured from the main antenna port (Main Ant) to the main receive output port (Main Rx1, Rx2, Rx3, Rx4) for main receive data or from the diversity antenna port (Div Ant) to the diversity receive output port (Div Rx1, Rx2, Rx3, Rx4) for diversity receive data at minimum, mid band and maximum frequency. Each NF data stored is an average data of the four NF measurements corresponding to the four receive output ports Rx1, Rx2, Rx3 and Rx4 (Main and Div). The ambient temperature during test shall be 25°C ± 2°C with a temperature stabilization time of at lea st two hours. The NF is rounded to two decimal places and multiplied by a factor of 16. The resultant is rounded to the nearest integer and converted to a one byte binary number.

Input IP3 Measurement at 25°C : The Input IP3 shall be measured from the main antenna port (Main Ant) to the main receive output port (Main Rx1, Main Rx2, Main Rx3, Main Rx4) for main receive data or from the diversity antenna port (Div Ant) to the diversity receive output port (Div Rx1, Div Rx2, Div Rx3, Div Rx4) for diversity receive data at minimum, mid band and maximum frequency. Each Input IP3 data stored is an average data of the four Input IP3 measurements corresponding to the four receive output ports Rx1, Rx2, Rx3 and Rx4 (Main and Div). The ambient temperature during test shall be 25°C ± 2°C with a temperature stabilization time of at least two hours. The Input IP3 is rounded to two decimal places and multiplied by a factor of 8. The resultant is rounded to the nearest integer and converted to a signed one byte binary number. All signed integer data (I8) is stored with the MSB reserved for the bit of sign. From 0 to 127 (MSB=0) the data stored is a positive value and from 128 to 255 (MSB=1) the data stored is a negative value. Data format to be stored is MSB first Encoding examples:

MeanIIP3 = -1.75dBm Hex Value = (-1.75) * 8 = - 14 Signed byte binary number = 0xF2

MeanIIP3 = +0.4dBm Hex Value = 0.4 * 8 = 3.2 (rounded to 3) Signed byte binary number = 0x03

Rx Gain versus Temperature : Using a calibrated network analyzer (full two port calibration), the average gain of the DDM in the receive band, from the main antenna port (Main Ant) to the main receive output port (Main Rx1, Main Rx2, Main Rx3 and Main Rx4) for main receive data or from the diversity antenna port (Div Ant) to the diversity receive output port (Div Rx1, Div Rx2, Div Rx3 and Div Rx4) for diversity receive data is statistically evaluated over temperature . This characteristic data is the same for all same variant units of the same release number. The average gain must be evaluated from 0°C ± 0.5°C to 70°C ± 0.5°C at 10°C ±



0.5°C steps. The result of the subtraction (Average Gain measured between the four output ports – 24.50 dB) is rounded to two decimal places and multiplied by a factor of 64. The resultant is rounded to the nearest integer and converted to a signed one-byte binary number (see § Rx Gain versus Frequency at 25°C).

NF Measurement versus Temperature: The NF from the main antenna port (Main Ant) to the main receive output port (Main Rx1, Main Rx2, Main Rx3, Main Rx4) for main receive data or from the diversity antenna port (Div Ant) to the diversity receive output port (Div Rx1, Div Rx2, Div Rx3, Div Rx4) for diversity receive data at min, mid band and max frequency is statistically evaluated for minimum and maximum temperature steps. Each NF data stored is an average data of the four NF measurements corresponding to the four receive output ports Rx1, Rx2, Rx3 and Rx4 (Main and Div). This characteristic data is the same for all same variant units of the same release number. The NF is rounded to two decimal places and multiplied by a factor of 16. The resultant is rounded to the nearest integer and converted to a one-byte binary number.

Input IP3 Measurement versus Temperature: The Input IP3 from the main antenna port (Main Ant) to the main receive output port (Main Rx1, Main Rx2, Main Rx3, Main Rx4) for main receive data or from the diversity antenna port (Div Ant) to the diversity receive output port (Div Rx1, Div Rx2, Div Rx3, Div Rx4) for diversity receive data at min, mid band and max frequency is statistically evaluated for minimum and maximum temperature steps. Each Input IP3 data stored is an average data of the four Input IP3 measurements corresponding to the four receive output ports Rx1, Rx2, Rx3 and Rx4 (Main and Div). This characteristic data is the same for all same variant units of the same release number. The Input IP3 is rounded to two decimal places and multiplied by a factor of 8. The resultant is rounded to the nearest integer and converted to a signed one byte binary number (see § Input IP3 Measurement at 25°C).

Rx Delay Deviation Measurement at 25°C : Using a calibrated network analyzer (full two port calibration), the delay deviation within the Rx pass band of the DDM is evaluated. The delay deviation is measured from the main antenna port (Main Ant) to the main receive output port (Main Rx1 or Main Rx2 or Main Rx3 or Main Rx4) or from the diversity antenna port (Div Ant) to the diversity receive output port (Div Rx1 or Div Rx2 or Div Rx3 or Div Rx4). The delay deviation is measured at 25°C ±2°C with a stabilization time of at least two hours . The delay deviation data is rounded to two decimal places and multiplied by a factor of 4. The resultant is rounded to the nearest integer and converted to a one-byte binary number.



7.9.6.1 EEPROM TRANSMIT DATA FORMAT

Start Byte


0 0 1 Transmit Data Format Size binary Value = 36

1 2 2 Mid Band Frequency binary MHz/16 Value = 2140

3 4 2 Minimum Frequency binary MHz/16 Value = 2112.5

5 6 2 Maximum Frequency binary MHz/16 Value = 2167.5

7 7 1 Insertion Loss at Mid band Frequency

binary dB/64

8 8 1 Frequency Step binary MHz/16 Value = 80

9 9 1 Number of Freq binary Value = 12

10 10 1 Insertion Loss at Min Freq+(step*0)

binary dB/64 See note


binary dB/64


binary dB/64


binary dB/64


binary dB/64


binary dB/64


binary dB/64


binary dB/64


binary dB/64


binary dB/64


binary dB/64


binary dB/64

22 22 1 Minimum Temp binary °C

23 23 1 Maximum Temp binary °C 24 24 1 Number of Temp binary

25 25 1 Insertion Loss at Mid Freq and Min Temp + (step*0)

binary dB/64




binary dB/64


binary dB/64


binary

dB/64


binary dB/64


binary dB/64


binary dB/64


binary dB/64

33 33 1 Delay Deviation binary nS/4


Table 19 : EEPROM Transmit Data Format

Insertion Loss versus Frequency at 25°C : Using calibrated network analyzer (full two port calibration) the insertion loss of the DDM in the transmit band is measured from the main transmit in port (Main Tx) to the main antenna (Main Ant) for main transmit data or from the diversity transmit in port (Div Tx) to the diversity antenna (Div Ant). The insertion loss is measured at 5 MHz steps starting at 2112.5 MHz through to 2168.5 MHz. The ambient temperature during test shall be 25°C ± 2°C with a temperature stabilization time of at least two hours. The insertion loss data is rounded to two decimal places and multiplied by a factor of 64. The resultant is rounded to the nearest integer and converted to a one byte binary number.

Insertion Loss versus Temperature : Using calibrated network analyzer (full two port calibration) the insertion loss of the DDM in the transmit band from the main transmit in port (Main Tx) to the main antenna (Main Ant) for main transmit data or from the diversity transmit in port (Div Tx) to the diversity antenna (Div Ant) is statistically evaluated over temperature. This characteristic data is the same for all same variant units of the same release number. The insertion loss must be evaluated from 0°C ± 0.5°C to +70°C ± 0.5°C at 10°C ± 0.5°C steps. The result is rounded to two decimal places and multiplied by a factor of 64. The resultant is rounded to the nearest integer and converted to a one byte binary number.

Rx Delay Deviation Measurement at 25°C : Using a calibrated network analyzer (full two port calibration), the delay deviation within the Tx pass band of the DDM is evaluated. The delay deviation is measured from the main transmit in port (Main Tx) to the main antenna port (Main Ant) or from the diversity transmit in port (Div Tx) to the diversity antenna port (Div Ant). The delay deviation is measured at 25°C ±2°C with a stabilization time of at least two hours. The delay deviation data is



rounded to two decimal places and multiplied by a factor of 4. The resultant is rounded to the nearest integer and converted to a one-byte binary number.

7.9.6.2 EEPROM ABSOLUTE GROUP DELAY DATA FORMAT

Start Byte


0 0 1 Absolute Group Delay Data Format Size

binary Value = 39

1 3 3 Main TX Absolute Delay at Min Frequency

binary ns/(32xFc*) See note

4 6 3 Main TX Absolute Delay at Mid Band Frequency

binary ns/(32xFc)

7 9 3 Main TX Absolute Delay at Max Frequency

binary ns/(32xFc)

10 12 3 Div TX Absolute Delay at Min Frequency

binary ns/(32xFc)

13 15 3 Div TX Absolute Delay at Mid Band Frequency

binary ns/(32xFc)

16 18 3 Div TX Absolute Delay at Max Frequency

binary ns/(32xFc)

19 21 3 Main RX Absolute Delay at Min Frequency

binary ns/(32xFc)

22 24 3 Main RX Absolute Delay at Mid Band Frequency

binary ns/(32xFc)

25 27 3 Main RX Absolute Delay at Max Frequency

binary ns/(32xFc)

28 30 3 Div RX Absolute Delay at Min Frequency

binary ns/(32xFc)

31 33 3 Div RX Absolute Delay at Mid Band Frequency

binary ns/(32xFc)

34 36 3 Div RX Absolute Delay at Max Frequency binary ns/(32xFc)


Table 20 : EEPROM Absolute Group Delay Data Format *Fc =1/Tc = Frequency chip = 3.84MHz Absolute Group Delay Measurement at 25°C: Using a calibrated network analyzer (full two port calibration), the absolute delay within the full TX and Rx pass band of the DDM is evaluated. The absolute TX delay is measured from the main transmit in port (Main TX) to the main antenna port (Main Ant) or from the diversity transmit in port (Div TX) to the diversity antenna port (Div Ant). The absolute RX delay is measured from the main antenna port (Main Ant) to the main receive output port (Main Rx1 or Main Rx2 or Main Rx3 or Main Rx4)



or from the diversity antenna port (Div Ant) to the diversity receive output port (Div Rx1 or Div Rx2 or Div Rx3 or Div Rx4). The delay is the average delay over the entire Tx or Rx band measured at 25°C ±2°C with a stabilization time of at least two hours . The delay data is rounded to two decimal places and multiplied by a factor of 32/Tc (Tc = time cheap = 1/3.84MHz). The resultant is rounded to the nearest integer, converted to a one byte binary number and stored in the last significant byte. Encoding example:

Absolute delay = 45ns Hex Value = 45 * 32/Tc = 5.5296 (rounded to 6) 1 byte binary number = 0x06

Storage value =0x00, 0x00, 0x06

8 MECHANICAL SPECIFICATIONS

See [R1] & [R4]

9 ELECTROMAGNETIC ENVIRONMENT 9.1 ELECTROMAGNETIC COMPATIBILITY REQUIREMENT

The aim of this part of is to specify the applicable EMC tests, the methods of measurements, the limits and the minimum performance criteria to lead the DDM modules to get a CE mark ( for Europe ), FCC mark and Industry Canada conformity (for North America ) and to ensure the conformity of the system (BTS).

9.1.1 EMC TEST CONDITION

DDM must be linked to the ground with a braid (in a BTS configuration : the DDM is linked to the BTS and the BTS is linked to the ground )

During the emission tests, all the inputs and outputs ports of the DDM must be set as follow : - The DDM is powered with a DC alimentation. This alimentation must be chosen in order to generate the lowest level of E.M radiation as possible. The length of the Pwr/Data wire must be set to be as close as possible to the length in a BTS configuration ( default length : 1 m ). The Pwr/data wire must be shielded as defined in the BTS specification. - TX from MCPA port : these radio ports of the DDM must be connected to a generator with an RF cable. The RF cable must be chosen ( length and shielding ) in order to be as close as possible to the length and shielding in a BTS configuration (default length : 1 m). The emission of the generator must be set at Pmax level on UMTS TX frequency.



- Main and Div antenna port : these radio ports of the DDM must be connected to a generator through an RF cable. The RF cable must be chosen (length and shielding) in order to be as close as possible to the length and shielding in a BTS configuration (default length : 1 m). The antenna ports must be connected to a 4 ports coupler ( providing isolation between the antenna port and the generator ) in order to protect the generator (on the antenna side) from the emission of the generator connected to the TX MCPA port. The emission of the generator must be set at the maximum RX level acceptable on RX frequency. - Main and div Rx single carrier ports : these radio ports of the DDM must be connected to a 50 Ohms through an RF cable. The RF cable must be chosen (length and shielding) in order to be as close as possible to the length and shielding in a BTS configuration (default length : 1 m)

9.1.1.1 EMISSIONS TESTS

9.1.1.1.1 RADIATED EMISSIONS

RADIATED EMISSIONS REQUIREMENTS Applicable Standards: ETS 300 342-3, EN 55022 Class B, FCC PART 15 SUBPART B Class B, 3GPP (Radiated spurious emission test). The DDM module shall comply with EN 55022 Class B, 3GPP (Radiated spurious emission test), FCC Part 15 radiated emission tests with a minimum of 6 dB margin . EN 55022 Class B and FCC Part 15B Class B Limits:

Frequency Range (MHz)

FCC part 15 (dBµµµµV/m)

EN 55022 Class B (dBµµµµV/m)

30-88 29.5 30 88-216 33.1 30

216-230 35.6 30 230-960 35.6 37

960-1000 43.5 37 1000-10000 43.5 N/A

10000-12750 43.5 N/A

Table 21: E-field strength (dB µµµµV/m) for EN 55022 Class B and FCC Part 15

Notes: 1. Average detector to be used for testing above 1GHz. 2. FCC accepts CISPR limits up to 1 GHz. 3. FCC test requirements extend up to 5th. harmonic or 12.75 GHz whichever is less.



3GPP Limits: The DDM module must be compliant with the 3GPP radiated emission test. This radiated power is determined by a substitution measurement. The radiated spurious emissions are measured over the frequency range of (30 MHz to 12.75 GHz) and the equipment shall meet the limits below:

� -36 dBm (70.98dbµV/m) for frequencies up to 1 GHz � -30 dBm (76.98 dbµV/m) for frequencies above 1 GHz.

9.1.1.1.2 CONDUCTED EMISSIONS ON DC LEAD

Conducted Emission Requirement on Pwr/data Lead Applicable Standard: CISPR22 [B6]- EN55022 [B7]

On DC lead, the DDM module shall be compliant with the 3GPP Class B voltage conducted emission test including a margin of 3dB minimum (see limit with Quasi Peak and average detector below). 3GPP Limits :

Frequency of Emission (MHz) Quasi-Peak Average

0.15 to 0.5 66-56 56-46

0.5 to 5 56 46

5 to 30 60 50

30 to 100 60 50

Table 22 : 3GPP Voltage limits (dB µµµµV)

9.1.1.1.3 CONDUCTED EMISSIONS REQUIREMENT ON SIGNAL LEADS

This test must be performed only on the Pwr/data wire. Applicable Standard: CISPR22 [B6]- EN55022 [B7]

On signal leads, the DDM module shall be compliant with the EN55022 voltage conducted emission tests including a margin of 3 dB minimum. EN55022 Limits : Tables 20 and 21 show the applicable Class B limits for conducted emissions on Signal lead for Quasi-Peak and Average detectors respectively.



Frequency Range (MHz) CISPR/EN 55022

0.15-0.5 84 to 74

0.5-30 74

Table 23 : Quasi-Peak detector(dB µµµµV)

Frequency Range (MHz) CISPR/EN 55022

0.15-0.5 74 to 64 0.5-30 64

Table 24 : Average detector(dB µµµµV)

Note: If the EUT meets the “Average Detector” limits when measured with the Quasi-Peak detector, there is no need to perform the “Average Detector” measurement.

9.1.1.2 IMMUNITY TESTS

PASS or Fail Criteria : No disturbance of the amplification is required during the immunity test (this criteria shall be applied for all the immunity test)

9.1.1.2.1 CONDUCTED IMMUNITY REQUIREMENT

This test must be performed only on the Pwr/data wire. Applicable Standard: 3GPP

The DDM module system shall be compliant with the voltage conducted immunity test at a level of 3 Vrms over the frequency range 150 kHz to 80 MHz (cables under test : AC Mains, DC cable and signal leads) as defined by the 3GPP standard.

3GPP Limits : The test method shall be in accordance with the EN 61000-4-6. The limits for CI, voltage on AC/DC power leads and Signal Leads.

Freq. Range (MHz) ETS 300 342-3 & 3GPP

0.15 – 80 129.5

Table 25 : Voltage (dB µµµµV)



Notes 1. Use LISNs to inject noise 2. The ETS 300 342-3 and 3GPP limit of 129.5 dBµV corresponds to a modulated level of 3V RMS with a 1 kHz, 80% modulated sine wave (tone) at a transfer impedance of 150 ohms. These standards call for testing up to 80 MHz.

9.1.1.2.2 ESD REQUIREMENT

Applicable Standard: 3GPP, ETS 300 342-3, BELLCORE GR 1089-CORE.

DDM shall be compliant with ESD ( Electrostatic discharges ) test levels as specified by the BELLCORE standard. This test shall be performed on the faceplate of the module.

Note: The BELLCORE levels are more stringent than the 3GPP requirement as illustrated by table 17. 3GPP and BELLCORE Limits : The test method shall be in accordance with the EN 61000-4-2.

Test Method 3GPP Bellcore GR-1089-CORE Contact discharge ± 2KV

± 4KV ±2kV ±4kV ±6kV ±8kV

Air discharge ± 2KV ± 4KV ± 8KV

±2kV ±4kV ±8kV

±15kV

Table 26 : Limits for air discharges and contact di scharges

Notes: 1. ETS 342-3 calls for the tests to be conducted in accordance with test methods specified in EN 61000-4-2 standard. 2. According the ETS 342-3, electrostatic discharges shall be applied to all exposed surfaces of the EUT. This test does not apply to surfaces, which are exposed only during maintenance.

9.1.1.2.3 EFT REQUIREMENT

This test must be performed only on the Pwr/data wire. Applicable Standard: 3GPP, BELLCORE GR 1089-CORE



The DDM module shall be compliant with EFT test in accordance with the BELLCORE standard (table 18 specifies the required levels).

Note : It is evident from table 18 that the BELLCORE levels include the levels specified by the 3GPP standard.

EFT Limits :

The test method shall be in accordance with the EN 61000-4-4.

Test Method ETS 300 342-3 & 3GPP BELLCORE

Limit for signal and control ports 0.50 kV 0.25 kV 0.50 kV

Limit for DC power supply input/output ports 1 kV

0.50 kV 1 kV 2 kV

Limit for AC power supply input/output ports 2 kV

0.50 kV 1 kV 2 kV

Table 27: EFT Limits



10 ENVIRONMENT

The following directives are an Europe requirement only. The module must be compliant with:

• Directive 2002/95/EC of the European Parliament and of the Council of 27 January 2003 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (RoHS)" and relevant addenda.

• Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE)" and relevant addenda.

• EuP directive for the setting of eco design requirements (all along the equipment life cycle from design until destruction) for Energy-Using products amending Council Directive 92/42/EEC. Just for information, no application procedure till now.

• NPS00200 V6 (Supplementary Specification for Green Compliant Components) ( see [R5] )

• NPS50561 - General Specification for OEM Equipment

ALU requirements expressed in this chapter do not absolve the supplier of the responsibility of understanding and being compliant with the EU RoHS and WEEE requirements as per the official interpretation of these Directives by the European Courts or national courts of each EU Member State, as well as the implementation of the Directives by each EU Member State. The information contained in this Statement is based on ALU’s current understanding of these matters and is subject to changes without notice." Relevant documents must be given to ALU: a) Certificate of Compliance to the directives (CoC), to the RoHS Directive for "due diligence" evidence procedure purpose. b) Material Declaration data for ALU's database c) Dis-assembly instructions/information for end-of-use disposal of their product and particularly informations on the location of hazardous materials. d) other documentation as required by legislation e) have auditable internal processes and records in place for products which demonstrate homogeneous material level sub-component RoHS Compliance. " Labeling: For the Rohs, a label must be added at the side of module with followed dimensions � Label N°N0111227 Dim : 18*10 mm

Color : black, green 375 , Material : 7880 from 3M



10.1 WEEE REQUIREMENTS

The supplier is required to add the WEEE label to this product on behalf of ALU who is the deemed "Producer" as determined by the WEEE Directive. The supplier may add this information to the current regulatory label or apply a separate label located close to the regulatory label on a secondary surface. The label is a crossed out wheelie bin with a black bar underneath. Below the black bar the word "Alcatel-lucent" should appear. This is to signify that the product was "put on the market" by Alcatel-lucent. As a guide the Alcatel-lucent label N0042443 ( LABEL: WEEE FRU/MODULES) may be used as an example.

The size of this label is recalled hereafter: > Label size: 20 X 30 mm (30 mm is height).

> Wheelie bin graphic size : a = 10 mm

> Typography for Printing: EVOBQ or BEMBO

The detail of the label is showed in the following plot:



11 DEPENDABILITY

The intent of this section is to define the reliability requirements for this product and to ensure that this product will be functional throughout its life time.

11.1 DEPENDABILITY DELIVERABLES

Deliverable Section When delivered Prime

Dependability Plan 11.5 Before 1W is complete Supplier Dependability Projection Report

11.4 1W, 0D Supplier

Failure analysis reports 11.5 Monthly for first year products, Quarterly once in full production

Supplier

FMECA Report 11.6 1W, 0D Supplier, ALU

HALT Report 11.7 0D after HALT completed Supplier POS Report 11.8 After HALT completed Supplier HASS/ESS Report 11.8 Monthly Supplier RCA Reports 11.8 For each failure mode during

development; For each top trend during production

Supplier

Manufacturing Quality Report (Cpk, SPQL, Yield)

11.9 Weekly or monthly, as appropriate for metric

Supplier

Dependability Analysis Report

11.10 Before Qualification is complete Supplier

Table 28: Dependability deliverables Deliverables due prior to qualification are to be issued to department WQ02, Dependability Engineering. Deliverables due after qualification (production) are to be issued to department W842, Strategic Supply Management.



11.2 DEPENDABILITY TARGETS

Characteristic Target – 1 st year production

Target – ongoing production

Comments

MTBF 500.000 Hrs 2000 F.I.Ts

Failure rate 3% failures/yr 1.75% failures/yr

Electrical functional failures only; 40°C ambient, ground benign; Telcordia TR332 Issue 6 or acceptable equivalent.

Useful Life 15 years Expressed as an L10.

In-service fault detection 95% 99%

There is a dependency on ALU design to achieve this target.

Table 29: Dependability Targets

11.3 DEPENDABILITY DEFINITIONS

Corrective action An action that results from a process or DDM failure and directly prevents that particular failure from recurring.

Containment An action that prevents a particular failure escaping from the supplier’s factory.

Critical Impacts the ability of the system to process calls.

Defect A defect is defined as any condition associated with the DDM that is not in compliance with the requirements of this document. Cosmetic defects are not generally included in this measurement, unless they are judged serious enough to preclude the use of the DDM for normal field service.

Defect density The expected density of defects per thousand lines of executable software code in the DDM (defects/KLOEC).

Dependability Ensuring that the customer gets what they want, when they want it. The DDM works when it gets there and keeps on working. If anything does go wrong, it gets fixed quickly.

DOA Dead on Arrival. Any DDM that is unusable by ALU or ALU’s customers before commissioning is completed, including cosmetic defects, storage and shipping damage.

ESS Environmental Stress Screening is a production screen that uses stresses that are higher than those



experienced in normal use to precipitate defects before the DDM is shipped.

FIT Failures in time. This is a smaller unit of reliability, used for components. It is the number of failures in 109 hours.

FMECA Failure modes, effects, criticality analysis. This is a design walkthrough that examines potential failures and determines the effects of those failures, the ability of the system to detect those failures, and the ability of the system to identify the FRU from which they originate. The result is a probability of detecting failures (in-service fault detection) and isolating failures (in-service fault isolation).

FR Failure rate is the percent of DDMs per year (%/yr) that experience electrical functional failure at customer's sites (field). This rate is taken into account only after the initial site installation and commissioning period has ended. The failure rate should take into account both hardware and software failure modes.

100*24*365*109

∑=FITsdevice

RateFailure calculated

100*24*365*

∑

∑=n

i

measured

ideviceforhoursonpower

devicesfailedlyelectricalRateFailure

FRU Field Replaceable Unit. The physical unit that the customer would return. It contains one or more circuit packs or OEM devices.

HALT Highly accelerated life test. HALT is a series of tests performed beyond the product specifications in order to precipitate weak components or design.

HASS See ESS

In-service fault detection The probability of detecting a fault in the DDM while it is in service. A high level of detection will reduce the average time to repair the system.

In-service fault isolation The probability of isolating a fault to the FRU while it is in service. A high level of detection will reduce the average time to repair the system and reduce NFFs.

L10 A measure of useful life, it is the point in time (years) at which 10% of the population is predicted to fail due to wear out. It indicates the beginning of a rapid wear out ramp.

MTBF Mean Time Between Failures. The calculated average time (hours) between failures, used as a relative



indicator of quality. It is measured by adding up the DDM population’s total power on time and dividing by the number of failures. It is predicted by adding up the FITs of all devices in the product, dividing by 109 hours, and inverting to get the MTBF in hours.

∑=

FITsdeviceMTBFcalculated

910

∑

∑=

devicesfailed


MTBF

n

i

measured

NFF No fault found. NFF refers to product returned from the customer where the reason for return cannot be determined. NFFs can be caused by poor isolation of faults by the system, poor correlation of factory test sets to field conditions, and difficult return processes, among other causes.

POS Proof of screen; proof of effectiveness of HASS/ESS

Preventative action Going beyond corrective action, a preventative action prevents the recurrence of a class of fault. A preventative action usually changes a behavior or a process.

RR Return rate. Return rate is the percent of products per year (%/yr) that are returned from the end customer to ALU for any reason. This could include NFF, functional failure, intermittent failure, cosmetic damage, damage in shipment, incorrect vintage, etc.

100*24*365*Re

∑

∑=n

i

measured


productreturnedRateturn

SPQL Shipped Product Quality Level. The shipped product quality level refers to the portion of the annual defective DDM compared to the total annual shipped DDM which are discovered during factory audits and during DDM installation. It is expressed either in PPM or %. It is also referred to as out of box quality, average outgoing quality level, or DOA.

Useful Life This is the period of time (in years) that the DDM is expected to operate in normal field service when used in the operational environment specified in this document. The materials, technologies and design practices used in the manufacture of this product must be chosen appropriately to meet this useful life requirement. This number is expressed as an L10, i.e., the point at which it



is estimated that 10% of the population will experience end of life.

Yield The percentage of passed units at a given step in the manufacturing process. Each stage of the process can be measured and the overall yields approximated by multiplying the individual stages together once volumes are higher than 100-units/unit time.

Illustration of SPQL , DOA, and failure rate measur ement points:

Discovered at ALU Discovered at Customer site

Incoming System Integration Burn-in, Installation & Field

Inspection Testing, Production screening, etc. Commissioning Operation

SPQL (Out of Box) DOA FR

11.4 DEPENDABILITY PROJECTION

The supplier shall submit a dependability projection report at 1W and at 0D demonstrating the capability of meeting the targeted failure rate, SPQL and useful life and to identify the key failure drivers and critical components. The failure rate analysis shall be performed at 40ºC ambient, ground benign, in accordance with Telcordia TR 332 Iss 6, Method 1 or an equivalent method acceptable to ALU Networks. The failure rate analysis shall account for quality factors, temperature considerations, environmental conditions and other operational issues. Models, design solutions and reliability estimates shall be presented at each technical review. The supplier shall detail a method of field failure rate estimation.

11.4.1 FAILURE RATE

The supplier shall commit, on a best efforts basis, to a targeted total annualized field failure rate of less than or equal to the target specified in Table 1.1 for the DDM in its first year of production, excluding NFFs. The supplier shall commit that the field failure rate of the DDM for the second year of production and ongoing life shall improve as specified in Table 1.1 without changes to form, fit or function, i.e., through improved manufacturing processes and/or better component selection or information acquired through failure analysis which is incorporated into the production process. The vendor may be required to demonstrate reliability capability.

11.4.2 SHIPPED PRODUCT QUALITY LEVEL



The supplier shall commit, on a best efforts basis, to a targeted Shipped Product Quality Level (SQPL) as specified in Table 1.1. The supplier shall commit that the SPQL of the DDM for the second year of production and ongoing life shall improve as specified in Table 1.1 without changes to form, fit or function, i.e., through improved manufacturing processes and/or better component selection or information acquired through failure analysis which is incorporated into the production process. The reporting for SPQL will be the same method as for in-service except that the returns will be those that failed at ALU or at the customer site during installation and the population will be the units shipped and/or commissioned during that month. The vendor may be required to perform ESS to assure SPQL targets are achieved. If the vendor implements ESS, a proof of screen is required to ensure the ESS is value-added; as well, DOA failure analysis shall be done to ensure ESS test coverage is adequate.

11.4.3 USEFUL LIFE

The DDM shall be capable of operating continuously for a minimum of X years in normal field service when used in the operational environment specified in this document. The materials, technologies and design practices used in the manufacture of this product must be chosen appropriately to meet this useful life requirement. The manufacturer shall maintain documented records of the module to provide objective evidence that this lifetime shall be achieved and maintained.

11.5 PRODUCT RELIABILITY GROWTH

Early in DDM development, the supplier shall provide a Dependability plan to achieve the targets specified in Table 1.1. The plan shall detail what dependability activities will be undertaken, the schedule and owners of the activities. During the ongoing manufacturing of this product, it is expected, as part of a joint commitment to high quality products, that the supplier demonstrate continuous product reliability growth through a continuous improvement program. This can be accomplished by design improvements, improved manufacturing processes, or new suppliers, as long as the DDM remains within the form, fit and function specified in the GS. The supplier shall provide information on which reliability growth model shall be used to demonstrate ongoing product reliability growth. The supplier shall continually identify the majority contributors to poor yield on this product and take the appropriate steps to address these issues. The supplier must also be able to provide failure rate analysis by manufacturing date and/or release. This analysis is required to demonstrate the effectiveness of corrective action and improvements to reduce failure rates. The supplier shall track and document all field performance data on all deployed products to customers. A report shall be issued quarterly that details the current failure rate and SPQL levels. The report shall include a log of all failed units, a Pareto of failure



causes and the corrective actions to be implemented to improve reliability. The report shall also track the effectiveness of corrective actions.

11.6 FMECA

A Failure Modes, Effects and Criticality Analysis (FMECA) shall be performed by the supplier on all critical functions or Paretoed components with the 20% highest probability of failure. Corrective design options or other actions to eliminate design or manufacturing risks, safety concerns and built-in test limitations shall be documented.

11.7 HALT

Highly Accelerated Life Testing (HALT) shall be performed by the supplier in accordance with approved procedures in order to strengthen the design (achieve sufficient design margin). All failures occurring during testing shall be analyzed for root cause and corrective actions taken to preclude recurrence of the failure. A detailed HALT report shall be prepared and submitted for approval.

11.8 ROOT CAUSE ANALYSIS

Any device failure during development, significant failures during the first year of production, and trends noticed in the ongoing life region, shall undergo root cause analysis and corrective action to prevent recurrence of similar failures. The root cause analysis activity shall be conducted in a timely manner as follows: Root Cause Analysis Timeline Objective:

a b c d e

a. ALU to ship failed device to supplier in 48 hours b. Supplier to confirm failure in 48 hours c. Quarantine bad product, screen in place, production workarounds within 3

days d. Root cause analysis determined in 20 days or less e. Corrective/preventative action in place in 5 days.

The root cause analysis report shall include: Serial number of the unit Production week # Date of receipt of failed unit at supplier location Failure analysis down to root cause Corrective action implemented to prevent further recurrence Date for implementation of corrective action



The supplier must perform failure analysis and root cause analysis on all failures that occur during their manufacturing test process and on failed units returned from the field. A report is to be issued to ALU Dependability detailing the failure mode, root cause and corrective action for every failure during development and for the top failures and trends during production.

11.9 STATISTICAL PROCESS MONITORING

The supplier shall implement Statistical Process Monitoring during production testing. The supplier must provide a quarterly report of Cpk values measured on the following top critical parameters of this product as agreed by ALU Networks and the supplier: Prior to implementation of Cpk, the supplier needs to ensure that all assignable causes of variation have been resolved. The use of Yield Reports, Control Charts, Run Charts, Trend analysis, Pareto, Histograms may be used to gather data to understand and eliminated these assignable causes of variation. Refer to “Manufacturing Process Control”.

11.10 DEPENDABILITY ANALYSIS REPORT

A Dependability Analysis Report should be completed prior to the first volume shipment and should include but not limited to:

Description of the module Functional block diagrams Reliability block diagrams including redundancies Quantitative reliability assessments summary (reliability predictions,

FMECA, fault coverage, etc.) The Dependability analysis shall include the critical items/components assessment and their impact on reliability. These items will include high risk new technology, short shelf life, limited operating life times, high failure rate and special handling requirements. Commitment to achieve specific Shipped Product Quality Level (SPQL) and reliability targets shall be set up with suppliers. The DDM shall be designed for optimum component thermal positioning within the operating constraints. A thermal analysis to determine junction and device temperatures shall be performed prior to the reliability analysis and prediction.



12 REGULATORY REQUIREMENTS 12.1 ELECTROMAGNETIC INTERFERENCE

� Radiated Emissions � Conducted Emissions

12.2 PRODUCT SAFETY

For North America Market, the DDM must be UL or CSA Certified and marked according to the bi-national standard UL 1950 / CSA C22.2 N° 950 (Safety of Information Technology Equipment including Electrical Business Equipment). The DDM vendor shall maintain the approvals for each evolution of the DDM.

For Europe and worldwide, the DDM must comply with IEC60950 standard. ALU must be given a Certificate of conformity to IEC60950 standard.

12.3 MATERIAL FLAMMABILITY

Flammable materials used in the DDM shall have a minimum flammability rating of V1 according to UL94 standard (Test for Flammability of Plastic Materials for Parts in Devices and Appliances).

13 QUALITY ASSURANCE AND QUALIFICATION 13.1 DELIVERABLE DOCUMENTATION

The following documents shall be delivered together with the DDM:

13.1.1 NON RECURRING DOCUMENTS

- User handbook - External interface specification - Qualification plan - Qualification test procedure - Qualification test report - Parts list (including parts supplier list) - Electrical Drawings/schematics and bloc diagram - Conformance test plan - Conformance test procedure - Reliability report

13.1.2 RECURRING DOCUMENTS

- Conformance test report: one per unit, to be kept and stored by the supplier for the life of the product plus 2 years

- Certificate of conformance: one per shipment, with the following information:



- ALU Specification Reference - Certificate number - PO number - Shipment number - ALU Product Engineering Code - Supplier Product Code - Release number - Manufacturing Date - Supplier Serial Number - ALU Serial Number

13.2 DESIGN CHANGE CONTROL

In order to maintain the qualification status of purchased products, ALU requires its suppliers to apply a design change control process. ALU must be informed of each design change and any resulting increment of revision level on delivered products. The configuration of the unit that has passed the qualification tests shall be appropriately documented in a production file. This production file shall be available for audits at the supplier factory. Any subsequent change that may affect product qualification must be submitted to ALU. Preliminary agreement must be obtained from ALU before the change can be implemented. Sufficient information shall be provided in order for a decision to be made.

13.2.1 CHANGE MANAGEMENT REQUIREMENTS

13.2.1.1 VENDOR RESPONSIBILITIES

Once the equipment has been accepted as a ALU sub-assembly, the vendor shall perform no further changes except after agreement with ALU. The vendor shall develop a “Manufacturing baseline” with ALU, which clearly defines the criteria requiring ALU Change Management approval. The vendor shall notify the designated ALU component-engineering prime for the DDM of any change to the design or manufacture of the DDM. The vendor shall require the written approval from the designated ALU component engineer for any change covered by the Manufacturing Baseline. No change shall impact any of the performance criteria defined in this document. Any documentation supporting regulatory updates and specification conformance maintenance shall be provided to ALU. The ALU EC process shall manage changes.

13.2.1.2 CHANGES TO ALU PRODUCT RELEASE NUMBER



ALU reserves the right to increment the product release number at its discretion.

13.2.2 REGULATORY&SAFETY SUBMISSION AND MAINTENANCE

The DDM vendor shall test, compile, submit and maintain the required FCC, CE, UL and EN regulatory/safety filings for the DDM. ALU can provide all system level interface information necessary for the completion and maintenance of these filings requested by the vendor.

13.2.3 PRODUCT CHANGES

Product or process changes will be partitioned into three categories: � Class I permissive changes � Class II permissive changes � All other changes

All are subject to the requirements and guidelines identified in NPS50561 General Requirements for OEM Equipment, especially the section titled "Change of Product or Process", and to the requirements in FCC and DOC regulations.

13.2.3.1 CLASS I PERMISSIVE CHANGES (ONLY APPLICABLE TO FCC)

Class I permissive changes refer to modifications which “... do not change the equipment characteristics beyond the rated limits established by the manufacturer...” [FCC Part 2 Subsections J]. The utilization of this feature of the regulatory process expedites type acceptance of the DDM by using prototype hardware and hence allows for the concurrent activities of regulatory approval and completion of the design cycle. Subsequent vendor cost reductions, yield improvements, etc. also benefit. Class I permissive changes by the vendor must include the following: Provision of a record of the change which must be kept on file by the vendor. It is the vendor’s responsibility to ensure that all requirements for FCC permissive changes are met.

13.2.3.2 CLASS II PERMISSIVE CHANGES

Class II permissive changes refer to modifications which bring the performance of the equipment outside the manufacturer’s rated limits as originally filed but not below the minimum requirements of the applicable rules...” [FCC Part 2 Subsection J]. Since a Class II permissive change would require alteration of this document, the changes would need to be discussed at length with ALU.

13.2.3.3 OTHER CHANGES

All other changes require a new regulatory filing.



13.3 INTERCHANGEABILITY

DDM shall be mechanically and electrically interchangeable without adjustment.

14 MANUFACTURING REQUIREMENTS 14.1 MEASUREMENT UNCERTAINTY

Production test limits shall be imbedded with margin to account for measurement uncertainty. The ISO Guide for the Expression of Uncertainty in Measurement shall be used to assess the measurement uncertainty of production test equipment. Measurement uncertainty shall have a confidence level of 95% or greater.

14.2 PRODUCTION TEST SUBSET

To increase manufacturing throughput, production tests may be performed at a subset of the specified operating range provided that adequate margin has been imbedded in the test limits to account for performance variations over the untested operating conditions. The vendor shall use statistical analysis to (1) characterize product performance variations over all operating conditions, and (2) determine adequate production test margins to guarantee compliance over all operating conditions. ALU must approve the statistical analysis and production test limits before the production test subset can be implemented.

14.3 PRODUCTION TEST PLAN

The DDM supplier testing shall be performed in accordance with the requirements specified within this document. To reach this objective, MCPA testing shall be performed in accordance with a test plan and procedures developed by the supplier and approved by ALU. The test plan and procedures shall include specific pass/fail criteria and shall thoroughly demonstrate complete compliance of the equipment with all applicable performance specifications.

14.4 PRODUCT QUALIFICATION TESTS

Qualification testing shall consist of detailed measurements and environmental exposure to determine that the major components/subsystems performance characteristics have been achieved prior to conducting acceptance tests. ALU reserves the right to witness and monitor the qualification tests to be conducted at the supplier’s facility or other ALU approved locations. The DDM unit covered by this technical specification shall be submitted to a full qualification program intended to demonstrate the full compliance of the prototype to the requirements.



This qualification program, to be carried out over the operational environmental temperature range and over the power supply voltage range, shall cover RF requirements and alarm circuit requirements. Conformance to the extreme environmental conditions shall be demonstrated on a reduced set of RF key parameters. Conformance to EMC and mechanical requirements shall be demonstrated separately, under ambient conditions only. Conformance to reliability requirements may be demonstrated by an analysis, based on a reliability standard approved by ALU. The DDM supplier shall elaborate a qualification plan and a qualification procedure, and submit it to ALU approval at least 1 month prior to qualification testing. ALU may witness the qualification tests, and will inform the supplier accordingly.

14.5 ACCEPTANCE TESTING

Each deliverable DDM, when fabricated, shall undergo acceptance testing to verify proper workmanship, identify manufacturing defects and determine that all components of the DDM function properly before delivery.

14.6 DESIGN INSPECTION

The DDM supplier shall provide detailed design schematics of all interface circuitry to ALU for purposes of design inspection.

14.7 WORKMANSHIP EVALUATION

The DDM shall be dismantled, where necessary, to allow inspection. The DDM shall conform to NPS50561 and ALU Corporate Standard 150.00.



15 APPENDIX 1 : IMD LEVEL CALCULATION

The 3GPP 25.104 specifies a sensitivity at :

121 dBm/12.2 kHz (one DCH at 12.2kb/s).

When an interfering signal is present at the BS antenna input, the sensitivity of the BTS must not be degraded more than 6dB. This leads to a max Interfering RF level of : -100dBm/3.84MHz at the LNA input (-77dBm at the LNA output, worst case). Recall : Sensitivity = -174 +10log(12.2Khz) +NF + Eb/N1 + Margin = -121 dBm/12.2KHz (N1 = noise level at the input of the RX chain with Eb/N1 = 5dB NF = 5dB Margin = 2dB)



16 APPENDIX 2 : IMD PRODUCTION TESTS

We ask to our suppliers to apply the following formula and to be compliant with the following table : IMD in = 2 * A + B –2*IP3 in or IMDout = 2*A + B - 2 * IP3in + Gmin with A and B , 2 interferers at input to LNA and : - Gmin = the gain min measured - IIP3in = the IP3in measured - Duplexer + Interstage Rejections measured.



Frequency Band (MHz)

Frequency Carrier (MHz)

Input level (dBm)

IMD Input CALCULATION : Minimum Requirement

CASE 1

A=(2000-2010)MHz B=(2010-2025)MHz

A = 2000MHz B = 2020MHz

A = -15dBm

B = +16dBm

-100dBm at 1980MHz

CASE 2

A=(2010-2025)MHz B=(2040-2110)MHz

A = 2020MHz B = 2060MHz

A = +16dBm

B = -15dBm

-100dBm at 1980MHz

CASE 3

A=(2015-2025)MHz B=(2110-2130)MHz

A = 2015MHz B = 2110MHz

A = +16dBm

B = +45dBm

-100dBm at 1920MHz

CASE 4

A=(2025-2075)MHz B=(2130-2170)MHz

A = 2025MHz B = 2130MHz

A = -15dBm

B = +45dBm

-100dBm at 1920MHz

CASE 5

A=(2110-2170)MHz B=(2240-2420)MHz

A = 2110MHz B = 2300MHz

A = +45dBm

B = -15dBm

-100dBm at 1920MHz

CASE 6

A=(1422-1470)MHz B=(925-960)MHz

A = 1440MHz B = 930MHz

A = -15dBm

B = +16dBm

-100dBm at 1950MHz

CASE 7

A=(1805-1880)MHz B=(1805-1880)MHz

A = 1880MHz B = 1840MHz

A = +16dBm

B = +16dBm

-100dBm at 1920MHz

CASE 8

A=(1900-1920)MHz B=(1805-1880)MHz

A = 1900MHz B = 1880MHz

A = -40dBm

B = +16dBm

-100dBm at 1920MHz

CASE 9

A=(1880-1900)MHz B=(1805-1880)MHz

A = 1900MHz B = 1880MHz

A = -15dBm

B = +16dBm

-100dBm at 1920MHz

CASE 10

A=(1805-1880)MHz B=(1630-1805)MHz

A = 1805MHz B = 1690MHz

A = +16dBm

B = -15dBm

-100dBm at 1920MHz

17 APPENDIX 3 : CRC CALCULATION CODE

17.1 METHOD 1 : WITHOUT CRC TABLE

DESCRIPTION :



Calculates a 16-bit CRC over a specified number of data bits. It can be used to produce a CRC and to check a CRC. The calculated CRC is MSB first. The generated polynomial used is 0x1021 (g(x) = x^^16+x^^12+x^^5+1).The following algorithm is the forward CCITT one.

----------------------------------------------------------------------------- /* calculate and return ccitt16 crc MSB first X^15+X^12+X^5+1 */ unsigned short int crc(unsigned char *buf,int length) { #define FEEDBACK 0x1021 /* crc-ccitt mask */ unsigned short int crc; int i;

unsigned short int data; crc=0; for (;length >0;length--,buf++) { data =*buf; data<<=8; for(i=0;i<8;i++) { if((crc ^ data) & 0x8000) crc=(crc<<1)^FEEDBACK; else crc<<=1; data<<=1; } } return crc;

17.2 METHOD 2 : WITH CRC TABLE

DESCRIPTION :

The CRC table size is based on how many bits at a time we are going to process through the table. Given that we are processing the data 8 bits at a time, this gives us 2^8 (256) entries.

-----------------------------------------------------------------------------

unsigned short int updcrc(unsigned short int,int); /* Initialize lookup table */ /* CRC table for 16 bit CRC, with generator polynomial 0x1021, calculated 8 bits at a time, MSB first. */

unsigned short int crctttab[256] =



{ 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7, 0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF, 0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6, 0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE, 0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485, 0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D, 0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4, 0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC, 0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823, 0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B, 0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12, 0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A, 0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41, 0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49, 0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70, 0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78, 0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F, 0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067, 0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E, 0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256, 0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D, 0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405, 0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C, 0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634, 0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB, 0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3, 0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A, 0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92, 0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9, 0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1, 0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8, 0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0 };

unsigned short int updcrc(crc,c) unsigned short int crc; int c; /* Generate a CRC-16 by looking up the transformation in a table and XOR-ing it into the CRC, one byte at a time. */ { int tmp; tmp=(crc>>8)^c; crc=(crc<<8)^crctttab[tmp]; return crc; }



unsigned short int crcfast(unsigned char *buf,int length) { unsigned short int crcfast,datafast; datafast=0; crcfast=0; for (;length >0;length--,buf++) { datafast=*buf; crcfast= updcrc(crcfast,datafast); }

return crcfast; }



18 APPENDIX 4 : UMTS SIGNAL DESCRIPTION

18.1 OVERVIEW

The UMTS signal is the sum of several distinct QPSK signals. The following table is for information only.

Signal type Meaning Quantity Power

PSCH Primary Synchronization Channel 1 fixed

SSCH Secondary Synchronization Channel 1 fixed

PCPICH Primary Common Pilot Channel 1 fixed

PCCPCH Primary Common Control Physical Channel 1 fixed

SCCPCH Secondary Common Control Physical Channel 1 up to 128 controlled

AICH Acquisition Indicator Channel 1 up to 128 controlled

PICH Paging Indicator Channel 1 up to 128 controlled

DPDCH Dedicated Physical Data Control Channel 1 up to 128 controlled

DPCCH Dedicated Physical Common Control Channel 1 up to 128 controlled

All these signals are synchronous. The Clock frequency is 3.84 MHz. The maximum number of simultaneous signals is approximately 110. So the composite signal is amplitude and phase modulated.

18.2 UMTS SIGNAL FOR DDM TEST

The UMTS signal is amplitude modulated and phase modulated at a chip rate of 3.84MHz for one UMTS transmitted carrier. The envelop magnitude of the signal can change with the chip rate (TM1 one carrier) and can also changed accordingly with the slot rate (DTX) or the frame rate (COMPRESS or TM1+IDLE MODE). The rms power variation for DTX and COMPRESS are due to the management of the data control channel during the slot time or frame time part. To perform a MCPA qualification (compliance with all the specification), different test files have been built. These test files have been built to focus on two objectives:

• First: in order to check the MCPA electric characteristics on basic 3GPP test files (see tests model 1 to 5). They include 3GPP standard plus a ALU algorithm, which allows decreasing the Peak to Average Ratio (PAR). These files are built to be compliant with the 3GPP requirements (see reference documentation). They are used as reference to compare results between Supplier and ALU.



• Second: in order to check the MCPA dynamic behavior (averaging power change versus the time), other files were built to fit steady averaging power variations (DTX, Compress). In order to fit different averaging power variations, with different recursive times, a new test (see chapter Amplitude limited RF power burst) was added using a pulse generator to remote an input attenuator at the MCPA input. All these tests are performed to check the MCPA robustness against the averaging power variations. These tests can not represent all the cases which occur in the field but according to the ALU experience they give a sufficient level of confidence to ensure that the MCPA is robust enough to operate with the “real word” UMTS signal.

Note: The Supplier is responsible of its design and ALU assumes that the Supplier knows perfectly the strength and the weakness of it. It means that it is the responsibility of the Supplier to build other tests to check its design and to ensure that no issue will occur in the field in the” real word” representative of 3GPP (see reference documentation) assuming the peak power ratio is within the range defined by the ALU specific tests files. If some issues occur in the field, during the product life, due to particular signal (assuming it reflects the real word representative of the 3GPP specification see reference documentation), ALU will have the right to build a new file to fit the field failure condition. This new file could be used to check the correction after having found an agreement with the Supplier to validate the harmony with the 3GPP specification. The different test files are given hereafter in the following paragraph and are related to specific measurements:

18.2.1.1 TM1: INTENSE TRAFFIC WITH DIFFERENT SPREADING FACTOR.

This file is dedicated to test the following parameters: • Spectrum Mask (test performed with the files given in the table

“TM1 ccdf mode”).

• ACLR (test performed with the files given in the table “TM1 ccdf mode”)

• Spurious emissions (test performed with the files given in the table “TM1 ccdf mode”)

• Transmit inter-modulation (test performed with the files given in the table “TM1 ccdf mode”)

• Base station maximum power (test performed with the files given in the table “TM1 ccdf mode”)

• Total power dynamic range (test performed with the files given in the table “TM1 ccdf mode”)

• Error vector Magnitude at Pmax. (test performed with the files given in the table “TM1-8-feb-2005: 8.83% given by matlab computation”)

Table: TM1 ccdf given with Matlab computations:



CCDF Test model 1

PAR 0,10% 0,01%TM1-1C-V01-01 5,8 6,1TM1-2C-V01-01 6,1 6,3TM1-2C_5M-V01-01 6,66 7,32TM1-3C-V01-01 7 7,6

COMPRESS:

This file is dedicated to test the following parameters: • ACLR (test performed with the files given in the table “Compress

mode”)

• SEM (test performed with the files given in the table “Compress mode”)

• Spurious emissions (test performed with the files given in the table “Compress mode”)

Table: COMPRESS MODE ccdf given with Matlab comput ations: : PAR 0,10% 0,01%COMPRESS-V01-01 7,28 7,59COMPRESS-2C-V01-01 7,59 8,03

In compress mode, the maximum RMS output power allowed for the MCPA is 44.36 dBm in mode 1 whatever the number of carriers used and 42.59dBm for mode 2.

DTX:

This file is dedicated to test the following parameters: • ACLR (test performed with the files given in the table “DTX mode”)

• SEM (test performed with the files given in the table “DTX mode”)

• Spurious emissions (test performed with the files given in the table “DTX mode”)

Table: DTX MODE given with Matlab computations: : PAR 0,10% 0,01%DTX-V01-01 11,06DTX-2C-V01-01 * * For information: the CCDF is 11.22dB @0.09% In DTX mode, the maximum RMS output power allowed for the MCPA is 39 dBm for mode 1 whatever the number of carriers used and 37.23 dBm for mode 2.

TM3:

This test model is dedicated to test the following parameter: • PCDE test at Pmax (test performed with the file “TM3-V01-01”).



TM4:

This test model is dedicated to test the following parameter: • EVM test at Pmax-18dB (test performed with the file “TM4-18dB-

V01-01: 0.06% given by Matlab computation”).

TM5:

This test model is dedicated to test the following parameters: • EVM for 16QAM at Pmax (test performed with the file “TM5-02-Feb-

2005: 8.04% given by Matlab computation”).

• ACLR (test performed with the file “TM5-light-01-01-2005”).

• SEM (test performed with the file “TM5-light-01-01-2005”).

• Spurious emissions (test performed with the file “TM5-light-01-01-2005”).

Note: the maximum power at the MCPA output is 44.7dBm with the file “TM5-light-01-01-2005”.

18.2.2 OTHER DYNAMIC TESTS:

These tests are dedicated to check the MCPA behavior on RF UMTS signal which have their envelope modulated by a rectangular AM waveform. The UMTS signal can have its averaging power level depending of the time slot (or multiple time slots) and the whole combinations cannot be covered by only few defined test files as “Compress” or “TM5-light-01-01-2005”. The following requirements allow testing the MCPA robustness for different AM rectangular waveforms. The tables below give an overview of the different combinations: Table1: Pseudo compress mode cases

Deep attenuation 0dB / 3.5dB / 7dB

Attenuation duration 3 / 7 / 14 slots

Time recurrence 40ms to 200ms

Note: Slot=666µs Table2: Pseudo HSDPA mode cases

Deep attenuation 0dB / 3.5dB / 7dB

Attenuation duration 2ms to 40ms

Time recurrence 2ms to 40ms

These tests are dedicated to control the following parameters:

• ACLR



• SEM

• Spurious emissions

Notes: The SEM and ACP values must be compliant with the ALU requirement for the entire output power range. The minimum and the maximum RF output averaging power (long time integration) will have to be chosen to satisfy the two rules:

• The RF output power during the low power period must be at minimum 25dBm.

• The RF output power during the high power period must be at maximum 46,5dBm.

18.2.2.1 IDLE RF BTS MODE

To give to the handy UMTS phone the possibility to receive others BTS in its area, the 3GPP requires having an idle mode (RF mute) which is defined as following: -RF attenuation 35 dB minimum on the antenna. -Length of the idle mode between either 0.5 slot or 1 slot (1 slot = 666µs). -Repetition of the idle mode can be 5,7,10,15,20,30,40,50 frames of 10 ms. In these conditions, no alarm must be reported. Note: The BTS is in idle mode when no RF is present on its antenna. To do that, the baseband signal is decreased by 30dB in order to have the same 30dB of attenuation at the antenna. So, in idle mode, the MCPA must be able to keep its set points of its different loops to ensure to have always a good RF spectrum when the RF comes back. The RS485 link cannot be use to warn MCPA when the RF idle mode is activated because the rate of this link is too slow. Conditions of test: The MCPA must be tested with the signal file “Test model 1” with 1 carrier. The generator (E4433B) must be able to pulse the RF signal with the following setting which are considered as the worst case for the MCPA: Width pulse: 49.4ms Period pulse: 50ms The MCPA will be supposed to have the same behavior with the other idle mode repetition

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DDM-3 Specifications V01.05

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