Dc circuits

UNIT 2 D,C, CIRCUITS

Structure 2.1 Introduction

0 hjectives

2.2 Series-Parallel Reduction 2.2.1 Concept of Equivalent Circuits

2.2.2 Resistors in Series 2.2.3 Resistors in Parallel 2.2.4 Applications 2.2.5 Inductors and Capacitors i n Series and Parallel

2.3 Node Voltage Method 2.3.1 Independent Voltage Variables 2.3.2 Formulation and Solution of Node Equations

2.4 'Loop Current Method 2.4.1 Independent Current Variables 2.4.2 Formulation and Solution of 1,oop Fquations

2.5 Star-Delta Conversio~i 2.5.1 Delta to Star C'onversion 7.5.2 Star to Delta C'conversion

2.6 Network Theorems 2.6.1 Superposition Theore111

2.6.2 Thevenin Equivalent

2.6.3 Norton Equivalent 2.6.4 Maximum Power Transfer Theorem

2.7 Summary

2.8 Answers to SAQs

2.1 INTRODUCTION

You lnay recall that a d.c. source is one whose source function is a constant, independent of time. For example, a d.c. voltage source has for its terminal voltage vs(t) = E, where E is a

constant. A ~ietwork in which il l independent sources are d.c. sources may be termed a d.c. network. The analysis of such a hetwork constitutes the focus of this unit.

A characteristic of practically ilnportaiit d.c. networks is that disturbances if any, in the network following for example the operatioli of switches, decay with time and that under steady state, the voltage and current associated with each elelnent of the network are constant, indepeiideiit of time. Our treatment would be limited to the study of such networks under steady state conditions. We then have a situation where all capacitor voltages are constants arid so are all inductor currents. As a consequence, the capacitor currents and inductor voltages are zero. Thus capacitors are equivalent to open circuits (equivalent to their being discolinected fro111 the circuit) and all inductors are equivalent to short-circuits (equivalent to their being replaced by conducting links of zero resistance). With this replacement, the lletwork to be analyzed reduces to a purely resistive network activated by sources. Once the solution of this replacenlent network is obtained, the inductors and capacitors can be reintroduced into the network without affecting any voltage or current level. Thus no generality is lost if we narrow down our consideration in this Unit to networks colnposed of resistors and sources only.

The foregoing considerations are illustrated in Figure 2.1 where the circuit of Figure 2.l(b) is a replace~nent of the circuit of Figure 2.1(a). The values of 1 and Vfound from the solutioil of the simpler circuit equal I, and Vc in the original circuit.

Methods of solution of d.c. networks are iinportailt in their own right as Inally practically important networks have this fonn. The study of these nlethods is additionally useful as a prelude to the study of other classes of networks, particularly those iiivolviiig sinusoidal voltages and currents which we shall consider in Unit 3.

Fig. 2.1 (a) RLC network excited by a d.c. source (b) Equivalent network for assessing steady state behaviour of (a)

Objectives After a study of this unit you should

know the meaning of equivalent circuits and be in a position to appreciate their role in network simplification,

be able to distinguish between series and parallel coru~ectioils of circuit ele~nents,

have a command over techniques of combi~ing resistors in series or in parallel and use then1 for effective network analysis,

be able to identify star and delta colinectiolls of three circuit elements and to convert a star-connected set of resistors to an equivalent delta-connected set and vice versa,

have developed the facility to use techniques of star-delta conversion of resistors for effective network analysis,

have an u~~derstanding of the tenns, reference node and node voltage,

be in a position to set up Kirchhoff's current law equations in terms of the chosen set of node voltages, solve for the node voltages and deduce all ele~nent voltages,

have an understallding of the concept of loop curretzt and be in a position to identify a proper set of loop currellts needed for network analysis,

be in a position to fomiulate a proper set of Kirchhoff's voltage law equations in terms of the chose11 loop currents, solve for the loop currents arid deduce all elenlent currents,

be able to set up Thevenin and Norton equivalent networks and use them for effective network analysis,

be able to identify for a given network the method or methods, which are most conveliielit for its analysis, arid

be able to identify the conditions under which a given 2-tenninal i~etwork of resistors and sources can deliver the maximum power to an external load.

2.2 SERIES-PARALLEL REDUCTION

Two or more circuit ele~l~erits are said to be series-connectedwhen KCL requires that the same current flows through all of them. This situation arises when the elements fonn a chain-like structure with a colnlnon tenninal being shared by only two adjacent elements. In the circuit of Figure 2.2, elemenlsA, B and C are in series. So are elements D and E. But elements C and D are not in series.

SAQ 1 Why are C and D not considered to be in series?

In a dual manner, two or more circuit elements are said to be inpnrallel, when KVL requires that the same voltage appears across each one of them. This situation arises when all the eleinents under consideration are connected to the sanle pair of nodes. In the circuit of Figure 2.2, elements G and Hare in parallel.

Fig. 2.2 : Figure illustrating series and parallel connections

SAQ 2 How many other sets of parallel-connected ele~nents can you identify in the circuit of Figure 2.2, apart from the set G and H?

2.2.1 Concept of Equivalent Circuits Coilsider the 2-tenninal network show11 in Figure 2.3(a). Using Kirchhoff's voltage law, we have Vba + Vac + Vch = 0 or Vab = Vac + Vch = El + E2*. If E l + E2 = E, Vd = E for all values of current i. But this is precisely the terlninal relation for the sin~pler 2-terminal network of Figure 2.3(b) contaiiliilg just one voltage source. Thus one is led to the conclusion that the two 2-tenninal networks have identical terminal v-i relations.

If the physical elements of the two networks are enclosed in two black** boxes B1 and BZ with just the tenninals coming out, there is no way by which we can experimentally determine which box contains the single source and which one contains the combination. This is the essence of the concept of equivalence between two Zterminal networks.

(a) (b)

Fig 2.3: Two equivalent 2-terminal networks

On the basis of the above example and theerelated discussion, we may now formally state that two 2-tenninal networks are equivalent if their terminal v - i relations are identical.

* The conilection of.El and E, in r'igure 2.3(a) is said to be of the series-aiding type since the two voltage sources have an additive effect. If the positive and negative tenninals of one of the sources is reversed, the connection is said to be of the series-opposing type and lVab I = I El- E, I.

* * This is an appropriate colour as black is usually associated with the uilknown. In the literature, the black box problem signifies one in which we are asked to identify the unknown internal network from external measurements made on the accessible terminals of the network outside the box.

D.C. Circuits

Introduction to Circuits Such networks react with any extenial network identically. If one fonns part of a large overall network, it can be substituted by the other, without the rest of the network finding any difference.

The last statelllent makes it clear, why the concept of equivalent ~~etworks proves so useful in network analysis. If it is k~iown that a portion of a network can be replaced by an equivalent si~npler configuration without disturbing the conditioils external to it, the11 the complexity of the work on hand can be reduced by effecting such a replacement at the very start of the analysis problenl. We shall get to know later in this Unit, the actual steps involved in the use of this principle. For the present, let us look at some more examples of equivalent circuits.

SAQ 3 The single voltage-source equivalent to several voltage sources in series-aiding c6nnection has a value equal to . (complete the statement)

Example 2.1

(a) Just like a series connected set of voltage sources being equivalent to a single source, it is easy to see that a parallel connected set of current sources is equivalent to a single source as shown in Figure 2.4(a), the current through the teriniiials m and b being the same in both cases.

(b) An ideal voltage source in parallel with a resistance is equivalent to only a voltage source of the same strength as shown in Figure 2.4(b) since Vab = V, for all values of i in both cases. Note that the above equivalence implies only the equality of exten~al conditions. Conditions illside the network lnay be different. For instance, the currents in the sources would be i + Vs l R and i in the two equivalent networks of Figure 2.4(b).

... R ( b)

Fig. 2.4 for Example 2.1

SAQ 4 As a dual of the equivalence in Figure 2.4(b), can you say that an ideal current source in series with a resistance is equivalent to only a current source of the same strength?

SAQ 5 Find simple equivalents for the Ztknninal networks shown in Figure 2.5.

(a) Fig. 2.5 for SAO 5

(b)

2.2.2 Resistors in Series Consider a set of three resistors R1, R2 and Rg co~lnected in series as shown in Figure 2.6(a).

If the tenninal current is I, the same current is carried by each resistor. We have

Fig 2.6: Equivalent Resistance of series-c~nnected resistors

But the same terminal v-i relationship is obtained for the sin$le-resistor network of Figure 2.6(b), if

i. R s = R 1 + R 2 + R , . (2.1)

Thus Rs is the equivaleatresistnrzce of three resistors R1, R2 and Rj in series. Extending this, we may coliclude that if a resistors RIP, . . .Rn are in series then the cornbination is

equivalent to a single resistor of value

I , R,=R, + R , + R 3 + . . . R n . (2.2)

I If one were to express the equivalent in tenlls of co~~ductances,

1/G, = [l/Gl + 1/G2 + ... l/G,,],

where G, is the equivalent conductance of a combination of n conductances GI. G2'.. . G, connected in series. Eq. (2.2) and (2.3) are alten~ative ways of working out the equivalent. Clearly the fonner w e is simpler to use. When resistors are connected in series, it is preferable therefore to find the equivalent in tenns of resistances rather than co~iductances.

It is useful to realize that R, is larger than the largest of {R1, .. . R,) and that Gs is smaller than the smallest of {GI, ... G,).

In network analysis we are often required to determine the voltage drop in a particular resistor forming part of a series-conliected chai~l of resistors across which a know11 voltage is applied. Referring to Figure 2.7, let it be required to find V2, given the values of R,, R, and Vo. We note that the source sees an equivalent resistance of Rs = RI + K2 and hence the current I in the source is VdR,.

D.C. Circuits

Fig. 2.7 : Illustrating voltage division

The same current passes through RI and R2 as well, as all three elements are connected in

series. Then by Ohm's law, we have

Introduction to Circuits If instead of two resistors, we had n resistors, R1, R,.. .R, connected in series across a supply

voltage of V, volts, then the voltage Vk across Rk can be shown in a similar fashion to be

I11 other words, the rule is that the voltage across any particular resistor iu a series co~lilected set bears the same ratio to the voltage applied across the co~nbination as the resistance of the concenled resistor to the equivalent resistauce of the series combination. The principle u~~derlyi~lg Eq. (2.4) and (2.5) is called yote~ztial divider action. The usefulness of the equatio~ls is that we need not conlpute the current in the series circuit as an inter~nediate step to find the required voltages.

SAQ 6 Which electrical quaiitity is conllnon to a nu~r~ber of resistors in series?

SAQ 7 The values of power dissipated in Rl, R, and R3 in Figure 2.6(a) are in the ratio -

Example 2.2

Two resistors R1 and R2 when separately co~inected across a 200 V d.c. source consume powers of 400 W and 1600 W respectively. If they are connected in series across the same source, what would be

(a) the power supplied by the source,

(b) the power co~lsu~ned by e,ach resistor, and

(c) the voltage across each resistor?

Solution

When con~ltcted separately across 200 V source, PI = 2 0 0 ~ 1 ~ ~ = 400 W and

~ ~ - 2 0 0 ~ 1 ~ ~ = 1601) W, yieldingR1 = 100 52, R2 = 25 52.

The series connected circuit would be as in Figure 2.7, with Vo = 200 V, R, = 100 52 and R2 = 25 Q . We have

(a) Power drawn from the source Vd r 320 W

V2 = [Rd(Rl + R2)]Vo = (251125) x 200 = 40 V

SAQ 8 Derive Eq. (2.5).

SAQ 9 An electric lamp, which may be considered a pure resistor, is designed to operate at a rated voltage of 110 V takir~g an input rated power of 100 W*. The avai!ahle power supply however being a 230 V d.c. source it is proposed to connect the larnp in series with an additional resistor across the 230 Vd.c. source. What resistance should this resistor have for proper operation of the lamp?

2.2.3 Resistors in Parallel We shall now consider the dual situation of resistors in parallel. To this end, let us take the case of n resistors R,, R, . . . R,, conrlected in parallel across a source of Vo volts as shown in Figure 2.8(a).

(a) (b)

Fig. 2.8: Equivalent of 1r resistors i n parallel

By virtue of KVL, the voltage across every resistor in the pamllel-connected set is Vo.

Thus i~idividual branch currents are

Il = Vo I Rl; 1 2 = Vo / R2, .:., I,, = V, I Rtz

Applying KCL at the upper node,

<' 4 = C I ~ = v,

k'l

The sallle value of current will be.supplied by the source V, to the single resistor Rp in Figure 2.X(b) if

The above for~iiula for the equivalent resistance of a parallel co~tlbination can be recast into a si~llpler for111 in t en t s of conductances :

G p = G 1 + G 2 + " ' G n , (2.7)

Thus, there is an advantage in using conducta~ice values while dealing with parallel-cotuiected resistors. The particular case of two resistors in parallel (see Figurc 2.9) merits special attellti011 as we come across this situation quite often.

Using Eq.(2.6), we have IIR, = IIR, + 11R2 or

RIRZ Product of R, and R, R = ------- = -

P R1 + R2 S u ~ n of R, and R2

* Rated values specify the stand;~rd conditions of voltage, current, power etc at which ally electrical devicelmachine is designed to operate. These afe the values which are ~iiarked by the lna~lufacturer on the dcvicelliiachine itself, or on a uamc-plate fixed on the latter.

D.C. Circuits

lntmdudioo to Circuits

(a) (b)

Fig. 2.9: Equivzlent of 2 resistors in parallel

An issue of related interest is the evaluation of II and I,, given I,,, the total current into the parallel comnbi~iation. Solving the two equations

1 I + I (KCL)

and Il R1 = 1 9 2 (KVL),

we deduce = [R2 l ( 4 + R,)] 10

a lid 12 = [RI ! (Rl+ RJIIo.

The above are called current division formulrrs. The current in a particular branch arid the total current are in the same proportion as the resistance of the other hranch and the sum of the resistances.

I11 tenils of conductances, the current division fonnulas assume a direct form and are given by :

SAQ 10 Fill up the blanks:

The equivalent resistance of two resistances in parallel is equal to the of the two resistances divided by the

of the two resistances.

Example 2.3

Show that the equivalent parallel resistance of a combination can not be larger than any individual branch resistance.

Solution

From Eq.'(2.7) G, > Gk for any k, k = 1, . . . n

Thus Rp < Rk for k = 1 , . . . , ?I .

Example 2.4

P r e e resistors have resistance values in the ratio 1 : 2 : 3. If they have an equivalent resistance of 6 Q when connected in parallel, find the resistance and conductance values of the individual resistors.

~ o ~ u t i o n

Let R ,=R; R2=2R; R3=3R.

Then G1 = G; Gz = G/2; G3=G/3; where G = 1/R.

We have Gp=1 /6= G 1 + G 2 + G 3 = G [ 1 +1 /2+1 /3 ]= 11G/6

1 Therefore

1 G = GI = iTS; G, = L~ and G - - S

22 - 33

and R I = 11 G!; R2=22SL; R3=33SL.

I ! SAQ 11 i Extend tllecurre~lt division formulas of Eq. (2.10) Lo the case of n parallel co~~ t~ec t cd I collductances.

SAQ 12 A total current of 10 A is shared by two parallel resistors ofR 52 and 5 SZ resistance. If the current in the 5 S2 resistor is 10 tnA, ii~id the value of R.

2.2.4 Applications We often encounter nctworks which are entirely co~liposcd of series and parallel co~l~lected sections, each of which is either il resistor or a series-parallel connection of subsectiolls of a similar nature. The pri~~ciples of scries-parallel reductioll into silnpler equivale~lts discussed earlier provide an effective loo1 tor a~~alysitlg such nctworks. A network of this type is shown in Figurc 2.1 O(a), where Ict it be required to find the current I,, in the voltage source.

D.C. Circuits

( c ) (4

Fig. 2.10: E x a ~ ~ ~ p l e o f Series-Parallel reduction

Introduction to Circuits Noting that R, and R6 are in parallel, we can replace it by a single resistor RS6 = R5 x R6 / (Rs + R6) = 4 52. Si~nilarly R2 and R3 in parallel can be replaced by a single resistor R, = R2 x R3/(R2 + Rg) = 2 Q.

The circuit now reduces to that shown in Figure 2.1O(b), where it can be seen that RB, R4 and R56 are in series. The equivelent resistance of the series combination is RZ456 = R2. + R4 + RS6 = 8 Q. This equivalent resistance being in parallel with R1 as shown in Figure 2.10(c), the colnbi~lation can be reduced to a single resistor Reg = RI x RU456 1 (R, + R23456) = 4 S Z , The final circuit is showll in Figure 2.10(d). The source therefore sees an effective resistance of 4 Q.

You would recall the property of equivalent circuits which we ineiitioned in Section 3.2.1 viz. that replacelnellt o f a part of a network by its equivalent does not alter the conditioils in the rest of the network. If the element currents in the original network are as marked iu Figure 2.10(a), those currents which do not get altered at each stage of reduction are nlarked by the same sinlbol in the niodified networks. Observe that the identity of the current I,, iu the voltage source is preserved in the final network. Helrce this current is easily calculated from the simple circuit of Figure 2.10(d). Accordingly,

I, = EIR,, = 6014 = 15 A.

If iu addition to Io, all the other curreuts in the origilial network are required to be evaluated, we nlay start with the value of I, found in Figure 2.10(d) and retrace the steps back to Figure 2.10(a), finding the unkliowll curreIris along the way through the application of currellt division for~nulas of Eq. (2.0) a~ld (2.10).

Wehave II=IoR23456/(Rl+R3456)= 1 5 ~ 8 / 1 6 = 7 . 5 A

I11 the foregoing exaniple, we first comprzssed the original network into a compact form, analysed the resulting simple network and expanded it again to the original fonn. Even though the procedure appears involved, you can readily see that only simple calculations are i~ivolved at each step.

An alternative approach to this problem avoids the necessity of evolving networks of progressively reducing wlnplexity but makes use of the voltage-division apd current-divisiou properties of series and parallel connected sections. We illustrate the approach through an analysis of the same circuit coilsidered previously.

We choose the current I6 in the element farthest from t k source as an unknown alid work towards the source expressing all intermediate currents and voltages in terms ofZ6 and the ele~llel~t values. Finally the source voltage is expressed in t e rm of I6 and since the fonner is known, I6 can be deduced and thence the inlen~lediate currents.

Hence I6 = 2.5 A, Is = 5 A, I, = 7.5 A, I2 = 6 A,

As a variant to this approach we could have taken V6 the voltage of the last element as the unknown instead of 1,.

I The series-parallel reduction is not a general method and can not be used in all situations. It 1 is a very effective method only where the entire network is co~nposed of series and parallel

sections and is excited by o~lly one source. In this event, the entire network call be reduced to a single equivalent of the for111 in Figure 2.1O(d). In other situations, the ~ilethod call be used to reduce the co~nplexity of portions of the network, wherever possible. An exarllple of a network where the series-parallel reduction technique fails is give11 in Figure 2.1 1. To solve this network we have to use more general techniques to be discussed in subsequent sectio~ls.

D.C. Circuits

Fig. 2.11: Example o f a non-series parallel circuit

SAQ 13 Fill up the blanks :

A ' co~inection of resistors exists in a network whenever a node exists with only two resistors conuected to it.

A 2 connection of resistors exists in a network wherever a loop exists co~ltai~ii~ig only two resistors.

If a section of a network is replaced by its equivalent through series-parallel reduction, then the co~lditions external to the section are

- 3

Example 2.5

What value ofR in the circuit of Figure 2.12 would result in a voltage of 6 V across it?

6 9

h

Fig. 2.12 : Circuit of Example 2.5

Solution

Let the equivalent of the parallel co~~lb i~ la t io~l of 12 ~2 and R be R,. We require 6 V across R, in a series corlnectio~l of 6 S2 and R, across 12 V supply. Usi~ig voltage division for~nula

VGh= 12Rp / ( R , + 6 ) = 6, whichyieldsR, = 6 Q

R, = 12Rl(12 + R) = 6 yieldirlg R = 12 S2.

SAQ 14 Work out the solution for the currents in the circuit of Figure 2.10(a) through the second approach suggested, taking V6 as the u~lknown.

lntrodudiou to Circuits 2.2.5 Inductors and Capacitors in Series and Parallel We shall now extend the concept of series-parallel reductio~i of resistors to inductors and capacitorj. The steady state values of currelrts and voltages in a d.c. circuit do not depend 011

the actual values of i~~ductances and capacita~~ces contained therein. Hence the results of this Section would 11ot be of i~tt~nediate use in the co~~text of d.c. circuit analysis. However they are i~~cluded here for the sake of co~npleteness arid will be fou~id useful when dealing with a.c. circuits.

For a set of rt inductors corinected in series as shown in Figure 2.13(a),

vab = vL1 + vL2 + . . .vLn = Lldi/dt + L2dildt + ..Ll,dildt

= (L, + L, + . . .Ln) dildt

Fig. 2.13: Equivalent of inductors in series

A si~lgle inductor of L, he~trys as in Figure 2.13(b) would have the sartle teiminal v - i relation if

L , = L , + L , + ... L,, (2.1 1 )

For a set of n-inductors in parallel as show11 in Figure 2.14(a),

(a) (b) Fig. 2.14 : Equivalent of inductors in parallel

v, = Lldilldt - Lzdizldt = . . . = Lndinldt

Fro111 KCL, we have . .

i = i 1 + i 2 + ... in

Then, dildt = di'ldt + di21dt+.. .dinlat = vab[l/L1 + llLz + .. .l/Ll,]

Thus v,, = [ l /L l + lIL,+. . . lILn]- 'dildt

The equivalent si~igle ii~ductor (Figure 2.14(b)) should therefore have an inductance,

L, = (IIL, + IIL, + ... 1 1 ~ ~ ) - ' or 1/L, = IIL, + lIL, + ... l /Ln (2.12)

Co~lsidering next, 17 capacitors in series as show^^ in Figure 2.15(a), we note that the sartle current i passes through cach capacitor. We have

i = C,dv,,ldr = C2dvc2/dt = . . . C,,dv,Jdt

Also, va1, I, vCl + v,, t ... vcn 7 . '

which on differe~itiatio~~ and substitulio~~ of the above expressions yields

D.C. Circuits

Fig. 2.15 : Equivalent of capacilon: in series

dvUI , /d t=dvc , /d t+dvc2/dt+ ... d v C , , / d t = [ 1 / C l + l / C 2 + ... 1 / C , ] i

or i = [ l / C l + 1/C2+ ... l / c , ] - ' dv , , / d t

The equivalent single capacitor C, should therefbre have a value given by

1/C, = l /Cl + 1/C2 + ... l/Cn (2.13)

Finally it call be show11 lbat n capacitors C l , C2 .. . C , in parallel are equivalent to a single capacitor C p given by

C , = C I + C 2 + ... Cn (2.14)

Note in particular that the rules for the series and parallel equivalents of inductors as embodied in Eq. (2.11) and ( 2 1 2 ) are sii~lilar to those applicable to resistors vide Eq. (2.2) and (2.6). On the other hand, the rules for capacitors are siinilar to those for conductances. [Compare Eq. (2.13) and (2.14) with Eq. (2.3) and (2.71.

SAQ 15 Derive the rule for fillding the equivalent capacitance of capacitors in parallel (Eq. 2.14).

SAQ 16 Arc the followi~ig statements true or false?

(a) The equivalent inductance of several i~lductors in series is larger than the largest ijldividual inductance.

(b) The equivalelit capacitalice of several capacitors in parallel is slllaller than the sniallest individual capacitance.

SAQ 17 Fill up the blanks i11 the following statements:

E l e ~ n e l ~ t s in series have the same ' while elelnents connected in parallel have the same 2

If two 2-tenninal networks have the same v-i relations, they are said to be 3

A voltage source in parallel with a resistor produces the siilne effect on the external circuit as 4

The rule for finding the equivalent of capacitors i!l pamllel is similar to the n ~ l e for finding the equivalellt of resistors in 5

Introduction to Circuits Example 2.6

Find the energy stored in the capacitors and inductors under steady state in the circuit of Figure 2.16(a).

(a) Circuit as given (b) Simplified circuit for d.c. steady state.

Fig. 2.16 for example 2.6

Solution

Under the steady state d.c. conditions, the capacitors can be open circuited and the inductors short circuited as shown in Figure 2.16(b). This circuit has been analysed in Example 2.5, from which it can be deduced that

Thus the values of energy stored are

SAQ 18 Find the power supplied by the source in the circuit of Figure 2.17 and show that it equals the sum of powers dissipaied in all the resistors.

Rg. 2.17 : Circuit for SAQ 18

2.3 NODE VOLTAGE METHOD

As already remarked .n the foregoing section, the scope of the series-parallel reduction technique is limited. It can be used with advantage for the analysis of only a restricted class of networks. There exist on the other hand, two important getleral iiiethods of circuit analysis. One of them is the node voltage tnetfzod which forms the topic of discussioii in this section. The other iiiethod viz the loop current method will be treated in the next section.

2.3.1 Independent Voltage Variables The analysis of a network contai~iing e elements would be complete i f we have detenniiied the e voltages and e curreiits associated with the elements. Any attempt to solve for these2e quantities fro111 a set of 2e siliiullarleous equatioils set up for this purpose would be needlessly complicated. The node voltage method reduces the complexity of the problem through restrictiiig the number of simultaneous equations to be solved to (n-l), wherc n is the number of nodes in the network, (11-1) being always less than or equal to e for practically useful networks.

The (rl-1) network variables, which are solved for through these (n-1) simultaneous equations are the voltages of the various nodes with respect to oiie.&e chosen as the rrfer~.lrce or datum itode. Once these node-to-datum voltages (also called node voltages for the sake of simplicity) are found, all the eleine~it volhgcs and currents are easily deduced. This latter part does not require solutioi~ of simultaneous equations; it entails at lnost the use of one equation - either KVL or elelneiit v-i relation - for each variable to be deduced. .

Consider the 4-node network of Figure 2.18(a), where the node liu~nbers are encircled. By conventioii the reference node (datum node) is numbered '0' and is distinctively marked. The node-to-datum voltages whose solutiol~ we seek are V,, V,, and V,, Once these are known, each eletlle~it voltage is either already known or is easily deducible through the application of Kirchhoff's voltage law. Forexa~nple thc voltage across the 2/3 Q resistor is V2,. The voltage V,, across the 6 A current source is equal to (V*, - V,,), as KVL states that V21 + V10 + VO2 = 0. Note that some element voltages are also the node voltages. In this example, every ilode vo1tage.i~ also an element voltage but need not be so in a general case.

L

Fig. 2.18 (a) : Ciiven circuit

D.C. Circuits

(b) Solution Fig. 2.18 : Circuit solved by the node-voltage method

ntrodudion to Circuits The node voltages identified as above fonn a particular choice for a set of independent voltages that can exist in a 'given network. Once determined, they fix all other voltages uniquely by virtue of Kirchhoff's voltage law. Such an independent set is not unique. Firstly, the set is dependent on the choice of the datum node. Secondly, the're exist other methods of selecting independe~~t voltages which are different from the node-to-datum type. However, the number of voltages will contiuue to be (n-1) in all such sets.

SAQ 19 Express the voltages across the 0.4 52 and 1 52 resistors and across the 3 A current source in tenns of the node voltages of Figure 2.18(a).

2.3.2 Formulation and Solution of Node Equations To determine the node voltages, we form the Kirchhoff's current law equations in terms of the former. Let us use the circuit of Figure 2.19 to illustrate the procedure. KCL equations at the three uodes are

At node 1 : I,o t I,, t lsl -Is2 = 0

At node 2 : 120-I12 - Isl = 0

At node 0 : -Ilo - t Is, = 0

The sum of the three expressioils on the left hand side of the foregoi~lg equalioils is identically zero. That this is not a Illere chance event but is generally true can be readily seen from the fact that each element current leaves one node and enters another and hence its sy~nbol appears in exactly two expressions, with a positive sign at one node and a negetive sign at the other. The result therefore is that the three KCL equations are not independent; any one call be deduced from the other two. I11 gcneral, we G?II state that for a network with n nodcs, only (n-1) KCL equations are independent.

I

1 Pig. 2.19 : Circuit used to illustrate formation of node equations.

We therefore ignore the KCL equation at the reference node but consider o~ily the other two, after expressing the currents in the resistors in terms of the node voltages as follows:

110 = Vl JRb = GbVlo, 120 = V2 JRc = GcV20, 112 = V121Ra = G,(Vl0 - V20)

At node I : GbVl~ + Ga(Vlo - V20h+ - =

At node 2 : G, V20 - Go (Vlo - V20) - Is1 = 0

The above two equations can be recast in the standard fonn,

At node 1 : + Gb) Vlo - Ga V20 = IS2 - (2.15)

At node 2 : - Ga V1o + (Go + G,) V20 = IS1 (2.1%)

Eq. 2.15(a) and (b) are the node equatio~is of the network and can be used to solve for the unknown node-to-datutn voltages Vlo and V20 since the element coiiducta~lces arid current source strengths form the data of a give11 network.

8

The (12-1) node equations can, in fact, be directly formulated without going through the intermediate steps, which have been given in the foregoing example only to provide the theoretical explanation. The node equation at node j has the form

where Gjj.(self node coilductance of node j ) = sum of conductances of all resistance ele~nents connected to node j

Gji (mutual conductance of nodes j and i), i z j

= (-1) x sum of conductances of all resistance elements connected to nodes j and i

Ij = (sun1 of source currents directed towards nodel] -(sum of source currents directed away fro111 node j )

The left hand side of Eq. (2.16) represents the sum of currents leaving node j through resistive elements connected to it while the right hand side represents the net current entering the node through the sources. Before you proceed, you are urged to verify that the two equations at Eq. (2.15) correspond to the general rules given above.

Let us now directly formulate the node equations for the circuit of Figure 2:18(a). We have

At node 1 : (111 + 110.5) V,, - (110.5) V2, - (0) V,, = 6 - 3

At node 2: - (110.5) V,, t [1/0.5 t 110.4 t 3/21 V2, - (110.4) V3, = - 6

At node 3: - (0) V,, - (1 10.4) V2, t (1 I2 + 1 10.4) V3, = 3

After simplification, the three equations can be put in the form,

3v,, - 2v2, = 3

-2 V,, + 6V2, - 2.5V3, = -6

-2.5v2, + 3 v,, = 3

The three equations can be solved either by detenninailts or by successive elimination. Using the latter approach, we have Vlo = 1 + 213 Vz0 and V30 = 1 + 516 V2, from the first and last equations. On substitution of the above in the middle equation, we have

-2 - 413 V2, + 6 V2, - 512 - 2511 2 V2, = -6, yielding V2, = -18131 V

V ~ o = 1 - 2 / 3 ~ 1 8 / 3 1 = 1 9 / 3 1 V , V30=16/31V

We are now in a position to determine voltages across all node pairs.

V12 = Vlo - VzO = 37131 V , V-32 = VjO - VzO = 34/31 V, VIS = Vlo - Vj0 = 3/31 V

The currents in resistors are then determined using Ohm's law. The final solution for all voltages and currents is as marked in Figure 2.18(b).

The method of formulation of node equations discussed so far assumes that the network comprises only resistive eletnents and current sources. In fact the node equation approach is eminently suitable orily for such networks. If the network contains voltage sources, the current through a given voltage source can not be directly expressed in terms of node voltages, conductances of elements and know~l current source strengths. However, the node voltage tnethod can be readily extended to the special situation where all voltage sources present are connected to a c61nmon node, as the following example would show.

Example 2.7

Using the node voltage method analyse the circuit of Figure 2.20, where conductance values of all resistance elemelits are given. Find the currents I, and Ib supplied by the

i two voltage sources.

i Solution

I Choose the common node of the two voltage sources as the reference node and number the other nodes as shown. The voltage sources fix two node to datum voltages as:

V,,= 6 V , V,= 2 V

Since these two are known, we need to determine o111y the other two node voltages at 2 and 3. For this purpose we form the node equatio~~s at nodes 2 and 3 (Remember that we do not write node equation at either node 1 or node 4)

D.C. Circuits

lntrodudioa to Circuits

la Fig. 2.20 : Circuit for Example 2.7

At node 2 : - (4)V,, + (4 + 2 + 1) V2, - (l)V3, = 2

or 7 v20-v30= 2 + 4 VIo= 26

At node 3 : -(1)VZo+ (2 + 2 1) V3,-(2) Va=-2

or -v,,+ 5 v,,= 2v4,-2= 2

Solving the above two equations, we have VZ0 = 66/17 V, V30 = 20117 V

I, = current in 4 S conductance between nodes 1 and 2

= 4 V12 = 4(VIo - V2,) = 4(6 - 6611 7) = 14411 7 A

I, = 2 V4, = 2(V4, - V3,) := 2(2 - 2011 7) = 2811 7 A

SAQ 20 (a) Why is a node equation not formed at the reference node in the node volta:ge

method?

(b) If an n-node network contains N , voltage sources all connected to a common node, besides current sources and resistors, how nlally unknown node-to-datum voltages have to be solved for through simultaneous equations?

SAQ 21 Find all the currents in the d.c. network shown in Figure 2.21.

Fig. 2.21 : Circuit for SAQ 21

SAQ 22 Find the voltage across resistor R in the circuit of Figure 2.22 through node equation approach.

Fig. 2.22 : Ciiuit for SAQ 22

2.4 LOOP-CURRENT METHOD

! This is the counterpart of the node-voltage inethod discussed in the last section, where a ; subset of the voltages in the network was solved for as a first step towards the complete

solution. In the loop cumlit method, we first solve for a subset of the cumnts from an appropriate number of simultaneous equations and then use this information to deduce the other network variables in simple steps.

2.4.1 Independent Current Variables There exist a total of e different currents in an e-element network.~However all these e currents can not have independent values as Kirchhoff's current law forces certain relationships between them. You would recall from the discussion of Section 2.3.2 that the number of independelit KCL relatio~lships in an n-node network is rt-I. Thus there can not be more than e - (rt-1) = e - n+ 1 independent current variables in an e-element n-node network. It can further be shown that this is precisely the number of indepeildent currents. We [low seek ways of identifying an indepe~lde~lt set of currents.

Consider as an example the circuit of Figure 2.23.

- Y

Fig. 2.23 : Circuit used for discussion in 2.4.1

Let us designate the currents in the 12 V battery and the 452 resistor as x and y respectively. To indicate the current in the IS2 resistor between nodes 1 and 2 we need not use another new symbol as it would be x - y in the direction shown, by virtue of KCL at node 1. If we the11 designate the current in the 6 V battery as z in the direction shown, then the current in the 2 S2 resistor gets fixed as y + z due to KCL constraint at node 3. Using KCL at node 2, we now see that the current in the 3 52 resistor can be written as x + z. Check that KCL is automatically satisfied at node 0 with the curreilts already designated. This is as it should

D.C. C i t s

Introduction to Circuits be. We know that there are only 3 independent KCL relations for this circuit and afte: having used thee of them at nodes 1 , 2 and 3, we would be surprised if the KCL at node 0 forces a further constraint on the currents. For the circuit under consideration e = 8, n = 6 and e - n+l = 3. Thus we have been able to designate all element currents in terms of 3 unknowns, x, y and z.

An alternative method of expressing all currents in the network in terms of 3 unknowns is through the concept of loop currents. We imagine three currents I,, I, and I, to circulate around three closed paths (loops) as shown in Figure 2.24.

I v v v I

6 Fig. 2.24 : illustrating the concept of loop-currents

These are called loop currents, also Maxwell's circulating currents. These loop currents are fictitious but the actual current in any element can be expressed as the algebraic sum of the loop currents passing through the element. Thus the current in the 3Q resistor in the direction 2 to 0 is taken as I, - I2 (only two loop currents pass through this element, I, in the chosen direction 2 to O and I, in the opposite direction). The current in the 12 V source from 0 to 5 is take11 as I,. h~ this manner, the entire set of element currents can be expressed in terms of the three loop currents I,, I2 and 13.

The advantages gained in expressing the element currents in tenns of the loop currents, as opposed to the scheme of Figure 2.23, are two-fold. First of all, we need not pay any attention to ~ i r c h o f f ' s current law. Each loop current by itself satisfies KCL in that it brings as inuch current to a node as it takes out. The element currents which are fonned through a superposition of these loop currents would auton~atically satisfy KCL at every node. Secondly, the loop current concept gives us a direction for the selection of loops for the application of KVLand a ineans of systematic writing of equations thereof. The latter aspect will be dealt with in the next section.

The question of how to select the loops in a general case remains. For a large class of networks, which are of most concenl to us, the geometry of the network is such that it is colnprised of (e - n+l) windows; each window being an area bordered by network elements and containing no node or network element inside it. Each window defines a loop (the closed path fonned by its contour). The referepce direction of each loop current can be chosen arbitrarily but if the reference directions are chosen either all clockwise or all counterclockwise, a certain symrnetry results in the KVL equations to be formed, which is an advantage. The loop currents associated with the windows are also called mesh currents.

SAQ 23 Express the eletne~~t currents as noted in Figure 2.23 in tenns of the loop currents of Figure 2.24.

2.4.2 Formulation and Solution of Loop Equations In the previous Section, we have seen how the e element currents of a network can be expressed in terms of a suitably chosen set of (e - n + 1) unknowfls e.g, the currents x, y, z in Figure 2.23 or the loop currents 11, I2 and I:, in Figure 2.24. In doing so we have already made use of KCL. To solve for these (e - n + 1) u ~ ~ k ~ ~ o w ~ ~ s , we formulate KVL equations for (e - 11 + 1) loops. These loops should be so chosen that the resulting equations are

independent. This would be the case if the loops chose11 for expressing KVL are the sanle as those used for defining the loop currents in the nlallner specified earlier. We will therefore adopt this procedure and illustrate this with the example circuit of Figure 2.23 and Figure 2.24.

The KVL equations (also called loop equations in this context) for the three loops are :

Loop 1 : v,, + v20 + v,,, + vs, = 0

LOOP 2 : v23 + v34 + '40 + '02 = LOOP 3 : v13 + v32 + v2, = We now express the voltages iu terms of the u~lknown currents and known circuit parameters. For the solutioil of x, y, z we have

Loop 1 : 1(x -y )+3(x+z ) -12+ l ( x ) = 0

Loop 2 : - ~ ( , v + z ) - 1 ( ~ ) + 6 - 3 ( ~ + ~ ) = 0

Loop 3 : 4y + 2Cv + 2)- l(x-y) = 0

which on simplification reduce to

5 x - y + 3 2 = 12

3x + 2y + 62 = 6

- x + 7 y + 2 z = I )

The above three equations call then be solved forx, y, z.

In terms of the loop currents 11, I2 and I:, the loop equatio~ls would be

LOOP 1 : ](Il - 13) +3(11 - 12) - 12 + 1(11) = 0

LOOP 2 : 2(12 - 13) + 1(12) + 6 + 3(1, -I,) = 0

Loop 3 : 4 I3 + 2(13 - Id + 1(I3 - I,) = 0,

which can be put in the conlpact forin :

51, - 312 -1, = 12

-31, t GI2 - 21, = -6

i -I, - z2 + 71, = 0

P A merit of the loop current method is that it enables you to write the Eqs. (2.1 7) straightaway froni looking at the network representation in Figure 2.24 without goiug through the intermediate steps. Note that the left hand side of each equation represents the algebraic sum of the voltage drops across the resistors in the directioil of the concenled loop current while the right hand side represents the algebraic sum of the voltage rises in the sources. 111 writing the equation for the ith loop the followi~ig rules are observed.

(a) The coefficient of the tenn 1; is the sum of the resistors situated in the ith loop. This is called the selfloop resismnce.

(b) The coefficieilt of the tenii Ii, j * i, is the sun1 of the resistances co~i l~ i io~l to loops i and j, with a positive sign if the two currents Ij and I; pass through the conirrlon resistors in the sanie directioil and with a negative sign if the two currents are oppositely directed in the coininoli resistors. The sum of the coinmoil resistances is

I called mutual resistaiice of loops i and j. Thus the coefficient of the term I, is & I I (mutunl resistance of loops i and j), where the sign is to be chosen appropriately.

5 - 3 - 1 or

I (c) The right haid side is the algebraic sun1 of source voltages tending to drive a current in the ith loop in the same directio~i as Ii. If there are no voltage sources in the loop or their net effect is zero, the right hand side is zero.

Consider the second equation of Eq. (2.17) as an illustration of the application of the foregoing rules. The self resistance of loop 2 is 3 + 2 + 1 = 6 ohnls, which is the coefficie~it

D.C. Circuits

Notice the symmetry of the equations; [he coefficient matrix is synlmetrical about the maill diagonal. This is a result of our choosing to write the loop equatioils in the same order as the indices of the loop currents.

1 1

: = [!:I inlnat.xform-

Introduction to Circuits of 12' Coininon to loops 1 and 2 is the %ohm resistor through which I, and I, pass in opposite direction. Thus the coefficient of Il in this equation is (-3). Sinlilarly I2 and I3 are oppositely directed in their conltnoii resistor of 2 Q value. The coefficient of I3 is therefore (-2). There is only one source in this loop of value 6 V, but the source tends to drive a current in the loop in a directiol~ opposite to 12. Accordingly, the right hand side of the equation is (-6). As all loop currents are taken with si~iiilar orientation (clockwise sense in this case), all the mutual ternls turn out to be negative.

To solve Eq. (2.17), we inay resort to the technique of elimination of one variable at a time or detenninants. Using the latter, we have

The actual elenlent currents are as tnarked in Figure 2.25.

Fig. 2.25 : Solution of the circuit of Fig. 2.24

Each individual term in a loop equation represellts a voltage and is expressed in terms of the unknowii loop currents or the known voltage source streugths. This procedure runs into difficulty if a current source is present as its voltage is not known apriori nor can it be expressed i11 tenns of the unknown loop currents. However, if we identify the loops in such a way that the current source is exclusively in one loop, we confine this difficulty to one loop. Accordingly we write the loop equations for the other e-rz loops. At the same time one loop current can be identified with the current source value which is known and hence the number of unknowns to be solved for also reduces to e-11. The procedure is illustrated in Example 2.9.

SAQ 24 What is ineant by self-loop resistance and mututal loop resistance ?

Example 2.8

In the circuit shown in Figure 2.26, let us identify the loop currents I, and I2 as marked. The loop equations are

and -41, + 121, = 3.

352 2 Q

Fig. 2.26 : Circuit for Example 2.8

The solution of the above is :I, = 0.45 A , I, = 0.40 A

Example 2.9

The circuit of Figure 2.27 has a current source: Identifying the loops as show11 in the figure, we immediately deduce I3 = 2 A.

2A


Now we write the loop equations for loops 1 and 2 only.

51 , -Z2-Z3=12

-Z l+412- I3 = - 6

After substitutio~i of the known value of I3 = 2 A, we have

511- u2 = 16

Solving the above, we haveIl = 772 A, I, = 3/4 A.

The currents in all elements can then be deduced.

SAQ 25 Find the power supplied (absorbed) by the three voltage sources of Example 2.8.

SAQ 26 Solve the circuit shown in Figure 2.28 by the loop currelit method.

D.C. Circuits

ln~oduction, to Circuits

Fig 2.28 : Circuit for SAQ 26

2.5 STAR DELTA CONVERSION

111 the preceding two sections, we acquainted ourselves with the node-voltage and loop-current nlethods of solutio~l of d.c. networks. These are two general methods and are fonnulated to analyse the network as given, without attempting to simplify its structure. Coilsequently, they entail a good amount of computation. We therefore look for alternative strategies, wherever feasible, for reducing the co~nplexity of the work. The use of 2-tenninal equivalent networks, as exemplified by the series-parallel reduction tech~liques of Sectiou 2.2, is one such strategy. In this section, we will study a similar approach based on the equivaleilce of two 3-tenninal resistor networks.

In electrical circuits we often come across a configuration of three elements connected either in star or in delta. These are 3-tenriinal configurations show11 in Figure 2.29 for the case of three resistors. The node 0 in Figure 2.29(a) is called the star-point. The star connection is also referred to as the Y-connection or Wye connection, while the delta coiinection is also indicated as A-connection. It turlls out that for a star co~lfiguratio~~ of 3 resistqrs, there exists an equivalent delta configuration and.vice versa, in so far as their ter~ili~lal behaviour is concerned. It is this equivalence and its applicatio~ls which we shall study in what follows.

2.5.1 Delta to Star Conversion If the two co~ifigurations show~l in Figure 2.29 are equivalent, then the resistance ineasured across any specified pair of tenni~ials keeping the third terminal open-circuited should be the same in both the networks. Let us assume that terminal c is kept open in both networks

C 0

(a) Star (b) Delta

Fig 2.29 : Star and delta connections of three resistors

(i.e., c is not connected to any element externally and hence current through it is zero). Then in the star configuration R,, carries no current, R,, and Rb, are effectively in series and the resistance observed between tenninals a aud b would be R,, + Rho. In the delta configuratio~~ R, and RbC are effectively in series. As seen from the terminals a and b this series combination having a resistance of Rbc + R, is in parallel with Rab leading to an effective resistance of Rub (Rbc + Rca ) / (Rab + Rbc + Rca). Since the two networks are equivalent,

In a sirnilar fashion, we call equate the resistances seen between tenninals b and c keeping a open. This would yield

Equating. the resistances see11 between c and a, with tennilla1 b open, we obtain

Fron~ the foregoing three equations, we can deduce R , by subtracting Eq. (2.19) fro111 Eq.(2.18), adding the resulting equation to Eq.(2.20) and dividillg by 2. Rbo and R,, can be solved for in a similar fashion. The results are

Ra0 = ( Rab R , Rub + Rbc + Rca ) (2.21a)

The foregoing relationships enable us to find an equivalent star configuration for a given set I of delta co~lnected resistors. Note the symmet~y of the equations which provides us a clue I

for remembering them. The equivalent star resistance at a terminal (say a) is given by the product of the two delta resista~ices (R,,, R,,) connected to the saltle terminal a, divided by the sun1 of the three delta resistances.

i Example 2.10

I Find the equivalent star of the delta configuration shown in Figure 2.30. ,

D.C. Circuits


Solution

The equivalent star has three resistors R,,, Rbo and Rco connected together at the star point o.

R , = ( 1 2 ~ 8 ) / ( 1 2 + 8 + 5 ) = 3 . M Q

R,, = 5 x 8/25 = 1.6 52

Example 2.11

Let us aualyse the circuit of Figure 2.31, using the delta-wye conversion technique. Clearly the given circuit is not amenable to series-parallel reduction, as no two elements are either in series or in parallel. We note however that if the delta connection of resistors between terminals a, b, c is converted into an equivalent star,

d


then the network becomes one of the series-parallel kind, as shown in Fipl-e 2.32, where the resistor values already calculated in Example 2.10 are used.

d Fig. 2.32 : Circuit of Fig 2.31 after A - Y conversion

Now the effective resistance between o and d is the parallel combination of 4 + 2.4 = 6.4 P and 8 + 1.6 = 9.6 B, which is

Rod = 6.4 x 9.616.4 + 9.6 = 3.84 Q

Hence the-current in the source is

I, = 48/(Rm +Rod) = 48/(3.84 + 3.84) = 6.25 A

The currents in the 4 SZ and 8 L2 resistors are now found by the current division rule.

I, = 109.6/(9.6'+ 6.4) - 3.75 A

The currents in the original delta connected resistors can be found from Vab, Vbc and V,,. From Figure 2.32, we have

Vac= V,- Vd=48 -812=28 V

v,= v,- V,=4I,- 812-- 5 v

As the above 3 voltage values are valid for the circuit of Figure 2.31 as well (Why?), the curre~~ts in the three resistors are

12 52 resistor: tab = VJl2 = 2.75 A

8 S2 resistor: I, = Vm18 = 3.5 A

5 S2 resistor: Ik = Vd5 = -1 A (indicating that the actual current direction is fro in c to b)

Mark all the element cvrrents and voltages on the circuit diagram and verify that K W K C L is satisfied for every looplnode.

2.5.2 Star to Delta Conversion Here we consider the reverse transformation to the one in the previous Section. We assulile that the resistance values in the star configuration of Figure 2.29(a) are known and we wish to fiud Rab, R, and Rca in tenns of R,,, Rb, and R,,. Dividing Eq. (2.21a) by Eq. (2.21b) and (2.21~) in turn, we obtain

Rc, = (Rbc Rm)IRb, and RA = (Rh R,)IRco

Substitution of the above in Eq. (2.21a) gives

III a similar fashion, we find the other relationships:

Rca = R , + R, + (Rc$,JRb,)

Eq. (2.2&), (2.22b), (2.22~) can be used to convert a delta into an equivalent star.

An equivalent set of relationships, in leniis of conductances can also be derived. Defining Gv as (Rv)- ', the fonnulas for star to delta conversion are

That is, the conductance of the element between a pair of ter~ninals in the delta is equal to the product of the co~iductances of the star-elements at the two terminals divided by the sum of the three star conductances.

Example 2.12

Use star to delta conversion to analyse the circuit of Figure 2.31.

Solution

We obsewe that the 12 52, 5 52 and 4 52 resistors are in star and replace them by an equivalent delta configuration. Usiug Eq. (2.22)

Roc = 12+ 5 + ( 1 2 x 5/4)= 3 2 Q

The resultiug network configur;ltion which is of the series- parallel type is show11 in Figure 2.33.

Fig. 2.33 : Circuit of Fig. 2.31 after Y - A conversion

On combining the two pairs of ele~iients in parallel, i t further simplifies to thc one in Figure 2.34.

L i d Fig. 2.34 : Further simplification of circuit of Fig. 2.33

We have I, = 48 x 51128 = 1518 A

and I, = I , + I , = 5018 = 6.25 A

- -

D.C. Circuits

lntrodudion to Circuits Also, through current divisiol~ rule, we have

1, = Iq32l(32 + 8) = 3.5 A and

These will be the currents in the 8 Q resistors of the original circuit as well.

Now the use of KCL at the nodes a, d, 11 in the original network gives the other currents

12 Q resistor: lob =Io - Ir = 2.75 A

4 Q resistor: I,, = I o -Is = 3.75 A

5 Q resistor: Ibc = lob - Iu = - 1 A

The values agree with those co~llputed earlier in Example 2.1 1.


1 The star-delta conversion provides an exanlple of terminal equivalent networks. The star to delta conversion of three resistors reduces the nurnber of in the network by one but increases the I I U I I I ~ ~ ~ of loops by 3

SAQ 28 A 3-ter~niual network co~nprisillg 3 equal resistors R y iu star co~~~lec t ion is equivalent to another con~prising 3 equal resistors RA in delta connection. What is the relation between RA and Ry?

SAQ 29 Analyse thecircuit of Figure 2.31, converting the delta connection of 5 , 4 and 8 9 resistors into an equivalent star.

Example 2.13

For the given 3-terminal network in Figure 2.35, find an equivalent one co~~taining only three resistors.

Fig. 2.35: Circuit of Example 2.13

Solution

Convertil~g each star into an equivalent delta we have

Similarly (R,& = 14 Q; (RhC)2 = 14 Q a ~ ~ d (Rc,)Z = 71 Q. D.C. Circuits

These are show^^ in Figurc 9.36(;1). Now (Rub), and are in parallel. So are (Rk)l a ~ ~ d ( R h c ) ~ 011 o11e h a d a ~ ~ d (R,,)l and (R,,), OII the other. They can be co~nbined yielding a s i ~ ~ g l e delta co~~nected network of 8.4 Q, 8.4 Q and 7 Q resistors.

(a) ( h )

Fig. 1.36: Steps in qin~plification of circuit of Fig. 2.35

2.6 NETWORK THEOREMS

In the previous section we have seen how the star-delta transformation technique leads to simpler solution of networks in certain situations. There also exist a nu~nber of network theorems, which sinlplify certain aspects of network n~~alys is and provide useful illsights into the performance of networks. In this section we shall study a few of these theorems.

2.6.1 Superposition Theorem The types of circuits with which we are largely cono-r~~ed are linear circuits (i.e., circuits comprised of linear passive ele~nents like R, L and C or linci~r dependent sources) acted upon by independent excitation sources. In such situations, the current or voltage in any ele~nent due to a particular excitation source is proportional to the strength of the latter. This is characteristic of all linear systenls where an effect is directly proportiollal to the cause. A further characteristic of such syslems is that the total effect of several causes acting sin~ultaneously can be obtained as the sunl (superposition) of the effects of the individual causes acting one at a time. Applied to electrical circuits, this property can be stated in the for111 of the following theorem.

Super~positior1 theorm1: In a linear electric circuit ;~cled upon by several independent voltage and current sources, the current/voltage in any branch is the algebraic sun1 of the currents/voltages in that branch which would be produced by each source acting alone with all other sources having their strengtlls reduced to zero.

Reduction of the source strength to zero inlplies that an idcal voltage source should be replaced by a short-circuit (V, = 0) and that an ideal current source should be replaced by an open-circuit (I, = 0). It is also to be kept in mind that what is conte~nplated in the Lheorcrn is the superposition of effects of indepe~ldent sources only, as dependenl sources if any fonn 13" of the linear network. We shall now illustrate the theorem by an rxa~nple.

Example 2.14

The currents/voltages in the circuit of Figurc 2.37(a) can be obtained by the superposition of the respective quantities that would occur when each source is acting alone as shown in Figurc 2.37 (b) and (c) respectively. Note that the current

(b)

Pig. 2.37: Circuit for Example 2.14

Introduction to Circuits source is replaced by an open circuit in Figure 2.37(b) and that the voltage source is replaced by a short-circuit in Figure 2.37(c). Analysis of the latter two circuits yields .

IO1 = 1 A, Ill = 0.8 A, = 0.2 A,

Io2 = - 4 A, 112 = 0.8 A, 1 Z 2 = 0.2 A,

(Vub)~ = 8 V, (Va,), = 8 V.

Superposing the pertinent values we have for the circuit of Figure 2.37(a),

I. = Iol + IO2 = - 3 A, I l = I l 1 + I l 2 = 1.6A,

1, = I,l +IZ2 = 0.4 A, v ~ b = (Vab)l + (V~b)2 = l6 V. Note that power in any ele~nent can not be obtained by the superpositioli of powers in the elelllent when one source acts at a time as power is not linearly related to the strength of excitation source. For exalnple the power dissipated in the 2 52 resistor is 212. This is not equal to the sum of 2IOl2 and 210:.

SAQ 30 To what class of circuits does superposition principle apply? While finding the effect of one source, how are the effects of other sources avoided?

SAQ 31 Find the current I in the 2 52 resistor of Figure 2.38 by superposing the effects of the four S O I I ~ C ~ S .

1 Fig. 2.38 : Circuit Eor SAU 31

2.6.2 Thevenin's Theorem This is a very widely used network theorem which enables us to find a silrrple equivalent circuit of any complicated 2-terminal electrical ~ietwork containing linear elements and i odependent sources.

Collsider a 2-tenninal active network N conlposed of resistors as well as voltage and current sources, connected to a load resistorRL as shown in Figure 2.39(a). The representative ele~nents are nlarked sy~nbolically in the box represe~lting N. According to the Thevenin theorem, the effect produced in RL by N is the same as that which would be produced by a

Fig. 2.39 : Illustrkting Thevenin's equivalent (a) Active nelwork N (h) lhevenrn ecluivalent network N r , (c) Circuit defining Vo (d) Circuit defining Thevenin resistance Ro

simpler equivalent circuit shown in Figure 2.39(b). In this equivalent Vo is the voltage that would exist at the terminals of N on open-circuit (i.e. with RL -+ m) and Ro is the effective

resistance of the 2-tenninal network N as seen looking inwards froin its terminals n and b after reducing the strengths of all the illdependent sources to zero (i.e., open-circuiting all current sources and short-circuiting all voltage sources). The conditions definiiig Vo and Ro are depicted in Figures 2.39(c) and (d) respectively. Ro is also equal to VJIx if an extenial

voltage source Vx were applied to the ternliilals as shown in Figure 2.39(d). This viewpoint

furnishes a method of calculatiol~ ofRo in sonie illvolved cases.

In ~naliy cases it may be sinlpler to calculate Vo aiid Ro and then to use the Theveluii equivalent circuit of Figure 2.39(b) to find It than to evaluate the latter directly frorn the original circuit of Figure 2.39(a). It is also clear that if one wishes to calci~late IL for several values of RL, the colnputational overheads for establishing the Theve~iill equivalent will be repaid through the co~i~putational savings in the repetetive calculation of lL, [roli~ the simpler

circuit. The Thevenin equivalent also tells us in a simple and direct way how the terlninal voltage VL of N varies with the load currelit IL. From the equivale~it circuit, i t is clear that VL = Vo - ILRo, a relation portrayed graphically in Figure 2.40.

D.C. Circuits

I I

u a - + vs,

$RL

N b

Fig. 2.40 : Variation of terminal voltage with load current in the circuit'of Fig 2.39(a).

R 0

y7 vo

_____C

Nl.h

n IL . - +

L 3 RI*

b

lntrodudiou to Circuits The resistance R, is called the Thevenin resistance or output resistance of N. It is a measure of the stifiless of N in the sense it represents the rate of drop of its terminal voltage with load current. The smaller the output resistance, the Inore closely will be the output voltage

i; VL held at the open-circuit level Vo.

- r

The foregoing colnlnents serve to emphasize the fact that the Thevenin equivalent is a "- t

succinct representation of the active network N in so far as its tenlli~lal relations and reaction with external elements are concerned and that it is therefore of co~lsiderable theoretical significance.

The terniinal voltage vs load current ch~racteristic of a practical d.c. battery can be approximated by a characteristic siniilar to that show11 in Figure 2.40 with a sinall slope (small value of R,). Thus the practical source can be represented as the series combination of an ideal source of strength Vo (open-circuit voltage) and a small internal resistance Ro (Thevenin resistance). This is an exalllplc of how an actual physical device can be modelled as a circuit containing ideal elements.

SAQ 32 What is meant by the Theveilin resistance or output resistance of a Ztemlinal active network N?

SAQ 33 What should be the output resistance of an ideal voltage source?

Example 2.15 Calculate the current in the 10 & resistor of Exalnple 2.14 using Thevenin's theorem.

Solution

We treat the 10 S2 resistor as RL and isolate it fro~n ;he rest of the network as shown in Figure 2.41(a). Vo the ope11 circuit voltage of N is computed by considering the circuit iu Figure 2.31 (b).

(a) Circuit of Example 2.15

' b

(b) Circuit for calculation of Vo

(c) Circuit for calculation of Ro (d) 'Ihevenin equivalent

Fig. 2.41 : For Example 2.15

This call be done ill several ways. Using node voltage method and t a k i ~ ~ g node b as the datum, we have

Vu[1/2 + 1/40] - 10(1/2) = 5, giving Vu = 400121 V

The ou~put or Theveni~i resista~ice is the looking-in resistance of the circuit in Figure 2.41(c) obtained after replaci~ig the current and voltage sources by open-circuit and short-circuit respectively.

Clearly Ru = 40 x 2/42 = 40121 Q

The Theve~lin equivalent o f N is now set up i11 Figure 2.41(d). Currelit I in the 10 P resistor = Vd(Ro + RL) = (400/21)1(10 + 40121) = 1.6 A.

Example 2.16 . Find thc T h e v e ~ ~ i n equivalent at ter~nillals n and 6 of the active network shown in Figure 2.42(a).

Solution

Calculation of Vo

The circuit in Figure 2.42(b) is used to calculate Ro. Note that only the independent voltage source is deactivated. 111 this circuit Vi = 0 as there is no source i ~ i the loop co~ltaini~ig the 20 52 a ~ i d 80 SZ resistors. Hence the depe~idei~t source strength 20 V; is also zero. Ro = 5 SZ.

The Theveliiil equivalent is show~l in Figurc 2.42(c).

D.C. Circuits

(a) Original network (b) Circuit used to calculate KO

(c) Thevrnin equivalent Fig. 2.42 : Circuit of Example 2.16

Introductio'u to Circuits SAQ 34

Filid the current in the 5 & resistor of the circuit of Figure 2.31 using Thevenin's theorem.

2.6.3 Norton's Theorem This is the dual of'thc Theveniii theorem and gives ail alternative simple equivalent of a 2-ternlinal network contailiiiig resistors and sources. In this case, the simple equivalei~t coi~sists of a current source ill pamllcl with a resistance. Before we discuss Nortoll's theorem, let us look at a basic case of two 2-terminal equivalent circuits.

I I 1

Collsider the two circuits of Figure 2.43, olle containing a voltage source and the other co~itaiiiilig a currelit source.

Tlir ter~niiial or load voltage ill the first network is vL = vs - ROLL. That in the second network is vL = ( I , - il,)Ro = Roi, - RoiL. Obviously the ternlinal vL - iL relations of borh i

active networks would be the same if

is = vJRo (2.24)

I11 this event, the two 2-ter~iiinal networks are equivalent.

Now as meiitioncd in the earlier sectio~i a practical voltage source whose terniinal voltage falls off with load currelit call be vicwed as an ideal voltage source in series wilh a resisla~ice (called intenial resislance of the source) a s in Figure 2.43(a). Similarly a practical currellt source whose output current falls off with increased output voltage can be modelled as an ideal current source in parallel with a resistance (known as the internal resistance of the currelit source) as in Figure 2.43(b). Now the significalicc of the result obtained ill the previous paragraph is that any practical voltage source which can be li~odelled as in Figure 2.43(a) call be cclnvertcd into an equivalc~lt practical current source as in Figtire 2.43(b) and vice versa.

Fig 2.43 : Equivalence of voltagc and currenl sources with internal resistances.

From the foregoing discussio~i it follows that the Theve~iiri equivalent of a iietworkN as show11 in Figure 3.3Y(b) has a current source equivalent as shown in Figure 2.44.

This is called the Norton equivalent of an active 2-tern~inal network N. The output resistance R,, has the sanie value ill both the Thcvenin arid Nortoti cquivalclits arid is therefore calculated in the saloe manncr. The current source slreiigth I* call be calculated as VdR,, fro111 the T h e v e n i ~ ~ equivalent or allernatively as follows :

If we short circuit the ter~ninals of N i ~ r Figure 2.39(a), i.e., make RL = 0, ttic resultilig current ill the short circuited len~liiials is called thc short circuit curreilt of N. If we repeat this experinlent on the circuit of Figure 2.44, clcarly the short circuit currcnt that flows through RL = O is I , . But since the circuits of Figure 2.39(a) atid Figure 2.44 are equivalent as far as load current is coiicenied, IF has the saine value as the short circuit current of N.

D.C. Circuits

Fig. 2.44 : Norton's ecluivalent of the 2-terminal network N in Fig. 2.39 (a).

This givcs an alternative and frequently used niethod of evaluatio~i of I, in tile Nortoli * equivalent.

Incidentally we note that the. Thevenin equivalent iiiodels the entire activc networkNas a practical voltage source of internal resistance Ro whereas the Norton equivaleut inodels N as a practical current source of internal resistance R,,. Note that we have used the subscript o with V, in the Thevenin cquivale~it to i~idicate the open circuit voltage and the subscripts with I, in the Nortoil equivalent to denote short circuit current.


The internal resistalice of a practical voltage source is represented in ' with an ideal voltage source, while that of a practical

current source is represente,d in with an ideal current source.

An ideal current source should have 3 i~iternal resistance.

Example 2.17

Find the current IL in the circuit of Figure 2.45 u s i ~ ~ g Norton's theorem.


Solution

The network to the left of section ah is to be replaced by its Norton equivalent. The circuits used to calculate the short- circuit currelltIS and output resistance Ro are shown in Figure 2.46(a) a ~ ~ d .",t46(b) respectively.

I11 the circuit of Figure 2.46(a), as Vab = 4 - 21, = 6 - I2 = 0, we have I, = 2 A, I2 = 6 A and Is = 2 + 6 = 8 A. Fro111 the circuit of Figure 2.46(b),

Ro = 2 x 113 = 213 SZ. Fro111 the Nortoll equivalent in Figure 2.46(c),

lotroductiou to Circuits

Fig. 2.16 : Circuils used for setting up Norton equivalent of Fig. 2.45

SAQ 36 Fir~d the current Ib, in thc 5 P resistor of the circuit of Figure 2.31 using Norton's theorem.

2.6.4 Maximum power transfer theorem A question that is of practical interest in Inany co~nmunication circuits may be posed as follows: Given a 2-terminctl active r~erwork N, wllat is the maximum power that it can delivet to a variable load resistance RL cortnected across its terminals and f i r wliat value of

RL does tlris corldirion occur? Since for any active network N of the type under consideration, a Theve~lin equivalent exists, we can rephrase the problem as follows: Given a voltage source V0 ofthe irlterrtal resistance Ro what is the maximum power tllat it can deliver to ( I load resistance RL and for wliat valr~e of RL does tlie maximum power transfer occur? The question can be readily answered by a~ialysing the circuit of Figure 2.47.

Fig. 2.47 : Circuit used to discuss maximum power transfer from a source

The arrow on the sy~iibol RL i~ldicates that it is all adjustable not a fixed resistance.. We have for this circuit,

I - Vo / (Ro+RL)

" 0 PowcrP12 in the load resistorR, = 12RL = v ~ ~ R ~ / ( R , , + RL)' = (R: 1 RL) + 2Ro + R ~ '

V, and R0 being constant, the ~naxi~riu~ri value of PL would occur when the de~~o~r l i~ ia tor of the expression on the right halid side is nrinimunr. This occurs when

7 2 dldRL[(~,'-lR,, + 2R, + R,)] = - RO-/R, + 1 = 0

For maximunl power transfer t/lre load resistance must equal the source resistance.

The value of nlaxiinunl power delivered to RL under this condition is obviously

It can be easily see11 that the power dissipated in the interilal resistance of the source is as nluch as the power delivered to the load. Such a situation, which is wasteful of power, is not oile to be aiiiled at in electric power systems, where power losses are to be ininimised. But in comtnunication systems, the power levels are itlhcre~~tly low and the objective usually is to transfer the illaxiniunl possible sigiial power to a load irrespective of power losses in the itltervening elemetlts. The tnaxiniu~n power tratisfer criterio~i is widely used in these systems.

We have worked out the results in lhis section in tenns of the parameters of the Theve~un equivalent ofN. Equally, they could be derived from Norton's equivalent. In fhis event Eq. (2.25) remains the same. The maximuin power in terms ofZs is however given by

SAQ 37 Sketch the graph ofPL vs RL for the circuit of Figure 2.47.

Example 2.18

What is the power dissipated in the 5 52 resistor of Figure 2.31? If this resistor is variable, what should be its value for maximum power dissipatio~l in it and what would be the value of this ~naxiillum power?

Solution

Referri~~g to the solutio~l of Example 2.11, the current in the 5 Q resistor has a magnitude of 1 A. Hence PL = 5 x 1' = 5 watts.

If this resistor is variable, we call use the Theve~lin equivalent of the nctwork worked out in SAQ 34 to find condition for inaxi~nuin power transfer.

The power dissipation of 5 W when RL = 5 52 is o~lly marginally less than the opti~nuln value. This shows that geuerally the maximum power transfer co~ldition viz, RL = Ro is not very sharp and small variations thereof can be tolerated, without a significa~it fall in the value of the lnaxi~num power.

SAQ 38 If the 4 52 resistor in Figure 2.45 has its resistaiice variable, for what vdlue will it draw maximum power? What would be the value of this maxinluln power? -,

D.C. Cucuits

73

2.7 SUMMARY

The ten11 d.c. rrc~orks is used to de~iote networks in which all current and voltage variables have co~istant values with respect to time. Practically important liiiear passive networks excited by d.c. voltage and current sources come under this category after the initial tra~lsie~lts if any have died down. As values of inductors and capacitors do not influence the steady state network variables in these circuits, we limit our consideration to networks conlprisi~lg only resistors and sources. In this Unit you have been exposed to a broad coverage of the i~nportant methods of analysis of d.c. networks. The study of d.c. networks is important not only in its own right but also as a prelude to the study of a.c. networks, where essentially the same principles with certain changes in detail are used. A good g a s p of the tech~liques presented in this Unit would therefore be amply rewarding.

You have learnt to identify and distinguish between series and parallel connections of circuit elements and the rules for finding effective resistance of series o r parallel connected resistors.

A recurring theme in the methods considered here and in the units that follow is the use of equivale~lt circuits. You have learnt that two networks are said to be equivalent if their tenninal characteristics are identical. Therefore one can replace a portion of a network by its equivalent without affecting the co~~di t io~ls in the letw work external to the portion replaced. You have seen how this artifice can be used with advantage to simplify the network analysis problem. In particular you have studied the following techniquts in the use of equivalent networks :

series-parallel reduction of resistor networks

star-delta conversio~l of resistor networks

Theve~lin and Norton equivalents.

You hiwe also been introduced to the concepts of node to datum voltages and loop currents, which are fonnulated so as to auto~llatically satisfy Kirchhoff's voltage and current laws respectively. You have leanlt how to lonnulate the (n-1) node equations (KCL equations) and solve for the node voltages as a firststep towards finding all ele~nent currents and voltages. As ao alternative, you have seen how a ininimal set of (e-n+l) KVLequations in the fonll of loop equations call be set up to solve for the loop currents, from a knowledge of which all elenle~lt curre~lts and voltages can be deduced.

We are pri~narily concenied with the behaviour of linear networks under the influence of signal sources. You have seen that an useful properly of such networks is that the effectsof i~ldividual sources niay be superposed to obtain the resultant effect when all the sources a d si~i~ultaneously. You have also studied the conditio~ls under which a given 2-tenninal active uetwork or equivalently a practical sigual source with its own internal resistance delivers the n~aximunl possi hle power to an external load.

111 any discipline there exist several routes to the solution of a given problem. This is particularly so in circuit aaalysis. By working out several problenls, you should be in a positio~l to distinguish the relative merits of the various alternative ~ilethods that you have bee11 exposed to i n this Unit and choose the most appropriate/convenient one for the prohle~il on hand.

2.8 ANSWERS TO SAOs

Because other elenle~its (viz. J and F) are con~lected to the mlnmon nodel(junction) of C and D, there iS no ~ieccssity for the curre~lts in C and D to be equal.

SAQ 2 :

One~llore set comprising 1 and J.

SAQ 3 :

tlic su~i i o f the voltages of the i~ldividual sources.

74

SAQ 4 : D.C. Circuits

Yes; the ter~ninal currents in both cases are the same for all values of terminal voltages.

SAQ 5 :

(a) The network is equivale~it to a 5 V d.c. source with a as the positive tenniiial, since Vnh = 5V in the given network for all terminal currents.

(b) Equivalent network coinprises a single d.c. current source of 7 A directed iiiter~ially fro111 n to B.

SAQ 6 :

Currelit

SAQ 7 :

RI : R 2 : R3

SAQ 8 :

Equivaleilt resistaiice see11 by the source RLy = Rl + R2 + .. .R,

Current I in the series circuit = VdRs

Voltage across resistor Rk

L J

SAQ 9 :

R,,, = (v,,,~)'IP,,,~.~ = 110'1100 = 1 3 S2

Figure 2.7 illustrates the form of circuit envisaged. Let R2 be R,,,, aiid R1 be the additional resistance. We have Vo = 230V and we require V, = 110 V. Hence V I = Vo - V2 = 120 V. Siiice V I = IR1 aiid V, = IR2, we have R 1 = (VI/V2) R, = ( I 2 0 1 1 1 0 ) ~ 121 = 132Q.

SAQ 10 :

(1) product (2 ) suill

SAQ 11 :

Referring to Figure 2.8(a), I0 = Vo(Gl + G, + ... G,) aiid IK = VoGK

Thus IK = (GKIGP) lo, where G p = G I + G2 + . . . + G,,.

SAQ 12 :

The c o i n ~ ~ l o ~ i voltage of the co~nhiiiatioii = 10 x 10- x 5 = 0.05 V .

Therefore, R = 0.0519.99 = 0.005005 S2 = 5.005 111 S2

SAQ 13 :

(1) series (2 ) parallel (3) unchailged

SAQ 14 :

Assume that the references for all resistor voltages to he voltage drops in the direction of correspo~iding currents.

NOW, E = 60 = 1 8 , + IJR4 + 16R6 = V6/2 + V6/2 + V6 = 2V6

Therefore V6 = 30 V . The currelits call ~iow be evaluated.

Introduction to Cucuib SAQ 15 :

Cl,C2,.. .C, conllected in parallel across a voltage v draw currents C, dvldt, C2 dvldt,.. .Cn dvldt. The current through the terminals of the parallel combination is then

i = (C, + C2 + ... C,,) dvldt

Hence equivalent capacitance Cp = CI + C2 + .. .Cn

SAQ 16 :

(a) True (b) False

SAQ 17 :

1. current 2. voltage 3. equivalent 4. the voltage source 5. series.

SAQ 18 :

Taking Ix to be the current in the 2 Q resistor we have

Power supplied by source = VsIo = V, x 4.5 I, = 36 x 4.5 x (y3) = 108 W

Sun1 of powers dissipated in resistors = 10(3)" 3(2)2 + 4 ( 1 ) ~ + 6(1/3)' + (1 + 2)(2/3)' = 108 W. Note the law of conservation of power in the circuit. The algebraic sum of powers absorbed by all elelnents in the circuit is zero.

SAQ 19 :

v23 = v20 - '30 7 v11J7 '13 = '10- v30

SAQ 20 :

(a) The.(n-1) equations formed at the other nodes are adequate to solve for the (11-1) node-to-dalum voltages. An equation for the reference node is redundant. It can be deduced from the other (11-1) equations and gives no additional inform a t' 1011.

(b) Choosing the co~lllllnli ~iode of the voltage sources as the reference node, N,, node-to-datum vollages are already known. The n - l a v other node-to-datum voltages have to bc f o u ~ ~ d fro111 the node equations at the n-1-Nv nodes to which the voltage sources are not co~uiected.

SAQ 21 :

The node equations are:

8 v,, - 4 v,, = 2

- 4 Vlo+ 6 V,, = 1

Solvirig the above, Vlo = VZ0 = 112 V.

Currents through 1 S, 2 S, 3 S, 4 S conductors are 0, 1, 0, 2 A respectively.

SAQ 22 :

Choose the coiillnon node of the voltage sources and R as the reference node 0. Let thc other nodes of El, E2, E3 and R be nuaibcrcd 1, 2 , 3 , 4 respectively. We havc Vln = El, V20 = E2, V3O = 15.1. Writilig the node equation at ~iode 4, -E,lrl -E21r2 -Edr3 + V40 [llr, + l/r2 + l/r3 + 1/R] = 0 leading to

SAQ 23 :

X = I ~ , y = 1 3 ) Z = - 1 2 ) x -y = I 1 - I 3 , x + z = I I - I Z , y + z = I 3 - I 2

SAQ 24 :

Self loop resistance is the sunl of resistance values of all resistors present in a loop. Mutual resistance of two loops is the sum of resistances of resistors colnlllon to the two loops.

SAQ 25 :

Power supplied by 4 V source = 411 = 4 x 0.45 = 1 .X W

Power absorbed by 2 V sourcc = 2 (I, -I2) = 2 x 0.05 = 0.1 W

Power supplied by 1 V source = 1 (I,) = 1 x 0.40 = 0.4 W

SAQ 26 :

Choosing cloc.kwise loop curre,nIs I, and 1: for the two loops, we have 61, - Z2 = 2 and - 21, + 312 = 2, whose solutiol~ is I, = 517 A, I2 = 817 A.

Therefore currc~lts in the 4 V sourcc, 7 V source and 1 SZ resistor are 517 A ; 317A a nd 817 A respectively.

SAQ 27 : ( 1 ) 3 ( 2 ) nodes (3 ) 1

SAQ 28 :

R ~ = R ~ / ~ R ~ = R ~ / ~

SAQ 29 :

The equivalent Y has the followi~lg values:

Rbo=5x4/17=20/17SZ, R , ,=40/17Q and R, ,=32 /179

Effective resistance seen hy the source

v,, = vc, - v,,, = +5 v The currents in the 4, 8 and 5 SZ resistors are 1514 = 3.75 A, 2018 = 2.5 A and 515 = 1 A (from c to b) respectively.

I d

Figure lor Answer to SAQ 29

SAQ 30 :

Applies to linear circuits (circuits coinprised of linear clements). The strengths of other sources are reduced to zero. Terminal ~oltages of voltage sources are reduced

D.C. Circuits I

lotrndnctinn to Circaits lo zcro by rcplaci~lg thc latter by short-circuits. Terilliiial curreills of current sources are reduced to zero by replacing the latter with open circuits.

SAQ 31 : Components of 1 :

II due to 12 V source. = 12/6= 2 A

I? due lo 6 V source = - 6 / 6 = - 1 A

l3 due lo 6 A source = - 6 x 4 1 6 ~ - 4 A

I4 due to 2 A source = O

Therefore I = Il + II + I3 + I4 = - 3A

SAQ 32 :

I t is the resistaiice o f N secii by looking in at the terlnii~als of N after deactivatiiig all i~ldcpelide~it sources i l l N (open-circuiting all current sources and short-circuiting all voltage sources).

SAQ 33 :

Zero, as the tenili~lal voltage of an idel11 voltage source shouId not change with the load current.

SAQ 34 :

After open-circuitiiig the 5 Q resistor, let ( V h c ) ~ = VO

V, = V,& - Vd = (411 6) x 48 - (811 6) x 48 = - 12 V

Calculatioii of Ro :

The output resistance of the network is found afler replacing the voltage source by a sliort-circuit. Its value is easily visualised by redrawing the circuit as shown.

Y c;,, lpTp

1%

Figure for Answer to SAQ 34

Clearly R,, = [4 x 12/(4 + 12)] + [8 x 8/(8 + 8)] = 7 SZ

Now the current I,,, iu lhe 5 Q load resistor call be ci~lculated froin the Theveniil equivalent.

D.C. Circuils SAQ 35 5:

( I ) series, (2) parallel, (3 ) infinite

SAQ 36 :

The circuit used to determine Is is show11 in the figure. The source sees a parallel co~llbi~latio~l of 12 52 and 8 52 resistors put in series with a parallel co~nbination of 4 52 aud 8 SZ resistors.

Using current divisio~l rule,

I, = 108/(8 + 12) = 1 X/7 A

Thus thc short-circuit current I, = 1, - I 2 = - 1217 A. The output resistance Ro as alrcady calculated in SAQ 34 is 7 52. Fro111 the Norto11 equivale~~t shown in the Figure, IL = Is . Rol(Ro + RL) = - (1217) x 71(7 + 5 ) = - I A

1,

Figure for

1s = -

to SAU

Figure. for Answcr lo SAQ 37

SAQ 38 :

Using the Norton equivalent of Exa~nple 2.17, 111axi111~1n power occurs wl1c11 RL = 2/3 52.

Dc circuits

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