David Cussans, AIDA/CALICE DAQ Palaiseau, 10 Nov 2011 Trigger/Timing Logic Unit (TLU) for AIDA...

David Cussans, AIDA/CALICE DAQ Palaiseau, 10 Nov 2011

Trigger/Timing Logic Unit (TLU)

for AIDA Beam-Test


Outline

• Exiting EUDET JRA1 TLU

• Aims for Mini-AIDA-TLU (mTLU)– Specification

– Schedule / Cost.

• Aims for AIDA-TLU (aTLU)

• Use of aTLU in with CALICE DAQ• Also, as Beam-Interface (BIF)?

• Summary


EUDET JRA1 TLU

• Designed to give a simple but flexible

interface to trigger/timing signals at

EUDET JRA1 beam-telescope

• Produces triggers

from beam

scintillators.• EUDET-Memo-2009-4


EUDET JRA1 TLU

• Philosophy• Try to impose as few “rules” as possible on

users.

• Simple and low cost enough for beam test users to have one in their lab to prepare for beam-test

• Used by ILC, LHC and “non-aligned”

groups.


JRA1 TLU Interface• Different triggering modes:

– No handshake (trigger pulses high)

– Trigger-Busy handshake

– Trigger Data handshake


JRA1 TLU Interface

• Triggers can be vetoed by DUT raising

TRIGGER_CLOCK line.– Can be combined with simple

trigger/busy handshake for “dead-time free” readouts that send a continuous stream of data.

– Send “buffer almost full” signal.

• Time-stamp stored for each trigger.


Why and AIDA TLU

• Existing TLU works. Why a new one?– Want to move to one-trigger-per-particle ( not

one trigger per telescope frame).– Needed for LHC detectors.

– FPGA system available for lifetime of AIDA– Use new “FMC” format to allow different FPGAs.

– No “single vendor lock in”

– Can use with xTCA systems.

– Cheaper to produce TLUs for integration in home labs.


AIDA TLU – Backwards Compatible

• AIDA TLU will be backwards compatible

with existing EUDET TLU• Compatible at physical level ( signal levels,

definitions)

• Compatible at software level.• At memory map/register level. (but different

interface to host. Gigabit Ethernet not USB)


AIDA Mini-TLU (mTLU)

• Want to produce a prototype to test out ideas

• This mini-TLU will be cheaper and easier to

produce than existing TLU

• Use new connector standard (FMC), increase

lifetime.– Enthusiastically adopted by CERN:– Support “Open Hardware” site.

– 23 FMC projects already


AIDA mTLU specification

• Double-Width FMC with single LPC

connector.– Use e.g. Xilinx SP601 to host.

75mm139mm


AIDA mTLU Front Panel

• Four PMT inputs

(Lemo-00)

• One GPIO

(Lemo-00)

• One clock I/O (2-

pole Lemo-00)

• Two DUT

(HDMI)


Alternative Front Panel

Four PMT inputs

(Lemo-00)

One clock I/O (2-

pole Lemo-00)

Three DUT:

Two HDMI

One RJ45


AIDA mTLU Interface

• Four PMT Inputs (Lemo-00)– Use MAX9601 fast comparator. <1ns

propagation, ~ 100ps dispersion with amplitude. Threshold by DAC. +/-5V range.

– Use threshold + zero-crossing per channel.

• Two DUT interfaces (HDMI) – Difficult to get RJ45 that will fit on FMC. HDMI

has more signal pins and better grounding

– “Dongles” for HDMI to LVDS/RJ45 , TTL/LEMO


AIDA mTLU Interface• Use clock circuitry inside FPGA to receive or

generate clocks.

• Communication to DAQ by Gigabit Ethernet

– Use “IPBus” firmware.– Developed for CMS upgrade, but intended

to be “experiment neutral”

– Will need a host to convert packets into EUDAQ format, but could be main DAQ PC


Versions of mTLU

• Different levels of build– Assembled into box ( “beam-test ready”)

– Assembled onto metal plate ( “IKEA”)• Approximate cost ~ €1000 each.

– FMC only - provide own FPGA ( “Aldi” )

– Manufacture own from design files

• Aiming for hardware ~ April 2012


Interface to CALICE DAQ Need to do some thinking…• Use TLU as a source of trigger data?

• like a Trigger-DIF?

• Need to receive or supply a clock• Not always used for EUDET

• With trigger/busy handshake, don’t need clock for event synchronization.

• (Many users don’t use timestamp.)


Interface to CALICE DAQ

• Interface:• Physical compatibility probably not an issue

(Make AIDA TLU look like a CALICE DIF.)

• Use CALICE DIF-LDA firmware to format data for transmission.

• Data• Send timestamp ( ~ ns resolution) of every

particle.


Interface to EUDAQ

• With same trigger information in both

CALICE and Beam-telescope can

combine events• Offline – use event number/timestamp as a

key

• Online – send CALICE data to EUDAQ or modify EUDAQ to be able to send data to CALICE DAQ.


Beam Interface Prototype

• Requirement for CALICE beam-interface

(BIF) for beam-test.• Approx 12 channels, each with <1ns time-stamp

• Can use mTLU as prototype BIF

• Full aTLU as a BIF

• Hardware should work – but BIF-specific

firmware needed.


Full AIDA TLU

• Approximate specification:– Twelve PMT inputs

– Six DUT inputs

– Low jitter clock generation

• Will need FPGA board with FMC-HPC

(high pin count) connector.

• Firmware almost identical to mTLU.


Summary

• Work under-way to produce a AIDA mini-TLU– Aiming for early release

– Low(er) cost way of integrating to EUDAQ at home lab.

• Fully specify aTLU in light of mTLU

experience

• Can use same hardware (and probably most

of the firmware) as a Beam-Interface (BIF)

David Cussans, AIDA/CALICE DAQ Palaiseau, 10 Nov 2011 Trigger/Timing Logic Unit (TLU) for AIDA...

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