Curso de Tv Plasma Part_2

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Transcript of Curso de Tv Plasma Part_2

1. Block Diagram of VSC main 2. Block Diagram of STB main 3. IC SPEC

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MT-40PA10 VSC Board Block Diagram MT-40PA10 VSC Board Block DiagramDS101 D-sub 25 P601 L/R 5Display Processor & Scan Rate Converter (Format Converter) Interlace to Progressive 15KHz 31KHz(2H X 1V) STB-POWER VSC DET/POWER HDSTB_DET STB_SCL/SDA ANA_STB_DET

OSD_HS/VS IC002 IC002 24C16 24C16 IC001 IC001 M37270 M37270 EEPROM EEPROM Micro-Com Micro-Com SDA2 SCL2 IC IC407 IC407 SC786102DW OSD_R/G/B/YS SC786102DW 4 IC402 2M SDRAM A0-10 11 16 D0-16 IC403 16 2MSDRAM

2 2 IC50174F541

2

STB-R/G/B/HS/VS(A)

7

PVS/PHS_OUT

HS/VS_OUT IC502 8 DOR0-7 8

D16-31

74F541PAR0-7

15 DS102

PC-R/G/B/HS/VS (A) 5 DTV-Y/Pb/Pr (A) 3 1 CVBS (A) HS/VSTV-Y/U/ V/HS/VS (A)

IC401 IC401 MX88L284 MX88L284 3X2M 3X2M Scan converter Scan converter 208Pin 208Pin 3X8 (R/G/B)(D)

8 DOG0-7 IC503 874F541 Buffer PAG0-7

PD501 (41Pin)

P101 V/R/L

P102 DVD

D-sub 3

5 IC204 IC204 SDA9410 SDA9410 Deinterlace & Deinterlace & D/A D/A 100Pin 100Pin

IC203,204,303,304,40 7 2 IC303 IC303 CXA2101AQ CXA2101AQ 80Pin 80Pin

8 DOB0-7

8

IC203 IC203 VPC3230 VPC3230 Decoder Decoder Y,Cb,Cr 80Pin 80Pin (A) 8 8 LU0-7

Video&Chroma Video&Chroma

IC304 IC304 THS8083 THS8083 100Pin 100Pin

74F541

IC504 PAB0-7

Chip for flat panel display application VGA XGA scale up/down

CHR0-7 (D)

PDP ModuleCAXHS/VS 3 CXA-R/G/B(A )Multi-Component Processor Triple 8Bit, 80MSPS, 3.3V Video&Graphic Digitizer (Baseband Video Signal Processor) with Digital PLL STB, PC, DTV, TV signals Input to Analog R/G/B Output Analog R/G/B Input to 3X8 Digital R/G/B Output

Comb Filter Video Process CVBS(Composite Video Baseband Signal) Input to Y/C(Y,U,V) Output

AV/DVD/DTV2 STB/PC/DTV1

IC604 IC604 LA7222 LA7222 (Audio S/W) (Audio S/W)

2 L/R

(Tone Control) (Tone Control)

IC602 IC602 CXA2022S CXA2022S

L/R

2

Audio Amp. Audio Amp. (12Wx2) (12Wx2)

IC603 IC603 LA4282 LA4282

P007A (Spk. Jack) 2 L/R

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RT- BA10 STB Main Block Diagram RT- BA10 STB Main Block DiagramPC- IN R/G/B/HS/VS(A) PC Audio(Stereo) TUNER TUNERI2C

7input/3output wideband video Amp(20MHz, -3dB) Y/C mix circuit A/V switch featuring I2C BUS I2C 2nd SIF MSP3411G MSP3411G Sound Sound Processor Processor DC 8V DC 8V L/R(TV) L/R I2C SCL-A SDA-A KIN SCL-A SDA-A KEY-1

2001.4.27 PHIL KIM P801 7PIN

PC- OUT

IF IC IF IC TDA4474 TDA4474 DC5V DC5V CVB S

L/R OUT Input select switch for high definition display Internal broadband RGB s/w SCL-A/D SDA-A/D

RF

KOUT IC 001 IC 001 M37272 M37272 u-COM u-COM SCL-A SDA-A I2C

SCL-A SDA-A

SVHS AUDIO COMMON USE

Y/C

BA7657F BA7657F RGB RGB S/W S/W DC 5V DC 5V

9 10 R/G/B HS/VS(A) DS 701 (25Pin Cable)

AV3(RCA JACK)

V, L/R

CVBS2/Y

AV2 MNT OUT * SCART2 : HALF * RCA Jack Common Use *PCB LayOut) TV OUT AV1(SCART1: FULL)

V, L/R

CXA2069Q CXA2069Q A/V SW A/V SW DC 12V DC 12V

C CVBS1/Y

CVBS.3

TPU3052S TPU3052S TELETEXT TELETEXT DC5V DC5V

FB RGB WE RE I2C

VPC3230D VPC3230D SUB SUB [ADDR: 44] [ADDR: 44] Video Video Processor Processor DC6V DC6V

I2C

SCL-D SDA-D

R/G/B HS/VS(A) CXA2101AQ CXA2101AQ RGB RGB Processor Processor DC9V DC9V R/G/B HS/VS(A)

SCL-A SDA-A

I2C

H

V VPC3230D VPC3230D MAIN MAIN [ADDR: 47] [ADDR: 47] Video Video Processor Processor DC 6V DC 6V

Multi-Component Processo Analog R/G/B Output

TV, L/R

C DVD Y/Cr/Cb (A) L/R EXT_RGB

81V04160 81V04160 FIFO FIFO Memory Memory

SCL-D SDA-D Y/ C/HS/VS (D)

SCL-D SDA-D

I2C

SDA9410 SDA9410 1H/1V=> 2H/ 1V 1H/1V=> 2H/ 1V DW // PIP // MPIP DW PIP MPIP DC 3.3V DC 3.3V

V, L/R

Comb filter video processor TV Signal to Digital Y/Cr/Cb Multi-standard color decoder A/D converter DTV Y, Pb, Pr (A)

Format converter Interlace to Progressive

DVD/DTV (RCA JACK) 7input/3output wideband video Amp(20MHz, -3dB) Y/C mix circuit A/V switch featuring I2C BUS

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VPC 3230 Comb Filter Video Processor Comb Filter Video Processor

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Description The VPC3230xD/324xD is a high quality, single-chip video front-end, which is targeted for 4:3 and 16:9, 50/60 and 100/120Hz TV sets. It can be combined with other members of the DIGIT3000 IC family (such as DDP 33x0A/B, TPU 3040) and/or it can be used with 3rd-party products.

Features Four CVBS, one S-VHS input, one CVBS output Two RGB/YCrCb component inputs, one Fast Blank(FB) input High-performance adaptive 4H comb filter Y/C separator with adjustable vertical peaking Multi-standard substandards color decoder PAL/NTSC/SECAM including all

One 20.25MHz crystal, few external components 6V supply voltage5/40

SDA9410 Display Processor & Scan Rate Converter Display Processor & Scan Rate Converter

Description The SDA 9410 is a new component of Siemens MEGAVISION IC set, which enables the system to reduce large area and line flickering of interlaced TV standards.

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SDA9410Display Processor & Scan Rate Converter Features Digital interlaced Y/C input, progressive analog Y/U/V output High performance scan rate converter 4:2:2 luminance and chrominance parallel (2x8 wires) Scan rate conversion - Motion compensated 100/120 Hz interlaced scan conversion - Motion compensated 50/60 Hz progressive scan conversion D/A converters - 9 bit amplitude resolution for Y, -(R-Y), (B-Y) output 3.3V + 5% supply voltage

3-state Buffer 3-state Buffer DescriptionThe 74F541 are octal buffers that are ideal for driving bus lines or buffer memory address registers. The outputs are capable of sinking 64mA and sourcing up to 15mA, producing very good capacitive drive characteristics. The devices feature input and outputs on opposite sides of the package to facilitate printed circuit board layout.

74F541

FeaturesHigh impedance NPN base inputs for reduced loading (20uA in High and Low states) Octal bus interface 3-state buffer outputs sink 64mA 15mA source current

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THS8083 Video&Graphics Digitizer with Digital PLL Video&Graphics Digitizer with Digital PLL

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Description THS8083 is a complete solution for the digitalizing of video & graphic signals in RGB or YUV/YCbCr color spaces. The device supports pixel rates up to 80 MHz to 95 MHz, depending on the speedgrade of the device

Features Three digitalizing channels, each with independently controllable Clamp, PGA and ADC ADC: 8 bit 80MSPS Support for 4:4:2 and 4:2:2 (ITU.BT-601 style output modes to reduce board traces and video ASICS Fully integrates digital PLL(including loop filter) for pixel clock generation 3.3V supply voltage9/40

CXA2101AQ Multi-Component Processor Multi-Component Processor(Base Band Video Signal Processor IC) (Base Band Video Signal Processor IC)

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Description The CXA2101AQ is a bipolar IC which integrates the following functions on a single chip; base band signal processing, RGB signal processing , and video switching for 4 systems (including HV sync signal processing) using Y/Cb/Cr inputs. It was developed for multiscan TVs, and enables high-end TV systems to be configured.

Features On-chip video switching for 4 systems Y/Cb/Cr input for one system, external Y/Cb/Cr input for 1 system Analog RGB input for 2 systems Normal, PAL-FF, HD-TV supported 9V supply voltage11/40

MX88L284 Scan Converter Scan Converter

Description The MX88L284 is a highly integration chip for Flat Panel Display application. With Macronixs Smartscaling 2 filter, it provides high quality scaled video image and format conversion. General features Converts NTSC/PAL and PC video signal into flat panel display device timing and resolution. 12/40

Built-in OSD generator with 64 ROM fonts, and 64 programmable RAM fonts. Support configurable SDRAM/SGRAM(x0 x1 and x2) for different resolution to minimize the system cost. Input PC Video up to 1024x768 @ 85Hz operation mode Support YCrCb422,RGB888 mode (interlaced and Non-interlaced) Support input H/V sync. Polarity and odd/even field detection Support digital input capability Support SDRAM/SGRAM x0x1 and x2 configuration 3.3V power supplier Output Support following resolution and frequency

Resolution Horizontal frequency Vertical frequency (Hz) Dot clock (MHz)

800x600 (SD) 22~55 50~75 32.5~60

1024x768 20~70 50~75 25~80

1280x1024 64 60 108

Single (18/24) and Dual (36/48) bit RGB data output Support OSD MUX capability for On-Screen-Display chip input Built-in OSD generator CPU Interface Support direct 8 bit uP interface and serial bus (high-speed) interface

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SDRAM-KM416S1020CDescriptionThe KM416S1021C is 16,777,216 bits synchronous high data rate Dynamic RAM organized as 2 x 524,288 words by 16 bits, fabricated with high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.

FeaturesJEDEC standard 3.3V power supply SSTL_3 (Class II) compatible with multiplexed address Dual banks operation MRS cycle with address key programs - CAS latency (2 & 3) - Burst length (1, 2, 4, 8 & Full page) - Burst type (Sequential & Interleave) All inputs are sampled at the