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Chapter 8 Main MemoryBernard Chen

Spring 2007

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Objectives

T o provide a detailed description of variousways of organizing memory hardwareT o discuss various memory-management techniques, including paging andsegmentationT o provide a detailed description of the IntelPentium, which supports both puresegmentation and segmentation with paging

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Ba ckgroundProgram must be brought (from disk) into memory

and placed within a process for it to be runMain memory and registers are only storage CPU canaccess directlyRegister access in one CPU clock (or less)Main memory can take many cyclesC a che sits between main memory and CPU registersProtection of memory required to ensure correct operation

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Memory shared by ProcessesWe first need to make sure that eachprocess has a separate memory space

T he BASE register holds the smallest legal physical memory address; theLIMIL register specifies the size of therange

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Ba se a nd Limit Registers

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Ba se a nd Limit RegistersT he base and limit registers can beloaded only the operating system ,which uses a special privilegedinstruction.

And these instructions can only beexecuted in kernel mode, which canonly achieved by OS

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B inding of Instructions a nd

Da t a to MemoryB inding: A compiler will typically bindthe symbolic address T o relocatableaddress (such as 14 bytes from thebeginning of the module )

Address binding of instructions and datato memory addresses can happen at three different stages

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B inding of Instructions a nd

Da t a to Memory

C ompile time : If memory location known a priori,a

bsolute code can be generated; must recompilecode if starting location changes

Lo a d time : Must generate reloc a t a ble code if memory location is not known at compile time

Ex ecution time : Binding delayed until run time if the process can be moved during its execution fromone memory segment to another.

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Logic a l vs. Physic a l

Address Sp a ce

T he concept of a logical address space that isbound to a separate physic a l a ddresssp a ce is central to proper memorymanagement Logic a l a ddress generated by the CPU;

also referred to as virtu a l a ddressPhysic a l a ddress addres seen by thememory unit

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Logic a l vs. Physic a l

Address Sp a ce

Logical and physical addresses are the samein compile-time and load-time address-binding schemes; logical (virtual) and physicaladdresses differ in execution-time address-binding scheme

Logical address also refer to a virtu a la ddress

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Memory-

Ma n a gement Unit (MMU)T he run time mapping from virtual to physicaladdress is done by a hardware device called thememory-management unit, as well as MMU

In MMU scheme, the value in the relocation registeris added to every address generated by a userprocess at the time it is sent to memory

T he user program deals with logical addresses; it never sees the real physical addresses

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Memory-

Ma n a gement Unit (MMU)

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D ynamic LoadingIf the entire program and all data must be inphysical memory for the process to execute,

the size of the process is limited to the size of physical memory

T o obtain better memory-space utilization, we

can use dyn a mic lo a ding

Routine is not loaded until it is called

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Swapping A process can sw a pped temporarilyout of memory to a Ba cking store andthen brought back into memory forcontinued execution.F or example, RR CPU-scheduler, Priorityscheduler

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Swapping

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SwappingSwapping requires a backing store.It must be large enough to store all memory imagesfor all users, and it must have a direct access tomemory

Whenever the CPU scheduler decides to execute aprocess, it calls the dispatcherT he dispatcher will check whether the next process isin the memoryIf not, the dispatcher will swap out a processcurrently in memory and swaps in the desiredprocess

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SwappingWe assume that the user process is 10MB, and thestandard hard disk with a transfer rate of 40MB persecond, it would take :

10000kb/40000kb per sec = second = 250milliseconds

Assume we expect 8 millisecond of delay, each swapwill take 258 millisecond. And we need two swapstherefore it takes 516 millisecondsIf we do a RR CPU-scheduler, the time quantumshould be more than half second

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C ontiguous Alloc a tion

Main memory usually into two partitions:

Resident operating system, usually heldin low memory with interrupt vectorUser processes then held in highmemory

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Memory Mapping and

ProtectionRelocation registers used to protect user processesfrom each other, and from changing operating-system code and data

Base register contains value of smallest physicaladdress

Limit register contains range of logical addresses each logical address must be less than the limit registerMMU maps logical address dynamically

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Memory Mapping and

Protection

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Memory AllocationT he simplest method for memoryallocation is to divide memory intoseveral fix-sized partitions

Initially, all memory is available for userprocesses and is considered one largeblock of available memory, a hole.

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Memory Allocation

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Dyn a mic Stor a ge-

Alloc a tion ProblemH ow to satisfy a request of size n from a list of free holesF

irst-fit:

Allocate the first hole that is bigenoughB est-fit : Allocate the smallest hole that is bigenough; must search entire list, unlessordered by size (Produces the smallest leftover hole)W orst-fit : Allocate the largest hole; must also search entire list (Produces the largest leftover hole)

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F ragmentation All strategies for memory allocation sufferfrom e x tern a l fr a gment a tion

e x tern a l fr a gment a tion: as process areloaded and removed from memory, the freememory space is broken into little piecesExternal fragmentation exists when there isenough total memory space to satisfy therequest, but available spaces are not contiguous

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F ragmentationStatistical analysis of first fit even withsome optimization, given N allocatedblocks, another 0.5N blocks will be lost to fragmentation.T hat is one-third of memory may beunusable!T his property is known as the50 -percent rule

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F ragmentationIf the hole is the size of 20,000 bytes,suppose that next process requests19,000 bytes. 1,000 bytes are lose

T his is called intern a l fr a gment a tion-memory that is internal to a partitionbut is nor being used

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F ragmentationPossible solution to external-fragmentationproblem is to permit the logical address space

of the process to be noncontiguousT hus, allowing a process to be allocatedphysical memory wherever the space isavailableT wo complementary techniques achieves thissolution : paging(8.4) segmentation (8.6)combined (8.7)

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8.4 pagingP a ging is a memory-management schemethat permits the physical address space of a

process to be non-contiguous.

T he basic method for implementationinvolves breaking physical memory into fixed-sized blocks called F RAME S and break logicalmemory into blocks of the same size calledPAG E S

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PagingEvery address generated by the CPU isdivided into two parts : P a ge number(p) and P a ge offset (d)

T he page number is used as an indexinto a P a ge T a ble

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Paging

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Paging

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PagingT he page size is defined by the hardwareT he size of a page is typically a power of 2,varying between 512 bytes and 16MB perpageReason : If the size of logical address is 2^mand page size is 2^n, then the high-orderm-n bits of a logical address designate thepage number

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Paging

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Paging Example

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PagingWhen we use a paging scheme, we have noexternal fragmentation : ANY free frame can

be allocated to a process that needs it.H owever, we may have internalfragmentationF or example : if a page size is 2048 bytes, aprocess of 72766 bytes would need 35 pagesplus 1086 bytes

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PagingIf the process requires n pages, at least n frames are required

T he first page of the process is loadedinto the first frame listed on free-framelist, and the frame number is put intopage table

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Paging

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H ardware Support on PagingT o implement paging, the simplest method is to implement the page tableas a set of registersH owever, the size of register is limitedand the size of page table is usuallylargeT herefore, the page table is kept inmain memory

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H ardware Support on PagingIf we want to access location I, we must first index into page table, this requires one

memory accessWith this scheme, TW O memory access areneeded to access a byteT he standard solution is to use a special,small, fast cache, called Tr a nsl a tion look-a side buffer (TL B ) or a ssoci a tivememory

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T LB

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T LBIf the page number is not in the T LB (T LBmiss) a memory reference to the page tablemust be made.In addition, we add the page number andframe number into T LBIf the T LB already full, the OS have to must select one for replacement

Some T LBs allow entries to be wire down ,meaning that they cannot be removed fromthe T LB, for example kernel codes

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T LBT he percentage of times that a particular pagenumber is found in the T LN is called hit r a tioIf it takes 20 nanosecond to search the T LB and 100nanosecond to access memory

If our hit ratio is 80%, the effective memory accesstime equal :

0.8*(100+20) + 0.2 *(100+100)=140If our hit ratio is 98%, the effective memory accesstime equal :

0.98*(100+20) + 0.02 *(100+100)=122(detail in C H 9)

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Memory ProtectionMemory protection implemented by associatingprotection bit with each frame

V a lid-inv a lid bit attached to each entry in the pagetable :

valid indicates that the associated page is in the

process logical address space, and is thus a legalpage invalid indicates that the page is not in the process

logical address space

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Memory ProtectionSuppose a system with a 14bit addressspace (0 to 16383), we have a programthat should use only address 0 to10468. Given a page size of 2KB, wemay have the following figure :

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Memory Protection

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Memory Protection Any attempt to generate an address inpage 6 or 7 will be invalid

Notice that this scheme allows theprogram to access 10468 to 12287, this

problem is result of the 2KB page sizeand reflects the internal fragmentationof paging

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Sh a red P a ges An advantage of paging is the possible of sharing common code, especially time-

sharing environment F or example a server with 40 user using text editor (with 150k reentrant code and 50kdata space)In next figure, we see three page editor with50k each. Each process has its own datapage

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Sh a red P a ges

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Sh a red P a gesIn this case, we need only

150k + 40* 50k = 2150 KB

Instead of

(150k + 50K)*40 = 8000KB