1

CS 320, Operating Systems

Chapter 1

2

The god Janus, beardless, Roman coin; in the Bibliothèque Nationale, Paris (credit: Larousse)

Found at answers.com

3

Found at www.pantheon.org

• Janus is the Roman god of gates and doors (ianua), beginnings and endings, and hence represented with a double-faced head, each looking in opposite directions.

• He was worshipped at the beginning of the harvest time, planting, marriage, birth, and other types of beginnings, especially the beginnings of important events in a person's life.

• Janus also represents the transition between primitive life and civilization, between the countryside and the city, peace and war, and the growing-up of young people.

4

• …• Janus was represented with two faces, originally

one face was bearded while the other was not (probably a symbol of the sun and the moon).

• Later both faces were bearded. • In his right hand he holds a key. • The double-faced head appears on many Roman

coins, and around the 2nd century BCE even with four faces.

5

1.1 What Operating Systems Do

• System components– Users– Application programs– O/S– Hardware

• The O/S provides an environment where other programs can do useful work

6

• Purposes of the O/S from the user point of view

• Provide for ease of use (PC)• Provide for resource utilization (mainframe)• Some combination of the two (networked

workstations, handheld devices, etc.)

7

• Purpose of the O/S from the system point of view

• Resource allocator• Control program

8

• The “Janus” summary:• The O/S can be regarded as a control program

—a means by which the user can control the machine.

• The O/S can also be regarded as a service program—it makes available to the user all of the capabilities of the machine.

• (A perfect antithesis would be, “a means by which the machine can control the user…”)

9

• Defining an O/S• There is no single definition• The book’s preference: The program that’s

running on a system at all times• Commercial aspect: What vendors choose to

include• Legal aspect: What the DOJ said MS could

include without violating anti-trust laws (no browser, for example)

10

1.2 Computer-System Organization

11

• Inside the machine:– The CPU and controllers run concurrently– They share and compete for the bus and main

memory

12

• Start-up sequence—where does the O/S come from and how is it loaded onto the machine?– Hardware switched on– Bootstrap program loaded (from ROM)– Bootstrap program initializes hardware (registers,

etc.)– Bootstrap program loads O/S from disk– Bootstrap program starts O/S running– O/S begins in the idle state

13

• Interrupts: How the O/S is put into action—how different capabilities of the O/S are triggered:– Hardware interrupts generated by attached

devices– Software interrupts generated by application

programs

14

• When an interrupt is received the machine instruction pointer is set to the initial address of the (O/S) handler code corresponding to the interrupt

• When the interrupt handling code finishes, the instruction pointer is reset to the address of the instruction following the last one executed before interrupt handling began

15

• Some systems use a stack-oriented architecture

• More commonly, system use a register-oriented architecture

• For the purposes of understanding interrupt handling and other processing, consider the registers on a chip such as the Intel 8088

16

• AX, BX, CX, DX: General purpose• SI, DI: Source and destination for string ops• SP, BP: Stack pointer (top), base pointer

(bottom of current stack frame)• IP: Instruction pointer or program counter• Flag register: Miscellaneous information• CS, DS, SS, ES: Segment registers for forming

addresses

17

Background on Memory

18

Memory and Interrupt Handling

19

• A more complete sequence of events for interrupt handling– O/S receives interrupt– Saves state for current process, including the

instruction pointer (IP)– The state for a process is saved in a process control

block (PCB)– The PCB is a data structure, or object, which

contains fields for every important piece of information about a running program

20

– The PCB added to waiting queue– The waiting queue is a linked structure (software)

maintained by the O/S– In other words, the waiting queue is a part of the

O/S internals– The instruction pointer may be specifically saved

in a fixed memory location or on the stack for ease of access

21

• After saving the state of the previous process, the O/S:– Looks up interrupt address in the interrupt vector

table (IVT)– Loads that address into the instruction pointer

register– Starts execution (of interrupt handling code)– When that code is finished, the O/S reloads the

previous IP value

22

• The Von Neumann execution cycle—how programs loaded in memory are executed in hardware– Fetch = retrieve the instruction at the address in the IP

register– Decode = put the instruction into the instruction register

and determine the operation and operands contained in it– Execute, possibly leading to various values in general

purpose and other registers– (Repeat)—the machine automatically increments the IP

unless there is a jump instruction, an interrupt occurs, the program comes to an end, etc.

23

How the O/S Accesses Main Memory

• Storage structure– Main memory = RAM– The only large storage area the processor can

address directly– Structured as an array of words– Access is on the basis of a linear sequence of word

addresses

24

• Memory management unit• This is specialized hardware on the CPU• Fast memory access needs hardware support

25

• The MMU works this way– One of the parameters needed for a memory load

instruction is the address of the desired word– This address is put into the memory address

register.– The other parameter needed is the register where

the retrieved memory will be put

26

– With these parameter set, execution of a LOAD instruction retrieves the value at the given memory address and puts it into the specified general purpose register

– Execution of a STORE instruction is analogous, taking the value from a general purpose register and storing it at the desired address

27

• More on memory management– Note that the function of the MMU doesn’t

depend on “what kind” of memory is being accessed

– The MMU simply sees addresses and loads and stores values

– A user program may issue instructions that use the (data) memory allocated to it

– The Von Neumann cycle also automatically accesses (code) memory allocated to a program

28

• In a perfect world, multiple programs and all of their code and data would reside in main memory.

• This is not practical for these reasons:– Main memory is too small– Main memory is volatile

• Other kinds of storage are needed in a general purpose machine.

29

A system storage hierarchy

• Registers• Cache• Main memory• Electronic disk (dividing line between

semiconductor and non-semiconductor tech—may or may not be volatile)

• Magnetic disk• Magnetic tapes, optical disks, etc.

30

• Parameters for comparison: Speed, cost, size, volatility

• From top to bottom: Fastest to slowest• From top to bottom: Most expensive to least

expensive• From top to bottom: Smallest to largest• From top to bottom: Volatile to persistent• Notice that the top is “best” only in speed.

31

I/O structure

• An example of simple I/O is communication with one-character at a time peripherals, like keyboards

• One interrupt per character• Device driver issues instructions to controller

by loading controller registers• Data is exchanged through O/S buffers in main

memory and device buffers on the controller

32

33

DMA, a more complex form of I/O

• Direct memory access = DMA• A more efficient model is needed for peripherals which

transfer large blocks of data, like disks• One interrupt per character would impose too much

overhead• In main memory a block is reserved• Registers on the controller are loaded with the block

addresses• One interrupt triggers the transfer of a whole block in

secondary storage to the reserved block in memory

34

35

1.3 Computer System Architecture

• Single processor systems– One general purpose CPU– Running a general purpose instruction set– Special purpose processors may exist in device

controllers, etc.

36

• Multi-processor systems– >1 processor (general purpose CPU)– Gives increased throughput– Economy of scale through sharing of resources– Increased reliability• Fault tolerance• Graceful degradation

37

• Multi-processor models• Asymmetric multi-processing—master-slave• Symmetric multi-processing (SMP)—peer-to-peer• Dual and multiple core systems (Intel and

analogous architectures) are examples of multi-processing

• Blade servers also• The O/S has to be written to run on/handle

multiple processors

38

• Clustered systems (Beowulf, for example)• Multiple, independent, general purpose

systems connected by LAN• In addition to the local O/S, this requires a

layer of system software to manage the collaboration between the individual systems

39

1.4 Operating-System Structure

• A large part of the purpose of the next few overheads is to distinguish between these terms:

• Multi-processing• Multi-programming• Multi-tasking• On tests, it will be necessary for you to use the

terminology the same way the book does.

40

• Multi-processing refers to a hardware architecture which contains more than one CPU

• Do not confuse this with multi-programming or multi-tasking

41

• Multi-programming = >1 job loaded in memory at a time (on a single processor system)

• When one job has to wait (typically for I/O) another can be scheduled to execute

• This maximizes utilization of system resources• It describes an efficient scheduling scheme for a

batch system• Note that this term does not imply interactivity. • Do not confuse it with multi-tasking

42

• Multi-tasking = interactive time-sharing• This is multi-programming where switching

between jobs is fast enough that user interactivity can be supported.

• Individual response times <1 second are reckoned good enough to satisfy most users

• User interactions are usually slow I/O operations (from keyboard for example)

43

• Multi-tasking involves scheduling algorithms• These algorithms may also support switching

between programs even if they haven’t reached an I/O wait

• The term “process” is used to describe a program that has been given a memory footprint (loaded into memory) that is running or ready to be run

• However, do not confuse multi-tasking with multi-processing (or multi-programming)

44

Running programs, a macro view

45

• As noted, the term for a runnable program is a process

• The business of deciding which program to run is known as process scheduling

• This is the question of which process in memory is in possession of the CPU

• You can also refer to this as switching between processes or jobs

46

• The business of moving programs back and forth between secondary storage and main memory (loading and storing them) is known as swapping.

• On tests, it will be necessary for you to use the terminology switching and swapping correctly.

47

• Scheduling is a large topic• A brief preview of some obvious requirements

for successful switching and swapping on a single processor system are given below.

48

• CPU—1 job at a time on CPU—no conflicts are possible if only one job at a time is allowed

• Moving between memory and CPU = switching• Memory— >1 job in memory at a time is allowed—

However, no conflicts allowed—memory allocation is inviolate

• Moving between secondary storage and memory = swapping

• Secondary storage— >1 job in storage at a time is allowed—However, no conflicts allowed—secondary storage allocation is inviolate

49

1.5 Operating-System Operations

• Terminology: Software interrupt = trap• Traps can be generated by application system

requests• They can also be generated when the

application causes an error• For example, division by zero• In the error case, the error has to be trapped

and handled so that it doesn’t cause a system crash or adversely affect other applications

50

The first line of hardware-O/S level protection of a system from non-system software

• Dual mode operation• Modern CPU’s contain a mode bit• 1 = user mode• 0 = kernel mode = supervisor mode = system mode =

privileged mode• The bit identifies whether the current process is a user

process or a system process• Put another way, the mode bit has to be set by the

system to indicate what kind of process is being scheduled

51

• The mode bit is a very basic security and protection mechanism

• The instruction set for a machine includes both general purpose and system instructions

• System instructions can only be executed in system mode

• If a user process attempts to execute a system instruction a trap is generated

52

• Example timeline of interrupts and modes• System startup, mode = 0• User request to run application, granted and

scheduled by O/S, mode = 1• User process makes a system call, granted and

scheduled by O/S, mode = 0• System returns from call and resumes user

process, mode = 1

53

• Examples of privileged instructions• The most basic: The instruction to change modes• The most common: I/O, file I/O. Every time a

user process issues an instruction to access memory or secondary storage, this generates a system request

• Only the system can actually do this, by means of privileged instructions (which affect the MMU, for example)

54

• Note that context switching, switching between processes, is a cooperation between the O/S and hardware

• The O/S does the scheduling and has an instruction to set the mode bit appropriately

• When a user process, for example, finishes executing, the machine default has to be to return control to the O/S, in system mode

55

The second line of hardware-O/S level protection of a system from non-system software

• The timer• The mode bit protects the system from rogue

processes in one way—shielding memory by forcing access through privileged instructions only, for example

• The timer protects the system in another way

56

• Suppose a user application intentionally or unintentionally contains an infinite loop

• When the O/S grants control to a user application, it sets a timer in hardware

• If the program doesn’t end on its own, the timer will generate an interrupt when it expires

• The interrupt returns control to the O/S, which can kill the offending user job or extend it

• Note that the timer instruction is privileged

57

1.6 Process Management

• A process is a program that has been loaded into memory and is ready to be scheduled

• The process concept can be thought of as the unit of work on a computer system

• Processes need system resources in order to run: CPU time, memory, files, I/O devices, etc.

58

• A complete system typically contains a collection of processes, some system processes and some user processes

• Process scheduling on a single processor system means switching back and forth between them concurrently.

• This is what is known as multi-programming or multi-tasking

59

• The O/S is responsible for these process management functions– Creating and deleting system and user processes– Suspending and resuming processes– Inter-process communication– Process synchronization and deadlock handling

60

1.7 Memory Management

• O/S responsibilities with respect to memory– Allocating and deallocating memory space as needed– Deciding which (parts of) processes should be moved

into and out of memory from secondary storage– Keeping track of which memory addresses are used

by what processes– In the most advanced implementation, virtual

memory, mapping a logical memory space to a physical space

61

1.8 Storage Management

• The O/S manages storage in a way that extends through three levels– User application level: Storage is viewed logically

as a set of files in directories– In memory, logical pages of data are mapped to

the addresses of physical frames on the chip– In secondary storage, the logical pages of user

data are mapped to the disk, platter, side, track, and sector or other characteristics of the physical medium

62

• O/S responsibilities with respect to storage– Creating and deleting files– Creating and deleting directories and organizing

files in them– Supporting additional commands such as move,

copy, change directory, for manipulating and navigating files and directories

– Backing up files on stable media

63

O/S management of storage

• What does the O/S do from the hardware point of view, as opposed to the user application point of view

• It allocates disk space• It manages the free space remaining• It schedules the disk—that is, when programs

issue file I/O commands, it is the O/S that handles the requests and coordinates between multiple requests

64

Caching

65

• Any storage hierarchy falls on a continuum of parameter values

• Cache stands between the CPU and main memory and mediates between them

• It has the ability to increase the performance of memory access, i.e., speed it up

• This depends on locality of reference and the ability to load a viable working set

• Performance is improved if the speed of the cache hits outweighs the cost of the cache misses

66

I/O systems

• The O/S hides device specific characteristics behind an interface

• The Unix I/O subsystem illustrates the idea• It has drivers for specific hardware devices, storage,

communication, etc.• It has a general device driver interface—”Everything is a

file”• It has a memory management component that includes

buffering, caching, and spooling to support one-character at a time or DMA transfer of I/O to and from memory

67

1.9 Protection and Security

• Already discussed: The mode bit and timer, interaction between hardware and O/S

• The O/S also supports logins and passwords• The O/S supports groups and group membership• The O/S supports the granting and revoking of

privileges• A question: How much of the security function

(e.g., anti-virus, etc.) should be built into the O/S and how much should be add-on?

68

1.10 Distributed Systems

• Network O/S = loosely coupled autonomous machines with network software linking them

• Distributed O/S = tightly coupled machines, not autonomous, presenting a monolithic interface

• The system software for both of these is beyond the scope of this course

69

1.11 Special-Purpose Systems

• This is just a statement of existence. • The operating system software for these is also

beyond the scope of this course– Real-time embedded systems– Multi-media systems– Handheld systems—constraints

• Memory size• Processor speed• I/O interface size (screen, keyboard)• Battery life

70

1.12 Computing Environments

• This topic is just another way of analyzing the world into a bulleted list– Traditional computing (understood to include

aspects of mainframe and PC O/S’s)– Client-server computing– Peer-to-peer computing– Web-based computing

• This course only covers “traditional computing” in a simple, general sense

71

The End