HCI/ComS 575X: Computational Perception Instructor: Alexander Stoytchev alexs.
CprE 281: Digital Logic - Iowa State...
Transcript of CprE 281: Digital Logic - Iowa State...
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Instructor: Alexander Stoytchev
http://www.ece.iastate.edu/~alexs/classes/
CprE 281: Digital Logic
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State Assignment Problem
CprE 281: Digital Logic Iowa State University, Ames, IA Copyright © Alexander Stoytchev
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Administrative Stuff • Homework 9 is due on Monday
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Administrative Stuff • Homework 10 is out
• It is due on Monday Nov 16 @ 4pm
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Quick Review
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Combinational circuit
Flip-flops
Clock
Q W
Z Combinational
circuit
The general form of a synchronous sequential circuit
[ Figure 6.1 from the textbook ]
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Combinational circuit
Flip-flops
Clock
Q W
Z Combinational
circuit
Moore Type
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Combinational circuit
Flip-flops
Clock
Q W
Z Combinational
circuit
Mealy Type
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Moore Machine • The machine’s current state and current inputs are
used to decide which next state to transition into.
• The machine’s current state decides the current output.
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Mealy Machine • The machine’s current state and current inputs are
used to decide which next state to transition into.
• The machine’s current state and current input values decide the current output.
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Example #1
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We need to find both the next state logic and the output logic implied by this machine.
C: z = 1
Reset
B: z = 0 A: z = 0 w 0 =
w 1 =
w 1 =
w 0 =
w 0 = w 1 =
[ Figure 6.3 from the textbook ]
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Present Next state Output state w = 0 w = 1 z
A B C
C: z = 1
Reset
B: z = 0 A: z = 0 w 0 =
w 1 =
w 1 =
w 0 =
w 0 = w 1 =
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Present Next state Output state w = 0 w = 1 z
A A B 0 B A C 0 C A C 1
C: z = 1
Reset
B: z = 0 A: z = 0 w 0 =
w 1 =
w 1 =
w 0 =
w 0 = w 1 =
[ Figure 6.4 from the textbook ]
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How to represent the States?
One way is to encode each state with a 2-bit binary number
A ~ 00 B ~ 01 C ~ 10
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How to represent the states?
One way is to encode each state with a 2-bit binary number
A ~ 00 B ~ 01 C ~ 10
How many flip-flops do we need?
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Let’s use two flip flops to hold the state machine’s state
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Clock
y 2
y 1 Y 1
Y 2
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Clock
y 2
y 1 Y 1
Y 2
We will call y1 and y2 the present state variables.
We will call Y1 and Y2 the next state variables. [ Figure 6.5 from the textbook ]
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Clock
y 2
y 1 Y 1
Y 2
Two zeros on the output JOINTLY represent state A.
0
0
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Clock
y 2
y 1 Y 1
Y 2
This flip-flop output pattern represents state B.
1
0
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Clock
y 2
y 1 Y 1
Y 2
This flip-flop output pattern represents state C.
0
1
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Clock
y 2
y 1 Y 1
Y 2
What does this flip-flop output pattern represent?
1
1
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Clock
y 2
y 1 Y 1
Y 2
This would be state D, but we don't have one in this example. So this is an impossible state.
1
1
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Next State Logic Output Logic
Clock
y 2
z
w y 1 Y 1
Y 2
We will call y1 and y2 the present state variables.
We will call Y1 and Y2 the next state variables. [ Figure 6.5 from the textbook ]
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Next State Logic Output Logic
Clock
y 2
z
w y 1 Y 1
Y 2
We will call y1 and y2 the present state variables.
We will call Y1 and Y2 the next state variables. [ Figure 6.5 from the textbook ]
Q(t) = y2y1 Q(t+1) = Y2Y1
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We need to find logic expressions for Y1(w, y1, y2), Y2(w, y1, y2), and z(y1, y2).
Next State Logic Output Logic
Clock
y 2
z
w y 1 Y 1
Y 2
[ Figure 6.5 from the textbook ]
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We need to find logic expressions for Y1(w, y1, y2), Y2(w, y1, y2), and z(y1, y2).
Next State Logic Output Logic
Clock
y 2
z
w y 1 Y 1
Y 2
[ Figure 6.5 from the textbook ]
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Present Next state Output state w = 0 w = 1 z
A A B 0 B A C 0 C A C 1
Suppose we encoded our states in the same order in which they were labeled:
A ~ 00 B ~ 01 C ~ 10
[ Figure 6.4 from the textbook ]
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Present Next state Output state w = 0 w = 1 z
A A B 0 B A C 0 C A C 1
Present Next state
state w = 0 w = 1 Output
z
A 00 B 01 C 10
11
The finite state machine will
never reach a state encoded as 11.
[ Figure 6.6 from the textbook ]
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Present Next state Output state w = 0 w = 1 z
A A B 0 B A C 0 C A C 1
Present Next state
state w = 0 w = 1 Output
y 1 Y 2 Y 1 Y 2 Y 1 z
A 00 00 01 0 B 01 00 10 0 C 10 00 10 1
11 dd dd d
2 y
We arbitrarily chose these as our state encodings. We could have
used others.
[ Figure 6.6 from the textbook ]
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Present Next state
state w = 0 w = 1 Output
y 1 Y 2 Y 1 Y 2 Y 1 z
00 00 01 0 01 00 10 0 10 00 10 1 11 dd dd d
2 y
w y2 y1 Y2 Y1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Q(t) = y2y1 and Q(t+1) = Y2Y1
y2 y1 z
0 0
0 1
1 0
1 1 [ Figure 6.6 from the textbook ]
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Present Next state
state w = 0 w = 1 Output
y 1 Y 2 Y 1 Y 2 Y 1 z
00 00 01 0 01 00 10 0 10 00 10 1 11 dd dd d
2 y
w y2 y1 Y2 Y1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Q(t) = y2y1 and Q(t+1) = Y2Y1
y2 y1 z
0 0 0
0 1 0
1 0 1
1 1 d [ Figure 6.6 from the textbook ]
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Present Next state
state w = 0 w = 1 Output
y 1 Y 2 Y 1 Y 2 Y 1 z
00 00 01 0 01 00 10 0 10 00 10 1 11 dd dd d
2 y
w y2 y1 Y2 Y1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Q(t) = y2y1 and Q(t+1) = Y2Y1
y2 y1 z
0 0 0
0 1 0
1 0 1
1 1 d [ Figure 6.6 from the textbook ]
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Present Next state
state w = 0 w = 1 Output
y 1 Y 2 Y 1 Y 2 Y 1 z
00 00 01 0 01 00 10 0 10 00 10 1 11 dd dd d
2 y
w y2 y1 Y2 Y1
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 d
1 0 0
1 0 1
1 1 0
1 1 1
Q(t) = y2y1 and Q(t+1) = Y2Y1
y2 y1 z
0 0 0
0 1 0
1 0 1
1 1 d [ Figure 6.6 from the textbook ]
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Present Next state
state w = 0 w = 1 Output
y 1 Y 2 Y 1 Y 2 Y 1 z
00 00 01 0 01 00 10 0 10 00 10 1 11 dd dd d
2 y
w y2 y1 Y2 Y1
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 d
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 d
Q(t) = y2y1 and Q(t+1) = Y2Y1
y2 y1 z
0 0 0
0 1 0
1 0 1
1 1 d [ Figure 6.6 from the textbook ]
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Present Next state
state w = 0 w = 1 Output
y 1 Y 2 Y 1 Y 2 Y 1 z
00 00 01 0 01 00 10 0 10 00 10 1 11 dd dd d
2 y
w y2 y1 Y2 Y1
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 d
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 d
Q(t) = y2y1 and Q(t+1) = Y2Y1
y2 y1 z
0 0 0
0 1 0
1 0 1
1 1 d [ Figure 6.6 from the textbook ]
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Present Next state
state w = 0 w = 1 Output
y 1 Y 2 Y 1 Y 2 Y 1 z
00 00 01 0 01 00 10 0 10 00 10 1 11 dd dd d
2 y
w y2 y1 Y2 Y1
0 0 0 0 0
0 0 1 0 0
0 1 0 0 0
0 1 1 d d
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 d
Q(t) = y2y1 and Q(t+1) = Y2Y1
y2 y1 z
0 0 0
0 1 0
1 0 1
1 1 d [ Figure 6.6 from the textbook ]
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Present Next state
state w = 0 w = 1 Output
y 1 Y 2 Y 1 Y 2 Y 1 z
00 00 01 0 01 00 10 0 10 00 10 1 11 dd dd d
2 y
w y2 y1 Y2 Y1
0 0 0 0 0
0 0 1 0 0
0 1 0 0 0
0 1 1 d d
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 d d
Q(t) = y2y1 and Q(t+1) = Y2Y1
y2 y1 z
0 0 0
0 1 0
1 0 1
1 1 d [ Figure 6.6 from the textbook ]
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Present Next state
state w = 0 w = 1 Output
y 1 Y 2 Y 1 Y 2 Y 1 z
00 00 01 0 01 00 10 0 10 00 10 1 11 dd dd d
2 y
w y2 y1 Y2 Y1
0 0 0 0 0
0 0 1 0 0
0 1 0 0 0
0 1 1 d d
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 d d
Q(t) = y2y1 and Q(t+1) = Y2Y1
y2 y1 z
0 0 0
0 1 0
1 0 1
1 1 d [ Figure 6.6 from the textbook ]
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w y2 y1 Y2 Y1
0 0 0 0 0
0 0 1 0 0
0 1 0 0 0
0 1 1 d d
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 d d
Q(t) = y2y1 and Q(t+1) = Y2Y1
y2 y1 z
0 0 0
0 1 0
1 0 1
1 1 d
w 00 01 11 10
0
1
0
1 0
y 2 y 1
w 00 01 11 10
0
1
0 d
1 d
y 2 y 1
d
d
0
0
0
0
0
0
1
0 1
0
1
0
d
y 1
0
1
y 2
Y 1
Y 2
z
Note that the textbook draws these K-Maps differently from all previous K-maps (the least significant bits index the columns, instead of the most significant bits).
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Y 1 wy 1 y 2 =
Y 2 wy 1 y 2 wy 1 y 2 + =
z y 1 y 2 =
Y 1 wy 1 y 2 =
Y 2 wy 1 wy 2 + =
z y 2 =
w y 1 y 2 + ( ) =
Ignoring don't cares Using don't cares
Don’t care conditions simplify the combinatorial logic
[ Figure 6.7 from the textbook ]
w 00 01 11 10
0
1
0
1 0
y 2 y 1
w 00 01 11 10
0
1
0 d
1 d
y 2 y 1
d
d
0
0
0
0
0
0
1
0 1
0
1
0
d
y 1
0
1
y 2
Y 1
Y 2
z
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[ Figure 6.8 from the textbook ]
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[ Figure 6.8 from the textbook ]
Y2= w (y1 + y2)
Y1= w y1 y2
z = y2
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Lastly, we add a reset signal, which
forces the machine back to
its start state, which is state 00
in this case.
[ Figure 6.8 from the textbook ]
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t 0 t 1 t 2 t 3 t 4 t 5 t 6 t 7 t 8 t 9 t 10 1 0
1
0
1 0
1
0
Clock
w
y 1
y 2
1
0 z
[ Figure 6.9 from the textbook ]
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Summary: Designing a Moore Machine
● Obtain the circuit specification.
● Derive a state diagram.
● Derive the state table.
● Decide on a state encoding.
● Encode the state table.
● Derive the output logic and next-state logic.
● Add a reset signal.
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An Alternative State Encoding For Example #1
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A Better State Encoding
Present Next state Output state w = 0 w = 1 z
A A B 0 B A C 0 C A C 1
Suppose we encoded our states another way:
A ~ 00 B ~ 01 C ~ 11
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Clock
y 2
y 1 Y 1
Y 2
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Clock
y 2
y 1 Y 1
Y 2
We will call y1 and y2 the present state variables.
We will call Y1 and Y2 the next state variables. [ Figure 6.5 from the textbook ]
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Clock
y 2
y 1 Y 1
Y 2
Two zeros on the output JOINTLY represent state A.
0
0
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Clock
y 2
y 1 Y 1
Y 2
This flip-flop output pattern represents state B.
1
0
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Clock
y 2
y 1 Y 1
Y 2
This flip-flop output pattern represents state C.
1
1
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Clock
y 2
y 1 Y 1
Y 2
What does this flip-flop output pattern represent?
0
1
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Clock
y 2
y 1 Y 1
Y 2
This would be state D, but we don't have one in this example. So this is an impossible state.
0
1
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A Better State Encoding
Present Next state Output state w = 0 w = 1 z
A A B 0 B A C 0 C A C 1
Suppose we encoded our states another way:
A ~ 00 B ~ 01 C ~ 11
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Present Next state Output state w = 0 w = 1 z
A A B 0 B A C 0 C A C 1
Present Next state
state w = 0 w = 1 Output z
A ~ 00 B ~ 01 C ~ 11
A Better State Encoding
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Present Next state Output state w = 0 w = 1 z
A A B 0 B A C 0 C A C 1
Present Next state
state w = 0 w = 1 Output
y 2 y 1 Y 2 Y 1 Y 2 Y 1 z
A 00 00 01 0 B 01 00 11 0 C 11 00 11 1
10 dd dd d
A Better State Encoding
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Let's Derive the Logic Expressions
Present Next state
state w = 0 w = 1 Output
y 2 y 1 Y 2 Y 1 Y 2 Y 1 z
A 00 00 01 0 B 01 00 11 0 C 11 00 11 1
10 dd dd d
[ Figure 6.16 from the textbook ]
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Present Next state
state w = 0 w = 1 Output
y 2 y 1 Y 2 Y 1 Y 2 Y 1 z
A 00 00 01 0 B 01 00 11 0 C 11 00 11 1
10 dd dd d
0 1
0
1
y 1
y 2
z
w 00 01 11 10
0
1
y 2 y 1
Y2 Y1
w 00 01 11 10
0
1
y 2 y 1
Let's Derive the Logic Expressions
Warning: This table does not
enumerate y2y1, in the standard way, so be careful when filling
out the K-Map.
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Present Next state
state w = 0 w = 1 Output
y 2 y 1 Y 2 Y 1 Y 2 Y 1 z
A 00 00 01 0 B 01 00 11 0 C 11 00 11 1
10 dd dd d
w 00 01 11 10
0
1
0 0
1 1
y 2 y 1
0
0
d
Y2 Y1
0 1
0
1
0
1
y 1
0
d
y 2
z
d
Y2(w, y2, y1) = wy1 Y1(w, y2, y1) = w z(y2, y1) = y2
w 00 01 11 10
0
1
0
1 1
y 2 y 1
0
1
d
d
0
Let's Derive the Logic Expressions
Warning: This table does not
enumerate y2y1, in the standard way, so be careful when filling
out the K-Map.
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w 00 01 11 10
0
1
0
1 0
y 2 y 1
d
d
0
0
0
Y 1
w 00 01 11 10
0
1
0 d
1 d
y 2 y 1
0
0
0
1
Y 2
0 1
0
1
0
d
y 1
0
1
y 2
z
Original State Encodings
New State Encodings
w 00 01 11 10
0
1
0 0
1 1
y 2 y 1
0
0
d
Y2
d
Y1
w 00 01 11 10
0
1
0
1 1
y 2 y 1
0
1
d
d
0
0 1
0
1
0
1
y 1
0
d
y 2
z
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D Q
Q
D Q
Q
Y 2
Y 1 w
Clock
z
y 1
y 2
Resetn
The New and Improved Circuit Diagram
Y1(w, y2, y1) = w
Y2(w, y2, y1) = wy1
z(y2, y1) = y2
[ Figure 6.17 from the textbook ]
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Main Idea
Different state assignments of the same Moore machine generally lead to different circuits.
Some may be better than others.
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Example #2
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[ Figure 6.10 from the textbook ]
Register Swap Controller
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[ Figure 6.10 from the textbook ]
Register Swap Controller
Design a Moore machine control circuit for swapping the contents of registers R1 and R2 by using R3 as a temporary.
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D: R 3 out 1 = R 1 in 1 = Done 1 = , ,
w 0 = w 1 =
C: R 1 out 1 = R 2 in 1 = ,
B: R 2 out 1 = R 3 in 1 = ,
w 1 =
A: No Transfer
w 0 = w 1 =
w 0 = w 1 =
Reset
w 0 =
If an output is not given, then assume
that it is 0.
[ Figure 6.11 from the textbook ]
State Diagram
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Animated Register Swap
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Animated Register Swap
0xFF
0x42
0xC9
These are the original values of the 8-bit registers
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Animated Register Swap
0xFF
0x42
0xC9
1
For clarity, only inputs that are equal to 1 will be shown.
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Animated Register Swap
0xFF
0x42
0xC9
1
1
1
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Animated Register Swap
0xFF
0x42
0xC9
1
1
1
0x42
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Animated Register Swap
0xFF
0x42
0x42
1
1
1
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Animated Register Swap
0xFF
0x42
0x42
1
1
1
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Animated Register Swap
0xFF
0x42
0x42
1
1
1
0xFF
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Animated Register Swap
0xFF
0xFF
0x42
1
1
1
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Animated Register Swap
0xFF
0xFF
0x42
1
1
1
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Animated Register Swap
0xFF
0xFF
0x42
1
1
1
0x42
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Animated Register Swap
0x42
0xFF
0x42
1
1
1
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Animated Register Swap
0x42
0xFF
0x42
1
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D: R 3 out 1 = R 1 in 1 = Done 1 = , ,
w 0 = w 1 =
C: R 1 out 1 = R 2 in 1 = ,
B: R 2 out 1 = R 3 in 1 = ,
w 1 =
A: No Transfer
w 0 = w 1 =
w 0 = w 1 =
Reset
w 0 =
If an output is not given, then assume
that it is 0.
[ Figure 6.11 from the textbook ]
State Diagram
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Some Questions
• How many flip-flops are we going to use?
• How many logic expressions do we need to find?
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D: R 3 out 1 = R 1 in 1 = Done 1 = , ,
w 0 = w 1 =
C: R 1 out 1 = R 2 in 1 = ,
B: R 2 out 1 = R 3 in 1 = ,
w 1 =
A: No Transfer
w 0 = w 1 =
w 0 = w 1 =
Reset
w 0 =
Flip-Flop Array
Clock
W Next State Logic
Q(t) Q(t+1) Output Logic Z
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D: R 3 out 1 = R 1 in 1 = Done 1 = , ,
w 0 = w 1 =
C: R 1 out 1 = R 2 in 1 = ,
B: R 2 out 1 = R 3 in 1 = ,
w 1 =
A: No Transfer
w 0 = w 1 =
w 0 = w 1 =
Reset
w 0 =
Flip-Flop Array
Clock
w Next State Logic
y[1:2] Y[1:2] Output Logic R1out
R1in
R3in
R2out
R2in
R3out
Done
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Present Next state Outputs state
A B C D
w = 0 w = 1 R1out R1in R2out R2in R3out R3in Done
D: R 3 out 1 = R 1 in 1 = Done 1 = , ,
w 0 = w 1 =
C: R 1 out 1 = R 2 in 1 = ,
B: R 2 out 1 = R 3 in 1 = ,
w 1 =
A: No Transfer
w 0 = w 1 =
w 0 = w 1 =
Reset
w 0 =
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D: R 3 out 1 = R 1 in 1 = Done 1 = , ,
w 0 = w 1 =
C: R 1 out 1 = R 2 in 1 = ,
B: R 2 out 1 = R 3 in 1 = ,
w 1 =
A: No Transfer
w 0 = w 1 =
w 0 = w 1 =
Reset
w 0 =
Present Next state Outputs state
A A B 0 0 0 0 0 0 0 B C C 0 0 1 0 0 1 0 C D D 1 0 0 1 0 0 0 D A A 0 1 0 0 1 0 1
w = 0 w = 1 R1out R1in R2out R2in R3out R3in Done
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As we saw before, we can expect that some state encodings will be better than others.
We will consider three encoding schemes.
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Encoding #1: A=00, B=01, C=10, D=11
(Uses Two Flip-Flops)
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 10 1 0 0 0 1 0 0 1 0 C 10 11 1 1 1 0 0 1 0 0 0 D 11 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
Present Next state Outputs state
A A B 0 0 0 0 0 0 0 B C C 0 0 1 0 0 1 0 C D D 1 0 0 1 0 0 0 D A A 0 1 0 0 1 0 1
w = 0 w = 1 R1out R1in R2out R2in R3out R3in Done
State Table
[ Figure 6.12 & 6.13 from the textbook ]
State-Assigned Table
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 10 1 0 0 0 1 0 0 1 0 C 10 11 1 1 1 0 0 1 0 0 0 D 11 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
Present Next state Outputs state
A A B 0 0 0 0 0 0 0 B C C 0 0 1 0 0 1 0 C D D 1 0 0 1 0 0 0 D A A 0 1 0 0 1 0 1
w = 0 w = 1 R1out R1in R2out R2in R3out R3in Done
State Table
[ Figure 6.12 & 6.13 from the textbook ]
State Assigned Table
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 10 1 0 0 0 1 0 0 1 0 C 10 11 1 1 1 0 0 1 0 0 0 D 11 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
Present Next state Outputs state
A A B 0 0 0 0 0 0 0 B C C 0 0 1 0 0 1 0 C D D 1 0 0 1 0 0 0 D A A 0 1 0 0 1 0 1
w = 0 w = 1 R1out R1in R2out R2in R3out R3in Done
State Table
[ Figure 6.12 & 6.13 from the textbook ]
State Assigned Table
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 10 1 0 0 0 1 0 0 1 0 C 10 11 1 1 1 0 0 1 0 0 0 D 11 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
Present Next state Outputs state
A A B 0 0 0 0 0 0 0 B C C 0 0 1 0 0 1 0 C D D 1 0 0 1 0 0 0 D A A 0 1 0 0 1 0 1
w = 0 w = 1 R1out R1in R2out R2in R3out R3in Done
State Table
[ Figure 6.12 & 6.13 from the textbook ]
State Assigned Table
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 10 1 0 0 0 1 0 0 1 0 C 10 11 1 1 1 0 0 1 0 0 0 D 11 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
y2 y1 w Y2 Y1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Let's derive the next-state expressions
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 10 1 0 0 0 1 0 0 1 0 C 10 11 1 1 1 0 0 1 0 0 0 D 11 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
y2 y1 w Y2 Y1
0 0 0 0 0
0 0 1 0 1
0 1 0 1 0
0 1 1 1 0
1 0 0 1 1
1 0 1 1 1
1 1 0 0 0
1 1 1 0 0
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 10 1 0 0 0 1 0 0 1 0 C 10 11 1 1 1 0 0 1 0 0 0 D 11 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
y2 y1 w Y2 Y1
0 0 0 0 0
0 0 1 0 1
0 1 0 1 0
0 1 1 1 0
1 0 0 1 1
1 0 1 1 1
1 1 0 0 0
1 1 1 0 0
w 00 01 11 10
0
1
y 2 y 1 Y 1
w 00 01 11 10
0
1
y 2 y 1 Y 2
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 10 1 0 0 0 1 0 0 1 0 C 10 11 1 1 1 0 0 1 0 0 0 D 11 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
y2 y1 w Y2 Y1
0 0 0 0 0
0 0 1 0 1
0 1 0 1 0
0 1 1 1 0
1 0 0 1 1
1 0 1 1 1
1 1 0 0 0
1 1 1 0 0
w 00 01 11 10
0
1
y 2 y 1 Y 1
0 0 0 1
1 0 0 1
w 00 01 11 10
0
1
y 2 y 1 Y 2
0 1 0 1
0 1 0 1
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 10 1 0 0 0 1 0 0 1 0 C 10 11 1 1 1 0 0 1 0 0 0 D 11 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
y2 y1 w Y2 Y1
0 0 0 0 0
0 0 1 0 1
0 1 0 1 0
0 1 1 1 0
1 0 0 1 1
1 0 1 1 1
1 1 0 0 0
1 1 1 0 0
w 00 01 11 10
0
1
y 2 y 1 Y 1
0 0 0 1
1 0 0 1
w 00 01 11 10
0
1
y 2 y 1 Y 2
0 1 0 1
0 1 0 1
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 10 1 0 0 0 1 0 0 1 0 C 10 11 1 1 1 0 0 1 0 0 0 D 11 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
y2 y1 w Y2 Y1
0 0 0 0 0
0 0 1 0 1
0 1 0 1 0
0 1 1 1 0
1 0 0 1 1
1 0 1 1 1
1 1 0 0 0
1 1 1 0 0
w 00 01 11 10
0
1
y 2 y 1 Y 1
0 0 0 1
1 0 0 1
w 00 01 11 10
0
1
y 2 y 1 Y 2
0 1 0 1
0 1 0 1
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 10 1 0 0 0 1 0 0 1 0 C 10 11 1 1 1 0 0 1 0 0 0 D 11 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
y2 y1 R1out R1in R2out
0 0
0 1
1 0
1 1
Let's derive the output expressions
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 10 1 0 0 0 1 0 0 1 0 C 10 11 1 1 1 0 0 1 0 0 0 D 11 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
y2 y1 R1out R1in R2out
0 0
0 1
1 0
1 1
Let's derive the output expressions We need to derive only these 3 unique ones
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 10 1 0 0 0 1 0 0 1 0 C 10 11 1 1 1 0 0 1 0 0 0 D 11 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
y2 y1 R1out R1in R2out
0 0 0 0 0
0 1 0 0 1
1 0 1 0 0
1 1 0 1 0
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 10 1 0 0 0 1 0 0 1 0 C 10 11 1 1 1 0 0 1 0 0 0 D 11 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
y2 y1 R1out R1in R2out
0 0 0 0 0
0 1 0 0 1
1 0 1 0 0
1 1 0 1 0
R1in = R3out = Done = y1 y2
R1out = R2in = y1 y2
R2out = R3in = y1 y2
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 10 1 0 0 0 1 0 0 1 0 C 10 11 1 1 1 0 0 1 0 0 0 D 11 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 10 1 0 0 0 1 0 0 1 0 C 10 11 1 1 1 0 0 1 0 0 0 D 11 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
y1 y2
y1 y2
y1 y2
![Page 107: CprE 281: Digital Logic - Iowa State Universityhome.engineering.iastate.edu/~alexs/classes/2015_Fall...Moore Machine • The machine’s current state and current inputs are used to](https://reader033.fdocuments.net/reader033/viewer/2022050302/5f6b374df23f7f30a35f19c7/html5/thumbnails/107.jpg)
Encoding #2: A=00, B=01, C=11, D=10
(Also Uses Two Flip-Flops)
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 11 1 1 0 0 1 0 0 1 0 C 11 10 1 0 1 0 0 1 0 0 0 D 10 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
Present Next state Outputs state
A A B 0 0 0 0 0 0 0 B C C 0 0 1 0 0 1 0 C D D 1 0 0 1 0 0 0 D A A 0 1 0 0 1 0 1
w = 0 w = 1 R1out R1in R2out R2in R3out R3in Done
State Table (same as before)
State-Assigned Table
[ Figure 6.12 & 6.18 from the textbook ]
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 11 1 1 0 0 1 0 0 1 0 C 11 10 1 0 1 0 0 1 0 0 0 D 10 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
Present Next state Outputs state
A A B 0 0 0 0 0 0 0 B C C 0 0 1 0 0 1 0 C D D 1 0 0 1 0 0 0 D A A 0 1 0 0 1 0 1
w = 0 w = 1 R1out R1in R2out R2in R3out R3in Done
State Table (same as before)
State-Assigned Table
[ Figure 6.12 & 6.18 from the textbook ]
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 11 1 1 0 0 1 0 0 1 0 C 11 10 1 0 1 0 0 1 0 0 0 D 10 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
Present Next state Outputs state
A A B 0 0 0 0 0 0 0 B C C 0 0 1 0 0 1 0 C D D 1 0 0 1 0 0 0 D A A 0 1 0 0 1 0 1
w = 0 w = 1 R1out R1in R2out R2in R3out R3in Done
State Table (same as before)
State-Assigned Table
[ Figure 6.12 & 6.18 from the textbook ]
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 11 1 1 0 0 1 0 0 1 0 C 11 10 1 0 1 0 0 1 0 0 0 D 10 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
Present Next state Outputs state
A A B 0 0 0 0 0 0 0 B C C 0 0 1 0 0 1 0 C D D 1 0 0 1 0 0 0 D A A 0 1 0 0 1 0 1
w = 0 w = 1 R1out R1in R2out R2in R3out R3in Done
State Table (same as before)
State-Assigned Table
[ Figure 6.12 & 6.18 from the textbook ]
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y2 y1 w Y2 Y1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 11 1 1 0 0 1 0 0 1 0 C 11 10 1 0 1 0 0 1 0 0 0 D 10 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
Let's derive the next-state expressions
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y2 y1 w Y2 Y1
0 0 0 0 0
0 0 1 0 1
0 1 0 1 1
0 1 1 1 1
1 0 0 0 0
1 0 1 0 0
1 1 0 1 0
1 1 1 1 0
R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 11 1 1 0 0 1 0 0 1 0 C 11 10 1 0 1 0 0 1 0 0 0 D 10 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
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y2 y1 w Y2 Y1
0 0 0 0 0
0 0 1 0 1
0 1 0 1 1
0 1 1 1 1
1 0 0 0 0
1 0 1 0 0
1 1 0 1 0
1 1 1 1 0
w 00 01 11 10
0
1
y 2 y 1 Y 1
w 00 01 11 10
0
1
y 2 y 1 Y 2
R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 11 1 1 0 0 1 0 0 1 0 C 11 10 1 0 1 0 0 1 0 0 0 D 10 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
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y2 y1 w Y2 Y1
0 0 0 0 0
0 0 1 0 1
0 1 0 1 1
0 1 1 1 1
1 0 0 0 0
1 0 1 0 0
1 1 0 1 0
1 1 1 1 0
w 00 01 11 10
0
1
y 2 y 1 Y 1
0 1 0 0
1 1 0 0
w 00 01 11 10
0
1
y 2 y 1 Y 2
0 1 1 0
0 1 1 0
R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 11 1 1 0 0 1 0 0 1 0 C 11 10 1 0 1 0 0 1 0 0 0 D 10 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
![Page 116: CprE 281: Digital Logic - Iowa State Universityhome.engineering.iastate.edu/~alexs/classes/2015_Fall...Moore Machine • The machine’s current state and current inputs are used to](https://reader033.fdocuments.net/reader033/viewer/2022050302/5f6b374df23f7f30a35f19c7/html5/thumbnails/116.jpg)
y2 y1 w Y2 Y1
0 0 0 0 0
0 0 1 0 1
0 1 0 1 1
0 1 1 1 1
1 0 0 0 0
1 0 1 0 0
1 1 0 1 0
1 1 1 1 0
w 00 01 11 10
0
1
y 2 y 1 Y 1
0 1 0 0
1 1 0 0
w 00 01 11 10
0
1
y 2 y 1 Y 2
0 1 1 0
0 1 1 0
R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 11 1 1 0 0 1 0 0 1 0 C 11 10 1 0 1 0 0 1 0 0 0 D 10 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
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y2 y1 w Y2 Y1
0 0 0 0 0
0 0 1 0 1
0 1 0 1 1
0 1 1 1 1
1 0 0 0 0
1 0 1 0 0
1 1 0 1 0
1 1 1 1 0
w 00 01 11 10
0
1
y 2 y 1 Y 1
0 1 0 0
1 1 0 0
w 00 01 11 10
0
1
y 2 y 1 Y 2
0 1 1 0
0 1 1 0
R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 11 1 1 0 0 1 0 0 1 0 C 11 10 1 0 1 0 0 1 0 0 0 D 10 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
Y 1 wy 2 y 1 y 2 + =
Y 2 y 1 =
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 11 1 1 0 0 1 0 0 1 0 C 11 10 1 0 1 0 0 1 0 0 0 D 10 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
y2 y1 R1out R1in R2out
0 0
0 1
1 0
1 1
Let's derive the output expressions
![Page 119: CprE 281: Digital Logic - Iowa State Universityhome.engineering.iastate.edu/~alexs/classes/2015_Fall...Moore Machine • The machine’s current state and current inputs are used to](https://reader033.fdocuments.net/reader033/viewer/2022050302/5f6b374df23f7f30a35f19c7/html5/thumbnails/119.jpg)
R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 11 1 1 0 0 1 0 0 1 0 C 11 10 1 0 1 0 0 1 0 0 0 D 10 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
y2 y1 R1out R1in R2out
0 0
0 1
1 0
1 1
Let's derive the output expressions Once again, we only need to derive these three unique ones.
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 11 1 1 0 0 1 0 0 1 0 C 11 10 1 0 1 0 0 1 0 0 0 D 10 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
y2 y1 R1out R1in R2out
0 0 0
0 1 0
1 0 0
1 1 1 C
D
Note that C and D are swapped in the truth table due to the new state encoding that was chosen.
A
B
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 11 1 1 0 0 1 0 0 1 0 C 11 10 1 0 1 0 0 1 0 0 0 D 10 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
y2 y1 R1out R1in R2out
0 0 0 0 0
0 1 0 0 1
1 0 0 1 0
1 1 1 0 0 C
D
A
B
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R1out R1in R2out R2in R3out R3in Done
w = 0 w = 1
Present Next state state Outputs
A 00 00 0 1 0 0 0 0 0 0 0 B 01 11 1 1 0 0 1 0 0 1 0 C 11 10 1 0 1 0 0 1 0 0 0 D 10 00 0 0 0 1 0 0 1 0 1
Y2Y1 Y2Y1 y2y1
y2 y1 R1out R1in R2out
0 0 0 0 0
0 1 0 0 1
1 0 0 1 0
1 1 1 0 0 C
D
A
B
R1out = R2in = y1 y2
R2out = R3in = y1 y2
R1in = R3out = Done = y1 y2
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Let's Complete the Circuit Diagram
R1out = R2in = y1 y2
R2out = R3in = y1 y2
R1in = R3out = Done = y1 y2 Y 1 wy 2 y 1 y 2 + =
Y 2 y 1 =
D Q
Q
D Q
Q
Y 2
Y 1 w
Clock
y 1
y 2
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Encoding #3: A=0001, B=0010, C=0100, D=1000
(One-Hot Encoding – Uses Four Flip-Flops)
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One-Hot State Encoding
• So far, we have been encoding states in a way that minimizes the number of flip-flops.
• But sometimes we can decrease the complexity of our logic if we encode states more sparsely.
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Encoding for State A
D Q
Q
D Q
Q
Y 2
Y 1 w
Clock
y 1
y 2
D Q
Q
Y 3 y 3
D Q
Q
Y 4 y 4
1
0
0
0
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Encoding for State B
D Q
Q
D Q
Q
Y 2
Y 1 w
Clock
y 1
y 2
D Q
Q
Y 3 y 3
D Q
Q
Y 4 y 4
0
1
0
0
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Encoding for State C
D Q
Q
D Q
Q
Y 2
Y 1 w
Clock
y 1
y 2
D Q
Q
Y 3 y 3
D Q
Q
Y 4 y 4
0
0
1
0
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Encoding for State D
D Q
Q
D Q
Q
Y 2
Y 1 w
Clock
y 1
y 2
D Q
Q
Y 3 y 3
D Q
Q
Y 4 y 4
0
0
0
1
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Present Next state Outputs state
A A B 0 0 0 0 0 0 0 B C C 0 0 1 0 0 1 0 C D D 1 0 0 1 0 0 0 D A A 0 1 0 0 1 0 1
w = 0 w = 1 R1out R1in R2out R2in R3out R3in Done
Register Swap Controller
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Present Next state Outputs state
A A B 0 0 0 0 0 0 0 B C C 0 0 1 0 0 1 0 C D D 1 0 0 1 0 0 0 D A A 0 1 0 0 1 0 1
w = 0 w = 1 R1out R1in R2out R2in R3out R3in Done
Let’s use four flip-flops and the following one-hot state encoding scheme:
A = 0001 B = 0010 C = 0100 D = 1000
Register Swap Controller
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Present Next state Outputs state
A A B 0 0 0 0 0 0 0 B C C 0 0 1 0 0 1 0 C D D 1 0 0 1 0 0 0 D A A 0 1 0 0 1 0 1
w = 0 w = 1 R1out R1in R2out R2in R3out R3in Done
State Table (same as before)
State-Assigned Table
[ Figure 6.12 & 6.21 from the textbook ]
Present Next State State Outputs
A 0 001 0001 0010 0 0 0 0 0 0 0 B 0 010 0100 0100 0 0 1 0 0 1 0 C 0 100 1000 1000 1 0 0 1 0 0 0 D 1 000 0001 0001 0 1 0 0 1 0 1
w = 0 w = 1
R1out R1in R2out R2in R3out R3in Done y4y3y2y1 Y4Y3Y2Y1 Y4Y3Y2Y1
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Present Next state Outputs state
A A B 0 0 0 0 0 0 0 B C C 0 0 1 0 0 1 0 C D D 1 0 0 1 0 0 0 D A A 0 1 0 0 1 0 1
w = 0 w = 1 R1out R1in R2out R2in R3out R3in Done
State Table (same as before)
State-Assigned Table
[ Figure 6.12 & 6.21 from the textbook ]
Present Next State State Outputs
A 0 001 0001 0010 0 0 0 0 0 0 0 B 0 010 0100 0100 0 0 1 0 0 1 0 C 0 100 1000 1000 1 0 0 1 0 0 0 D 1 000 0001 0001 0 1 0 0 1 0 1
w = 0 w = 1
R1out R1in R2out R2in R3out R3in Done y4y3y2y1 Y4Y3Y2Y1 Y4Y3Y2Y1
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Present Next state Outputs state
A A B 0 0 0 0 0 0 0 B C C 0 0 1 0 0 1 0 C D D 1 0 0 1 0 0 0 D A A 0 1 0 0 1 0 1
w = 0 w = 1 R1out R1in R2out R2in R3out R3in Done
State Table (same as before)
State-Assigned Table
[ Figure 6.12 & 6.21 from the textbook ]
Present Next State State Outputs
A 0 001 0001 0010 0 0 0 0 0 0 0 B 0 010 0100 0100 0 0 1 0 0 1 0 C 0 100 1000 1000 1 0 0 1 0 0 0 D 1 000 0001 0001 0 1 0 0 1 0 1
w = 0 w = 1
R1out R1in R2out R2in R3out R3in Done y4y3y2y1 Y4Y3Y2Y1 Y4Y3Y2Y1
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Present Next state Outputs state
A A B 0 0 0 0 0 0 0 B C C 0 0 1 0 0 1 0 C D D 1 0 0 1 0 0 0 D A A 0 1 0 0 1 0 1
w = 0 w = 1 R1out R1in R2out R2in R3out R3in Done
State Table (same as before)
State-Assigned Table
[ Figure 6.12 & 6.21 from the textbook ]
Present Next State State Outputs
A 0 001 0001 0010 0 0 0 0 0 0 0 B 0 010 0100 0100 0 0 1 0 0 1 0 C 0 100 1000 1000 1 0 0 1 0 0 0 D 1 000 0001 0001 0 1 0 0 1 0 1
w = 0 w = 1
R1out R1in R2out R2in R3out R3in Done y4y3y2y1 Y4Y3Y2Y1 Y4Y3Y2Y1
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Present Next State State Outputs
A 0 001 0001 0010 0 0 0 0 0 0 0 B 0 010 0100 0100 0 0 1 0 0 1 0 C 0 100 1000 1000 1 0 0 1 0 0 0 D 1 000 0001 0001 0 1 0 0 1 0 1
w = 0 w = 1
R1out R1in R2out R2in R3out R3in Done y4y3y2y1 Y4Y3Y2Y1 Y4Y3Y2Y1
Let's Derive the Next-State Expressions
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Present Next State State Outputs
A 0 001 0001 0010 0 0 0 0 0 0 0 B 0 010 0100 0100 0 0 1 0 0 1 0 C 0 100 1000 1000 1 0 0 1 0 0 0 D 1 000 0001 0001 0 1 0 0 1 0 1
w = 0 w = 1
R1out R1in R2out R2in R3out R3in Done y4y3y2y1 Y4Y3Y2Y1 Y4Y3Y2Y1
Let's Derive the Next-State Expressions
We need to do four 5-variable K-maps!
Y1(w, y4, y3, y2, y1) Y2(w, y4, y3, y2, y1) Y3(w, y4, y3, y2, y1) Y4(w, y4, y3, y2, y1)
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Present Next State State Outputs
A 0 001 0001 0010 0 0 0 0 0 0 0 B 0 010 0100 0100 0 0 1 0 0 1 0 C 0 100 1000 1000 1 0 0 1 0 0 0 D 1 000 0001 0001 0 1 0 0 1 0 1
w = 0 w = 1
R1out R1in R2out R2in R3out R3in Done y4y3y2y1 Y4Y3Y2Y1 Y4Y3Y2Y1
Y1(w, y4, y3, y2, y1) = wy1 + y4 Y2(w, y4, y3, y2, y1) = wy1 Y3(w, y4, y3, y2, y1) = y2 Y4(w, y4, y3, y2, y1) = y3
Let's Derive the Next-State Expressions
Or we can be smarter than that J
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Present Next State State Outputs
A 0 001 0001 0010 0 0 0 0 0 0 0 B 0 010 0100 0100 0 0 1 0 0 1 0 C 0 100 1000 1000 1 0 0 1 0 0 0 D 1 000 0001 0001 0 1 0 0 1 0 1
w = 0 w = 1
R1out R1in R2out R2in R3out R3in Done y4y3y2y1 Y4Y3Y2Y1 Y4Y3Y2Y1
Let's Derive the Output Expressions
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Present Next State State Outputs
A 0 001 0001 0010 0 0 0 0 0 0 0 B 0 010 0100 0100 0 0 1 0 0 1 0 C 0 100 1000 1000 1 0 0 1 0 0 0 D 1 000 0001 0001 0 1 0 0 1 0 1
w = 0 w = 1
R1out R1in R2out R2in R3out R3in Done y4y3y2y1 Y4Y3Y2Y1 Y4Y3Y2Y1
Let's Derive the Output Expressions
We need to do seven 4-variable K-maps!
R1out(y4, y3, y2, y1) R1in (y4, y3, y2, y1) R2out(y4, y3, y2, y1) R2in (y4, y3, y2, y1) R3out(y4, y3, y2, y1) R3in (y4, y3, y2, y1) Done(y4, y3, y2, y1)
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Present Next State State Outputs
A 0 001 0001 0010 0 0 0 0 0 0 0 B 0 010 0100 0100 0 0 1 0 0 1 0 C 0 100 1000 1000 1 0 0 1 0 0 0 D 1 000 0001 0001 0 1 0 0 1 0 1
w = 0 w = 1
R1out R1in R2out R2in R3out R3in Done y4y3y2y1 Y4Y3Y2Y1 Y4Y3Y2Y1
Let's Derive the Output Expressions
Or we can be smarter than that by exploiting the one-hot property
R1out(y4, y3, y2, y1) = y3 R1in (y4, y3, y2, y1) = y4 R2out(y4, y3, y2, y1) = y2 R2in (y4, y3, y2, y1) = y3 R3out(y4, y3, y2, y1) = y4 R3in (y4, y3, y2, y1) = y2 Done(y4, y3, y2, y1) = y4
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Let's Complete the Circuit Diagram R1out = R2in = y3
R2out = R3in = y2
R1in = R3out = Done = y4
Y2 = w y1
Y3 = y2
Y4 = y3
Y1 = w y1 + y4
D Q
Q
D Q
Q
Y 2
Y 1 w
Clock
y 1
y 2
D Q
Q
Y 3 y 3
D Q
Q
Y 4 y 4
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Questions?
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THE END