CPCI FPGAwiki.netfpga.org/NetFPGA_PCB_r3.pdf · 5 5 4 4 3 3 2 2 1 1 d d c c b b a a net fpga board...
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5 5 4 4 3 3 2 2 1 1 D D C C B B A A CPCI_M0 CPCI_M1 CPCI_CFG_CS_B CPCI_CFG_RDWR_B CPCI_LED RP_CLK_T CPCI_M2 VDD25 VDD25 VDD25 VDD25 VDD25 VDD25 RESET_N 13 PCLK 13 IDSEL 13 GNT_N 13 CBE_IO_0 13 CBE_IO_1 13 CBE_IO_2 13 CBE_IO_3 13 AD_IO_8 13 AD_IO_9 13 AD_IO_10 13 AD_IO_11 13 AD_IO_12 13 AD_IO_13 13 AD_IO_14 13 AD_IO_15 13 AD_IO_16 13 AD_IO_17 13 AD_IO_18 13 AD_IO_19 13 AD_IO_20 13 AD_IO_21 13 AD_IO_22 13 AD_IO_23 13 AD_IO_24 13 AD_IO_25 13 AD_IO_26 13 AD_IO_27 13 AD_IO_28 13 AD_IO_29 13 AD_IO_30 13 AD_IO_31 13 AD_IO_0 13 AD_IO_1 13 AD_IO_2 13 AD_IO_3 13 AD_IO_4 13 AD_IO_5 13 AD_IO_6 13 AD_IO_7 13 PWRST_N 13,14,15 RP_DONE 7,9,14 INTR_A 13 REQ_N 13 TRDY_N 13 IRDY_N 13 STOP_N 13 DEVSEL_IO 13 FRAME_N 13 PAR 13 PERR_N 13 SERR_N 13 CPCI_TCK 13 CPCI_TMS 13 CPCI_TDI 13 CPCI_TDO 7 CPCI_DEBUG_DATA_0 3 CPCI_DEBUG_DATA_1 3 CPCI_DEBUG_DATA_2 3 CPCI_DEBUG_DATA_3 3 CPCI_DEBUG_DATA_4 3 CPCI_DEBUG_DATA_5 3 CPCI_DEBUG_DATA_6 3 CPCI_DEBUG_DATA_7 3 CPCI_DEBUG_DATA_8 3 CPCI_DEBUG_DATA_9 3 CPCI_DEBUG_DATA_10 3 CPCI_DEBUG_DATA_11 3 CPCI_DEBUG_DATA_12 3 CPCI_DEBUG_DATA_13 3 CPCI_DEBUG_DATA_14 3 CPCI_DEBUG_DATA_15 3 CPCI_DEBUG_DATA_16 3 CPCI_DEBUG_DATA_17 3 CPCI_DEBUG_DATA_18 3 CPCI_DEBUG_DATA_19 3 CPCI_DEBUG_DATA_20 3 CPCI_DEBUG_DATA_21 3 CPCI_DEBUG_DATA_22 3 CPCI_DEBUG_DATA_23 3 CPCI_DEBUG_DATA_24 3 CPCI_DEBUG_DATA_25 3 CPCI_DEBUG_DATA_26 3 CPCI_DEBUG_DATA_27 3 CPCI_DEBUG_DATA_28 3 CPCI_DEBUG_DATA_29 3 CPCI_DEBUG_DATA_30 3 CPCI_DEBUG_DATA_31 3 CPCI_CFG_DONE 3,14,15 RP_BUSY 7 RP_CCLK 7 RP_CS_B 7 RP_PROG_B 7 RP_INIT_B 7 RP_RDWR_B 7 RP_DATA0 7 RP_DATA1 7 RP_DATA2 7 RP_DATA3 7 RP_DATA4 7 RP_DATA5 7 RP_DATA6 7 RP_DATA7 7 CPCI_CFG_CLK 3,15 CPCI_CFG_DIN 15 CPCI_ALLOW_REPROG 15 CPCI_CFG_INIT_B 3,15 PROG_SEL 15 Title Size Document Number Rev Date: Sheet of <Doc> B NET FPGA BOARD -- PCI INTERFACE C 1 14 Tuesday, May 08, 2007 Title Size Document Number Rev Date: Sheet of <Doc> B NET FPGA BOARD -- PCI INTERFACE C 1 14 Tuesday, May 08, 2007 Title Size Document Number Rev Date: Sheet of <Doc> B NET FPGA BOARD -- PCI INTERFACE C 1 14 Tuesday, May 08, 2007 PLACE AS CLOSE TO CPCI AS POSSIBLE PLACE AS CLOSE TO CPCI AS POSSIBLE CPCI USER (Yellow) D1 LED D1 LED R60 100 R60 100 R226 0 NONE R226 0 NONE R56 180 R56 180 R50 4.7K R50 4.7K R225 0 NONE R225 0 NONE R98 22 R98 22 R90 4.7K R90 4.7K R57 100 R57 100 CONFIGURATION PCI BUS JTAG DEBUG U1A CPCI_FPGA CONFIGURATION PCI BUS JTAG DEBUG U1A CPCI_FPGA IDSEL L6 RST_N E2 GNT_N L5 PCLK C11 CFG_CLK B22 CFG_PROG_B W20 CFG_INIT_B V19 CFG_CS_B C19 CFG_RDWR_B A20 CFG_DIN D20 M0 AB2 M1 U5 M2 Y4 TCK C4 TMS D3 TDI B20 INTR_A M3 REQ_N K2 TRDY_N M1 IRDY_N L3 STOP_N L4 DEVSEL_N L1 FRAME_N M6 PAR P2 PERR_N N5 SERR_N M4 CFG_DONE Y19 CFG_DOUT C21 TDO A21 RP_CCLK Y14 RP_CS_B AA14 RP_PROG_B V15 RP_INIT_B W16 RP_RDWR_B Y16 RP_DATA0 V13 RP_DATA1 W14 RP_DATA2 V14 RP_DATA3 AA15 RP_DATA4 AB16 RP_DATA5 Y15 RP_DATA6 W15 RP_DATA7 AB15 CBE0 P1 CBE1 N4 CBE2 N3 CBE3 N2 AD0 T5 AD1 V1 AD2 R5 AD3 U1 AD4 T2 AD5 R4 AD6 T1 AD7 R2 AD8 P3 AD9 P5 AD10 R1 AD11 P4 AD12 K4 AD13 K3 AD14 K1 AD15 K5 AD16 J1 AD17 J3 AD18 J2 AD19 J5 AD20 H1 AD21 J4 AD22 H2 AD23 H3 AD24 G1 AD25 H4 AD26 F1 AD27 F2 AD28 H5 AD29 G3 AD30 G4 AD31 E1 CPCI_DEBUG_CLK_0 Y9 CPCI_DEBUG_CLK_1 AB8 CPCI_DEBUG_DATA_0 AB5 CPCI_DEBUG_DATA_1 W5 CPCI_DEBUG_DATA_2 AB6 CPCI_DEBUG_DATA_3 AA6 CPCI_DEBUG_DATA_4 Y6 CPCI_DEBUG_DATA_5 W6 CPCI_DEBUG_DATA_6 V7 CPCI_DEBUG_DATA_7 W7 CPCI_DEBUG_DATA_8 Y7 CPCI_DEBUG_DATA_9 AA7 CPCI_DEBUG_DATA_10 AA8 CPCI_DEBUG_DATA_11 Y8 CPCI_DEBUG_DATA_12 W8 CPCI_DEBUG_DATA_13 V8 CPCI_DEBUG_DATA_14 V9 CPCI_DEBUG_DATA_15 W9 CPCI_DEBUG_DATA_16 AB13 CPCI_DEBUG_DATA_17 AA13 CPCI_DEBUG_DATA_18 Y13 CPCI_DEBUG_DATA_19 AA12 CPCI_DEBUG_DATA_20 Y12 CPCI_DEBUG_DATA_21 V12 CPCI_DEBUG_DATA_22 AB11 CPCI_DEBUG_DATA_23 V11 CPCI_DEBUG_DATA_24 W11 CPCI_DEBUG_DATA_25 V10 CPCI_DEBUG_DATA_26 AA10 CPCI_DEBUG_DATA_27 AB10 CPCI_DEBUG_DATA_28 AA9 CPCI_DEBUG_DATA_29 Y10 CPCI_DEBUG_DATA_30 W10 CPCI_DEBUG_DATA_31 AB9 CPCI_LED B12 RP_DONE V16 RP_BUSY U12 ALLOW_REPROG D12 R63 39 R63 39 R58 100 R58 100 R49 220 R49 220 R61 100 R61 100 R59 100 R59 100 R227 0 NONE R227 0 NONE R114 330 R114 330
Transcript of CPCI FPGAwiki.netfpga.org/NetFPGA_PCB_r3.pdf · 5 5 4 4 3 3 2 2 1 1 d d c c b b a a net fpga board...
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CPCI_M0CPCI_M1
CPCI_CFG_CS_B
CPCI_CFG_RDWR_B
CPCI_LED
RP_CLK_T
CPCI_M2
VDD25
VDD25
VDD25
VDD25 VDD25
VDD25
RESET_N13PCLK13
IDSEL13GNT_N13
CBE_IO_013CBE_IO_113CBE_IO_213CBE_IO_313
AD_IO_813AD_IO_913AD_IO_1013AD_IO_1113AD_IO_1213AD_IO_1313AD_IO_1413AD_IO_1513AD_IO_1613AD_IO_1713AD_IO_1813AD_IO_1913AD_IO_2013AD_IO_2113AD_IO_2213AD_IO_2313AD_IO_2413AD_IO_2513AD_IO_2613AD_IO_2713AD_IO_2813AD_IO_2913AD_IO_3013AD_IO_3113
AD_IO_013AD_IO_113AD_IO_213AD_IO_313AD_IO_413AD_IO_513AD_IO_613AD_IO_713
PWRST_N13,14,15
RP_DONE7,9,14
INTR_A 13REQ_N 13TRDY_N 13IRDY_N 13STOP_N 13DEVSEL_IO 13FRAME_N 13PAR 13PERR_N 13SERR_N 13
CPCI_TCK13CPCI_TMS13CPCI_TDI13
CPCI_TDO 7
CPCI_DEBUG_DATA_0 3CPCI_DEBUG_DATA_1 3CPCI_DEBUG_DATA_2 3CPCI_DEBUG_DATA_3 3CPCI_DEBUG_DATA_4 3CPCI_DEBUG_DATA_5 3CPCI_DEBUG_DATA_6 3CPCI_DEBUG_DATA_7 3CPCI_DEBUG_DATA_8 3CPCI_DEBUG_DATA_9 3CPCI_DEBUG_DATA_10 3CPCI_DEBUG_DATA_11 3CPCI_DEBUG_DATA_12 3CPCI_DEBUG_DATA_13 3CPCI_DEBUG_DATA_14 3CPCI_DEBUG_DATA_15 3CPCI_DEBUG_DATA_16 3CPCI_DEBUG_DATA_17 3CPCI_DEBUG_DATA_18 3CPCI_DEBUG_DATA_19 3CPCI_DEBUG_DATA_20 3CPCI_DEBUG_DATA_21 3CPCI_DEBUG_DATA_22 3CPCI_DEBUG_DATA_23 3CPCI_DEBUG_DATA_24 3CPCI_DEBUG_DATA_25 3CPCI_DEBUG_DATA_26 3CPCI_DEBUG_DATA_27 3CPCI_DEBUG_DATA_28 3CPCI_DEBUG_DATA_29 3CPCI_DEBUG_DATA_30 3CPCI_DEBUG_DATA_31 3
CPCI_CFG_DONE 3,14,15
RP_BUSY7
RP_CCLK 7
RP_CS_B 7RP_PROG_B 7RP_INIT_B 7RP_RDWR_B 7RP_DATA0 7RP_DATA1 7RP_DATA2 7RP_DATA3 7RP_DATA4 7RP_DATA5 7RP_DATA6 7RP_DATA7 7
CPCI_CFG_CLK 3,15
CPCI_CFG_DIN15
CPCI_ALLOW_REPROG 15
CPCI_CFG_INIT_B 3,15
PROG_SEL15
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- PCI INTERFACE
C
1 14Tuesday, May 08, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- PCI INTERFACE
C
1 14Tuesday, May 08, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- PCI INTERFACE
C
1 14Tuesday, May 08, 2007
PLACE AS CLOSE TO CPCI AS POSSIBLE
PLACE AS CLOSE TO CPCI AS POSSIBLE
CPCI USER
(Yellow)
D1LED D1LED
R60100R60100
R2260NONE
R2260NONE
R56180R56180
R504.7K R504.7K
R2250NONE
R2250NONE
R9822 R9822
R904.7K R904.7K
R57100R57100
CONFIGURATION
PCI BUS
JTAG
DEBUG
U1A
CPCI_FPGA
CONFIGURATION
PCI BUS
JTAG
DEBUG
U1A
CPCI_FPGA
IDSELL6
RST_NE2
GNT_NL5
PCLKC11
CFG_CLKB22
CFG_PROG_BW20
CFG_INIT_BV19
CFG_CS_BC19
CFG_RDWR_BA20
CFG_DIND20
M0AB2
M1U5
M2Y4
TCKC4
TMSD3
TDIB20
INTR_AM3
REQ_NK2
TRDY_NM1
IRDY_NL3
STOP_NL4
DEVSEL_NL1
FRAME_NM6
PARP2
PERR_NN5
SERR_NM4
CFG_DONEY19
CFG_DOUTC21
TDOA21
RP_CCLKY14
RP_CS_BAA14
RP_PROG_BV15
RP_INIT_BW16
RP_RDWR_BY16
RP_DATA0V13
RP_DATA1W14
RP_DATA2V14
RP_DATA3AA15
RP_DATA4AB16
RP_DATA5Y15
RP_DATA6W15
RP_DATA7AB15
CBE0P1
CBE1N4
CBE2N3
CBE3N2
AD0T5
AD1V1
AD2R5
AD3U1
AD4T2
AD5R4
AD6T1
AD7R2
AD8P3
AD9P5
AD10R1
AD11P4
AD12K4
AD13K3
AD14K1
AD15K5
AD16J1
AD17J3
AD18J2
AD19J5
AD20H1
AD21J4
AD22H2
AD23H3
AD24G1
AD25H4
AD26F1
AD27F2
AD28H5
AD29G3
AD30G4
AD31E1
CPCI_DEBUG_CLK_0Y9
CPCI_DEBUG_CLK_1AB8
CPCI_DEBUG_DATA_0AB5
CPCI_DEBUG_DATA_1W5
CPCI_DEBUG_DATA_2AB6
CPCI_DEBUG_DATA_3AA6
CPCI_DEBUG_DATA_4Y6
CPCI_DEBUG_DATA_5W6
CPCI_DEBUG_DATA_6V7
CPCI_DEBUG_DATA_7W7
CPCI_DEBUG_DATA_8Y7
CPCI_DEBUG_DATA_9AA7
CPCI_DEBUG_DATA_10AA8
CPCI_DEBUG_DATA_11Y8
CPCI_DEBUG_DATA_12W8
CPCI_DEBUG_DATA_13V8
CPCI_DEBUG_DATA_14V9
CPCI_DEBUG_DATA_15W9
CPCI_DEBUG_DATA_16AB13
CPCI_DEBUG_DATA_17AA13
CPCI_DEBUG_DATA_18Y13
CPCI_DEBUG_DATA_19AA12
CPCI_DEBUG_DATA_20Y12
CPCI_DEBUG_DATA_21V12
CPCI_DEBUG_DATA_22AB11
CPCI_DEBUG_DATA_23V11
CPCI_DEBUG_DATA_24W11
CPCI_DEBUG_DATA_25V10
CPCI_DEBUG_DATA_26AA10
CPCI_DEBUG_DATA_27AB10
CPCI_DEBUG_DATA_28AA9
CPCI_DEBUG_DATA_29Y10
CPCI_DEBUG_DATA_30W10
CPCI_DEBUG_DATA_31AB9
CPCI_LEDB12
RP_DONEV16
RP_BUSYU12
ALLOW_REPROGD12
R63
39
R63
39
R58100R58100
R49220 R49220
R61100R61100
R59100R59100
R2270NONE
R2270NONE
R114330R114330
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CPCI_ID_1CPCI_ID_0
CPCI_ID_3CPCI_ID_2
CPCI_JMPR
VDD25VDD25
VDD25
VDD25
VDD25
CPCI_RD_RDY3CPCI_WR_RDY3
CPCI_TX_FULL03CPCI_TX_FULL13CPCI_TX_FULL23CPCI_TX_FULL33
CNET_ERR3
CNET_RESET 3CPCI_CLK12
PHY_INT_B8
CPCI_DMA_WR_EN3
CPCI_DMA_PKT_AVAIL03CPCI_DMA_PKT_AVAIL13CPCI_DMA_PKT_AVAIL23CPCI_DMA_PKT_AVAIL33
CPCI_DMA_DATA03CPCI_DMA_DATA13CPCI_DMA_DATA23CPCI_DMA_DATA33CPCI_DMA_DATA43CPCI_DMA_DATA53CPCI_DMA_DATA63CPCI_DMA_DATA73CPCI_DMA_DATA83CPCI_DMA_DATA93CPCI_DMA_DATA103CPCI_DMA_DATA113CPCI_DMA_DATA123CPCI_DMA_DATA133CPCI_DMA_DATA143CPCI_DMA_DATA153CPCI_DMA_DATA163CPCI_DMA_DATA173CPCI_DMA_DATA183CPCI_DMA_DATA193CPCI_DMA_DATA203CPCI_DMA_DATA213CPCI_DMA_DATA223CPCI_DMA_DATA233CPCI_DMA_DATA243CPCI_DMA_DATA253CPCI_DMA_DATA263CPCI_DMA_DATA273CPCI_DMA_DATA283CPCI_DMA_DATA293CPCI_DMA_DATA303CPCI_DMA_DATA313
CPCI_DATA18 3CPCI_DATA19 3CPCI_DATA20 3
CPCI_DMA_SEND0 3
CPCI_DATA21 3
CPCI_DMA_SEND1 3
CPCI_DATA22 3
CPCI_DMA_SEND2 3
CPCI_DATA23 3
CPCI_DMA_SEND3 3
CPCI_DATA24 3CPCI_DATA25 3
CPCI_REQ 3
CPCI_DATA26 3
CPCI_RD_WR_L 3
CPCI_DATA27 3CPCI_DATA28 3
CPCI_ADDR0 3
CPCI_DATA29 3
CPCI_ADDR1 3
CPCI_DATA30 3
CPCI_ADDR2 3
CPCI_DATA31 3
CPCI_ADDR3 3CPCI_ADDR4 3CPCI_ADDR5 3CPCI_ADDR6 3CPCI_ADDR7 3CPCI_ADDR8 3CPCI_ADDR9 3CPCI_ADDR10 3CPCI_ADDR11 3CPCI_ADDR12 3CPCI_ADDR13 3CPCI_ADDR14 3CPCI_ADDR15 3CPCI_ADDR16 3CPCI_ADDR17 3CPCI_ADDR18 3CPCI_ADDR19 3
CPCI_DMA_NEARLY_FULL 3
CPCI_ADDR20 3CPCI_ADDR21 3CPCI_ADDR22 3CPCI_ADDR23 3
CPCI_DATA0 3CPCI_DATA1 3CPCI_DATA2 3CPCI_DATA3 3CPCI_DATA4 3CPCI_DATA5 3CPCI_DATA6 3CPCI_DATA7 3CPCI_DATA8 3CPCI_DATA9 3CPCI_DATA10 3CPCI_DATA11 3CPCI_DATA12 3CPCI_DATA13 3CPCI_DATA14 3CPCI_DATA15 3CPCI_DATA16 3CPCI_DATA17 3
CNET_CLK_SEL 12
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CPCI TO CNET INTERFACE
C
2 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CPCI TO CNET INTERFACE
C
2 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CPCI TO CNET INTERFACE
C
2 14Monday, May 07, 2007
R664.7KR664.7K
SW2
SW DIP-2
SW2
SW DIP-2
R684.7KR684.7K
R654.7KR654.7K
R1154.7KR1154.7K
R674.7KR674.7K
R70
4.7K
R70
4.7K
SW1
SW DIP-HEX
SW1
SW DIP-HEX
43
C12
86
11
24
C25
CPCI
U1B
CPCI_FPGA
CPCI
U1B
CPCI_FPGA
CPCI_RD_WR_LE13
CPCI_REQF12
CPCI_ADDR0F18
CPCI_ADDR1H21
CPCI_ADDR2G21
CPCI_ADDR3H19
CPCI_ADDR4F19
CPCI_ADDR5G20
CPCI_ADDR6G19
CPCI_ADDR7J20
CPCI_ADDR8J19
CPCI_ADDR9J18
CPCI_ADDR10H18
CPCI_ADDR11K22
CPCI_ADDR12J21
CPCI_ADDR13J22
CPCI_ADDR14K21
CPCI_ADDR15K19
CPCI_ADDR16K18
CPCI_ADDR17L17
CPCI_ADDR18L18
CPCI_ADDR19L20
CPCI_ADDR20M20
CPCI_ADDR21M22
CPCI_ADDR22L22
CPCI_ADDR23L21
CPCI_WR_RDYE12
CPCI_RD_RDYA14
CNET_ERRAB14
CPCI_DMA_WR_ENY18
CPCI_DMA_NEARLY_FULLAA18
NCLKW12
PHY_INT_BD11
CNET_RESETW13
CPCI_DMA_PKT_AVAIL0AB19
CPCI_DMA_PKT_AVAIL1W18
CPCI_DMA_PKT_AVAIL2AB18
CPCI_DMA_PKT_AVAIL3V17
CPCI_DMA_SEND0AB17
CPCI_DMA_SEND1AA17
CPCI_DMA_SEND2Y17
CPCI_DMA_SEND3W17
CPCI_ID0AA5
CPCI_ID1AB4
CPCI_ID2AA4
CPCI_ID3AB3
CPCI_JMPRC12
CPCI_TX_FULL0C13
CPCI_TX_FULL1A13
CPCI_TX_FULL2B13
CPCI_TX_FULL3D13
CPCI_DMA_DATA0M18
CPCI_DMA_DATA1M19
CPCI_DMA_DATA2N18
CPCI_DMA_DATA3M17
CPCI_DMA_DATA4N19
CPCI_DMA_DATA5N20
CPCI_DMA_DATA6N21
CPCI_DMA_DATA7P22
CPCI_DMA_DATA8P20
CPCI_DMA_DATA9P21
CPCI_DMA_DATA10R19
CPCI_DMA_DATA11R18
CPCI_DMA_DATA12P18
CPCI_DMA_DATA13P19
CPCI_DMA_DATA14T19
CPCI_DMA_DATA15T20
CPCI_DMA_DATA16T21
CPCI_DMA_DATA17R22
CPCI_DMA_DATA18T18
CPCI_DMA_DATA19U19
CPCI_DMA_DATA20U20
CPCI_DMA_DATA21V21
CPCI_DMA_DATA22V22
CPCI_DMA_DATA23U21
CPCI_DMA_DATA24U22
CPCI_DMA_DATA25AA22
CPCI_DMA_DATA26W21
CPCI_DMA_DATA27W22
CPCI_DMA_DATA28V20
CPCI_DMA_DATA29AA20
CPCI_DMA_DATA30AA19
CPCI_DMA_DATA31AB20
CPCI_DATA0B14
CPCI_DATA1C14
CPCI_DATA2D14
CPCI_DATA3E14
CPCI_DATA4E15
CPCI_DATA5D15
CPCI_DATA6C15
CPCI_DATA7B15
CPCI_DATA8A15
CPCI_DATA9A16
CPCI_DATA10C16
CPCI_DATA11D16
CPCI_DATA12E16
CPCI_DATA13D17
CPCI_DATA14C17
CPCI_DATA15B17
CPCI_DATA16A17
CPCI_DATA17A18
CPCI_DATA18B18
CPCI_DATA19C22
CPCI_DATA20A19
CPCI_DATA21B19
CPCI_DATA22C18
CPCI_DATA23E20
CPCI_DATA24D21
CPCI_DATA25D22
CPCI_DATA26E22
CPCI_DATA27E21
CPCI_DATA28F21
CPCI_DATA29F22
CPCI_DATA30F20
CPCI_DATA31G18
CNET_CLK_SELU11
R694.7KR694.7K
R644.7KR644.7K
UNUSED PINS & NC PINS
U1C
CPCI_FPGA
UNUSED PINS & NC PINS
U1C
CPCI_FPGA
NC1A2
NC2A6
NC3A12
NC4AA1
NC5AA3
NC6AA11
NC7AA16
NC8AB7
NC9AB12
NC10AB21
NC11B11
NC12B16
NC13C2
NC14D1
NC15D4
NC16D18
NC17D19
NC18E17
NC19E19
NC20G2
NC21G22
NC22L2
NC23L19
NC24M2
NC25M21
NC26R3
NC27R20
NC28U3
NC29U18
NC30V6
NC31W4
NC32W19
NC33Y5
NC34Y22
GCK1Y11
GCK2A11
UNUSED1A3
UNUSED2A4
UNUSED3A5
UNUSED4A7
UNUSED5A8
UNUSED6A9
UNUSED7A10
UNUSED8B1
UNUSED9B3
UNUSED10B4
UNUSED11B5
UNUSED12B6
UNUSED13B7
UNUSED14B8
UNUSED15B9
UNUSED16B10
UNUSED17C1
UNUSED18C5
UNUSED19C6
UNUSED20C7
UNUSED21C8
UNUSED22C9
UNUSED23C10
UNUSED24D2
UNUSED25D5
UNUSED26D6
UNUSED27D7
UNUSED28D8
UNUSED29D9
UNUSED30D10
UNUSED32E3
UNUSED33E4
UNUSED34E6
UNUSED35E7
UNUSED36E8
UNUSED37E9
UNUSED38E10
UNUSED39E11
UNUSED40F3
UNUSED41F4
UNUSED51R21
UNUSED52T3
UNUSED53T4
UNUSED54T22
UNUSED55U2
UNUSED56U4
UNUSED59V2
UNUSED60V3
UNUSED61V4
UNUSED62W1
UNUSED63W2
UNUSED64W3
UNUSED65Y1
UNUSED66Y2
UNUSED67Y21
UNUSED42F5
UNUSED43F11
UNUSED44G5
UNUSED45H20
UNUSED46H22
UNUSED47K20
UNUSED48M5
UNUSED49N1
UNUSED50N22
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VDD25
CNET_RESET2
CPCI_REQ2CPCI_RD_WR_L2
CPCI_DMA_NEARLY_FULL2CPCI_DMA_SEND02CPCI_DMA_SEND12CPCI_DMA_SEND22CPCI_DMA_SEND32
CPCI_ADDR02CPCI_ADDR12CPCI_ADDR22CPCI_ADDR32CPCI_ADDR42CPCI_ADDR52CPCI_ADDR62CPCI_ADDR72CPCI_ADDR82CPCI_ADDR92CPCI_ADDR102CPCI_ADDR112CPCI_ADDR122CPCI_ADDR132CPCI_ADDR142CPCI_ADDR152CPCI_ADDR162CPCI_ADDR172CPCI_ADDR182CPCI_ADDR192CPCI_ADDR202CPCI_ADDR212CPCI_ADDR222CPCI_ADDR232
CNET_ERR 2CPCI_RD_RDY 2CPCI_WR_RDY 2CPCI_TX_FULL0 2CPCI_TX_FULL1 2CPCI_TX_FULL2 2CPCI_TX_FULL3 2
CPCI_DMA_WR_EN 2CPCI_DMA_PKT_AVAIL0 2CPCI_DMA_PKT_AVAIL1 2CPCI_DMA_PKT_AVAIL2 2CPCI_DMA_PKT_AVAIL3 2
CPCI_DATA0 2CPCI_DATA1 2CPCI_DATA2 2CPCI_DATA3 2CPCI_DATA4 2CPCI_DATA5 2CPCI_DATA6 2CPCI_DATA7 2CPCI_DATA8 2CPCI_DATA9 2CPCI_DATA10 2CPCI_DATA11 2CPCI_DATA12 2CPCI_DATA13 2CPCI_DATA14 2CPCI_DATA15 2CPCI_DATA16 2CPCI_DATA17 2CPCI_DATA18 2CPCI_DATA19 2CPCI_DATA20 2CPCI_DATA21 2CPCI_DATA22 2CPCI_DATA23 2CPCI_DATA24 2CPCI_DATA25 2CPCI_DATA26 2CPCI_DATA27 2CPCI_DATA28 2CPCI_DATA29 2CPCI_DATA30 2CPCI_DATA31 2
CPCI_DMA_DATA0 2CPCI_DMA_DATA1 2CPCI_DMA_DATA2 2CPCI_DMA_DATA3 2CPCI_DMA_DATA4 2CPCI_DMA_DATA5 2CPCI_DMA_DATA6 2CPCI_DMA_DATA7 2CPCI_DMA_DATA8 2CPCI_DMA_DATA9 2CPCI_DMA_DATA10 2CPCI_DMA_DATA11 2CPCI_DMA_DATA12 2CPCI_DMA_DATA13 2CPCI_DMA_DATA14 2CPCI_DMA_DATA15 2CPCI_DMA_DATA16 2CPCI_DMA_DATA17 2CPCI_DMA_DATA18 2CPCI_DMA_DATA19 2CPCI_DMA_DATA20 2CPCI_DMA_DATA21 2CPCI_DMA_DATA22 2CPCI_DMA_DATA23 2CPCI_DMA_DATA24 2CPCI_DMA_DATA25 2CPCI_DMA_DATA26 2CPCI_DMA_DATA27 2CPCI_DMA_DATA28 2CPCI_DMA_DATA29 2CPCI_DMA_DATA30 2CPCI_DMA_DATA31 2
CNET_CLK12
CNET_CPCI_CLK12
CPCI_DEBUG_DATA_01CPCI_DEBUG_DATA_11CPCI_DEBUG_DATA_21CPCI_DEBUG_DATA_31CPCI_DEBUG_DATA_41CPCI_DEBUG_DATA_51CPCI_DEBUG_DATA_61CPCI_DEBUG_DATA_71CPCI_DEBUG_DATA_81CPCI_DEBUG_DATA_91CPCI_DEBUG_DATA_101CPCI_DEBUG_DATA_111CPCI_DEBUG_DATA_121CPCI_DEBUG_DATA_131CPCI_DEBUG_DATA_141CPCI_DEBUG_DATA_151CPCI_DEBUG_DATA_161CPCI_DEBUG_DATA_171CPCI_DEBUG_DATA_181CPCI_DEBUG_DATA_191CPCI_DEBUG_DATA_201CPCI_DEBUG_DATA_211CPCI_DEBUG_DATA_221CPCI_DEBUG_DATA_231CPCI_DEBUG_DATA_241CPCI_DEBUG_DATA_251CPCI_DEBUG_DATA_261CPCI_DEBUG_DATA_271CPCI_DEBUG_DATA_281CPCI_DEBUG_DATA_291CPCI_DEBUG_DATA_301CPCI_DEBUG_DATA_311
CPCI_CFG_DONE1,14,15CPCI_CFG_INIT_B1,15CPCI_CFG_CLK1,15
NF2_RP_EN 15NF2_RP_PROG_B 15NF2_RP_DIN 15
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CNET TO CPCI INTERFACE
C
3 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CNET TO CPCI INTERFACE
C
3 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CNET TO CPCI INTERFACE
C
3 14Monday, May 07, 2007
R103
4.7K
R103
4.7K
CPCI
SPARTAN REPROGRAMMING
U3A
CNET_FPGA
CPCI
SPARTAN REPROGRAMMING
U3A
CNET_FPGA
NF2_RESETJ4
CPCI_CLKE17
CPCI_RD_WR_LD29
CPCI_REQE29
CPCI_RD_RDYE28
CPCI_WR_RDYE32
NF2_ERRD28
CPCI_TX_FULL0D30
CPCI_TX_FULL1D33
CPCI_TX_FULL2D34
CPCI_TX_FULL3E31
CPCI_DMA_NEARLY_FULLH6
CPCI_DATA0F28
CPCI_DATA1F27
CPCI_DATA2H26
CPCI_DATA3G26
CPCI_DATA4F26
CPCI_DATA5E26
CPCI_DATA6D26
CPCI_DATA7C26
CPCI_DATA8H25
CPCI_DATA9G25
CPCI_DATA10E25
CPCI_DATA11D25
CPCI_DATA12D24
CPCI_DATA13C24
CPCI_DATA14D23
CPCI_DATA15H22
CPCI_DATA16G22
CPCI_DATA17F22
CPCI_DATA18E22
CPCI_DATA19D22
CPCI_DATA20C22
CPCI_DATA21H21
CPCI_DATA22G21
CPCI_DATA23F21
CPCI_DATA24E21
CPCI_DATA25D21
CPCI_DATA26C21
CPCI_DATA27G20
CPCI_DATA28F20
CPCI_DATA29D20
CPCI_DATA30H19
CPCI_DATA31G19
CPCI_ADDR0F19
CPCI_ADDR1E19
CPCI_ADDR2D19
CPCI_ADDR3H16
CPCI_ADDR4G16
CPCI_ADDR5F16
CPCI_ADDR6E16
CPCI_ADDR7D16
CPCI_ADDR8G15
CPCI_ADDR9F15
CPCI_ADDR10D15
CPCI_ADDR11H14
CPCI_ADDR12G14
CPCI_ADDR13F14
CPCI_ADDR14E14
CPCI_ADDR15D14
CPCI_ADDR16C14
CPCI_ADDR17H13
CPCI_ADDR18G13
CPCI_ADDR19F13
CPCI_ADDR20E13
CPCI_ADDR21D13
CPCI_ADDR22C13
CPCI_ADDR23D12
CPCI_DMA_SEND0J6
CPCI_DMA_SEND1H1
CPCI_DMA_SEND2J5
CPCI_DMA_SEND3J3
CPCI_DMA_DATA0C11
CPCI_DMA_DATA1H10
CPCI_DMA_DATA2G10
CPCI_DMA_DATA3E10
CPCI_DMA_DATA4D10
CPCI_DMA_DATA5G9
CPCI_DMA_DATA6F9
CPCI_DMA_DATA7E9
CPCI_DMA_DATA8D9
CPCI_DMA_DATA9C9
CPCI_DMA_DATA10F8
CPCI_DMA_DATA11F7
CPCI_DMA_DATA12E7
CPCI_DMA_DATA13E6
CPCI_DMA_DATA14D6
CPCI_DMA_DATA15D5
CPCI_DMA_DATA16D2
CPCI_DMA_DATA17D1
CPCI_DMA_DATA18E4
CPCI_DMA_DATA19E3
CPCI_DMA_DATA20E2
CPCI_DMA_DATA21E1
CPCI_DMA_DATA22F5
CPCI_DMA_DATA23F4
CPCI_DMA_DATA24F2
CPCI_DMA_DATA25F1
CPCI_DMA_DATA26G6
CPCI_DMA_DATA27G5
CPCI_DMA_DATA28G4
CPCI_DMA_DATA29G3
CPCI_DMA_DATA30G2
CPCI_DMA_DATA31G1
CPCI_DMA_PKT_AVAIL0H4
CPCI_DMA_PKT_AVAIL1H5
CPCI_DMA_PKT_AVAIL2H2
CPCI_DMA_PKT_AVAIL3H3
CPCI_DMA_WR_ENJ2
CORE_CLKD17
CPCI_DEBUG_DATA_0T2
CPCI_DEBUG_DATA_1P2
CPCI_DEBUG_DATA_2M1
CPCI_DEBUG_DATA_3M4
CPCI_DEBUG_DATA_4M6
CPCI_DEBUG_DATA_5L1
CPCI_DEBUG_DATA_6L2
CPCI_DEBUG_DATA_7L3
CPCI_DEBUG_DATA_8L4
CPCI_DEBUG_DATA_9L5
CPCI_DEBUG_DATA_10T3
CPCI_DEBUG_DATA_11T4
CPCI_DEBUG_DATA_12T5
CPCI_DEBUG_DATA_13T6
CPCI_DEBUG_DATA_14R1
CPCI_DEBUG_DATA_15R2
CPCI_DEBUG_DATA_16R3
CPCI_DEBUG_DATA_17R4
CPCI_DEBUG_DATA_18R6
CPCI_DEBUG_DATA_19P1
CPCI_DEBUG_DATA_20P3
CPCI_DEBUG_DATA_21P4
CPCI_DEBUG_DATA_22P5
CPCI_DEBUG_DATA_23P6
CPCI_DEBUG_DATA_24N1
CPCI_DEBUG_DATA_25N2
CPCI_DEBUG_DATA_26N3
CPCI_DEBUG_DATA_27N4
CPCI_DEBUG_DATA_28N5
CPCI_DEBUG_DATA_29N6
CPCI_DEBUG_DATA_30M2
CPCI_DEBUG_DATA_31M3
NF2_RP_ENAJ16
NF2_RP_DONEAK16
NF2_RP_DINAL14
NF2_RP_PROG_BAL15
NF2_RP_INIT_BAL16
NF2_RP_CCLKAL17
R91
4.7K
R91
4.7K
R1064.7K R1064.7K
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SRAM1_ADDR0SRAM1_ADDR1SRAM1_ADDR2SRAM1_ADDR3SRAM1_ADDR4SRAM1_ADDR5SRAM1_ADDR6SRAM1_ADDR7SRAM1_ADDR8SRAM1_ADDR9SRAM1_ADDR10SRAM1_ADDR11SRAM1_ADDR12SRAM1_ADDR13SRAM1_ADDR14SRAM1_ADDR15SRAM1_ADDR16SRAM1_ADDR17SRAM1_ADDR18SRAM1_ADDR0
SRAM1_ADDR1SRAM1_ADDR2SRAM1_ADDR3SRAM1_ADDR4SRAM1_ADDR5SRAM1_ADDR6SRAM1_ADDR7SRAM1_ADDR8SRAM1_ADDR9SRAM1_ADDR10SRAM1_ADDR11SRAM1_ADDR12SRAM1_ADDR13SRAM1_ADDR14SRAM1_ADDR15SRAM1_ADDR16SRAM1_ADDR17SRAM1_ADDR18
SRAM1_WE_N
SRAM2_WE_BW
SR
AM
2_A
DD
R[0
:19]
SRAM2_ADDR0SRAM2_ADDR1SRAM2_ADDR2SRAM2_ADDR3SRAM2_ADDR4SRAM2_ADDR5SRAM2_ADDR6SRAM2_ADDR7SRAM2_ADDR8SRAM2_ADDR9SRAM2_ADDR10SRAM2_ADDR11SRAM2_ADDR12SRAM2_ADDR13SRAM2_ADDR14SRAM2_ADDR15SRAM2_ADDR16SRAM2_ADDR17SRAM2_ADDR18
SRAM2_ADDR0SRAM2_ADDR1SRAM2_ADDR2SRAM2_ADDR3SRAM2_ADDR4SRAM2_ADDR5SRAM2_ADDR6SRAM2_ADDR7SRAM2_ADDR8SRAM2_ADDR9SRAM2_ADDR10SRAM2_ADDR11SRAM2_ADDR12SRAM2_ADDR13SRAM2_ADDR14SRAM2_ADDR15SRAM2_ADDR16SRAM2_ADDR17SRAM2_ADDR18
SRAM1_DATA[0:35]
SRAM2_DATA[0:35]
SRAM1_DATA0SRAM1_DATA1SRAM1_DATA2SRAM1_DATA3SRAM1_DATA4SRAM1_DATA5SRAM1_DATA6SRAM1_DATA7SRAM1_DATA8
SRAM1_DATA9SRAM1_DATA10SRAM1_DATA11SRAM1_DATA12SRAM1_DATA13SRAM1_DATA14SRAM1_DATA15SRAM1_DATA16SRAM1_DATA17
SRAM1_DATA18SRAM1_DATA19SRAM1_DATA20SRAM1_DATA21SRAM1_DATA22SRAM1_DATA23SRAM1_DATA24SRAM1_DATA25SRAM1_DATA26
SRAM1_DATA27SRAM1_DATA28SRAM1_DATA29SRAM1_DATA30SRAM1_DATA31SRAM1_DATA32SRAM1_DATA33SRAM1_DATA34SRAM1_DATA35
SRAM1_DATA0SRAM1_DATA1SRAM1_DATA2SRAM1_DATA3SRAM1_DATA4SRAM1_DATA5SRAM1_DATA6SRAM1_DATA7SRAM1_DATA8SRAM1_DATA9SRAM1_DATA10SRAM1_DATA11SRAM1_DATA12SRAM1_DATA13SRAM1_DATA14SRAM1_DATA15SRAM1_DATA16SRAM1_DATA17SRAM1_DATA18SRAM1_DATA19SRAM1_DATA20SRAM1_DATA21SRAM1_DATA22SRAM1_DATA23SRAM1_DATA24SRAM1_DATA25SRAM1_DATA26SRAM1_DATA27SRAM1_DATA28SRAM1_DATA29SRAM1_DATA30SRAM1_DATA31SRAM1_DATA32SRAM1_DATA33SRAM1_DATA34SRAM1_DATA35
SRAM2_DATA0SRAM2_DATA1SRAM2_DATA2SRAM2_DATA3SRAM2_DATA4SRAM2_DATA5SRAM2_DATA6SRAM2_DATA7SRAM2_DATA8SRAM2_DATA9SRAM2_DATA10SRAM2_DATA11SRAM2_DATA12SRAM2_DATA13SRAM2_DATA14SRAM2_DATA15SRAM2_DATA16SRAM2_DATA17SRAM2_DATA18SRAM2_DATA19SRAM2_DATA20SRAM2_DATA21SRAM2_DATA22SRAM2_DATA23SRAM2_DATA24SRAM2_DATA25SRAM2_DATA26SRAM2_DATA27SRAM2_DATA28SRAM2_DATA29SRAM2_DATA30SRAM2_DATA31SRAM2_DATA32SRAM2_DATA33SRAM2_DATA34SRAM2_DATA35
SRAM2_DATA0SRAM2_DATA1SRAM2_DATA2SRAM2_DATA3SRAM2_DATA4SRAM2_DATA5SRAM2_DATA6SRAM2_DATA7SRAM2_DATA8
SRAM2_DATA9SRAM2_DATA10SRAM2_DATA11SRAM2_DATA12SRAM2_DATA13SRAM2_DATA14SRAM2_DATA15SRAM2_DATA16SRAM2_DATA17
SRAM2_DATA18SRAM2_DATA19SRAM2_DATA20SRAM2_DATA21SRAM2_DATA22SRAM2_DATA23SRAM2_DATA24SRAM2_DATA25SRAM2_DATA26
SRAM2_DATA27SRAM2_DATA28SRAM2_DATA29SRAM2_DATA30SRAM2_DATA31SRAM2_DATA32SRAM2_DATA33SRAM2_DATA34SRAM2_DATA35
SRAM2_ADDR19
SRAM2_ADDR19
SRAM2_ZZ
SRAM2_BW0SRAM2_BW1SRAM2_BW2SRAM2_BW3
SRAM1_ADDR19
SRAM1_ADDR19
SRAM1_ZZ
SR
AM
1_A
DD
R[0
:19]
SRAM1_BW0SRAM1_BW1SRAM1_BW2SRAM1_BW3
VDD25VDD33
VDD25VDD33
VDD25
VDD25
VDD25
VDD25
SRAM1_CLK12
SRAM2_CLK12
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CNET TO SRAMS
C
4 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CNET TO SRAMS
C
4 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CNET TO SRAMS
C
4 14Monday, May 07, 2007
R116 4.7KR116 4.7K
R190
4.7K
R190
4.7KR72 100R72 100
R71 100R71 100
U4
CY7C1370C-167AC
U4
CY7C1370C-167AC
CLK89
CEN87
OE86
CE198
CE297
CE392
WE88
BWA93
BWB94
BWC95
BWD96
MODE31
ADVLD85
A037
A136
A235
A334
A433
A532
A6100
A799
A884
A983
A1082
A1181
A1250
A1349
A1448
A1547
A1646
A1745
A1844
E3643
E7242
E14439
E28838
DQA_063
DQA_162
DQA_259
DQA_358
DQA_457
DQA_556
DQA_653
DQA_752
DQPA51
DQB_068
DQB_169
DQB_272
DQB_373
DQB_474
DQB_575
DQB_678
DQB_779
DQPB80
DQC_013
DQC_112
DQC_29
DQC_38
DQC_47
DQC_56
DQC_63
DQC_72
DQPC1
DQD_018
DQD_119
DQD_222
DQD_323
DQD_424
DQD_525
DQD_628
DQD_729
DQPD30
ZZ64
VDD_115
VDD_241
VDD_365
VDD_491
VDDQ_14
VDDQ_211
VDDQ_320
VDDQ_427
VDDQ_554
VDDQ_661
VDDQ_770
VDDQ_877
VSS_15
VSS_210
VSS_317
VSS_421
VSS_526
VSS_640
VSS_755
VSS_860
VSS_967
VSS_1071
VSS_1176
VSS_1290
NC_114
NC_216
NC_366
R117 4.7KR117 4.7K
R189
4.7K
R189
4.7K
U5
CY7C1370C-167AC
U5
CY7C1370C-167AC
CLK89
CEN87
OE86
CE198
CE297
CE392
WE88
BWA93
BWB94
BWC95
BWD96
MODE31
ADVLD85
A037
A136
A235
A334
A433
A532
A6100
A799
A884
A983
A1082
A1181
A1250
A1349
A1448
A1547
A1646
A1745
A1844
E3643
E7242
E14439
E28838
DQA_063
DQA_162
DQA_259
DQA_358
DQA_457
DQA_556
DQA_653
DQA_752
DQPA51
DQB_068
DQB_169
DQB_272
DQB_373
DQB_474
DQB_575
DQB_678
DQB_779
DQPB80
DQC_013
DQC_112
DQC_29
DQC_38
DQC_47
DQC_56
DQC_63
DQC_72
DQPC1
DQD_018
DQD_119
DQD_222
DQD_323
DQD_424
DQD_525
DQD_628
DQD_729
DQPD30
ZZ64
VDD_115
VDD_241
VDD_365
VDD_491
VDDQ_14
VDDQ_211
VDDQ_320
VDDQ_427
VDDQ_554
VDDQ_661
VDDQ_770
VDDQ_877
VSS_15
VSS_210
VSS_317
VSS_421
VSS_526
VSS_640
VSS_755
VSS_860
VSS_967
VSS_1071
VSS_1176
VSS_1290
NC_114
NC_216
NC_366
SRAM 0
SRAM 1
U3B
CNET_FPGA
SRAM 0
SRAM 1
U3B
CNET_FPGA
SRAM1_ADDR0AF29
SRAM1_ADDR1AF30
SRAM1_ADDR2AF31
SRAM1_ADDR3AF32
SRAM1_ADDR4AF33
SRAM1_ADDR5AG29
SRAM1_ADDR6AG30
SRAM1_ADDR7AG31
SRAM1_ADDR8AD29
SRAM1_ADDR9AC34
SRAM1_ADDR10AC32
SRAM1_ADDR11AB30
SRAM1_ADDR12AC31
SRAM1_ADDR13AC33
SRAM1_ADDR14AC29
SRAM1_ADDR15AD30
SRAM1_ADDR16AD31
SRAM1_ADDR17AD32
SRAM1_ADDR18AD33
SRAM1_DATA0Y34
SRAM1_DATA1Y33
SRAM1_DATA3Y31
SRAM1_DATA4W33
SRAM1_DATA5W32
SRAM1_DATA6W31
SRAM1_DATA7W30
SRAM1_DATA8W29
SRAM1_DATA9AA30
SRAM1_DATA10AA31
SRAM1_DATA11AA32
SRAM1_DATA12AA33
SRAM1_DATA13AA34
SRAM1_DATA14AB31
SRAM1_DATA15AB32
SRAM1_DATA16AB33
SRAM1_DATA17AB34
SRAM1_DATA18AG32
SRAM1_DATA19AH29
SRAM1_DATA2Y32
SRAM1_DATA20AH30
SRAM1_DATA21AH31
SRAM1_DATA22AH32
SRAM1_DATA23AH33
SRAM1_DATA24AH34
SRAM1_DATA25AG33
SRAM1_DATA26AG34
SRAM1_DATA27AJ28
SRAM1_DATA28AJ30
SRAM1_DATA29AJ31
SRAM1_DATA30AJ33
SRAM1_DATA31AJ34
SRAM1_DATA32AK31
SRAM1_DATA33AK32
SRAM1_DATA34AK33
SRAM1_DATA35AK34
SRAM1_WEAE28
SRAM2_WEN33
SRAM2_ADDR0P32
SRAM2_ADDR1P33
SRAM2_ADDR2P34
SRAM2_ADDR3R28
SRAM2_ADDR4R29
SRAM2_ADDR5R31
SRAM2_ADDR6R33
SRAM2_ADDR7R32
SRAM2_ADDR8M33
SRAM2_ADDR9M31
SRAM2_ADDR10M28
SRAM2_ADDR11L34
SRAM2_ADDR12L33
SRAM2_ADDR13M29
SRAM2_ADDR14M32
SRAM2_ADDR15M34
SRAM2_ADDR16N29
SRAM2_ADDR17N30
SRAM2_ADDR18N31
SRAM2_DATA0J33
SRAM2_DATA1J32
SRAM2_DATA2J31
SRAM2_DATA3H32
SRAM2_DATA4H31
SRAM2_DATA5G34
SRAM2_DATA6G33
SRAM2_DATA7G32
SRAM2_DATA8G31
SRAM2_DATA9H33
SRAM2_DATA10K30
SRAM2_DATA11K31
SRAM2_DATA12K33
SRAM2_DATA13K34
SRAM2_DATA14L29
SRAM2_DATA15L30
SRAM2_DATA16L31
SRAM2_DATA17L32
SRAM2_DATA18U29
SRAM2_DATA19U28
SRAM2_DATA20T33
SRAM2_DATA21T32
SRAM2_DATA22T31
SRAM2_DATA23T30
SRAM2_DATA24T29
SRAM2_DATA25T28
SRAM2_DATA26R34
SRAM2_DATA27U30
SRAM2_DATA28U31
SRAM2_DATA29U32
SRAM2_DATA30U33
SRAM2_DATA31V29
SRAM2_DATA32V30
SRAM2_DATA33V31
SRAM2_DATA34V32
SRAM2_DATA35V33
SRAM1_BW0AE31
SRAM1_BW1AE33
SRAM1_BW2AE34
SRAM1_BW3AF28
SRAM1_ZZAE30
SRAM2_BW0N34
SRAM2_BW1P28
SRAM2_BW2P29
SRAM2_BW3P30
SRAM2_ZZP31
SRAM1_ADDR_19AD34
SRAM2_ADDR_19N32
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DRAM1_DQRS_DIV_COMP
CNET_DEBUG_CLK_1
CNET_DEBUG_DATA26CNET_DEBUG_DATA27CNET_DEBUG_DATA28
CNET_DEBUG_DATA1
CNET_DEBUG_DATA29CNET_DEBUG_DATA30
CNET_DEBUG_DATA2
CNET_LED
CNET_DEBUG_DATA31
CNET_DEBUG_DATA3CNET_DEBUG_DATA4CNET_DEBUG_DATA5CNET_DEBUG_DATA6CNET_DEBUG_DATA7
CNET_DEBUG_DATA8CNET_DEBUG_DATA9CNET_DEBUG_DATA10CNET_DEBUG_DATA11CNET_DEBUG_DATA12CNET_DEBUG_DATA13CNET_DEBUG_DATA14CNET_DEBUG_DATA15
CNET_DEBUG_DATA16CNET_DEBUG_DATA17
CNET_DEBUG_DATA0
CNET_DEBUG_DATA18
CNET_DEBUG_DATA[0:31]
CNET_DEBUG_DATA1
CNET_DEBUG_DATA19
CNET_DEBUG_DATA2CNET_DEBUG_DATA3CNET_DEBUG_DATA4
CNET_DEBUG_DATA21
CNET_DEBUG_DATA5
CNET_DEBUG_DATA22
CNET_DEBUG_DATA6CNET_DEBUG_DATA7
CNET_DEBUG_DATA23
CNET_DEBUG_DATA8CNET_DEBUG_DATA9CNET_DEBUG_DATA10
CNET_DEBUG_DATA24
CNET_DEBUG_DATA11 CNET_DEBUG_DATA20
CNET_DEBUG_DATA25
CNET_DEBUG_DATA12CNET_DEBUG_DATA13
CNET_DEBUG_DATA26
CNET_DEBUG_DATA14
CNET_DEBUG_DATA27
CNET_DEBUG_DATA15
CNET_DEBUG_DATA28
CNET_DEBUG_DATA16CNET_DEBUG_DATA17
CNET_DEBUG_DATA29
CNET_DEBUG_DATA18
CNET_DEBUG_DATA30
CNET_DEBUG_DATA19
CNET_DEBUG_CLK_0
CNET_DEBUG_DATA31
CNET_DEBUG_DATA20CNET_DEBUG_DATA21CNET_DEBUG_DATA22CNET_DEBUG_DATA23
CNET_DEBUG_DATA0
CNET_DEBUG_DATA24CNET_DEBUG_DATA25
VDD18
VDD25
VDD25
VDD18
VDD25
VDD18
VDD25
VDD25
DRAM_VREF 6DRAM_VTERM 6
DDR_CLK_200_P9DDR_CLK_200_N9
DRAM1_CK 6DRAM1_CK_N 6
DRAM_CKE 6
DRAM_ODT 6DRAM_CS_N 6
DRAM_CAS_N 6DRAM_WE_N 6DRAM1_LDM 6DRAM1_UDM 6
DRAM2_CK 6DRAM2_CK_N 6
DRAM2_LDM 6DRAM2_UDM 6
DRAM_A0 6DRAM_A1 6DRAM_A2 6DRAM_A3 6DRAM_A4 6DRAM_A5 6DRAM_A6 6DRAM_A7 6DRAM_A8 6DRAM_A9 6DRAM_A10 6DRAM_A11 6DRAM_A12 6
DRAM_BA1 6DRAM_BA0 6
DRAM_DQ06DRAM_DQ16DRAM_DQ26DRAM_DQ36DRAM_DQ46DRAM_DQ56DRAM_DQ66DRAM_DQ76DRAM_DQ86DRAM_DQ96DRAM_DQ106DRAM_DQ116DRAM_DQ126DRAM_DQ136DRAM_DQ146DRAM_DQ156DRAM_DQ166DRAM_DQ176DRAM_DQ186DRAM_DQ196DRAM_DQ206DRAM_DQ216DRAM_DQ226DRAM_DQ236DRAM_DQ246DRAM_DQ256DRAM_DQ266DRAM_DQ276DRAM_DQ286DRAM_DQ296DRAM_DQ306DRAM_DQ316
DRAM1_LDQS6DRAM1_LDQS_N6DRAM1_UDQS6DRAM1_UDQS_N6DRAM2_LDQS6DRAM2_LDQS_N6DRAM2_UDQS6DRAM2_UDQS_N6
DRAM_RAS_N 6
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CNET DRAM INTERFACE
C
5 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CNET DRAM INTERFACE
C
5 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CNET DRAM INTERFACE
C
5 14Monday, May 07, 2007
PLACE CLOSE TO U23 PIN 6
PLACE CLOSE TO U23 PIN 5
CNET USER (Yellow)
PLACE CLOSE TO VREF PINS
USE FLY-BY TERMINATION
TGND IS BODY PAD UNDER DEVICE
C382
0.1UF
C382
0.1UF
R204 49.9R204 49.9
C347
0.1UF
C347
0.1UF
R205 49.9R205 49.9
C3300.1UFC330
0.1UF
U3I
CNET_FPGA
U3I
CNET_FPGA
CNTRL0_DDR2_ADDRESS0AK1
CNTRL0_DDR2_ADDRESS1AL2
CNTRL0_DDR2_ADDRESS2AL1
CNTRL0_DDR2_ADDRESS3AH8
CNTRL0_DDR2_ADDRESS4AG7
CNTRL0_DDR2_ADDRESS5AH6
CNTRL0_DDR2_ADDRESS6AH5
CNTRL0_DDR2_ADDRESS7AJ8
CNTRL0_DDR2_ADDRESS8AJ7
CNTRL0_DDR2_ADDRESS9Y2
CNTRL0_DDR2_ADDRESS10AD2
CNTRL0_DDR2_ADDRESS11AD4
CNTRL0_DDR2_ADDRESS12AG2
CNTRL0_DDR2_DQ0V7
CNTRL0_DDR2_DQ1V8
CNTRL0_DDR2_DQ2V5
CNTRL0_DDR2_DQ3V6
CNTRL0_DDR2_DQ4W3
CNTRL0_DDR2_DQ5W4
CNTRL0_DDR2_DQ6Y1
CNTRL0_DDR2_DQ7AA1
CNTRL0_DDR2_DQ8Y4
CNTRL0_DDR2_DQ9AA2
CNTRL0_DDR2_DQ10AB2
CNTRL0_DDR2_DQ11AA3
CNTRL0_DDR2_DQ12AA4
CNTRL0_DDR2_DQ13AC1
CNTRL0_DDR2_DQ14Y9
CNTRL0_DDR2_DQ15AA5
CNTRL0_DDR2_DQS0V4
CNTRL0_DDR2_DQS0_NV3
CNTRL0_DDR2_DQS1W8
CNTRL0_DDR2_DQS1_NW7
CNTRL0_DDR2_CLK0Y7
CNTRL0_DDR2_CK0BY6
CNTRL0_DDR2_CKEAE5
CNTRL0_DDR2_ODT0AG4
CNTRL0_DDR2_CSBAE4
CNTRL0_DDR2_RASBAJ2
CNTRL0_DDR2_CASBAJ1
CNTRL0_DDR2_WEBAF8
CNTRL0_DDR2_DM0AH4
CNTRL0_DDR2_BA0AF7
CNTRL0_DDR2_BA1AK2
CNTRL0_DDR2_CK1AC7
CNTRL0_DDR2_CK1BAC6
CNTRL0_DDR2_DM2AE2
CNTRL0_DDR2_DM3AD8
CNTRL0_DDR2_DQS2AB4
CNTRL0_DDR2_DQS2_NAB3
CNTRL0_DDR2_DQS3AH2
CNTRL0_DDR2_DQS3_NAH1
VREF1W2
VREF2Y3
CNTRL0_DDR2_DM1AF2
DDR_CLK_200AJ17
DDR_CLK_200BAH17
CNTL0_RST_DQS_DIV_OUTAB8
CNTL0_RST_DQS_DIV_INAB7
CNTRL0_DDR2_DQ16AA7
CNTRL0_DDR2_DQ17AA8
CNTRL0_DDR2_DQ18AB5
CNTRL0_DDR2_DQ19AB6
CNTRL0_DDR2_DQ20AC3
CNTRL0_DDR2_DQ21AC4
CNTRL0_DDR2_DQ22AD1
CNTRL0_DDR2_DQ23AE1
CNTRL0_DDR2_DQ24AC9
CNTRL0_DDR2_DQ25AF3
CNTRL0_DDR2_DQ26AF4
CNTRL0_DDR2_DQ27AE7
CNTRL0_DDR2_DQ28AE8
CNTRL0_DDR2_DQ29AF5
CNTRL0_DDR2_DQ30AF6
CNTRL0_DDR2_DQ31AH3
VREF3AB1
VREF4AC2
VREF5AD3
VREF6AG1
VREF7AG3
VREF8AG5
VREF9AK3
VRPAJ4
VRNAJ5
C33422UFC33422UF
C34022UFC34022UF
C3350.1UFC3350.1UF
R213 82R213 82
+ C341100UF
+ C341100UFC332
22UFC33222UF
+C331100UF
+C331100UF
R214 82R214 82
R104100R104100
C3330.1UFC3330.1UF
R215 130R215 130
C34222UFC34222UF
DEBUG
U3J
CNET_FPGA
DEBUG
U3J
CNET_FPGA
DEBUG_LEDAL10
DEBUG_CLK0AF16
DEBUG_CLK1AG16
DEBUG_DATA0AJ15
DEBUG_DATA1AH15
DEBUG_DATA2AM14
DEBUG_DATA3AJ14
DEBUG_DATA4AH14
DEBUG_DATA5AG14
DEBUG_DATA6AF14
DEBUG_DATA7AL12
DEBUG_DATA8AM13
DEBUG_DATA9AL13
DEBUG_DATA10AK13
DEBUG_DATA11AJ13
DEBUG_DATA12AK11
DEBUG_DATA13AJ11
DEBUG_DATA14AG11
DEBUG_DATA15AJ12
DEBUG_DATA16AH13
DEBUG_DATA17AG10
DEBUG_DATA18AM11
DEBUG_DATA19AL11
DEBUG_DATA20AH11
DEBUG_DATA21AJ9
DEBUG_DATA22AM7
DEBUG_DATA23AH10
DEBUG_DATA24AK8
DEBUG_DATA25AL9
DEBUG_DATA26AL8
DEBUG_DATA27AG13
DEBUG_DATA28AL7
DEBUG_DATA29AK10
DEBUG_DATA30AM9
DEBUG_DATA31AK9
RXNPAD2A30
RXNPAD4A26
RXNPAD5A22
RXNPAD6A18
RXNPAD7A14
RXNPAD8A10
RXNPAD9A6
RXNPAD11A2
RXNPAD17AP10
RXNPAD18AP14
RXNPAD19AP18
RXNPAD20AP22
RXNPAD21AP26
RXNPAD23AP30
RXPPAD2A31
RXPPAD4A27
RXPPAD5A23
RXPPAD6A19
RXPPAD7A15
RXPPAD8A11
RXPPAD9A7
RXPPAD11A3
RXPPAD18AP15
RXPPAD17AP11
RXPPAD19AP19
RXPPAD20AP23
RXPPAD21AP27
RXPPAD23AP31
R105100R105100
R216 130R216 130
R122100R122100
U23
LP2996
U23
LP2996
SD2
VSENSE3
VREF4
VTT8
VDDQ5
GND1
PVIN7
AVIN6
TGND9
+ C343100UF
+ C343100UF
C381
0.1UF
C381
0.1UF
D2
LED
D2
LED
C34422UFC34422UF
J4
HEADER 20X2
J4
HEADER 20X2
2468
10121416182022242628303234363840
13579111315171921232527293133353739
C383
0.1UF
C383
0.1UF
C32922UFC32922UF
R81
39
R81
39
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VDD18
VDD18
VDD18
VDD18
VDD18
VDD18
DRAM1_LDQS 5DRAM1_LDQS_N 5DRAM1_UDQS 5DRAM1_UDQS_N 5
DRAM1_CK5DRAM1_CK_N5DRAM_CKE5DRAM_ODT5DRAM_CS_N5
DRAM_CAS_N5DRAM_WE_N5DRAM1_LDM5DRAM1_UDM5
DRAM_BA05DRAM_BA15
DRAM_A05DRAM_A15DRAM_A25DRAM_A35DRAM_A45DRAM_A55DRAM_A65DRAM_A75DRAM_A85DRAM_A95DRAM_A105DRAM_A115DRAM_A125
DRAM2_LDQS 5DRAM2_LDQS_N 5DRAM2_UDQS 5DRAM2_UDQS_N 5
DRAM_VTERM5
DRAM_VREF5
DRAM_DQ1 5DRAM_DQ0 5
DRAM_DQ3 5DRAM_DQ2 5
DRAM_DQ4 5
DRAM_DQ6 5DRAM_DQ5 5
DRAM_DQ7 5
DRAM_DQ9 5DRAM_DQ8 5
DRAM_DQ11 5DRAM_DQ10 5
DRAM_DQ13 5DRAM_DQ12 5
DRAM_DQ15 5DRAM_DQ14 5
DRAM_DQ17 5DRAM_DQ16 5
DRAM_DQ19 5DRAM_DQ18 5
DRAM_DQ20 5
DRAM_DQ22 5DRAM_DQ21 5
DRAM_DQ23 5
DRAM_DQ25 5DRAM_DQ24 5
DRAM_DQ27 5DRAM_DQ26 5
DRAM_DQ29 5DRAM_DQ28 5
DRAM_DQ31 5DRAM_DQ30 5
DRAM2_CK5DRAM2_CK_N5
DRAM2_LDM5DRAM2_UDM5
DRAM_RAS_N5
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- SDRAMS
C
6 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- SDRAMS
C
6 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- SDRAMS
C
6 14Monday, May 07, 2007
USE FLY-BY TERMINATION -- PLACE RESISTORS AND CAPS CLOSE TO U21
DISTRIBUTE EVENLY AROUND U20 AND U21
DISTRIBUTE EVENLY AROUND U20 AND U21
LOCATE WITHIN 250MILS OF U20
LOCATE WITHIN 250MILS OF U21
C3650.1UFC3650.1UF
R181
49.9
R181
49.9
R186
49.9
R186
49.9
C35322UFC35322UF
R188
49.9
R188
49.9
C37922UFC37922UF
R182
49.9
R182
49.9
C3660.1UFC3660.1UF
C37722UFC37722UF
R162
49.9
R162
49.9
C35422UFC35422UF
C3670.1UFC3670.1UF
R183
49.9
R183
49.9
C3800.1UFC3800.1UF
C3190.1UFC3190.1UF
R163
49.9
R163
49.9
C35522UFC35522UF
C3220.1UFC3220.1UF
C3680.1UFC3680.1UF
R184
49.9
R184
49.9
L15
BLM18AG601SN1D
L15
BLM18AG601SN1D
C3780.1UFC3780.1UF
R164
49.9
R164
49.9
C35622UFC35622UF
R161
49.9
R161
49.9
C3180.1UFC3180.1UF
C3230.1UFC3230.1UF
C3690.1UFC3690.1UF
R165
49.9
R165
49.9
R185
49.9
R185
49.9
C35722UFC35722UF
L14
BLM18AG601SN1D
L14
BLM18AG601SN1D
C3700.1UFC3700.1UF
R166
49.9
R166
49.9
C35822UFC35822UF
R174
49.9
R174
49.9
C3200.1UFC3200.1UF
C35222UFC35222UF
C3710.1UFC3710.1UF
R167
49.9
R167
49.9
C35922UFC35922UF
R151
49.9
R151
49.9
U20
MT47H16M16BG
U20
MT47H16M16BG
CKEK2
CKJ8
CK_BK8
ODTK9
CS_BL8
RAS_BK7
CAS_BL7
WE_BK3
LDMF3
UDMB3
BA0L2
BA1L3
A0M8
A1M3
A2M7
A3N2
A4N8
A5N3
A6N7
A7P2
A8P8
A9P3
A10M2
A11P7
A12R2
DQ0G8
DQ1G2
DQ2H7
DQ3H3
DQ4H1
DQ5H9
DQ6F1
DQ7F9
DQ8C8
DQ9C2
DQ10D7
DQ11D3
DQ12D1
DQ13D9
DQ14B1
DQ15B9
LDQSF7
LDQS_BE8
UDQSB7
UDQS_BA8
VSS1A3
VSS2E3
VSS3J3
VSS4N1
VSS5P9
VSSQ1A7
VSSQ2B2
VSSQ3B8
VSSQ4D2
VSSQ5D8
VSSQ6E7
VSSQ7F2
VSSQ8F8
VSSQ9H2
VSSQ10H8
VDD1A1
VDD2E1
VDD3J9
VDD4M9
VDD5R1
VDDQ1A9
VDDQ2C1
VDDQ3C3
VDDQ4C7
VDDQ5C9
VDDQ6E9
VDDQ7G1
VDDQ8G3
VDDQ9G7
VDDQ10G9
NC1A2
NC2E2
RFUL1
NC3R3
NC4R7
NC5R8
VDDLJ1
VSSDLJ7
VREFJ2
R175
49.9
R175
49.9
R150
49.9
R150
49.9
C3720.1UFC3720.1UF
R173
49.9
R173
49.9
C3600.1UFC3600.1UF
R168
49.9
R168
49.9
C3210.1UFC3210.1UF
R176
49.9
R176
49.9
U21
MT47H16M16BG
U21
MT47H16M16BG
CKEK2
CKJ8
CK_BK8
ODTK9
CS_BL8
RAS_BK7
CAS_BL7
WE_BK3
LDMF3
UDMB3
BA0L2
BA1L3
A0M8
A1M3
A2M7
A3N2
A4N8
A5N3
A6N7
A7P2
A8P8
A9P3
A10M2
A11P7
A12R2
DQ0G8
DQ1G2
DQ2H7
DQ3H3
DQ4H1
DQ5H9
DQ6F1
DQ7F9
DQ8C8
DQ9C2
DQ10D7
DQ11D3
DQ12D1
DQ13D9
DQ14B1
DQ15B9
LDQSF7
LDQS_BE8
UDQSB7
UDQS_BA8
VSS1A3
VSS2E3
VSS3J3
VSS4N1
VSS5P9
VSSQ1A7
VSSQ2B2
VSSQ3B8
VSSQ4D2
VSSQ5D8
VSSQ6E7
VSSQ7F2
VSSQ8F8
VSSQ9H2
VSSQ10H8
VDD1A1
VDD2E1
VDD3J9
VDD4M9
VDD5R1
VDDQ1A9
VDDQ2C1
VDDQ3C3
VDDQ4C7
VDDQ5C9
VDDQ6E9
VDDQ7G1
VDDQ8G3
VDDQ9G7
VDDQ10G9
NC1A2
NC2E2
RFUL1
NC3R3
NC4R7
NC5R8
VDDLJ1
VSSDLJ7
VREFJ2
C3120.1UFC3120.1UF
C3730.1UFC3730.1UF
C36122UFC36122UF
R169
49.9
R169
49.9
R177
49.9
R177
49.9
C3240.1UFC3240.1UF
C3130.1UFC3130.1UF
C3740.1UFC3740.1UF
C36222UFC36222UF
R170
49.9
R170
49.9
R178
49.9
R178
49.9
R171
49.9
R171
49.9
C36322UFC36322UF
R179
49.9
R179
49.9
C3250.1UFC3250.1UF
C3750.1UFC3750.1UF
R172
49.9
R172
49.9
R180
49.9
R180
49.9
C36422UFC36422UF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SATA0_VTTX
SATA0_RXP_T
PHY_MDC_T
SATA0_VTRX
CNET_HSWPCNET_PWRD
SATA1_RXN_T
SATA1_TXP_T
SATA0_RXN_T
SATA0_AVCCAUXRX
SATA1_AVCCAUXRX
SATA0_TXP_T
SATA0_AVCCAUXTX
SATA1_TXN_T
SATA1_VTRX
CNET_M1CNET_M0
SATA1_VTTX
SATA0_TXN_T
SATA1_AVCCAUXTX
CNET_M2
SATA1_RXP_T
VDD25
VDD25
VDD25
VDD25 VDD25
VDD25
RP_DATA7 1
RP_CS_B1
PHY_MDC 8
RGMII_1_TX_CLK 8RGMII_1_TX_EN 8RGMII_1_TX_D0 8RGMII_1_TX_D1 8RGMII_1_TX_D2 8RGMII_1_TX_D3 8
RGMII_0_TX_D0 8RGMII_0_TX_D1 8RGMII_0_TX_D2 8RGMII_0_TX_D3 8
RGMII_0_TX_CLK 8RGMII_0_TX_EN 8
RGMII_3_TX_D1 8RGMII_3_TX_D2 8RGMII_3_TX_D3 8
RP_RDWR_B1
RGMII_3_TX_D0 8
RGMII_3_TX_CLK 8RGMII_3_TX_EN 8
RGMII_2_TX_CLK 8RGMII_2_TX_EN 8RGMII_2_TX_D0 8RGMII_2_TX_D1 8RGMII_2_TX_D2 8RGMII_2_TX_D3 8
SATA_VTT13
SATA_VCCAUX13
SATA0_TXP13
SATA0_TXN13
RP_CCLK1RP_PROG_B1RP_INIT_B1
SATA0_RXP13
SATA0_RXN13
SATA1_TXP13
SATA1_TXN13
SATA1_RXP13
RP_DONE 1,9,14
SATA1_RXN13
SATA_GNDA13
RP_DATA0 1
CNET_TCK13CNET_TMS13CPCI_TDO1
RP_DATA1 1
RGMII_2_RX_CLK8RGMII_2_RX_DV8
RGMII_2_RX_D08RGMII_2_RX_D18RGMII_2_RX_D28RGMII_2_RX_D38
RGMII_3_RX_CLK8RGMII_3_RX_DV8
RGMII_3_RX_D08RGMII_3_RX_D18RGMII_3_RX_D28RGMII_3_RX_D38
PHY_REF_CLK12
RGMII_0_RX_CLK8RGMII_0_RX_DV8
RGMII_0_RX_D08RGMII_0_RX_D18RGMII_0_RX_D28RGMII_0_RX_D38
PHY_MDIO8
RGMII_1_RX_D08RGMII_1_RX_D18RGMII_1_RX_D28RGMII_1_RX_D38
RGMII_1_RX_CLK8RGMII_1_RX_DV8
RP_DATA2 1RP_DATA3 1RP_DATA4 1RP_DATA5 1
CNET_TDO 13
RP_DATA6 1
RP_BUSY 1
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CNET RGMII AND SATA INTERFACES
C
7 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CNET RGMII AND SATA INTERFACES
C
7 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CNET RGMII AND SATA INTERFACES
C
7 14Monday, May 07, 2007
LOCATE AS CLOSE TO CNET PINS AS POSSIBLE
RGMII 1
RGMII 2
RGMII 3
RGMII 0
U3C
CNET_FPGA
RGMII 1
RGMII 2
RGMII 3
RGMII 0
U3C
CNET_FPGA
RGMII_0_TX_CTLAG25
RGMII_0_TXD0AL28
RGMII_0_TXD1AM28
RGMII_0_TXD2AE24
RGMII_0_TXD3AF24
RGMII_0_TXCAF25
RGMII_0_RXCH18
RGMII_0_RX_CTLAK25
RGMII_0_RXD0AL26
RGMII_0_RXD1AM26
RGMII_0_RXD2AJ26
RGMII_0_RXD3AK26
RGMII_1_RXCD18
RGMII_1_RX_CTLAG22
RGMII_1_RXD0AK27
RGMII_1_RXD1AL27
RGMII_1_RXD2AG24
RGMII_1_RXD3AH24
RGMII_1_TXD0AE22
RGMII_1_TXD1AF22
RGMII_1_TXD2AJ22
RGMII_1_TXD3AK22
RGMII_1_TX_CTLAL24
RGMII_1_TXCAJ24
RGMII_2_RXCAJ18
RGMII_2_RX_CTLAL22
RGMII_2_RXD0AE20
RGMII_2_RXD1AF20
RGMII_2_RXD2AH23
RGMII_2_RXD3AJ23
RGMII_2_TXD0AG21
RGMII_2_TXD1AH21
RGMII_2_TXD2AK21
RGMII_2_TXD3AM21
RGMII_2_TX_CTLAM22
RGMII_2_TXCAJ21
RGMII_3_RXCAL18
RGMII_3_RX_CTLAK14
RGMII_3_RXD0AF19
RGMII_3_RXD1AG19
RGMII_3_RXD2AH20
RGMII_3_RXD3AJ20
RGMII_3_TXD0AH19
RGMII_3_TXD1AJ19
RGMII_3_TXD2AK19
RGMII_3_TXD3AL19
RGMII_3_TX_CTLAF18
RGMII_3_TXCAL21
PHY_MDIOAL33
PHY_MDCAL34
GTX_CLKJ17
R99
4.7K
R99
4.7K
C86
0.1UF
C86
0.1UF
C84
0.1UF
C84
0.1UF
R87
22
R87
22
R101
100
R101
100
C85
0.1UF
C85
0.1UF
C87
0.1UF
C87
0.1UF
R93 49.9R93 49.9
L6
BLM18AG102SN1J
L6
BLM18AG102SN1J
R100
4.7K
R100
4.7K
L10
BLM18AG102SN1J
L10
BLM18AG102SN1J
CONFIG
JTAG
SATA PINS
U3D
CNET_FPGA
CONFIG
JTAG
SATA PINS
U3D
CNET_FPGA
RP_CCLKAE9
RP_PROG_BJ26
RP_INIT_BAL6
HSWAP_ENK25
M0AF26
M1AE26
M2AE25
RP_DONEAE10
TCLKJ9
TMSK10
TDIH28
TDOH7
PWRDWN_BAF9
DXPK26
DXNG27
AVCCAUXRX4B26
VTRXPAD4B27
AVCCAUXTX4B28
VTTXPAD4B29
AVCCAUXRX6B18
VTRXPAD6B19
AVCCAUXTX6B20
VTTXPAD6B21
AVCCAUXRX7B14
VTRXPAD7B15
AVCCAUXTX7B16
VTTXPAD7B17
AVCCAUXRX9B6
VTRXPAD9B7
AVCCAUXTX9B8
VTTXPAD9B9
AVCCAUXRX18AN14
VTRXPAD18AN15
AVCCAUXTX18AN16
VTTXPAD18AN17
AVCCAUXRX19AN18
VTRXPAD19AN19
AVCCAUXTX19AN20
VTTXPAD19AN21
NC1G8
GNDA4C27
GNDA6C20
GNDA7C15
GNDA9C8
GNDA18AM15
GNDA19AM20
RP_CS_BAL30
RP_RDWR_BAL29
RP_DATA0AG9
RP_DATA1AH9
RP_DATA2AK6
RP_DATA3AK7
RP_DATA4AK28
RP_DATA5AK29
RP_DATA6AH26
RP_DATA7AG26
AVCCAUXRX14AN2
VTRX14AN3
AVCCAUXTX14AN4
VTTX14AN5
GNDA14AM5
AVCCAUXRX16AN6
VTRX16AN7
AVCCAUXTX16AN8
VTTX16AN9
GNDA16AM8
TXP16AP8
TXN16AP9
RXP16AP7
RXN16AP6
TXP14AP4
TXN14AP5
RXP14AP3
RXN14AP2
AVCCAUXRX20AN22
VTRXPAD20AN23
AVCCAUXTX20AN24
VTTXPAD20AN25
GNDA20AM23
AVCCAUXRX21AN26
VTRXPAD21AN27
AVCCAUXTX21AN28
VTTXPAD21AN29
GNDA21AM27
AVCCAUXRX23AN30
VTRXPAD23AN31
AVCCAUXTX23AN32
VTTXPAD23AN33
GNDA23AM30
AVCCAUXRX2B30
VTRXPAD2B31
AVCCAUXTX2B32
VTTXPAD2B33
GNDA2C30
AVCCAUXRX5B22
VTRXPAD5B23
AVCCAUXTX5B24
VTTXPAD5B25
GNDA5C23
AVCCAUXRX8B10
VTRXPAD8B11
AVCCAUXTX8B12
VTTXPAD8B13
GNDA8C12
AVCCAUXRX11B2
VTRXPAD11B3
AVCCAUXTX11B4
VTTXPAD11B5
GNDA11C5
AVCCAUXRX17AN10
VTRXPAD17AN11
AVCCAUXTX17AN12
VTTXPAD17AN13
GNDA17AM12
RP_BUSYAL5
L5
BLM18AG102SN1J
L5
BLM18AG102SN1J
L12
BLM18AG102SN1J
L12
BLM18AG102SN1J
R130
220
R130
220
R86 49.9R86 49.9
R74
4.7K
R74
4.7K
R94 49.9R94 49.9
L7
BLM18AG102SN1J
L7
BLM18AG102SN1J
L9
BLM18AG102SN1J
L9
BLM18AG102SN1J
R95 49.9R95 49.9
R96
100
R96
100
L8
BLM18AG102SN1J
L8
BLM18AG102SN1J
L11
BLM18AG102SN1J
L11
BLM18AG102SN1J
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
P0_MDIO_0P 10P0_MDIO_0N 10P0_MDIO_1P 10P0_MDIO_1N 10P0_MDIO_2P 10P0_MDIO_2N 10P0_MDIO_3P 10P0_MDIO_3N 10
RGMII_1_RX_CLK 7RGMII_1_RX_DV 7
P1_RX_LED 10P1_TX_LED 10
RGMII_2_TX_D07RGMII_2_TX_D17RGMII_2_TX_D27RGMII_2_TX_D37
RGMII_2_TX_CLK7RGMII_2_TX_EN7
RGMII_0_RX_D2 7RGMII_0_RX_D3 7
P1_MDIO_0P 10P1_MDIO_0N 10P1_MDIO_1P 10
P0_RX_LED 10
P1_MDIO_1N 10P1_MDIO_2P 10
P3_RX_LED 10
P1_MDIO_2N 10
P3_TX_LED 10
P1_MDIO_3P 10P1_MDIO_3N 10
P0_TX_LED 10
RGMII_0_RX_CLK 7RGMII_0_RX_DV 7RGMII_0_RX_D0 7RGMII_0_RX_D1 7
P2_MDIO_0P 10P2_MDIO_0N 10P2_MDIO_1P 10P2_MDIO_1N 10P2_MDIO_2P 10P2_MDIO_2N 10P2_MDIO_3P 10P2_MDIO_3N 10
RGMII_1_RX_D0 7RGMII_1_RX_D1 7RGMII_1_RX_D2 7RGMII_1_RX_D3 7
RGMII_0_TX_D07RGMII_0_TX_D17RGMII_0_TX_D27RGMII_0_TX_D37
RGMII_0_TX_CLK7
PHY_MDC7PHY_MDIO7
RGMII_0_TX_EN7
P3_MDIO_0P 10P3_MDIO_0N 10P3_MDIO_1P 10P3_MDIO_1N 10P3_MDIO_2P 10
RGMII_3_TX_EN7RGMII_3_TX_D07
P3_MDIO_3P 10P3_MDIO_2N 10
RGMII_3_TX_D17
P3_MDIO_3N 10
RGMII_3_TX_D27RGMII_3_TX_D37
RGMII_3_TX_CLK7
RGMII_2_RX_CLK 7RGMII_2_RX_DV 7RGMII_2_RX_D0 7RGMII_2_RX_D1 7RGMII_2_RX_D2 7RGMII_2_RX_D3 7
P2_RX_LED 10P2_TX_LED 10
RGMII_3_RX_CLK 7RGMII_3_RX_DV 7RGMII_3_RX_D0 7RGMII_3_RX_D1 7RGMII_3_RX_D2 7RGMII_3_RX_D3 7
RGMII_1_TX_CLK7RGMII_1_TX_EN7
RGMII_1_TX_D07RGMII_1_TX_D17RGMII_1_TX_D27RGMII_1_TX_D37
PHY_INT_B 2
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- RGMII PORTS
C
8 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- RGMII PORTS
C
8 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- RGMII PORTS
C
8 14Monday, May 07, 2007
LOCATE AS CLOSE TO PHY
PINS AS POSSIBLE
LOCATE AS CLOSE TO PHY
PINS AS POSSIBLE
LOCATE AS CLOSE TO PHY
PINS AS POSSIBLE
LOCATE AS CLOSE TO PHY
PINS AS POSSIBLE
C300.1UFC300.1UF
R3049.9R3049.9
C180.1UFC180.1UF
C200.1UFC200.1UF
R3349.9R3349.9
C250.1UFC250.1UF
C240.1UFC240.1UF
R2149.9R2149.9
C320.1UFC320.1UF
R3749.9R3749.9
R1849.9R1849.9
R3449.9R3449.9
C270.1UFC270.1UF
R2749.9R2749.9
R2249.9R2249.9
R1349.9R1349.9
R3849.9R3849.9
C210.1UFC210.1UF
R3149.9R3149.9
R2849.9R2849.9
C170.1UFC170.1UF
U6A
BCM5464SR
U6A
BCM5464SR
MDC1H16
MDIO1J16
P1_LED1M13
P1_LED2M14
P1_LED3M16
P1_LED4M15
P1_GTXCLKA13
P1_TX_ENB13
P1_TXD0E14
P1_TXD1D14
P1_TXD2C14
P1_TXD3C13
P1_SGIN_PD1
P1_SGIN_NE1
P1_PTIN_PD3
P1_PTIN_NE3
P1_TRD0_PT16
P1_TRD0_NT15
P1_TRD1_PR15
P1_TRD1_NR16
P1_TRD2_PT14
P1_TRD2_NT13
P1_TRD3_PR13
P1_TRD3_NR14
P1_RXCA14
P1_RX_DVB14
P1_RXD0A15
P1_RXD1B15
P1_RXD2C15
P1_RXD3D15
P1_SCLK_PD4
P1_SCLK_NE4
P1_SGOUT_PD5
P1_SGOUT_NE5
P1_PTOUT_PD2
P1_PTOUT_NE2
MDC2H13
MDIO2H12
P2_LED1L9
P2_LED2L10
P2_LED3L11
P2_LED4L12
P2_GTXCLKA11
P2_TX_ENB11
P2_TXD0E12
P2_TXD1E11
P2_TXD2D11
P2_TXD3C11
P2_SGIN_PF1
P2_SGIN_NG1
P2_PTIN_PF3
P2_PTIN_NG3
P2_TRD0_PR9
P2_TRD0_NR10
P2_TRD1_PT10
P2_TRD1_NT9
P2_TRD2_PR11
P2_TRD2_NR12
P2_TRD3_PT12
P2_TRD3_NT11
P2_RXCA12
P2_RX_DVB12
P2_RXD0D13
P2_RXD1E13
P2_RXD2D12
P2_RXD3C12
P2_SCLK_PF4
P2_SCLK_NG4
P2_SGOUT_PF5
P2_SGOUT_NG5
P2_PTOUT_PF2
P2_PTOUT_NG2
R2549.9R2549.9
C290.1UFC290.1UF
C230.1UFC230.1UF
R1449.9R1449.9
U6B
BCM5464SR
U6B
BCM5464SR
MDC3H11
MDIO3H10
P3_LED1L15
P3_LED2L13
P3_LED3L16
P3_LED4L14
P3_GTXCLKA7
P3_TX_ENB8
P3_TXD0E9
P3_TXD1E8
P3_TXD2D8
P3_TXD3C8
P3_SGIN_PJ1
P3_SGIN_NK1
P3_PTIN_PJ3
P3_PTIN_NK3
P3_TRD0_PT8
P3_TRD0_NT7
P3_TRD1_PR7
P3_TRD1_NR8
P3_TRD2_PT6
P3_TRD2_NT5
P3_TRD3_PR5
P3_TRD3_NR6
P3_RXCA8
P3_RX_DVC9
P3_RXD0C10
P3_RXD1D10
P3_RXD2E10
P3_RXD3D9
P3_SCLK_PJ4
P3_SCLK_NK4
P3_SGOUT_PJ5
P3_SGOUT_NK5
P3_PTOUT_PJ2
P3_PTOUT_NK2
MDC4J15
MDIO4J14
P4_LED1K6
P4_LED2L6
P4_LED3L7
P4_LED4L8
P4_GTXCLKA5
P4_TX_ENB6
P4_TXD0B5
P4_TXD1C5
P4_TXD2D6
P4_TXD3C6
P4_SGIN_PL1
P4_SGIN_NM1
P4_PTIN_PL3
P4_PTIN_NM3
P4_TRD0_PR1
P4_TRD0_NR2
P4_TRD1_PT2
P4_TRD1_NT1
P4_TRD2_PR3
P4_TRD2_NR4
P4_TRD3_PT4
P4_TRD3_NT3
P4_RXCA6
P4_RX_DVB7
P4_RXD0E6
P4_RXD1E7
P4_RXD2D7
P4_RXD3C7
P4_SCLK_PL4
P4_SCLK_NM4
P4_SGOUT_PL5
P4_SGOUT_NM5
P4_PTOUT_PL2
P4_PTOUT_NM2
C310.1UFC310.1UF
R1949.9R1949.9
C260.1UFC260.1UF
R3249.9R3249.9
R3549.9R3549.9
C190.1UFC190.1UF
R1149.9R1149.9
R1549.9R1549.9
R2949.9R2949.9
R2349.9R2349.9
R949.9R949.9
R3949.9R3949.9
R2049.9R2049.9
C280.1UFC280.1UF
R2649.9R2649.9
R3649.9R3649.9
R1249.9R1249.9
R1749.9R1749.9
R1649.9R1649.9
R2449.9R2449.9
R1049.9R1049.9
R4049.9R4049.9
C220.1UFC220.1UF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
XTAL1 XTAL2
VDD25
VDD25
AVDDL
AVDDL
VDD25
VDD25
VDD25
VDD25
VDD33VDD25
VDD25
VDD25
VDD25VDD33
VDD25VDD33
VDD25VDD33
VDD25VDD33
DVDD
AVDDL
RP_DONE1,7,14
DDR_CLK_200_P 5DDR_CLK_200_N 5
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- PHY MODE SETTINGS
C
9 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- PHY MODE SETTINGS
C
9 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- PHY MODE SETTINGS
C
9 14Monday, May 07, 2007
LOCATE WITHIN 250MILS OF U6
LOCATE AS CLOSE TO PHY PINS AS POSSIBLE
LOCATE WITHIN 250MILS OF U6
USE FLY-BY TERMINATION
LOCATE WITHIN 500MILS OF U6
U6C
BCM5464SR
U6C
BCM5464SR
XTALIH3
XTALOH4
RESET_NF14
INTF_SEL0J9
INTF_SEL1J8
INTF_SEL2J7
INTF_SEL3J6
PHYA_REVJ12
PHYA0G9
PHYA1G10
PHYA2G11
PHYA3G13
PHYA4G14
ANENH8
F1000H7
SPD0H6
EN_RTBIF13
FDXJ10
MANMSK10
HUBJ13
ERH9
GTXCLKDLYJ11
RXCDLYK7
MDIO_SEL0H14
MDIO_SEL1H15
TEST0F10
TEST1F9
TRSTK14
TCKK13
TMSK16
TDIK15
XTALVDDM6
CLK125A16
RDACP2
TVCOC3
STVCOH5
DNC_1K8
DNC_2K9
DNC_3K11
REGSUP1F7
REGCTL1G6
REGSEN1F6
REGSUP2F8
REGCTL2G7
REGSEN2G8
BIASVDDP1
PLLVDD1C1
PLLGND1C2
PLLVDD2H1
PLLGND2H2
TDOK12
C3280.1UFC3280.1UF
C3490.1UFC3490.1UF
C3360.1UFC3360.1UF
C340.1UFC340.1UF
R120100R120100
R207150R207150
L4
BLM18AG601SN1D
L4
BLM18AG601SN1D
R208 82R208 82R210 130R210 130
C3140.1UFC3140.1UF
R121100R121100
C3722UFC3722UF
C3522UFC3522UF
R118100R118100
C3322UFC3322UF
U27
SO_720
U27
SO_720
EN1
NC2
VDD6
GND3
OUT_P4
OUT_N5 C316 0.01UFC316 0.01UF
C3370.1UFC3370.1UF
C380.1UFC380.1UF
Q5MJD45H11Q5MJD45H11
C4722PFC4722PF
R212100R212100
C3380.1UFC3380.1UF
R84100R84100
C3390.1UFC3390.1UF
R824.7KR824.7K
C3170.1UFC3170.1UF
L3
BLM18AG601SN1D
L3
BLM18AG601SN1D
C4822PFC4822PF
Q6MJD45H11Q6MJD45H11
C3450.1UFC3450.1UF
R83100R83100
C315 0.01UFC315 0.01UF
R209 82R209 82R211 130R211 130
U28
ICS873321_01
U28
ICS873321_01
MR1
CLK_P2
CLK_N3
NC4
VCC8
Q_P7
Q_N6
VEE5
C360.1UFC360.1UF
Y1
25MHz
Y1
25MHz
R206150R206150
R85100R85100
C3260.1UFC3260.1UF
L1
BLM18AG601SN1D
L1
BLM18AG601SN1D
C34822UFC34822UF
L2
BLM18AG601SN1D
L2
BLM18AG601SN1D
C3270.1UFC3270.1UF
R73 1.24KR73 1.24K
R119100R119100
R1234.7KR1234.7K
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
P0_MDIO_3P8
P0_MDIO_3N8
P0_MDIO_2P8
P0_MDIO_2N8
P0_MDIO_1P8
P0_MDIO_1N8
P0_MDIO_0P8
P0_MDIO_0N8
P0_TX_LED8
P0_RX_LED8
P3_TX_LED8
P3_RX_LED8
P3_MDIO_3N8
P3_MDIO_2N8
P3_MDIO_3P8
P3_MDIO_1N8
P3_MDIO_2P8
P3_MDIO_1P8
P3_MDIO_0N8
P3_MDIO_0P8
P1_TX_LED8
P1_RX_LED8
P1_MDIO_3P8
P1_MDIO_3N8
P1_MDIO_2P8
P1_MDIO_2N8
P1_MDIO_1P8
P1_MDIO_1N8
P1_MDIO_0P8
P1_MDIO_0N8
P2_RX_LED8
P2_TX_LED8
P2_MDIO_3P8
P2_MDIO_3N8
P2_MDIO_2P8
P2_MDIO_2N8
P2_MDIO_1P8
P2_MDIO_1N8
P2_MDIO_0P8
P2_MDIO_0N8
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- XAUI CONNECTORS
C
10 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- XAUI CONNECTORS
C
10 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- XAUI CONNECTORS
C
10 14Monday, May 07, 2007
LOCATE AS CLOSE TO J1PINS AS POSSIBLE
LOCATE AS CLOSE TO J1 PINS AS POSSIBLE
LOCATE AS CLOSE TO J1 PINS AS POSSIBLE
LOCATE AS CLOSE TO J1 PINS AS POSSIBLE
C8 0.1UFC8 0.1UF
1:1
75
1000 pF, 2 KV
A+
A-
B+
B-
C+
C-
D+
D-
1
2
3
6
4
5
7
8
LED 2
LED 1
75
1:1
75
1:1
75
1:1
J1B
QUAD RJ45
1:1
75
1000 pF, 2 KV
A+
A-
B+
B-
C+
C-
D+
D-
1
2
3
6
4
5
7
8
LED 2
LED 1
75
1:1
75
1:1
75
1:1
J1B
QUAD RJ45
TCT1B12
TD1_PB11
TD1_MB10
TCT2B6
TD2_PB4
TD2_MB5
TCT3B1
TD3_PB3
TD3_MB2
TCT4B7
TD4_PB8
TD4_MB9
SH
IELD
S2
LED2AB16
LED2CB15
LED1AB14
LED1CB13
C6 0.1UFC6 0.1UF
R139R139
C13 0.1UFC13 0.1UF
C7 0.1UFC7 0.1UF
R839R839
R239R239
C38422UFC38422UF
C2 0.1UFC2 0.1UF
R639R639
C1 0.1UFC1 0.1UF
C12 0.1UFC12 0.1UF
C3 0.1UFC3 0.1UF
R339R339
C9 0.1UFC9 0.1UF
1:1
75
1000 pF, 2 KV
A+
A-
B+
B-
C+
C-
D+
D-
1
2
3
6
4
5
7
8
LED 2
LED 1
75
1:1
75
1:1
75
1:1
J1C
QUAD RJ45
1:1
75
1000 pF, 2 KV
A+
A-
B+
B-
C+
C-
D+
D-
1
2
3
6
4
5
7
8
LED 2
LED 1
75
1:1
75
1:1
75
1:1
J1C
QUAD RJ45
TCT1C12
TD1_PC11
TD1_MC10
TCT2C6
TD2_PC4
TD2_MC5
TCT3C1
TD3_PC3
TD3_MC2
TCT4C7
TD4_PC8
TD4_MC9
SH
IELD
S3
LED2AC16
LED2CC15
LED1AC14
LED1CC13
C14 0.1UFC14 0.1UF
C16 0.1UFC16 0.1UF
C5 0.1UFC5 0.1UF
1:1
75
1000 pF, 2 KV
A+
A-
B+
B-
C+
C-
D+
D-
1
2
3
6
4
5
7
8
LED 2
LED 1
75
1:1
75
1:1
75
1:1
J1A
QUAD RJ45
1:1
75
1000 pF, 2 KV
A+
A-
B+
B-
C+
C-
D+
D-
1
2
3
6
4
5
7
8
LED 2
LED 1
75
1:1
75
1:1
75
1:1
J1A
QUAD RJ45
TCT1A12
TD1_PA11
TD1_MA10
TCT2A6
TD2_PA4
TD2_MA5
TCT3A1
TD3_PA3
TD3_MA2
TCT4A7
TD4_PA8
TD4_MA9
SH
IELD
S1
LED2AA16
LED2CA15
LED1AA14
LED1CA13
L16
MPZ2012S221A
L16
MPZ2012S221A
C15 0.1UFC15 0.1UF
R739R739
R439R439
C4 0.1UFC4 0.1UF
C10 0.1UFC10 0.1UF
1:1
75
1000 pF, 2 KV
A+
A-
B+
B-
C+
C-
D+
D-
1
2
3
6
4
5
7
8
LED 2
LED 1
75
1:1
75
1:1
75
1:1
J1D
QUAD RJ45
1:1
75
1000 pF, 2 KV
A+
A-
B+
B-
C+
C-
D+
D-
1
2
3
6
4
5
7
8
LED 2
LED 1
75
1:1
75
1:1
75
1:1
J1D
QUAD RJ45
TCT1D12
TD1_PD11
TD1_MD10
TCT2D6
TD2_PD4
TD2_MD5
TCT3D1
TD3_PD3
TD3_MD2
TCT4D7
TD4_PD8
TD4_MD9
SH
IELD
S4
LED2AD16
LED2CD15
LED1AD14
LED1CD13
C11 0.1UFC11 0.1UF
R539R539
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VDD25
VDD33
VDD33
VDD25
VDD25
VDD18
VDD25
VDD25
VDD25
VDD33
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD15
VDD25
VDD25
P5V
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CPCI & CNET POWER CONNECTIONS
C
11 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CPCI & CNET POWER CONNECTIONS
C
11 14Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CPCI & CNET POWER CONNECTIONS
C
11 14Monday, May 07, 2007
HEADER FOR COOLING FAN FOR CNET
J8
HEADER
J8
HEADER
321
POWER PINS
U1D
CPCI_FPGA
POWER PINS
U1D
CPCI_FPGA
GND1A1
GND2A22
GND3AA2
GND4AA21
GND5AB1
GND6AB22
GND7B2
GND8B21
GND9C3
GND10C20
GND11J9
GND12J10
GND13J11
GND14J12
GND15J13
GND16J14
GND17K9
GND18K10
GND19K11
GND20K12
GND21K13
GND22K14
GND23L9
GND24L10
GND25L11
GND26L12
GND27L13
GND28L14
GND29M9
GND30M10
GND31M11
GND32M12
GND33M13
GND34M14
GND35N9
GND36N10
GND37N11
GND38N12
GND39N13
GND40N14
GND41P9
GND42P10
GND43P11
GND44P12
GND45P13
GND46P14
GND47Y3
GND48Y20
VCCINT1E5
VCCINT2E18
VCCINT3F6
VCCINT4F17
VCCINT5G7
VCCINT6G8
VCCINT7G9
VCCINT8G14
VCCINT9G15
VCCINT10G16
VCCINT11H7
VCCINT12H16
VCCINT13J7
VCCINT14J16
VCCINT15P7
VCCINT16P16
VCCINT17R7
VCCINT18R16
VCCINT19T7
VCCINT20T8
VCCINT21T9
VCCINT22T14
VCCINT23T15
VCCINT24T16
VCCINT25U6
VCCINT26U17
VCCINT27V5
VCCINT28V18
VCCO_4_1T12
VCCO_4_2T13
VCCO_4_3U13
VCCO_4_4U14
VCCO_4_5U15
VCCO_4_6U16
VCCO_5_1T10
VCCO_5_2T11
VCCO_5_3U7
VCCO_5_4U8
VCCO_5_5U9
VCCO_5_6U10
VCCO_6_1M7
VCCO_6_2N6
VCCO_6_3N7
VCCO_6_4P6
VCCO_6_5R6
VCCO_6_6T6
VCCO_7_1G6
VCCO_7_2H6
VCCO_7_3J6
VCCO_7_4K6
VCCO_7_5K7
VCCO_7_6L7
VCCO_0_1F7
VCCO_0_2F8
VCCO_0_3F9
VCCO_0_4F10
VCCO_0_5G10
VCCO_0_6G11
VCCO_1_1F13
VCCO_1_2F14
VCCO_1_3F15
VCCO_1_4F16
VCCO_1_5G12
VCCO_1_6G13
VCCO_2_1G17
VCCO_2_2H17
VCCO_2_3J17
VCCO_2_4K16
VCCO_2_5K17
VCCO_2_6L16
VCCO_3_1M16
VCCO_3_2N16
VCCO_3_3N17
VCCO_3_4P17
VCCO_3_5R17
VCCO_3_6T17
POWER PINS
U3F
CNET_FPGA
POWER PINS
U3F
CNET_FPGA
VBATTK9
VCCAUX1AL3
VCCAUX2AL32
VCCAUX3AM17
VCCAUX4AM18
VCCAUX5AM3
VCCAUX6AM31
VCCAUX7AM32
VCCAUX8AM4
VCCAUX9C17
VCCAUX10C18
VCCAUX11C3
VCCAUX12C31
VCCAUX13C32
VCCAUX14C4
VCCAUX15D3
VCCAUX16D32
VCCINT1AA13
VCCINT2AA22
VCCINT3AB13
VCCINT4AB14
VCCINT5AB15
VCCINT6AB16
VCCINT7AB17
VCCINT8AB18
VCCINT9AB19
VCCINT10AB20
VCCINT11AB21
VCCINT12AB22
VCCINT13AC12
VCCINT14AC23
VCCINT15AD11
VCCINT16AD24
VCCINT17L11
VCCINT18L24
VCCINT19M12
VCCINT20M23
VCCINT21N13
VCCINT22N14
VCCINT23N15
VCCINT24N16
VCCINT25N17
VCCINT26N18
VCCINT27N19
VCCINT28N20
VCCINT29N21
VCCINT30N22
VCCINT31P13
VCCINT32P22
VCCO_0_1C29
VCCO_0_2E20
VCCO_0_3F25
VCCO_0_4L20
VCCO_0_5L21
VCCO_0_6L22
VCCO_0_7L23
VCCO_0_8M18
VCCO_0_9M19
VCCO_0_10M20
VCCO_2_1F3
VCCO_2_2K6
VCCO_2_3M11
VCCO_2_4N11
VCCO_2_5N12
VCCO_2_6P11
VCCO_2_7P12
VCCO_2_8R5
VCCO_2_9R11
VCCO_2_10R12
VCCO_3_1AA11
VCCO_3_2AA12
VCCO_3_3AB11
VCCO_3_4AB12
VCCO_3_5AC11
VCCO_3_6AE6
VCCO_3_7AJ3
VCCO_3_8V12
VCCO_3_9W12
VCCO_3_10Y11
VCCO_4_1AC13
VCCO_4_2AC14
VCCO_4_3AC15
VCCO_4_4AC16
VCCO_4_5AC17
VCCO_4_6AD12
VCCO_4_7AD13
VCCO_4_8AD14
VCCO_4_9AD15
VCCO_4_10AJ10
VCCO_5_1AC18
VCCO_5_2AC19
VCCO_5_3AC20
VCCO_5_4AC21
VCCO_5_5AC22
VCCO_5_6AD20
VCCO_5_7AD21
VCCO_5_8AD22
VCCO_5_9AD23
VCCO_5_10AJ25
VCCO_6_1AA23
VCCO_6_2AA24
VCCO_6_3AB23
VCCO_6_4AB24
VCCO_6_5AC24
VCCO_6_6AE29
VCCO_6_7AJ32
VCCO_6_8V23
VCCO_6_9W23
VCCO_6_10Y23
VCCO_1_1C6
VCCO_1_2E15
VCCO_1_3F10
VCCO_1_4L12
VCCO_1_5L13
VCCO_1_6L14
VCCO_1_7L15
VCCO_1_8M13
VCCO_1_9M14
VCCO_1_10M15
VCCO_7_1F32
VCCO_7_2K29
VCCO_7_3M24
VCCO_7_4N23
VCCO_7_5N24
VCCO_7_6P23
VCCO_7_7P24
VCCO_7_8R23
VCCO_7_9R24
VCCO_7_10R30
VCCAUX17U1
VCCAUX18U34
VCCAUX19V1
VCCAUX20V34
VCCINT33R13
VCCINT34R22
VCCINT35T13
VCCINT36T22
VCCINT37U13
VCCINT38U22
VCCINT39V13
VCCINT40V22
VCCINT41W13
VCCINT42W22
VCCINT43Y13
VCCINT44Y22
VCCO_0_11M21
VCCO_0_12M22
VCCO_1_11M16
VCCO_1_12M17
VCCO_7_11T23
VCCO_7_12U23
VCCO_6_11Y24
VCCO_6_12Y30
VCCO_5_11AK20
VCCO_5_12AM29
VCCO_4_11AK15
VCCO_4_12AM6
VCCO_3_11Y12
VCCO_3_12Y5
VCCO_2_11T12
VCCO_2_12U12
GROUND PINS
U3E
CNET_FPGA
GROUND PINS
U3E
CNET_FPGA
GND1AA14
GND2AA15
GND3AA16
GND4AA17
GND5AA18
GND6AA19
GND7AA20
GND8AA21
GND9AC27
GND10AC30
GND11AC5
GND12AC8
GND13AE3
GND14AE32
GND15AF1
GND16AF34
GND17AG12
GND18AG15
GND19AG20
GND20AG23
GND21AG27
GND22AG8
GND23AH28
GND24AH7
GND25AJ29
GND26AJ6
GND27AK12
GND28AK23
GND29AK30
GND30AK5
GND31AL31
GND32AL4
GND33AM1
GND34AM10
GND35AM16
GND36AM19
GND37AM2
GND38AM25
GND39AM33
GND40AM34
GND41AN1
GND42AN34
GND43B1
GND44B34
GND45C1
GND46C10
GND47C16
GND48C19
GND49C2
GND50C25
GND51C33
GND52C34
GND53D31
GND54D4
GND55E12
GND56E23
GND57E30
GND58E5
GND59F29
GND60F6
GND61G28
GND124W16
GND62G7
GND63H12
GND64H15
GND65H20
GND66H23
GND67H27
GND68H8
GND69J1
GND70J34
GND71K3
GND72K32
GND73M27
GND74M30
GND75M5
GND76M8
GND77P14
GND78P15
GND79P16
GND80P17
GND81P18
GND82P19
GND83P20
GND84P21
GND85R14
GND86R15
GND87R16
GND88R17
GND89R18
GND90R19
GND91R20
GND92R21
GND93R27
GND94R8
GND95T1
GND96T14
GND97T15
GND98T16
GND99T17
GND100T18
GND101T19
GND102T20
GND103T21
GND104T34
GND105U14
GND106U15
GND107U16
GND108U17
GND109U18
GND110U19
GND111U20
GND112U21
GND113V14
GND114V15
GND115V16
GND116V17
GND117V18
GND118V19
GND119V20
GND120V21
GND121W1
GND122W14
GND123W15
GND125W17
GND126W18
GND127W19
GND128W20
GND129W21
GND130W34
GND131Y14
GND132Y15
GND133Y16
GND134Y17
GND135Y18
GND136Y19
GND137Y20
GND138Y21
GND139Y27
GND140Y8
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
REF125_T
CPCI_CLK_T
SRAM2_CLK_TSRAM1_CLK_T
REF125
REF125
REF62_5
REF62_5
CNET_CPCI_CLK_TPHY_REF_CLK_T
CNET_CLK_T
DVDDDVDD
VDD25
VDD33 VDD33 VDD33 VDD33
VDD33 VDD33 VDD33 VDD33
AVDDL
VDD25
VDD25
AVDDL
VDD25
VDD25 VDD25
VDD33
VDD25 VDD25
VDD25
VDD18
VDD33 VDD33
VDD33
VDD33
VDD33
VDD33 VDD33
VDD33
VDD33
P5V
VDD33
VDD25
VDD25
VDD25
VDD25
CPCI_CLK 2
CNET_CPCI_CLK 3
SRAM1_CLK 4
SRAM2_CLK 4
PHY_REF_CLK 7
CNET_CLK 3
CNET_CLK_SEL2
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- PHY POWER; CLOCK GEN.
C
12 16Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- PHY POWER; CLOCK GEN.
C
12 16Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- PHY POWER; CLOCK GEN.
C
12 16Monday, May 07, 2007
PLACE ONE CAP DIRECTLY ACROSS PINS 3 & 4 AND
ONE CAP DIRECTLY ACROSS PINS 18 & 17.
DISTRUBUTE REMAINING CAPS EVENLY AROUND UY26
PLACE A CAP DIRECTLY ACROSS PINS 3 & 6 AND
DIRECTLY ACROSS PINS 15 & 10. DISTRIBUTE
REMAINING CAPS AROUND U16
MATCH THE LENGTH OF *_CLK_T + *_CLK TO +/- 0.1"
PLACE ONE CAP DIRECTLY FORM PIN 8 TO GND.
DISTRUBUTE REMAINING CAPS EVELY AROUND u16
DISTRIBUTE EVENLY ON ALL FOUR SIDES OF U6
LENGTH L1
LENGTH L2
MATCH LENGTHS L1 AND L2 TO WITHIN 50 MILS.
MAXIMUM LENGTH: 1000 MILS.
HEADER FOR COOLING FAN FOR PHY
DISTRIBUTE BETWEEN
PADS OF U6
DISTRIBUTE BETWEEN PADS OF U6PLACE NEAR
PIN 3 OF Q6
PLACE NEAR
PIN 3 OF Q5
0603 PARTS --
PLACE NEXT TO U6
0805
0603
DISTRIBUTE EVENLY ON ALL
FOUR SIDES OF U6
PLACE NEAR PIN
1 OF Q5 AND Q6
R924.7KNONE
R924.7KNONE
C4000.1UFC4000.1UF
C1030.1UFC1030.1UF
C4310.1UFC4310.1UF
R80
22
R80
22
C4050.1UFC4050.1UF
C3950.1UFC3950.1UF
U26
ICS83056I_01
U26
ICS83056I_01
CLK014
CLK17
Q019
Q116
Q212
Q39
Q45
Q52
SEL020
SEL115
SEL211
SEL310
SEL46
SEL51
OE13
VDD8
VDDO13
VDDO218
GND14
GND217
C1010.1UFC101
0.1UF
C37622UFC37622UF
C42210UFC42210UF
C400.1UFC400.1UF
C3990.1UFC3990.1UF
C2790.1UFC2790.1UF
C28810UFC28810UF
U25
ICS558_01
U25
ICS558_01
VDDC15
GNDC10
VDDP3
GNDP6
CMOSIN7
S01
S12
OE08
OE19
SELPECL16
PECLIN4
PECLIN_B5
CLK114
CLK213
CLK312
CLK411
C3910.1UFC3910.1UF
C41610UFC41610UF
C4340.1UFC4340.1UF
C4070.1UFC4070.1UF
C41410UFC41410UF
C4080.1UFC4080.1UF
R78
22
R78
22
C3900.1UFC3900.1UF
C4100.1UFC4100.1UF
C2800.1UFC2800.1UF
R75
22
R75
22
C4330.1UFC4330.1UF
C41810UFC41810UF
C2780.1UFC2780.1UF
C4210UFC4210UF
C1000.1UFC1000.1UF
C4130.1UFC4130.1UF
R195100
R195100
TP6
TEST_POINT
TP6
TEST_POINT
1
C42410UFC42410UF
C3980.1UFC3980.1UF
C1090.1UFC1090.1UF
U6D
BCM5464SR
U6D
BCM5464SR
AVDD_1N1
AVDD_2N2
AVDD_3N3
AVDD_4N4
AVDD_5N13
AVDD_6N14
AVDD_7N15
AVDD_8N16
GND_1A3
GND_2B2
GND_3B3
GND_4B9
GND_5B10
GND_6E15
GND_7E16
GND_8F11
GND_9F12
GND_10G12
GND_11G15
GND_12M9
GND_13M10
GND_14N5
GND_15N6
GND_16N9
GND_17N10
GND_18P3
GND_19P4
GND_20P5
GND_21P6
GND_22P9
GND_23P10
GND_24P13
GND_25P14
GND_26P15
GND_27P16
AVDDL_1M7
AVDDL_2M8
AVDDL_3M11
AVDDL_4M12
AVDDL_5N7
AVDDL_6N8
AVDDL_7N11
AVDDL_8N12
AVDDL_9P7
AVDDL_10P8
AVDDL_11P11
AVDDL_12P12
DVDD_1A4
DVDD_2A9
DVDD_3B4
DVDD_4C4
DVDD_5F15
DVDD_6F16
OVDD_1A1
OVDD_2A2
OVDD_3A10
OVDD_4B16
OVDD2_1C16
OVDD2_2G16
PVDD_1B1
PVDD_2D16
R1944.7KR1944.7K
R77
22
R77
22
TP2
TEST_POINT
TP2
TEST_POINT
1
J9
HEADER
J9
HEADER
321
C4020.1UFC4020.1UF
R1024.7KR1024.7K
C970.1UFC970.1UF
TP5
TEST_POINT
TP5
TEST_POINT
1 R76
22
R76
22
C2960.1UFC2960.1UF
C41210UFC41210UF
R79
22
R79
22
C1080.1UFC1080.1UF
C4110UFC4110UF
C4010.1UFC4010.1UF
C3940.1UFC3940.1UF
TP3
TEST_POINT
TP3
TEST_POINT
1
C3970.1UFC3970.1UF
C4060.1UFC4060.1UF
C1070.1UFC1070.1UF
C4090.1UFC4090.1UF
C27222UFC27222UF
C930.1UFC930.1UF
C30410UFC30410UF
C4230.1UFC4230.1UF
C1020.1UFC1020.1UF
C3930.1UFC3930.1UF
C4350.1UFC4350.1UF
C990.1UFC990.1UF
C35022UFC35022UF
C29210UFC29210UF
Q7BSS138Q7
BSS138
C4170.1UFC4170.1UF
C4320.1UFC4320.1UF
C28910UFC28910UF
C980.1UFC980.1UF
C2810.1UFC2810.1UF
C29110UFC29110UF
C4150.1UFC4150.1UF
C1060.1UFC1060.1UF
C3960.1UFC3960.1UF
C4380.1UFC4380.1UF
C4030.1UFC4030.1UF
R217
4.7K
R217
4.7K
C4310UFC4310UF
C27510UFC27510UF
C4110.1UFC4110.1UF
C3070.1UFC3070.1UF
C4190.1UFC4190.1UF
C3920.1UFC3920.1UF
R193205
R193205
C21510UFC21510UF
C3060.1UFC3060.1UF
C950.1UFC950.1UF
C960.1UF
C960.1UF
C940.1UFC940.1UF
R192100
R192100
C29010UFC29010UF
C4250.1UFC4250.1UF
C3020.1UFC3020.1UF
R197100
R197100
C3050.1UFC3050.1UF
U16
OSC_125MHZ
U16
OSC_125MHZ
VCC4
NC1
OUT3
GND2
C1050.1UFC1050.1UF
C30022UFC30022UF
C4040.1UFC4040.1UF
C1040.1UFC1040.1UF
U24
LT1963EQ-ADJ
U24
LT1963EQ-ADJ
IN2
SHDN1
ADJ5
OUT4
GND3
GNDT6
TP1
TEST_POINT
TP1
TEST_POINT
1
R1964.7K
R1964.7K
R97
22
R97
22TP4
TEST_POINT
TP4
TEST_POINT
1
C3510.1UFC351
0.1UF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CNET_TCK_T
PHY_TCK_T
JTAG_TDO
AUX_NR
JTAG_TDI
CPCI_TDI_T
CNET_TMS_T
CPCI_TMS_T
VTT_NR
JTAG_TMS
PHY_TMS_T
JTAG_TCK CPCI_TCK_T
P5V
VDD25
VDD33
P5V
VDD25 VDD33VDD33
VDD25
VDD15
P5V
VDD25
VDD25
P5V
VDD25
VDD25
P5V
VDD33
VDD25
VDD25 VDD25
VDD33
VDD33VDD15
SATA0_RXN7
AD_IO_141
AD_IO_16 1AD_IO_171AD_IO_18 1
AD_IO_191AD_IO_20 1
SATA0_RXP7
AD_IO_211AD_IO_22 1
AD_IO_251AD_IO_26 1AD_IO_271AD_IO_28 1
AD_IO_291AD_IO_30 1AD_IO_311
AD_IO_2 1AD_IO_31
AD_IO_4 1AD_IO_51AD_IO_6 1
AD_IO_71
RESET_N 1PCLK1
IDSEL 1
AD_IO_15 1
GNT_N 1
CBE_IO_0 1
CBE_IO_11
CBE_IO_21
CBE_IO_31
AD_IO_81
AD_IO_9 1AD_IO_101
AD_IO_11 1AD_IO_121AD_IO_13 1
SATA0_TXP7SATA0_TXN7
SATA_VCCAUX 7
SATA_VTT 7
CPCI_TCK 1
CNET_TCK 7
CNET_TDO7
AD_IO_0 1
CPCI_TMS 1
CNET_TMS 7
AD_IO_11
CPCI_TDI 1
STOP_N 1
FRAME_N 1
PAR 1
TRDY_N 1IRDY_N1
DEVSEL_IO1
PERR_N1
SERR_N1
REQ_N1
SATA1_TXP7SATA1_TXN7
SATA1_RXP7SATA1_RXN7
PWRST_N 1,14,15
AD_IO_24 1
INTR_A 1
SATA_GNDA 7
AD_IO_231
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- PCI & SATA CONNECTORS; POWER SUPPLIES
C
13 16Thursday, May 22, 2008
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- PCI & SATA CONNECTORS; POWER SUPPLIES
C
13 16Thursday, May 22, 2008
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- PCI & SATA CONNECTORS; POWER SUPPLIES
C
13 16Thursday, May 22, 2008
R45 & R88 ARE NORMALLY NOT LOADED
R218 AND L13 CAN OCCUPY SAME LOCATION
ON PCB. WILL NOT LOAD BOTH COMPONENTS.
PLACE RESISTORS WITHIN
SWITCH FOOTPRINT
PLACE CLOSE TO PIN 2
+ C78100UF
+ C78100UF
C3870.01UFC3870.01UF
R125
33
R125
33
C800.1UFC800.1UF
U17
SN74ALVC125D
U17
SN74ALVC125D
1OE1
1A2
2A5
2OE4
3OE10
3A9
4OE13
4A12
1Y3
2Y6
3Y8
4Y11
VCC14
GND7
R48470R48470
C2160.01UFC2160.01UF
R2190
NONE
R2190
NONE
C2140.1UFC2140.1UF
U10
LTC1326_25
U10
LTC1326_25
VCC31
VCC252
VCCA3
PBR_N8
GND4
RST5
RST_N6
SRST7
R113
33
R113
33
C880.1UFC880.1UF
R111
33
R111
33
U9
UM6200
U9
UM6200
VOUT4
VIN6
ON_OFF1
GND5
TRIM3
SENSE2
C385
0.01UF
C385
0.01UF
R45100KNONE
R45100KNONE
+ C45100UF
+ C45100UF
TP8
TEST_POINT
TP8
TEST_POINT
1
R126220R126220
L13
2961666671
L13
2961666671
R47470R47470
U14
TPS79525
U14
TPS79525
IN2
EN1
NR5
OUT4
GND3
GNDT6
R88100KNONE
R88100KNONE
C3880.01UFC3880.01UF
J5
SATA_CONN
J5
SATA_CONN
GND_11
HTXP2
HTXN3
GND_44
HRXP5
HRXN6
GND_77
R54180R54180
SW4
SW DIP-2
SW4
SW DIP-2
+ C89100UF
+ C89100UF
C810.1UFC810.1UF
R108
33
R108
33
R2180NONE
R2180NONE
U18
SN74ALVC125D
U18
SN74ALVC125D
1OE1
1A2
2A5
2OE4
3OE10
3A9
4OE13
4A12
1Y3
2Y6
3Y8
4Y11
VCC14
GND7
R2200
NONE
R2200
NONE
R465.36KR465.36K
R110
33
R110
33
R55180R55180
C900.1UFC900.1UFC386
0.01UFC3860.01UF
R109
33
R109
33
R8913.7KR8913.7K
C830.1UFC830.1UF
+ C79100UF
+ C79100UF
J7
HDR_14P
J7
HDR_14P
13579
1113
2468101214
C3890.01UFC3890.01UF
+ C92100UF
+ C92100UF
R124100R124100
C460.1UFC460.1UF
U12
UM6200
U12
UM6200
VOUT4
VIN6
ON_OFF1
GND5
TRIM3
SENSE2
R62100R62100
+ C77100UF
+ C77100UF
R112
33
R112
33
+ C82100UF
+ C82100UF
TP7
TEST_POINT
TP7
TEST_POINT
1
R131180R131180
C2170.01UFC2170.01UF
-12V
TCK
Ground
TDO
+5V
+5V
INTB#
INTD#
PRSNT1#
Reserved
PRSNT2#
KEYWAY
Reserved
TRST#
+12V
TMS
TDI
+5V
INTA#
INTC#
+5V
Reserved
Reserved
+VI/O
Ground
Ground
CLK
+VDI/O
REQ#
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
AD[31]
AD[29]
AD[27]
AD[25]
+3.3V
C/BE[3]#
AD[23]
AD[21]
AD[19]
+3.3V
AD[17]
C/BE[2]#
IRDY#
+3.3V
DEVSEL#
PCIXCAP/GND
LOCK#
PERR#
+3.3V
SERR#
3.3Vaux
RST#
+VI/O
GNT#
PME#
AD[30]
+3.3V
AD[28]
AD[26]
AD[24]
IDSEL
+3.3V
+3.3V
+3.3V
AD[22]
AD[20]
AD[18]
AD[16]
FRAME#
TRDY#
Ground
SMBCLK
SMBDAT
STOP#
+3.3V
+3.3V
+3.3V
+5V
+5V
+5V
+5V
+VI/O +VI/O
Ground
Ground
Ground
Ground
C/BE[1]#
AD[14]
AD[12]
AD[10]
M66EN/GND
PAR
AD[15]
AD[13]
AD[11]
AD[09]
KEYWAY
AD[08]
AD[07]
AD[05]
AD[03]
AD[01]
ACK64#
AD[06]
+3.3V
AD[04]
AD[02]
AD[00]
C/BE[0]#
REQ64#
P1
PCI_EDGE_CON
-12V
TCK
Ground
TDO
+5V
+5V
INTB#
INTD#
PRSNT1#
Reserved
PRSNT2#
KEYWAY
Reserved
TRST#
+12V
TMS
TDI
+5V
INTA#
INTC#
+5V
Reserved
Reserved
+VI/O
Ground
Ground
CLK
+VDI/O
REQ#
Ground
Ground
Ground
Ground
Ground
Ground
Ground
Ground
AD[31]
AD[29]
AD[27]
AD[25]
+3.3V
C/BE[3]#
AD[23]
AD[21]
AD[19]
+3.3V
AD[17]
C/BE[2]#
IRDY#
+3.3V
DEVSEL#
PCIXCAP/GND
LOCK#
PERR#
+3.3V
SERR#
3.3Vaux
RST#
+VI/O
GNT#
PME#
AD[30]
+3.3V
AD[28]
AD[26]
AD[24]
IDSEL
+3.3V
+3.3V
+3.3V
AD[22]
AD[20]
AD[18]
AD[16]
FRAME#
TRDY#
Ground
SMBCLK
SMBDAT
STOP#
+3.3V
+3.3V
+3.3V
+5V
+5V
+5V
+5V
+VI/O +VI/O
Ground
Ground
Ground
Ground
C/BE[1]#
AD[14]
AD[12]
AD[10]
M66EN/GND
PAR
AD[15]
AD[13]
AD[11]
AD[09]
KEYWAY
AD[08]
AD[07]
AD[05]
AD[03]
AD[01]
ACK64#
AD[06]
+3.3V
AD[04]
AD[02]
AD[00]
C/BE[0]#
REQ64#
P1
PCI_EDGE_CON
A1A2A3A4A5A6A7A8A9A10A11
A14A15A16A17A18A19A20A21A22A23A24A25A26A27A28A29A30A31A32A33A34A35A36A37A38A39A40A41A42A43A44A45A46A47A48A49
A52A53A54A55A56A57A58A59A60A61A62
B1B2B3B4B5B6B7B8B9
B10B11
B14B15B16B17B18B19B20B21B22B23B24B25B26B27B28B29B30B31B32B33B34B35B36B37B38B39B40B41B42B43B44B45B46B47B48B49
B52B53B54B55B56B57B58B59B60B61B62
+ C91100UF
+ C91100UF
J6
SATA_CONN
J6
SATA_CONN
GND_11
HTXP2
HTXN3
GND_44
HRXP5
HRXN6
GND_77
U13
TPS79525
U13
TPS79525
IN2
EN1
NR5
OUT4
GND3
GNDT6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VDD33VDD25 VDD33VDD33
P5V
VDD33
VDD25 VDD15
VDD33
VDD33
VDD25VDD18
VDD25
VDD25
VDD33
VDD25
VDD25
VDD15VDD15VDD15VDD15
VDD25
VDD33
VDD25
VDD25
VDD33
VDD25
VDD15
VDD15
VDD15
VDD15
VDD25
VDD33
VDD25 VDD25
VDD25
VDD33
VDD25
VDD33
VDD25
VDD25
VDD25
VDD25
VDD25
VDD15
VDD15
VDD15
VDD15
VDD25
VDD33
VDD25
VDD15VDD15VDD15VDD15
VDD25
VDD33
VDD25
VDD25
VDD25
VDD25VDD25VDD25VDD25
VDD25 VDD25 VDD25 VDD25
VDD25
VDD25 VDD25
VDD25
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15VDD15
VDD15VDD15
VDD25
VDD25VDD25
VDD25
PWRST_N1,13,15
RP_DONE1,7,9
CPCI_CFG_DONE1,3,15
PWRST 15
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- LEDS
C
14 15Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- LEDS
C
14 15Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- LEDS
C
14 15Monday, May 07, 2007
RESET (Red)
CNET DONE (Green)
CPCI DONE (Green)
1p8
CNET PACKAGE
DISTRIBUTE THESE CAPS UNIFORMLY AROUND THE PACKAGE
CPCI PACKAGE
DISTRIBUTE THESE CAPS UNIFORMLY AROUND THE PACKAGE
C2740.1UFC2740.1UF
C2990.1UFC2990.1UF
D6
LED
D6
LED
C1160.1UFC1160.1UF
C520.1UFC520.1UF
C1180.1UFC1180.1UF
C610.1UFC610.1UF
R132
39
R132
39
C2760.1UFC2760.1UF
D8
LED
D8
LED
C530.1UFC530.1UF C346
0.1UFC3460.1UF
C1190.1UFC1190.1UF
C1170.1UFC1170.1UF
C1100.1UFC1100.1UF
C1290.1UFC1290.1UF
D4
LED
D4
LED
C1220.1UFC1220.1UF
C2850.1UFC2850.1UF
R134
100
R134
100
C540.1UFC540.1UF
C4200.1UFC4200.1UF
C4390.1UFC4390.1UF
C700.1UFC700.1UF
C750.1UFC750.1UF
U29
SN74LVC06APW
U29
SN74LVC06APW
1A1
1Y2
2A3
2Y4
3A5
3Y6
GND7
4Y8
4A9
5Y10
5A11
6Y12
6A13
VCC14
C510.1UFC510.1UF
C1230.1UFC1230.1UF
C1200.1UFC1200.1UF
C710.1UFC710.1UF
C1240.1UFC1240.1UF
C2770.1UFC2770.1UF
R128
100
R128
100
C760.1UFC760.1UF
C620.1UFC620.1UF
C720.1UFC720.1UF
C740.1UFC740.1UF
R138
100
R138
100
C3100.1UFC3100.1UF
C490.1UFC490.1UF
C2860.1UFC2860.1UF
C1210.1UFC1210.1UF
C1110.1UFC1110.1UF
C630.1UFC630.1UF
C3110.1UFC3110.1UF
C3010.1UFC3010.1UF C436
0.1UFC4360.1UF
C2870.1UFC2870.1UF
C500.1UFC500.1UF
C580.1UFC580.1UF
C1120.1UFC1120.1UF
C640.1UFC640.1UF
C2950.1UFC2950.1UF
C1250.1UFC1250.1UF
D3
LED
D3
LED
C4400.1UFC4400.1UF
C550.1UFC550.1UF
C590.1UFC590.1UF
C1260.1UFC1260.1UF
C2970.1UFC2970.1UF
C3030.1UFC3030.1UF
C650.1UFC650.1UF
C560.1UFC560.1UF
C600.1UFC600.1UF
C1270.1UFC1270.1UF
C1140.1UFC1140.1UF
R127
100
R127
100
Q9BSS138Q9
BSS138
C2980.1UFC2980.1UF
C660.1UFC660.1UF
D9
LED
D9
LED
C2820.1UFC2820.1UF
C3080.1UFC3080.1UF
C1150.1UFC1150.1UF
C670.1UFC670.1UF
C570.1UFC570.1UF
R135
130
R135
130
C2830.1UFC2830.1UF
D7
LED
D7
LED
C1280.1UFC1280.1UF
C4370.1UFC4370.1UF
D5
LED
D5
LED
R136
4.7K
R136
4.7K
C680.1UFC680.1UF
C2730.1UFC2730.1UF
C2840.1UFC2840.1UF
R137
100
R137
100
C2930.1UFC2930.1UF
D10
LED
D10
LED
C3090.1UFC3090.1UF
C730.1UFC730.1UF
C690.1UFC690.1UF
C1130.1UFC1130.1UF
C2940.1UFC2940.1UF
R129
100
R129
100
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROM_TMS
CPCI_CFG_INIT_B
PROM_TDOPROM_TDI
PROM_TCK
VDD25
VDD25
VDD25
VDD33
VDD25VDD25VDD25
VDD25
VDD25
VDD25
VDD25
VDD25
VDD25VDD25
VDD25
VDD25
CPCI_CFG_CLK1,3
NF2_RP_PROG_B3
NF2_RP_EN3
NF2_RP_DIN3
CPCI_CFG_DONE1,3,14
PWRST14
CPCI_CFG_DIN 1
PWRST_N 1,13,14
CPCI_ALLOW_REPROG1
CPCI_CFG_INIT_B1,3
PROG_SEL 1
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CPCI CONFIGURATION LOGIC
C
15 16Tuesday, May 08, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CPCI CONFIGURATION LOGIC
C
15 16Tuesday, May 08, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- CPCI CONFIGURATION LOGIC
C
15 16Tuesday, May 08, 2007
S-R LATCH
S
RQ
/Q
U30
SN74LVC157APW
U30
SN74LVC157APW
/A_B1
1A2
1B3
1Y4
2A5
2B6
2Y7
GND8
3Y9
3B10
3A11
4Y12
4B13
4A14
/G15
VCC16
R51470R51470
U31
SN74LVC1G07DBV
U31
SN74LVC1G07DBV
NC1
A2
GND3
Y4
VCC5
U32
SN74LVC1G08DBV
U32
SN74LVC1G08DBV
A1
B2
GND3
Y4
VCC5
R52470R52470
C4430.1UFC4430.1UF
C4440.1UFC4440.1UF
C4420.1UFC4420.1UF
R107
4.7K
R107
4.7K
R53470R53470
J2
HDR_14P
J2
HDR_14P
13579
1113
2468101214
U2
XCF02S
U2
XCF02S
TCK6
TMS5
TDI4
TDO17
CLK3
CE10
OE_RESET8
CF7
CEO13
D01
NC_12
NC_29
NC_312
VCCJ20
VCCO19
VCCINT18
GND11
NC_414
NC_515
NC_616
R2220
NONE
R2220
NONE
R2230NONE
R2230NONE
R2240R2240
>= 1
>= 1
U33
SN74LVC2G02DCU
>= 1
>= 1
U33
SN74LVC2G02DCU
1A1
1B2
2Y3
GND4
2A5
2B6
1Y7
VCC8
R2210
NONE
R2210
NONE
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VDD33
VDD25VDD33
VDD25
VDD25 VDD25VDD33
VDD25
VDD33
VDD25VDD33
VDD25
VDD25
VDD15
VDD25VDD33
VDD25
VDD25
VDD25
VDD25VDD33
VDD25VDD33
VDD25VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- FIELD BYPASS CAPS
C
16 16Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- FIELD BYPASS CAPS
C
16 16Monday, May 07, 2007
Title
Size Document Number Rev
Date: Sheet of
<Doc> B
NET FPGA BOARD -- FIELD BYPASS CAPS
C
16 16Monday, May 07, 2007
THE EXACT NUMBER OF FIELD BYPASS CAPS WILL BE DETERMINED BY THE BOARD SIZE USED.
PLACE BYPASS CAPS AROUND SRAMS AS SHOWN
SRAM 1 SRAM 2
C1450.1UFC1450.1UF
+ C168100UF
+ C168100UF
C2090.1UFC2090.1UF
C1310.1UFC1310.1UF
C2200.1UFC2200.1UF
+ C161100UF
+ C161100UF
+ C429100UF
+ C429100UF
C2320.1UFC2320.1UF
C1550.1UFC1550.1UF
C2230.1UFC2230.1UF
C1740.1UFC1740.1UF
C2370.1UFC2370.1UF
C2270.1UFC2270.1UF
UNUSED PINS
U3H
CNET_FPGA
UNUSED PINS
U3H
CNET_FPGA
UNUSED121A16
UNUSED126A20
UNUSED127A21
UNUSED128A28
UNUSED129A29
UNUSED130A8
UNUSED132A9
UNUSED133AA25
UNUSED134AA26
UNUSED136AA27
UNUSED138AA28
UNUSED139AA29
UNUSED140AA6
UNUSED142AB10
UNUSED143A17
UNUSED144AB25
UNUSED146AB26
UNUSED147AB27
UNUSED148AB28
UNUSED149AB29
UNUSED151AB9
UNUSED152AC10
UNUSED154AC25
UNUSED155AC26
UNUSED156AC28
UNUSED157AD10
UNUSED158AD16
UNUSED159AD17
UNUSED160AD18
UNUSED162AD19
UNUSED163AD25
UNUSED164AD26
UNUSED165AD27
UNUSED166AD28
UNUSED167AD5
UNUSED168AD6
UNUSED169AD7
UNUSED170AD9
UNUSED171AE14
UNUSED172AE15
UNUSED173AE16
UNUSED174AE17
UNUSED175AE18
UNUSED176AE19
UNUSED177AE21
UNUSED178AE23
UNUSED179AA9
UNUSED180AE27
UNUSED187AG18
UNUSED188AG28
UNUSED189AG6
UNUSED190AH16
UNUSED191AH18
UNUSED192AH22
UNUSED193AH27
UNUSED195AJ27
UNUSED197AK17
UNUSED198AK18
UNUSED199AK24
UNUSED200AK4
UNUSED205AL20
UNUSED206AL23
UNUSED207AM24
UNUSED208AP16
UNUSED209AP17
UNUSED210AP20
UNUSED211AP21
UNUSED212AP28
UNUSED213AP29
UNUSED214D11
UNUSED215E18
UNUSED217E33
UNUSED218E34
UNUSED219F17
UNUSED220F18
UNUSED221F30
UNUSED222F31
UNUSED223F33
UNUSED224F34
UNUSED225G17
UNUSED226G18
UNUSED227G29
UNUSED228G30
UNUSED229H17
UNUSED230H29
UNUSED231H30
UNUSED232H34
UNUSED233H9
UNUSED234J10
UNUSED235J11
UNUSED236J12
UNUSED237J14
UNUSED238J15
UNUSED239J16
UNUSED240J18
UNUSED181AF13
UNUSED182AF15
UNUSED183AF17
UNUSED184AF21
UNUSED185AF27
UNUSED186AG17
UNUSED300U8
UNUSED301U9
UNUSED302V10
UNUSED303V11
UNUSED304V2
UNUSED305V24
UNUSED306V25
UNUSED307V26
UNUSED308V27
UNUSED309V28
UNUSED310V9
UNUSED311W10
UNUSED312W11
UNUSED313W24
UNUSED314W25
UNUSED315W26
UNUSED316W27
UNUSED317W28
UNUSED318W5
UNUSED319W6
UNUSED320W9
UNUSED321Y10
UNUSED322Y25
UNUSED323Y26
UNUSED324Y28
UNUSED325Y29
UNUSED216AA10
UNUSED342L10
UNUSED343L18
UNUSED344AH25
+ C195100UF
+ C195100UF
+ C190100UF
+ C190100UF
+ C430100UF
+ C430100UF
+ C136100UF
+ C136100UF
C2100.1UFC2100.1UF
+ C158100UF
+ C158100UF
C2450.1UFC2450.1UF
C2050.1UFC2050.1UF
+ C166100UF
+ C166100UF
C2000.1UFC2000.1UF
C1800.1UFC1800.1UF
+ C164100UF
+ C164100UF C171
0.1UFC1710.1UF
+ C162100UF
+ C162100UF
C1460.1UFC1460.1UF
C2500.1UFC2500.1UF
C2570.1UFC2570.1UF
C2420.1UFC2420.1UF
C2330.1UFC2330.1UF
C1510.1UFC1510.1UF
C2280.1UFC2280.1UF
+ C191100UF
+ C191100UF
C1810.1UFC1810.1UF
C2640.1UFC2640.1UF
C1560.1UFC1560.1UF
C2680.1UFC2680.1UF
+ C132100UF
+ C132100UF
C2540.1UFC2540.1UF
+ C186100UF
+ C186100UF
C2620.1UFC2620.1UF
C1750.1UFC1750.1UF
+ C196100UF
+ C196100UF
+ C169100UF
+ C169100UF
C1820.1UFC1820.1UF
C1590.1UFC1590.1UF
C2060.1UFC2060.1UF
+ C137100UF
+ C137100UF
C2610.1UFC2610.1UF
C2010.1UFC2010.1UF
C2430.1UFC2430.1UF
+ C142100UF
+ C142100UF
C2510.1UFC2510.1UF
C2110.1UFC2110.1UF
C2580.1UFC2580.1UF
C2670.1UFC2670.1UF
C1520.1UFC1520.1UF
C2240.1UFC2240.1UF
+ C139100UF
+ C139100UF
C1830.1UFC1830.1UF
C2690.1UFC2690.1UF
C2380.1UFC2380.1UF
+ C133100UF
+ C133100UF
C2290.1UFC2290.1UF
C1790.1UFC1790.1UF
C1470.1UFC1470.1UF
+ C192100UF
+ C192100UF C187
0.1UFC1870.1UF
C2460.1UFC2460.1UF
C2550.1UFC2550.1UF
C2190.1UFC2190.1UF
+ C141100UF
+ C141100UF
C2340.1UFC2340.1UF
C1760.1UFC1760.1UF
C1570.1UFC1570.1UF
+ C197100UF
+ C197100UF C212
0.1UFC2120.1UF
C1840.1UFC1840.1UF
+ C160100UF
+ C160100UF
C2220.1UFC2220.1UF
C2590.1UFC2590.1UF
+ C138100UF
+ C138100UF C153
0.1UFC1530.1UF
C2650.1UFC2650.1UF
C2070.1UFC2070.1UF
C2390.1UFC2390.1UF
+ C134100UF
+ C134100UF
C2020.1UFC2020.1UF
C2210.1UFC2210.1UF
C1480.1UFC1480.1UF
C1430.1UFC1430.1UF
C1850.1UFC1850.1UF
C2470.1UFC2470.1UF
+ C163100UF
+ C163100UF
+ C421100UF
+ C421100UF
C2700.1UFC2700.1UF
UNUSED PINS
U3G
CNET_FPGA
UNUSED PINS
U3G
CNET_FPGA
UNUSED1A12
UNUSED2A13
UNUSED3A24
UNUSED4A25
UNUSED5A32
UNUSED6A33
UNUSED7A4
UNUSED8A5
UNUSED9AE12
UNUSED10AE13
UNUSED11AF12
UNUSED12AF23
UNUSED13AH12
UNUSED15AL25
UNUSED16AP12
UNUSED17AP13
UNUSED18AP24
UNUSED19AP25
UNUSED20AP32
UNUSED21AP33
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