Lecture 11: Machine Processing Intro to IT

COSC1078 Introduction to Information Technology

Lecture 11

Machine ProcessingJames Harland

james.harland@rmit.edu.au

Lecture 11: Machine Processing Intro to IT

Introduction

Who is this bloke?

Lecture 11: Machine Processing Intro to IT

Introduction

Lecture 10: Binary Representation Intro to IT

Introduction to IT

1 Introduction

2 Images

3 Audio

4 Video WebLearnTest 1

5 Binary Representation Assignment 1

6 Data Storage

7 Machine Processing

8 Operating Systems WebLearn Test 2

9 Processes Assignment 2

10 Internet

11 Internet Security   WebLearn Test 3

12 Future of IT Assignment 3, Peer and Self Assessment

Lecture 11: Machine Processing Intro to IT

Overview

Questions?

Assignments 1 & 2

Machine Processing

Questions?

Lecture 11: Machine Processing Intro to IT

Assignments

The only way to submit it is via Blackboard If you have not done this, do so now! Assignment 2 will be in groups of 2 or 3 Get group set up (or changed) on

Blackboard now Assignment 2 will be released later this week

Lecture 10: Binary Representation Intro to IT

Binary Codes

“Meet me at Fred’s”23412.43434343-620

0

0

111 001

Lecture 10: Binary Representation Intro to IT

ASCII

American Standard Code for Information Interchange

7-bit patterns to represent letters (upper and lower case) numbers , . , ; “ $ % @ * & ! ? < > …

Total of 128 different characters

Lecture 10: Binary Representation Intro to IT

ASCII

01001000 H01100101 e01101100 l01101100 l01101111 o00101110 .

Hello!

Unicode: uses 16 bits, can do Chinese, Japanese & Hebrew characters

Lecture 10: Binary Representation Intro to IT

Numbers

Represented in binary notation

25 in ASCII is 00110010 00110101 8 bits per digit seems too much!

Can represent 256 different numbers in 8 bits …

Don’t want to add, multiply etc. in ASCII …

Remember that 1 + 1 = 10 …

Lecture 10: Binary Representation Intro to IT

Two’s Complement

How do you store negative numbers?

Bit pattern Value

011 3

010 2

001 1

000 0

111 -1

110 -2

101 -3

100 -4

Lecture 10: Binary Representation Intro to IT

Two’s Complement

Bit pattern Value

011 3

010 2

001 1

000 0

111 -1

110 -2

101 -3

100 -4

0 first means +ve (sign bit)

1 first means –ve

+ve: Count from 0 up to 01n-1

-ve: Start from 1n down to 10n-1

3 is 011, -3 is 101

2 is 010, -2 is 110

1 is 001, -1 is 111

Lecture 10: Binary Representation Intro to IT

Two’s Complement

Bit pattern Value

011 3

010 2

001 1

000 0

111 -1

110 -2

101 -3

100 -4

1 + 2: add in obvious way

3 – 1: calculate as 3 + (-1)

011 + 111 = 1010

Answer is 010, ie 2.

Can add and subtract with

the same circuits

Lecture 10: Binary Representation Intro to IT

Excess Notation

Bit pattern Value

111 3

110 2

101 1

100 0

011 -1

010 -2

001 -3

000 -4

A different encoding of the numbers“naive” bit pattern encodes 4 more than actual value100 (looks like 4) encodes 0101 (looks like 5) encodes 1110 (looks like 6) encodes 2

Lecture 10: Binary Representation Intro to IT

Floating Point

sign bitMantissa

exponent

1 bit for sign3 bits for exponent4 bits for mantissa100.101

Lecture 10: Binary Representation Intro to IT

Floating Point

01011001 means +ve 0.1001 shifted 101 place= 1.001

Mantissa: digit sequence (1st digit always 1) Exponent: where to put the . This is generally given in ‘excess’ notation

Binary form of 2.423 x 104

Lecture 10: Binary Representation Intro to IT

Truncation Errors

Beware adding small numbers to large ones!Finite length of encoding means that sometimes digits are lostNot often a problem, but can be …

Lecture 10: Binary Representation Intro to IT

Parity Bits

Add a ‘parity bit’ to each byte Odd parity: make total of 1s in all 9 bits odd Even parity: make total of 1s in all 9 bits even If parity is wrong, then an error has occurred

Lecture 11: Machine Processing Intro to IT

What do computers do? Compute!

Input/Output

Processing

Memory

Lecture 11: Machine Processing Intro to IT

Moore’s Law

“Processor speed doubles about every 18 months”

-- Gordon Moore, Intel co-founder, 1965

Intended for period 1965-1975

Held true ever since 1965!

Must end sometime …

Lecture 11: Machine Processing Intro to IT

Moore’s Law

Lecture 11: Machine Processing Intro to IT

Moore’s Law

Lecture 11: Machine Processing Intro to IT

Memory

Memory differs in performance and cost

Processor is typically much faster than memory

Lecture 11: Machine Processing Intro to IT

Memory

Arranged as a hierarchy of cache

Level 1Level 2

Level 3

Main Memory

Lecture 11: Machine Processing Intro to IT

Processing

ALU

CPUBUS

REGISTERS

MEMORY

Lecture 11: Machine Processing Intro to IT

Machine Instructions

1. Move first value from memory into register 12. Move second value from memory into

register 23. If register 2 is zero, go to Step 64. Divide register 1 by register 2 & store result

in register 35. Store register 3 value in memory6. Stop

“Divide two numbers”

Lecture 11: Machine Processing Intro to IT

Machine Instructions

1. LOAD register 1 from memory2. LOAD register 2 from memory3. JUMP to Step 6 if register 2 is zero4. Divide register 1 by register 2 and store

result in register 35. STORE register 3 value in memory6. Stop

Lecture 11: Machine Processing Intro to IT

Instructions in Binary?01010100001010101010100110100010101001101001010010100011100010101010100101111001001010…

LOAD register 1LOAD register 2JUMP ….STORE ….

1010110010110011000100100011001100111111

MEMORY

Lecture 11: Machine Processing Intro to IT

One Scheme

16-bit operation codes (simple example)

Operation Code(4 bits)

Operand (12 bits)

Represent as 4 Hexadecimal numbers (0-9,A-F)Each instruction is two bytes long

Lecture 11: Machine Processing Intro to IT

One Scheme

156C LOAD register 5 from memory 6C166D LOAD register 6 from memory 6D5056 ADD register 5 & 6 & store in register 0306E STORE register 0 to memory 6EC000 HALT....(up to 216 = 65,536 different instructions)

Lecture 11: Machine Processing Intro to IT

Fetch Decode Execute

FETCH

EXECUTE DECODE

Machinecycle

Lecture 11: Machine Processing Intro to IT

Two special registers

Instruction register: holds current instructionProgram counter: address of next instruction

Fetch: Put instruction specified by program counter into instruction registerIncrement program counter by two

Decode: Work out what to do

Execute: Perform the instruction

Lecture 11: Machine Processing Intro to IT

Processing

A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00

Program Counter

InstructionRegister

A0Address Contents

Lecture 11: Machine Processing Intro to IT

Processing

A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00

Program Counter

InstructionRegister

A0FETCH

156C

Lecture 11: Machine Processing Intro to IT

Processing

A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00

Program Counter

InstructionRegister

A2FETCH

156C

Lecture 11: Machine Processing Intro to IT

Processing

A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00

Program Counter

InstructionRegister

A2DECODE

156C

6C 2B

Lecture 11: Machine Processing Intro to IT

Processing

A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00

Program Counter

InstructionRegister

A2

EXEC

156C

6C 2B

2B5

Lecture 11: Machine Processing Intro to IT

Processing

A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00

Program Counter

InstructionRegister

A2 FETCH

166D

Lecture 11: Machine Processing Intro to IT

Processing

A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00

Program Counter

InstructionRegister

A4 FETCH

166D

Lecture 11: Machine Processing Intro to IT

Processing

A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00

Program Counter

InstructionRegister

A4 DECODE

166D

Lecture 11: Machine Processing Intro to IT

Processing

A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00

Program Counter

InstructionRegister

A4 EXEC

166D

6D FF

FF6

Lecture 11: Machine Processing Intro to IT

Processing

A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00

Program Counter

InstructionRegister

A6 FETCH

5056

Lecture 11: Machine Processing Intro to IT

Processing

A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00

Program Counter

InstructionRegister

…

Lecture 11: Machine Processing Intro to IT

Processing

Program Counter

InstructionRegister

EXEC

B258

B4

Lecture 11: Machine Processing Intro to IT

Processing

Program Counter

InstructionRegister

EXEC

B258

58

Lecture 11: Machine Processing Intro to IT

Processing

Jump instructions change program counter

Can load any memory address into program counter (!!!)

Often use pipelining for efficiency Fetch next instruction while executing Processor doesn’t wait for fetch to complete

Can do more than one instruction …

Lecture 11: Machine Processing Intro to IT

Conclusion

Assignment 2 specified sometime this week

Finish reading book!