Controllers-system for APS – CubeSat nano-satellite
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Transcript of Controllers-system for APS – CubeSat nano-satellite
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Controllers-system for APS – CubeSat
nano-satellite
Instructor: Daniel Alkalay
Students: Moshe Emmer & Meir Harar
Technion – Israel Institute of TechnologyDepartment of Electrical EngineeringHigh Speed Digital Systems Lab
Presentation Part A
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Agenda
• Project Goals• Architecture/Interface• Progress So Far
– Re-Defining part A goal
– Implementation
– Further achievements
• What next..• Schedule
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Project Goals• APS – Cubesat is a Multidisciplinary project .
It involves AE and EE disciplines.• AE provide: Mission design, Orbital design,
Systems architecture, Attitude control, choosing sensors, actuators and Mechanical design.
• AE will provide System design and algorithms. Our goal is to implement OBC (On Board Controllers) - H/W and S/W. Algorithms implemented include: Attitude-control, power management, Telemetry and RF communications systems.
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CubeSat - Architecture / Interface
SA I/F& Bat C/D-Control
Battery
Attitude System Sensors & actuators
Magneto-meter
מד שמש
Rate Gyro
מגנטו-טורקרים
Engines
Sensors
Actuators
Accurate Positioning
System
שעון אטומי
APS & TLMTransCeiver
PowerDistribution
Over-current control
TLMTT+C
Attitude Control
On-BoardControllers
uBlaze+ pBlaze+
State-Machines
Power
Control
Telemetry
S&A
I/F
Payload
TLM
TLM
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Progress So Far
Re-Defining part A goal -
Create a design, using MicroBlaze soft processor, that will implement a communication protocol between O.B.C and external host PC (Using Hyper terminal).
The design will be divided into two parts:• Hardware – building system architecture using available
busses, peripherals IP’s etc’
• Software – implementing a small C program and translate it into MicroBlaze target using EDK and available IP’s
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Progress So Far - Implementation
• Using MicroBlaze Processor on Spartan 3 board
• Defining a task – Calculator, operated by an external User
• Defining and exploring I/O method – UartLite.
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UART Lite
• A module that attaches to the OPB.• One transmit and one receive channel (full duplex).• 16-character transmit FIFO and 16-character receive FIFO.• Configurable baud rate.• Parameters:
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Progress So Far - Hardware
Microblaze_0
BRAM_0I-LMB Cntrl D-LMB Cntrl
UARTRS -232
OPB
I-LMB
D-LMB
… …
DIP_Switches_8Bit
Led_7SEGMENT
Push_Buttons_3Bit
LEDs_8Bit
OPB
Tested and studied, not included in design
Tested and studied - included in design
L.M.B – Local Memory Bus
Peripherals – OPB IP’s
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Progress So Far - Software• Locating and exploring building blocks for the design (Functions)• Creating headers files, in which all relevant functions defined• Implementing a main.c code, executing a calculator Task.
static void DisplayAnswer(int Answer){ Xboolean Negative = XFALSE; /* * If a negative answer, send the absolute value * the LEDs */ if (Answer < 0) { Negative = XTRUE; Answer = Answer * (-1); /* abs value of negative */ } XGpio_mSetDataReg(LEDS_BASEADDR, 1, Answer); DisplaySegments(Answer, Negative);
case '+': Answer=Operand1+Operand2;break;
case '-':Answer=Operand1-Operand2;break;
case '*':Answer=Operand1*Operand2;break;
default:printf("Error\n");break;
Out of main.cOut of calc.c
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Progress So Far - Architecture
• Studying and exploring new techniques in order to enable a simultaneous 2-task execution (using two microprocessors).
• Learning and adopting the usage of Fast Simplex Link, a shared bus for two different microprocessors.
• Embracing a new board, Virtex-II-Pro, ML310 and implementing a design that includes all.
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Progress So Far - The new ML310 board
Virtex-II Pro
DDR DIMM
PCI Slots
Parallel, Serial, USB & Ethernet ports
ALi SB
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Progress So Far - ML310 peripherals
LCDConnected directly to the FPGACan be operated using the PowerPC (C/C++) only.Useful functions :
LCDInit : Initialize the LCD before it can be operated.LCDWrite : Write data to the LCD.LCDCls : Clear the LCD Screen.
LEDS•Can be operated using both the PowerPC (C/C++) or the FPGA alone (VHDL/VERILOG)•Useful Commands in EDK :
XGpio_mSetDataDirection(BaseAddress,1,0x00000000);Set the I/O device with BaseAddress as output (0).XGpio_mSetDataReg(BaseAddress, 1, data);Write data to the I/O device with BaseAddress.
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Progress So Far - FSL (Fast Simplex Link) Bus
A uni-directional point-to-point FIFO-based communication
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Progress So Far - FSL (Fast Simplex Link) Bus
Microblaze_0 Microblaze_1
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Progress So Far - FSL (Fast Simplex Link) Bus
• Up to 8 master and slave FSL interfaces are available on the MicroBlaze soft processor.
• Supports both synchronous and asynchronous FIFO modes – allows the master and slave side of the FSL to clock at different rates.
• Provides an external control bit for annotating data being transmitted – can be used by the slave side interface for multiple purposes. For example, use the bit to indicate the start or end of the transmission of a frame.
We used this bus to transfer data between two soft processors implemented on the same chip
Technical Features
FSL_aMaster_a Slave_b
Master_bSlave_aFSL_b
Microblaze_0 Microblaze_1
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Schedule
• Convert AE’s C code to fixed-point and integrate it into our system. (2 weeks)
• Ramp-up on Virtex-IV. (1 weeks)• FSM – study and implement (temperature
sensors management). (2 weeks)• CubeSat architecture – definition &
specifications. (1-2 weeks)• Implement AE’s algorithms into our
architecture – convergence. (4 weeks)