Computer Architecture ECE 4801 Berk Sunar Erkay Savas.
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Transcript of Computer Architecture ECE 4801 Berk Sunar Erkay Savas.
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Computer Architecture
ECE 4801
Berk Sunar Erkay Savas
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Outline
Brief OverviewHow is a computer program
executed?Computer organizationRoadmap for this class
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Things You Learn in this Course
How computers work; the basic foundationHow to analyze their performance (and how not
to)Key technologies determining the performance
of modern processorsDatapath DesignPipeliningCache Systems Memory HierarchyI/OMultiprocessors
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Instruction Set ArchitectureImportant abstraction
Interface between hardware and low-level software
Or features available to programmersinstructions set architecture (ISA)
e.g. does the processor have an multiply instruction?
instruction encodingData representationI/O mechanism.addressing mechanism
Modern instruction set architectures:80x86/Pentium/K6, PowerPC, DEC Alpha, MIPS,
SPARC, HP, ARM.
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Computer OrganizationComputer Organization is how features are
implemented in hardwareTransparent to programmersDifferent implementations are possible for the
same architecture (affects performance/price)Determines how memory, CPU, peripherals,
busses are interconnected and how control signals routed.
Has HUGE impact on performance.Performance of the organization is usually
application dependent. (e.g. I/O intensive, computation intensive, memory bound etc.)
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How to Program a Computer?A simple but universal interface Machine Code (binary images)Assembly language
Uses mnemonics that map directly to ISA e.g. addw, lb, jmp etc.
More readable than machine languagesError prone but excellent for low-level optimization
High-level languagesE.g. C/C++, Pascal, Fortran, Java, C#Much easier to use and program Promotes code portabilityNot as efficient as custom assembly
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Processing a C Program
C compiler
Assembler
swap:
muli $2, $5, 4add $2, $4, $2lw $15, 0($2)lw $16, 4($2)sw $16,0($2)sw $15, 4($2)jr $31
Assembly language program for MIPS
High-level language program (in C)
00000000101000010000000000011000000000001000111000011000001000011000110001100010000000000000000010001100111100100000000000000100101011001111001000000000000000001010110001100010000000000000010000000011111000000000000000001000
Binary machinelanguage program for MIPS
swap (int v[], int k){ int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; }
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Functions of a Computer
Data processing , e.g. sort entries of a spreadsheet
Data storage, e.g. personal files, applications, movies, music etc.
Data movement, e.g. play a music file, display a picture
Control, (applies to all examples above)
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Five Classic ComponentsComputer
Processor
Datapath
Control
Input
Output
System Interconnection
Memory
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Bridges
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Inside the Processor Chip
integerdatapath
floating-pointdatapath
Bus
Control
branchpredictionInstruction
Cache
Data Cache
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An Actual View
22nm Intel Core CPUSource: Intel Corp.
https://computing.llnl.gov/tutorials/parallel_comp/
6 core CPU with L3 caches
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MemoryNonvolatile:
ROMHard disk, floppy disk, magnetic tape, CDROM, USB
MemoryFlash memory
VolatileDRAM used usually for main memory SRAM used mainly for on-chip memory such as
register and cacheDRAM is much cheaper than SRAMSRAM is much faster than DRAM
How about solid state drives?
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DRAM and Processor Characteristics
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Solutions to Memory ProblemsIncrease number of bits retrieved at one
timeMake DRAM “wider” rather than “deeper”
Change DRAM interfaceCache
Reduce frequency of memory accessMore complex cache and cache on chip
Increase interconnection bandwidthHigh speed busesHierarchy of buses
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Computer NetworksVery essential aspect of computer systems
CommunicationResource sharingRemote access
Ethernet is the most popular LANRange is limited to 1 kilometer10/100 Mbit/s
Wide Area Networks (WAN)Cross continents and backbone of the
Internet
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RoadmapPerformance issues Instruction set of MIPSArithmetic and ALU Constructing a processor to execute our
instructions (datapath design)PipeliningMemory hierarchy: caches and virtual
memory I/O