Computation Engines: Computation Engines: BDDs and SATBDDs and SAT

(part 2)(part 2)

290N: The Unknown Component 290N: The Unknown Component ProblemProblem

Lecture 8Lecture 8

OutlineOutline Characteristic functionCharacteristic function

Representation of MV relations, automata, and FSMsRepresentation of MV relations, automata, and FSMs Case study: Equivalence checkingCase study: Equivalence checking

Combinational and sequentialCombinational and sequential BDDs vs SATBDDs vs SAT Combining the twoCombining the two

Other representationsOther representations Truth tableTruth table Sums-of-products (SOPs)Sums-of-products (SOPs) Historical perspectiveHistorical perspective

Characteristic FunctionCharacteristic Function

DefinitionDefinition Manipulation of setsManipulation of sets MV relations as sets of I/O combinationsMV relations as sets of I/O combinations ExamplesExamples

representing an FSMrepresenting an FSM representing an automatonrepresenting an automaton

Characteristic FunctionCharacteristic Function Boolean function Boolean function F: {0,1}F: {0,1}nn {0,1} {0,1} represents a set represents a set SSFF of of

minterms minterms x x {0,1} {0,1}nn, such that , such that F(x)=1F(x)=1

Conversely, elements of any set Conversely, elements of any set SS can be encoded using can be encoded using minterms minterms x x {0,1} {0,1}nn and represented by a Boolean and represented by a Boolean function, which takes value 1 in these minterms, and 0 function, which takes value 1 in these minterms, and 0 otherwise. otherwise.

This Boolean function is called This Boolean function is called characteristic function characteristic function of of the set S. the set S.

ss: {0,1}: {0,1}nn {0,1}, {0,1}, such that such that ss(x) = 1(x) = 1 iff iff x x represents some element represents some element s s S S..

the codes should be disjoint for all elements of the codes should be disjoint for all elements of SS the size of Boolean space of the size of Boolean space of xx cannot be smaller than cannot be smaller than n=n=loglog22|S||S|

Set ManipulationSet ManipulationOperations on sets are reduced to Boolean operations on the characteristic functions:

Empty set: = 0

Union of sets: S T= S + T

Intersection of sets: S T= S & T

Set different: S - T= S & T’

Containment of sets: (S T) = 1

Multi-Valued RelationsMulti-Valued Relations

01 1( , , ) : 2Pn nR x x P P

where 0 nP P are finite sets of values. The variables ix are multi-valued variables which can take on any value in iP

{0,1, ,| | 1}i iP P

1 1( , , , , , )n mR x x z z if R is binary and the 1, , mz z z are treated as outputs.

( , )R x z

is an MV relation,

is a multi-output MV relation

This relation is between a vector of inputs and a vector of outputs:

0 0 0

Normal Simulation (NS)Normal Simulation (NS)

faninsfanins

POsPOs

node with anon-deterministicrelation

3 11

2 2 2

{0,2}2

PI/PO relation PI/PO relation containscontains

3 1 1 / 2 1 03 1 1 / 2 1 0

21

0

0

01

2

( , )NSR X Z

Relations as Sets of I/O Relations as Sets of I/O CombinationsCombinations

As sets, relations can be represented and manipulated As sets, relations can be represented and manipulated using their characteristic functionsusing their characteristic functions

One way of encoding the I/O combinations belonging to One way of encoding the I/O combinations belonging to a relation, is to encode each variable and then to a relation, is to encode each variable and then to combine the individual variable codes into a single code combine the individual variable codes into a single code of a combinationof a combination

For example, in the previous example, assuming all the For example, in the previous example, assuming all the variables to be 4-valued and natural binary encoding:variables to be 4-valued and natural binary encoding:

CombinationsCombinations::3 1 1 / 2 1 03 1 1 / 2 1 03 1 1 / 0 1 23 1 1 / 0 1 2

Codes:Codes:11 01 01 / 10 01 0011 01 01 / 10 01 0011 01 01 / 00 01 1011 01 01 / 00 01 10

Relations Representing an FSMRelations Representing an FSM FSM is FSM is { I, O, S, S{ I, O, S, S00, , , , }} Transition relation isTransition relation is T(i, s, s’) : I T(i, s, s’) : I S S S S {0,1} {0,1} T(i, s, s’) = 1 T(i, s, s’) = 1 iff state iff state s’s’ is reached in one transition from is reached in one transition from

state state ss under input under input ii Output relation isOutput relation is F(i, s, o): I F(i, s, o): I S S O O {0,1} {0,1} F(i, s, o) = 1 F(i, s, o) = 1 iff output iff output oo is produced in state is produced in state ss under input under input ii Total transition/output relation of the FSM isTotal transition/output relation of the FSM is TF(i, s, s’, o): I TF(i, s, s’, o): I S S S S O O {0,1} {0,1} TF(i, s, s’, o) = 1TF(i, s, s’, o) = 1 iff state iff state s’s’ and output and output oo can be produced can be produced

in state in state ss under input under input ii

Example of an FSMExample of an FSM

cs,ns x,y 00 01 11 10

00 1 0 0 0 01 0 0 0 1 11 0 0 1 0 10 0 1 0 0

DFFx y

0 1

0010

11

01

.i 2

.o 0

.s 2

.p 4

.ilb x y

.ob

.accepting 0 1

.names x y cs ns00 0 010 0 101 1 011 1 1.e

xx cscs nsns yy

00 00 00 00

11 00 11 00

11 11 11 11

00 11 00 11

Relation Representing an AutomatonRelation Representing an Automaton

AutomatonAutomaton is is { I, S, S{ I, S, S00, , , Q}, Q}

Transition relation isTransition relation is

T(i, s, s’) : I T(i, s, s’) : I S S S S {0,1} {0,1}

T(i, s, s’) = 1 T(i, s, s’) = 1 iff state iff state s’s’ is reached in one transition from is reached in one transition from state state ss under input under input ii

Output relation (acceptance function) isOutput relation (acceptance function) is

F(s): S F(s): S {0,1} {0,1}

F(s) = 1F(s) = 1 iff state iff state ss is accepting is accepting

Example of an AutomatonExample of an Automaton

AA

BB

AA

BB

AA

BB

NSNS

0101

0101

1010

1010

0000

0000

codecode

CC

CC

BB

BB

AA

AA

CSCS

000011

101000

000011

101000

00000,10,1

101000

codecodeInsIns

C

B

A

0,1

01

0

10

Example (continued)Example (continued)

Transition relationTransition relation

T(I,aT(I,a11,a,a22,b,b11,b,b22) =) =

i'ai'a11‘a‘a22‘b‘b11bb22‘+ ‘+

aa11‘a‘a22'b'b11'b'b22' + ' +

i'ai'a11aa22'b'b11bb22' + ' +

iaia11aa22'b'b11'b'b22' + ' +

i'ai'a11aa22'b'b11bb22' + ' +

iaia11aa22'b'b11'b'b22''

i

a1

b1

a2

b2

10

Case Study: Equivalence CheckingCase Study: Equivalence Checking

Combinational Combinational SequentialSequential Equivalence checking as searchEquivalence checking as search BDDs vs SATBDDs vs SAT Combination of the twoCombination of the two

Combinational Equivalence Combinational Equivalence Checking Checking

Given two combinational circuits, C1 and C2Given two combinational circuits, C1 and C2 Construct the Miter circuitConstruct the Miter circuit

• The output of the Miter circuit is 1 iff the two circuits are differentThe output of the Miter circuit is 1 iff the two circuits are different Prove that the output of the Miter circuit is always 0Prove that the output of the Miter circuit is always 0

C1

C2

ab

abc

O1

c O2

O

Sequential Equivalence CheckingSequential Equivalence Checking Given two sequential circuits, C1 and C2Given two sequential circuits, C1 and C2

Construct the product circuit (FSM)Construct the product circuit (FSM)• The output of the product is 1 iff the two are differentThe output of the product is 1 iff the two are different

Find the reachable states of the product circuit (FSM)Find the reachable states of the product circuit (FSM) If there exist a state with the output 1, they are not equivalentIf there exist a state with the output 1, they are not equivalent

M1

M2

ab

abc

O1

c O2

O

Verification as SearchVerification as Search

Verification problem is reduced to a search problemVerification problem is reduced to a search problem find an assignment of input variables (or a sequence of such find an assignment of input variables (or a sequence of such

assignments), which leads to a 1 at the outputassignments), which leads to a 1 at the output

If we finished exploring the search space and cannot If we finished exploring the search space and cannot find such an assignment, the circuits are equivalentfind such an assignment, the circuits are equivalent

BDDs vs SAT for SearchBDDs vs SAT for Search

BDD packageBDD package

Builds the canonical Builds the canonical representation of all representation of all branches up to a pointbranches up to a point

Tends to run out of Tends to run out of memorymemory

SAT solverSAT solver

Explores one branch at a Explores one branch at a timetime

Tends to run out of timeTends to run out of time

Both exhaustively explore the search spaceBoth exhaustively explore the search space

Search ProblemSearch Problem

Different Ways of Exploring Different Ways of Exploring Search SpaceSearch Space

BDD approach SAT approach

Combining BDDs and SATCombining BDDs and SAT Build the BDDs for the nodes until Build the BDDs for the nodes until

the size reaches a limitthe size reaches a limit Use SAT to prove equivalence of Use SAT to prove equivalence of

pairs of cut-points using a timeoutpairs of cut-points using a timeout Iterate the above two steps, while Iterate the above two steps, while

increasing the size limit and the increasing the size limit and the timeout until the problem is solvedtimeout until the problem is solved

BDDs and SAT attack the problem BDDs and SAT attack the problem using their comlementary strengths using their comlementary strengths in a balanced mannerin a balanced manner

A. Kuehlmann, V. Paruthi, F. Krohm, M. K. Ganai, “Robust Boolean reasoning for equivalence checking and functional property verification”, IEEE Trans. CAD, Vol.

21, No. 12, Dec. 2002, pp. 1377-1394.

Other RepresentationsOther Representations

Truth tableTruth table Implemented using bit stringsImplemented using bit strings Convenient for functions up to 5 variablesConvenient for functions up to 5 variables Useful for functions up to 8 variablesUseful for functions up to 8 variables

Sums-of-productsSums-of-products Cubes are represented in positional notationCubes are represented in positional notation Implemented using bit stringsImplemented using bit strings The main data structure to represent SOPs in Espresso and SISThe main data structure to represent SOPs in Espresso and SIS

Common featuresCommon features Are explicit in natureAre explicit in nature Exploit bit parallelism of modern computersExploit bit parallelism of modern computers Have been traditionally used in many applicationsHave been traditionally used in many applications

Use of Functional RepresentationsUse of Functional RepresentationsHistorical PerspectiveHistorical Perspective

Problem Size

Time Period1950-1970 1980 1990 2000

+CNFTruth table +SOP

+BDD