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8 6 2 REVISIONSECN NO. ---REV DESCRIPTION DATE APPROVED

7 APPROVALS

5

4

3

1

NOTE: "NI" OR "( )" USED WITH COMPONENTS INDICATES "NOT INSTALLED". A PRODUCTION RELEASE

TABLE OF CONTENTS36 37 38 39 40 41 43 44 45 46 47 48 49 50 51 52 53 54 55 56 SCSI CTLR DECOUPLING & LED CKT SCSI ON-BOARD AUTO-TERMINATION INTERNAL LVD/SE SCSI CONNECTOR VOLTAGE REGULATORS VDDQ REGULATOR 2.5V DECOUPLING 2.5V REGULATOR 1.8V REGULATOR DECOUPLING PRIMARY VRM SECONDARY VRM REV SHEET VOLTAGE ATTRIBUTES MISC NET_CROSS_REF_PAGE(S) COMP_CROSS_REF_PAGE(S) 57 58 59 60 61 62 63 64 65-66 67-68 69 70 71 72-75 76-80 Embedded SCSI Controller USBPORT 2&3 USB PORTS 1-2 KB/MS/FLOPPY CONN. SERIAL PORTS PARALLEL PORT TERM. SUPER I/O SIO2 POWER CKT FAN CONTROL BATTERY & RTC OSC. PS_ON & RESET CKT IDE TERMINATIONS IDE CONNECTORS P/S CONNECTOR I2C SELECT CONTROL FWH AUDIO REGULATOR /MIC HEADPHONE AMP INTERNAL SPKR & JACK

D

PAGE

2-

BLOCK DIAGRAM

D

3-

RESET BLOCK DIAGRAM

4-

SYSTEM CLOCK

5-

DUAL DRCG

6-

ITP

7-

FOSTERA-1

8-

FOSTERA-2

9-

FOSTERB-1

10 -

FOSTERB-2

11 -

VRM decoupling

12 -

Comparator

13 -

GTL REFERENCE

14 -

CPU PLL VOLTAGE

C

15 -

COLUSA-1

C

16 -

COLUSA-2

17 -

CHA RIMM 1

18 -

CHA RIMM 2

19 -

SLP_S3

20 -

CHA RSL TERMINATION

21 -

CHB RIMM1

22 -

CHB RIMM2

23 -

CHB TERMINATION

24 -

UNIV AGP PRO

25 -

AGP TERMINATIONS

26 -

PCI TERMINATIONS

27 -

PCI CONNECTOR SLOT 1

28 -

PCI CONNECTOR SLOT 2

B

29 -

PCI CONNECTOR SLOT 3

B

30 -

LAN PHY

31 -

MAGNETICS/RJ45 CONNECTOR

32-33 -

ICH2

34 -

sound blaster

35 -

AC97 CODEC

Machine ID = xxxxhAPPROVALS 010912-101 ASSEMBLYDRAWN

DATE

010913-000 SCHEMATIC FAB DT SPARES MT SPARES 010914-001 xxxxxx-xxx xxxxxx-xxx

COMPAQ CONFIDENTIALCHECKED DSGN ENGR ENGR TOOLINGHARINI MALIK 03/09/01

A

A Betty: 2P Foster-Colusa

PROPRIETARY NOTE

PROD ENGR QA NEXT ASSYSUPPLEMENTS:EF,EF-EPS,EF-TIF?

SIZEPROJECT NO. LEGAL AGENCY

DRAWING NO.

REV

THIS DOCUMENT CONTAINS INFORMATION CONFIDENTIAL AND PROPRIETARY TO COMPAQ COMPUTER CORPORATION AND SHALL NOT BE REPRODUCED OR TRANSFERRED TO OTHER DOCUMENTS OR DISCLOSED TO OTHERS OR USED FOR ANY PURPOSES OTHER THAN THAT FOR WHICH IT WAS OBTAINED WITHOUT THE EXPRESSED WRITTEN CONSENT OF COMPAQ COMPUTER CORPORATION.

BSCALE:NTS

010913-000DO NOT SCALE DRAWING

REV ASHEET 1 OF

80

8 6

7

5

4

3

2

1

8 6 5 4 3 2 1

7

Audio PortsD

D

PCI SLOT 3 PCI SLOT 2 PCI SLOT 1C

SCALABLE BUS

Hub Link

C

AGP BUS AC97 Link PCI BUS

RAMBUS LPC I/F BUS

CMOS BUS

B

B

RSL BUSUSB Ports

ATA-100 IDE CD-ROM DVD

-----------------------------

SIZE

DRAWING NO.

REV

BCOMPAQ CONFIDENTIAL FILE: 5 4 6 3

010913-000betty.22 SCALE: NONE SHEET 1

REV A2OF

80

8

7

-------------------------

A

A

8 6 5 4 3 2 1

7

D

D

C

C

B

B

A

A

SIZE

DRAWING NO.

REV

BCOMPAQ CONFIDENTIAL FILE: 5 4 6 3

010913-000betty.32 SCALE: NONE SHEET 1

REV A3OF

80

8

7

8 6 3_3V_SYS_CLK 1K 1K R946* *

7

5

4

3

2

1

4

+3.3V 1%* * * *C99 COG 10PF

CLK_CPU_SEC4,8 4,8 4,10

4,10

CLK_CPU_SEC_

CLK_CPU_PRI 1% CLK_CPU_PRI_

1 49.9 49.9 49.9C38

14.318MHZ49.9 NIC39 COG 10PF COG 10PF C100

114410-002 10PF R257 R255*

D 1K*

R256

NICOG 10PF

Y3NI

R254

SXTL4DT R1006 1% 1%

NI U32 R1005*

C287

10PF

NI 33 33*

XTALIN XTALIN XTALOUT R1004*

XTALOUT 23 52 SEL133 SPREAD_ R952 R953 R950 R951* * * *

5 6 REFCLK0_MULTISEL0 REFCLK1_MULTISEL1 CPUCLK0 CPUCLK0_ 33 33 33 33 CLK_CPU_SEC CLK_CPU_SEC_ CLK_MCH CLK_MCH_ DRCG_CLKIN 33 33 33 CLK_CPU_PRI CLK_CPU_PRI_ CPUCLK1 CPUCLK1_ 48 47 51 50*

175244-001 SSO56WAT 2 332 49

R259

*

C288

NI

ICH_CLK14 SIO_CLK14M R954 R955 CLK_ITP CLK_ITP_ 33 334,6 4,6 4,10 4,10

R1008

NC_133_100_ 42 41 45 44 28 PWR_DWN_ IREF VDDREF VSSREF R948 R949 R945* * *

*

300 39 4 1 56 53 VDDMEM VSSMEM MEMREF MEMREF_ R1007*

I

R947 CPUCLK2 CPUCLK2_ CPUCLK3 CPUCLK3_ 55 54 33 33 CPUDIV2 NC_MEMREF_

NI

*

33

SPREAD_

R_SPREAD_

4,8 4,8 4,16 4,165

R252

*

R261

0

I

*

475

+3.3V 27 24 VDDUSB VSSUSB AVDD AVSS 33 38 378 7 6 5 1 2 3 4

300

C

60

R253

4NI NI

1KNI

D

R262

8.2K

L32

C ICH_PCICLK32

1 SB_PCICLK SCSI_PCICLK SIO_PCICLK FWH_PCICLK

2

RN15

3455 49 39

C275 15PF NI27 28 29

C1028

4.7UF C250

0.1UF

R958*

*

3V66_0 3V66_1 3V66_2 3V66_3 AGPCLK R956 33*

B 1 24

+3.3V 3_3V_SYS_CLK

L33*

*

8,10

C282

4.7UF

4.7UF

0.1UF C286

0.1UF C285

0.1UF C284

0.1UF C283

0.1UF C249

0.1UF C253

49.9

49.9

49.9

C164 COG 10PF

COG 10PF

COG 10PF

COG 10PF

R260

R258

R251

NI

1%

1% A

A

SIZE

DRAWING NO.

R250

NI

NI

NI

49.9

SYSTEM CLOCKCOMPAQ CONFIDENTIAL 6 5 4

R302

C1030

C281 10UF

*

Q808S603AT Clock Power - Use Islands Place 4.7 uF caps close to L

1/16W

1

2.2K

0.01UF

2

C

C1029

C1051

0.1UF C248

0.1UF C252

0.1UF C251

0.1UF

C247VDDCPU1 VDDCPU2 VSSCPU1 VSSCPU2

S603AT

43 49 40 46

RN16

+3.3V

0.01UF29 36 32 33 VDD3V66_1 VDD3V66_2 VSS3V66_1 VSS3V66_2 R957 33 30 31 34 35 33 25 26 NC_PCICLK9 10 16 22 7 13 19 VDDPCI1 VDDPCI2 VDDPCI3 VSSPCI1 VSSPCI2 VSSPCI3 USBCLK0_SELA USBCLK1_SELB R1009 48MHZ R1010 1K*

PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6 PCICLK7 PCICLK8 PCICLK98 7 6 5 1 2 3 4

8 9 11 12 14 15 17 18 20 21 PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4

119917-11512

GCLKIN AGP_CLK ICH_GCLKIN24 32

16

C206 15PF NI 119917-115 33 ICH_CLK4832

P_THERMTRIP_

R285 1K

B

3

E

60

DTC123TKA

B

8.2KTHERMTRIP_49

CLK_MCH 1%*C165

4,16

CLK_MCH_*

4,16

1%*C809 C810

CLK_ITP CLK_ITP_*

4,6 4,6

used for level translation

REV

BFILE: 3

010913-000betty.42 SCALE: NONE SHEET 1

REV A4OF

80

8

7

8 6 5 4 3 2 1

7

Some 64 mbit tech rimms had a bug

that saw some commands in broadcast

DRCG RATIO(MULT2=0) MODE MODE STATE Normal 1 0 X Clk Off Powerdown 0 1 1 PWRDNB STOPB PAclk PLLclk Refclk RefclkB Hi-Z Hi-Z PLLclkB PAclkB MODE Normal Bypass 1 1 0 1 x 1 0 Test Disable 0 0 0 0 0 S0 S1 S2

mode. this caused a current spike

MULT 0:1

RATIO

FSB/RDRM

on the rambus channel. putting

0:

0

4:

1

100/200

the DRCG in test mode during

D

init, cut this current spike down.

0:

1

6:

1

100/300

C

2

1:

0

8:

3

100/133

D

1: Use Normal and Test Modes

1

8:

1

100/400

5,33

MULT0

1

Q4

B

2N2222A

106127-002

E

3

NI+3.3V +1.8V

SOT23FT

+3.3V

C

2

+3.3V

+3.3V

+3.3V

5,49* *

DRCG_S0_S1 R233 8.2K

1 8.2K NI

Q5

B

2N2222A

R237

R929

R928

8.2K

8.2K

106127-002

*

*

8.2K

*

NI R236

I

I

NI176902-001R235 8.2K SSO28AT**

E Place these resistors less than 1 inch from DRCG

3

U31Intel recommends

SOT23FT

C R266 2 REFCLK 39.2 1% 20 19 CTMA_CLK_R CTMNA_CLK_R 1 12 CLK1 CLK1_ VDDIR VDDIPD CLK0 CLK0_ 23 24 CTMB_CLK_R CTMNB_CLK_R

W234

51ohm and 39ohm.

C B_RM2_LCTMIntel recommends If C815 and C796 are changed to 0.1 uF, jitter will decrease, but latency coming out of stop clock will increase *

22

4

DRCG_CLKIN 17 16 15 M0 M1 M2 SYNCLK0 PCLK0 4 5 9 10 SYNCLK1 PCLK1 R265

R268

I

5,33 33

MULT0 MULT1

*

0

R267 51 1% C256 4PF NI CTMB_DIFF R264*

16 16

RCLKOUT_B HCLKOUT_B

16 16

RCLKOUT_A HCLKOUT_A

C257 51 1% 0.1UF

*

5,49

DRCG_S0_S1 28 27 26 S0 S1 S2 STOP_ PWRDN_

B_RM2_LCTMN*

R286 I

0