Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE...

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A A B B C C D D E E 1 1 2 2 3 3 4 4 Title Size Document Number Rev Date: Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-6751P 0.2 Cover Page Custom 1 59 Friday, November 26, 2010 2010/07/12 2012/07/11 Compal Electronics, Inc. Title Size Document Number Rev Date: Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-6751P 0.2 Cover Page Custom 1 59 Friday, November 26, 2010 2010/07/12 2012/07/11 Compal Electronics, Inc. Title Size Document Number Rev Date: Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-6751P 0.2 Cover Page Custom 1 59 Friday, November 26, 2010 2010/07/12 2012/07/11 Compal Electronics, Inc. Intel Sandy Bridge Processor with DDRIII + Cougar Point PCH DIS+UMA+Muxless M/B Schematics Document REV:0.3 Compal PIWG1 / PIWG2 2010-10-22 ATI Robson/PX3.0,PX4.0 LA-6751P / LA-6753P Lenovo G470 / G570

Transcript of Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE...

Page 1: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

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Size Document Number Rev

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Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

Cover PageCustom

1 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

Cover PageCustom

1 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

Cover PageCustom

1 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Intel Sandy Bridge Processor with DDRIII + Cougar Point PCH

DIS+UMA+Muxless M/B Schematics Document

REV:0.3

Compal PIWG1 / PIWG2

2010-10-22

ATI Robson/PX3.0,PX4.0

LA-6751P / LA-6753P

Lenovo G470 / G570

Page 2: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

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Size Document Number Rev

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Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

Block DiagramCustom

2 59Friday, November 26, 2010

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Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

Block DiagramCustom

2 59Friday, November 26, 2010

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Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

Block DiagramCustom

2 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

File Name : G470/G570Compal confidential

37.5mm*37.5mm

25mm*25mm

FDI *8100MHz 2.7GT/s

Intel

LPC BUS

BANK 0, 1, 2, 3

Sandy Bridge

Socket-rPGA988B

DMI *4

FCBGA 989

DDR3*4VRAM 64*16

Thermal Sensor

PCI-E(WLAN)

USB(WiMAX)

IntelCougar Point

EC

Touch Pad Int. KBD

SPI ROM

AMDRobson XT

DDR3 SO-DIMM *2PCI-E x16

Dual ChannelDDR3 1066MHz(1.5V)DDR3 1333MHz(1.5V)

Up to 8GB

HDMIConnector

CRTConnector

LVDSConnector

PCI ExpressMini Card Slot *1

AthrosAR8151-B(GLAN)AR8152-B(10/100)

RJ-45Connector

PCI-E x1 *6

WiMAXWLAN

SPIROMBIOS

USB2.0 *14

SATA *6

SATA ODD

SATA3 HDD

eSATA+USB(Left)

(Port 0/Port 1 support SATA3)

Audio Codec

CX20671

LAN

Conexant

Card Reader

RTS5139Reltek

SDXC/MMC/MS/xD

Camera Conn.

BlueTooth Conn.

Mini Card Slot *1

USB2.0 *1(Right)

USB2.0 *2(Left)

AZALIA

2 channel speaker

Int. MIC

Audio Jacks

For 14"(Page 4x)LS6753P PWR/BLS6751P CardReader/B

For 15"(Page 4x+1)LS6753P PWR/B

LS6754P LED/BLS6751P CardReader/B

LS6755P ODD/B

ENE KB930ENE KB9012

EMC1403

Page 3: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

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THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

Notes ListB

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Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

Notes ListB

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Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

Notes ListB

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USB 2.0 USB 1.1 Port3 ExternalUSB Port

USB Port (Left Side)

Camera

Blue Tooth

0123456789

10111213

UHCI0

UHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

EHCI1

EHCI2

USB Port Table

Board ID / SKU ID Table for AD channelBOARD ID Table

EC SM Bus1 address

Device

DDR DIMM0 1001 000Xb

DDR DIMM2 1001 010Xb

STATESIGNAL

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

Vcc 3.3V +/- 5%100K +/- 5%Ra/Rc/Re

Board ID Rb / Rd / Rf V min0123

08.2K +/- 5%

0 V0.216 V 0.250 V 0.289 V0.436 V0.712 V

0.503 V0.819 V

0.538 V0.875 V

AD_BID V typAD_BID VAD_BID max

18K +/- 5%33K +/- 5%56K +/- 5%100K +/- 5%200K +/- 5%

3.300 V

0 V 0 V

4567 NC

1.036 V1.453 V 1.650 V 1.759 V1.935 V2.500 V

2.200 V3.300 V

2.341 V

1.185 V 1.264 V

Board ID01234567

PCB Revision

0.1

PCH SM Bus address

Device Address

Address

Address

Voltage Rails

Unpop

BTO Item BOM Structure

ON

ON

ON

ON

ON

ON

ON ON

ON

ON

ON

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

LOW

LOW LOW LOW LOW

LOWLOWLOW

LOW

LOW

LOW

HIGH HIGH HIGH HIGH

HIGHHIGHHIGH

HIGH

HIGH

HIGH

EC SM Bus2 address

Device

Smart Battery 0001 011X b

PX@UMA and PX busDIS@

Blue Tooth BT@Connector ME@

Discrete HDMI VGA_HDMI@

@

USB/B (Right Side)

Card Reader

Mini Card(WLAN)

UMA HDMI UMA_HDMI@

Discrete Only

X

V+3VALW+3VALW

+3VALW

+3VALW

+3VALW

+3VALW

+3VS

XX

V

V

X

XX

PCH

ThermalSensor

X

X

XSML0CLK

SML0DATAPCH

SMB_EC_CK2

SOURCE

KB930

VGA BATT KE930 SODIMM

SMBUS Control Table

SMBCLK

SMBDATAPCH

WLANWWAN

SMB_EC_DA2

SMB_EC_CK1

SMB_EC_DA1X V

V

X

X

X

X

X

X

X

X

X

X

X

X

X

KB930

SML1CLK

SML1DATAPCH XX X

X

X

USB Port (Left Side)

USB Port (Left Side)

V+3VS

+3VS

+3VS

+3VS

V+3VS

eSATA ESATA@

O

X

S3

+3VS

X

X

+3VALW

+5VS

O

+CPU_CORE

OO

X

X X

+VCCP

powerplane

O

O

O

O

X

S5 S4/ Battery only

X X X

+B

State

+1.5VS

+1.5V

S5 S4/AC & Batterydon't exist

S5 S4/AC

+5VALW

S0

O

O

+GFX_CORE

+1.8VS

+0.75VS

+1.05VS

+VGA_CORE

COMMON HDMI HDMI@

BOM Structure Table

BACO BACO@

EVTDVTPVTMP

PX3.0 only, not for BACO PX3@

45 LEVEL 45@10/100 LAN 8152@GIGA LAN GIGA@Cameara CMOS@

Thermal Sensor EMC1403-2 1001_101xb

100_1100 bThermal Sensor EMC1402-1

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Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

dGPU Block DiagramB

4 59Friday, November 26, 2010

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Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

dGPU Block DiagramB

4 59Friday, November 26, 2010

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Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

dGPU Block DiagramB

4 59Friday, November 26, 2010

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Note: Do not drive any IOs before VDDR3 is ramped up.

VDD_CT(1.8V)

VDDR3(3.3VGS)

VDDC/VDDCI(1.12V)

PERSTb

Straps Reset

Straps Valid

REFCLK

VDDR1(1.5VGS)

Power-Up/Down Sequence1. All the ASIC supplies must fully reach their respective nominal voltages within 20 ms of the start of the ramp-upsequence, though a shorter ramp-up duration is preferred.

2. VDDR3 should ramp-up before or simultaneously with VDDC.

3. For LVDS, DPx_VDD10 should ramp-up before DPx_VDD18 and the PCIe Reference clock should begin beforeDPx_VDD18. For power-down, DPx_VDD18 should ramp-down before DPx_VDD10.

4. The external pull-ups on the DDC/AUX signals (if applicable) should ramp-up before or after both VDDC andVDD_CT have ramped up.

5.VDDC and VDD_CT should not ramp-up simultaneously. (e.g., VDDC should reach 90% before VDD_CT starts toramp-up (or vice versa).)

PCIE_VDDC(1.0V)

Global ASIC Reset

T4+16clock

MOS

PE_GPIO1

PE_GPIO0 PE_EN

BIF_VDDC

PX_mode

PWRGOOD

SI4800

SI4800

Regulator

Regulator

Page 5: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

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FDI_FSYNC0

FDI_LSYNC0FDI_LSYNC1

FDI_FSYNC1

FDI_INT

EDP_COMP

PEG_COMP

PCIE_CRX_GTX_N15

PCIE_CRX_GTX_N10

PCIE_CRX_GTX_N14

PCIE_CRX_GTX_N0

PCIE_CRX_GTX_N8

PCIE_CRX_GTX_N6PCIE_CRX_GTX_N7

PCIE_CRX_GTX_N4PCIE_CRX_GTX_N3

PCIE_CRX_GTX_N9

PCIE_CRX_GTX_N12PCIE_CRX_GTX_N13

PCIE_CRX_GTX_N5

PCIE_CRX_GTX_N2PCIE_CRX_GTX_N1

PCIE_CRX_GTX_N11

PCIE_CRX_GTX_P15PCIE_CRX_GTX_P14

PCIE_CRX_GTX_P8

PCIE_CRX_GTX_P4

PCIE_CRX_GTX_P0

PCIE_CRX_GTX_P10

PCIE_CRX_GTX_P7

PCIE_CRX_GTX_P9

PCIE_CRX_GTX_P13

PCIE_CRX_GTX_P6

PCIE_CRX_GTX_P3

PCIE_CRX_GTX_P12

PCIE_CRX_GTX_P5

PCIE_CRX_GTX_P11

PCIE_CRX_GTX_P1PCIE_CRX_GTX_P2

PCIE_CTX_GRX_C_P0

PCIE_CTX_GRX_C_P10

PCIE_CTX_GRX_C_P15PCIE_CTX_GRX_C_P14

PCIE_CTX_GRX_C_P8

PCIE_CTX_GRX_C_P6

PCIE_CTX_GRX_C_P4

PCIE_CTX_GRX_C_P13

PCIE_CTX_GRX_C_P7

PCIE_CTX_GRX_C_P1

PCIE_CTX_GRX_C_P9

PCIE_CTX_GRX_C_P12

PCIE_CTX_GRX_C_P3

PCIE_CTX_GRX_C_P5

PCIE_CTX_GRX_C_P2

PCIE_CTX_GRX_C_P11

PCIE_CTX_GRX_C_N14PCIE_CTX_GRX_C_N15

PCIE_CTX_GRX_C_N0

PCIE_CTX_GRX_C_N10

PCIE_CTX_GRX_C_N6

PCIE_CTX_GRX_C_N8

PCIE_CTX_GRX_C_N13

PCIE_CTX_GRX_C_N4

PCIE_CTX_GRX_C_N9

PCIE_CTX_GRX_C_N5

PCIE_CTX_GRX_C_N2

PCIE_CTX_GRX_C_N12

PCIE_CTX_GRX_C_N7

PCIE_CTX_GRX_C_N1

PCIE_CTX_GRX_C_N11

PCIE_CTX_GRX_C_N3

PCIE_CTX_GRX_N15

PCIE_CTX_GRX_N0

PCIE_CTX_GRX_N14

PCIE_CTX_GRX_N10

PCIE_CTX_GRX_N6

PCIE_CTX_GRX_N8

PCIE_CTX_GRX_N13

PCIE_CTX_GRX_N4

PCIE_CTX_GRX_N9

PCIE_CTX_GRX_N5

PCIE_CTX_GRX_N2

PCIE_CTX_GRX_N12

PCIE_CTX_GRX_N7

PCIE_CTX_GRX_N1

PCIE_CTX_GRX_N11

PCIE_CTX_GRX_N3

PCIE_CTX_GRX_P7

PCIE_CTX_GRX_P0

PCIE_CTX_GRX_P10

PCIE_CTX_GRX_P15PCIE_CTX_GRX_P14

PCIE_CTX_GRX_P3

PCIE_CTX_GRX_P5

PCIE_CTX_GRX_P8

PCIE_CTX_GRX_P6

PCIE_CTX_GRX_P4

PCIE_CTX_GRX_P13

PCIE_CTX_GRX_P2

PCIE_CTX_GRX_P11

PCIE_CTX_GRX_P1

PCIE_CTX_GRX_P9

PCIE_CTX_GRX_P12

eDP_HPD

FDI_LSYNC0

FDI_FSYNC0

FDI_LSYNC1

FDI_FSYNC1

FDI_INT

DMI_CTX_PRX_P0<16>

DMI_CRX_PTX_P0<16>

DMI_CTX_PRX_N1<16>

DMI_CRX_PTX_N1<16>

DMI_CTX_PRX_P3<16>

DMI_CRX_PTX_P3<16>

DMI_CTX_PRX_P2<16>

DMI_CTX_PRX_N0<16>

DMI_CRX_PTX_N3<16>

DMI_CRX_PTX_P2<16>

DMI_CTX_PRX_N3<16>

DMI_CTX_PRX_P1<16>

DMI_CRX_PTX_N0<16>

DMI_CRX_PTX_N2<16>

DMI_CRX_PTX_P1<16>

DMI_CTX_PRX_N2<16>

FDI_CTX_PRX_N0<16>FDI_CTX_PRX_N1<16>FDI_CTX_PRX_N2<16>FDI_CTX_PRX_N3<16>FDI_CTX_PRX_N4<16>FDI_CTX_PRX_N5<16>FDI_CTX_PRX_N6<16>FDI_CTX_PRX_N7<16>

FDI_CTX_PRX_P0<16>FDI_CTX_PRX_P1<16>FDI_CTX_PRX_P2<16>FDI_CTX_PRX_P3<16>FDI_CTX_PRX_P4<16>FDI_CTX_PRX_P5<16>FDI_CTX_PRX_P6<16>FDI_CTX_PRX_P7<16>

FDI_FSYNC0<16>FDI_FSYNC1<16>

FDI_INT<16>

FDI_LSYNC0<16>FDI_LSYNC1<16>

PCIE_CRX_GTX_N[0..15] <23>

PCIE_CTX_GRX_P[0..15] <23>

PCIE_CTX_GRX_N[0..15] <23>

PCIE_CRX_GTX_P[0..15] <23>

+1.05VS

+1.05VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(1/7) DMI,FDI,PEGCustom

5 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(1/7) DMI,FDI,PEGCustom

5 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(1/7) DMI,FDI,PEGCustom

5 59Friday, November 26, 2010

2010/07/12 2012/07/11

PEG_ICOMPI and RCOMPO signals should beshorted and routedwith - max length = 500 mils - typicalimpedance = 43 mohmsPEG_ICOMPO signals should be routed with -max length = 500 mils- typical impedance = 14.5 mohms

eDP_COMPIO and ICOMPO signalsshould be shorted near ballsand routed with typicalimpedance <25 mohms

Compal Electronics, Inc.

DISCRETE ONLY

PEG Static Lane Reversal - CFG2 is for the 16x

CFG2

0:Lane Reversed

1: Normal Operation; Lane # definition matchessocket pin map definition

*

C10 0.1U_0402_10V6KC10 0.1U_0402_10V6K1 2

C8 0.1U_0402_10V6KC8 0.1U_0402_10V6K1 2

C31 0.1U_0402_10V6KC31 0.1U_0402_10V6K1 2

R51K_0402_5% DIS@ R51K_0402_5% DIS@ 12

C20 0.1U_0402_10V6KC20 0.1U_0402_10V6K1 2

R724.9_0402_1%

R724.9_0402_1%

12

C7 0.1U_0402_10V6KC7 0.1U_0402_10V6K1 2

C32 0.1U_0402_10V6KC32 0.1U_0402_10V6K1 2

R61K_0402_5% DIS@ R61K_0402_5% DIS@ 12

C14 0.1U_0402_10V6KC14 0.1U_0402_10V6K1 2

C2 0.1U_0402_10V6KC2 0.1U_0402_10V6K1 2

C5 0.1U_0402_10V6KC5 0.1U_0402_10V6K1 2

C9 0.1U_0402_10V6KC9 0.1U_0402_10V6K1 2

R21K_0402_5% DIS@ R21K_0402_5% DIS@ 12

C24 0.1U_0402_10V6KC24 0.1U_0402_10V6K1 2

C11 0.1U_0402_10V6KC11 0.1U_0402_10V6K1 2

R31K_0402_5% DIS@ R31K_0402_5% DIS@ 12

C17 0.1U_0402_10V6KC17 0.1U_0402_10V6K1 2

C29 0.1U_0402_10V6KC29 0.1U_0402_10V6K1 2

C3 0.1U_0402_10V6KC3 0.1U_0402_10V6K1 2

C16 0.1U_0402_10V6KC16 0.1U_0402_10V6K1 2

R41K_0402_5% DIS@ R41K_0402_5% DIS@ 12

C25 0.1U_0402_10V6KC25 0.1U_0402_10V6K1 2

PCI EXPRESS* - GRAPHICS

DMI

Intel(R) FDI

eDP

JCPU1A

Sandy Bridge_rPGA_Rev1p0ME@

PCI EXPRESS* - GRAPHICS

DMI

Intel(R) FDI

eDP

JCPU1A

Sandy Bridge_rPGA_Rev1p0ME@

DMI_RX#[0]B27

DMI_RX#[1]B25

DMI_RX#[2]A25

DMI_RX#[3]B24

DMI_RX[0]B28

DMI_RX[1]B26

DMI_RX[2]A24

DMI_RX[3]B23

DMI_TX#[0]G21

DMI_TX#[1]E22

DMI_TX#[2]F21

DMI_TX#[3]D21

DMI_TX[0]G22

DMI_TX[1]D22

DMI_TX[3]C21DMI_TX[2]F20

FDI0_TX#[0]A21

FDI0_TX#[1]H19

FDI0_TX#[2]E19

FDI0_TX#[3]F18

FDI1_TX#[0]B21

FDI1_TX#[1]C20

FDI1_TX#[2]D18

FDI1_TX#[3]E17

FDI0_TX[0]A22

FDI0_TX[1]G19

FDI0_TX[2]E20

FDI0_TX[3]G18

FDI1_TX[0]B20

FDI1_TX[1]C19

FDI1_TX[2]D19

FDI1_TX[3]F17

FDI0_FSYNCJ18

FDI1_FSYNCJ17

FDI_INTH20

FDI0_LSYNCJ19

FDI1_LSYNCH17

PEG_ICOMPI J22

PEG_ICOMPO J21

PEG_RCOMPO H22

PEG_RX#[0] K33

PEG_RX#[1] M35

PEG_RX#[2] L34

PEG_RX#[3] J35

PEG_RX#[4] J32

PEG_RX#[5] H34

PEG_RX#[6] H31

PEG_RX#[7] G33

PEG_RX#[8] G30

PEG_RX#[9] F35

PEG_RX#[10] E34

PEG_RX#[11] E32

PEG_RX#[12] D33

PEG_RX#[13] D31

PEG_RX#[14] B33

PEG_RX#[15] C32

PEG_RX[0] J33

PEG_RX[1] L35

PEG_RX[2] K34

PEG_RX[3] H35

PEG_RX[4] H32

PEG_RX[5] G34

PEG_RX[6] G31

PEG_RX[7] F33

PEG_RX[8] F30

PEG_RX[9] E35

PEG_RX[10] E33

PEG_RX[11] F32

PEG_RX[12] D34

PEG_RX[13] E31

PEG_RX[14] C33

PEG_RX[15] B32

PEG_TX#[0] M29

PEG_TX#[1] M32

PEG_TX#[2] M31

PEG_TX#[3] L32

PEG_TX#[4] L29

PEG_TX#[5] K31

PEG_TX#[6] K28

PEG_TX#[7] J30

PEG_TX#[8] J28

PEG_TX#[9] H29

PEG_TX#[10] G27

PEG_TX#[11] E29

PEG_TX#[12] F27

PEG_TX#[13] D28

PEG_TX#[14] F26

PEG_TX#[15] E25

PEG_TX[0] M28

PEG_TX[1] M33

PEG_TX[2] M30

PEG_TX[3] L31

PEG_TX[4] L28

PEG_TX[5] K30

PEG_TX[6] K27

PEG_TX[7] J29

PEG_TX[8] J27

PEG_TX[9] H28

PEG_TX[10] G28

PEG_TX[11] E28

PEG_TX[12] F28

PEG_TX[13] D27

PEG_TX[14] E26

PEG_TX[15] D25

eDP_AUXC15

eDP_AUX#D15

eDP_TX[0]C17

eDP_TX[1]F16

eDP_TX[2]C16

eDP_TX[3]G15

eDP_TX#[0]C18

eDP_TX#[1]E16

eDP_TX#[2]D16

eDP_TX#[3]F15

eDP_COMPIOA18

eDP_HPDB16eDP_ICOMPOA17

C28 0.1U_0402_10V6KC28 0.1U_0402_10V6K1 2

C26 0.1U_0402_10V6KC26 0.1U_0402_10V6K1 2

C21 0.1U_0402_10V6KC21 0.1U_0402_10V6K1 2

C18 0.1U_0402_10V6KC18 0.1U_0402_10V6K1 2

C12 0.1U_0402_10V6KC12 0.1U_0402_10V6K1 2

C22 0.1U_0402_10V6KC22 0.1U_0402_10V6K1 2

C4 0.1U_0402_10V6KC4 0.1U_0402_10V6K1 2

C30 0.1U_0402_10V6KC30 0.1U_0402_10V6K1 2

C13 0.1U_0402_10V6KC13 0.1U_0402_10V6K1 2

C19 0.1U_0402_10V6KC19 0.1U_0402_10V6K1 2

C1 0.1U_0402_10V6KC1 0.1U_0402_10V6K1 2

C23 0.1U_0402_10V6KC23 0.1U_0402_10V6K1 2

C6 0.1U_0402_10V6KC6 0.1U_0402_10V6K1 2

R124.9_0402_1%

R124.9_0402_1%

12

C27 0.1U_0402_10V6KC27 0.1U_0402_10V6K1 2

C15 0.1U_0402_10V6KC15 0.1U_0402_10V6K1 2

Page 6: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

XDP_TCKXDP_TRST#

XDP_TMSXDP_TDIXDP_TDO

SUSP

H_CATERR#

XDP_BPM#4

XDP_TRST#

XDP_PREQ#

SM_RCOMP0

H_PECI

XDP_BPM#7

PM_DRAM_PWRGD_R

H_THRMTRIP#

XDP_TDO

SM_RCOMP2

XDP_BPM#1

XDP_BPM#6

CLK_CPU_DMI_RCLK_CPU_DMII#_R

XDP_BPM#3

H_CPUPWRGD_R

XDP_TDI

XDP_BPM#0

BUF_CPU_RST#

XDP_DBRESET#

H_PROCHOT#_R

XDP_TCK

H_DRAMRST#

XDP_BPM#2

H_PM_SYNC_R

XDP_PRDY#

SM_RCOMP1

XDP_BPM#5

PLT_RST#BUFO_CPU_RST#

H_PROCHOT#

PM_SYS_PWRGD_BUF

BUF_CPU_RST#

XDP_TMS

PM_DRAM_PWRGD<16>

SUSP<10,44,51>

H_DRAMRST# <7>

H_PM_SYNC<16>

CLK_CPU_DMI# <15>

H_THRMTRIP#<19>

CLK_CPU_DMI <15>

H_CPUPWRGD<19>

H_SNB_IVB#<18>

H_PECI<19,40>

H_PROCHOT#<40>

PLT_RST# <18>

SYS_PWROK<16>

PCH_POK<16,40>

+1.05VS

+1.5V_CPU_VDDQ

+3VALW

+1.05VS

+3VS

+1.05VS

+1.05VS

+3VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(2/7) PM,XDP,CLKCustom

6 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(2/7) PM,XDP,CLKCustom

6 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(2/7) PM,XDP,CLKCustom

6 59Friday, November 26, 2010

2010/07/12 2012/07/11

PU/PD for JTAG signals

DDR3 Compensation Signals

Compal Electronics, Inc.

Buffered reset to CPU

DG1.0

closs to EC 250~750mils

DG1.0

3V

Change footprint20100814

10/12 reserve R880 / R882

R13 1K_0402_5%R13 1K_0402_5%12

R23 51_0402_5%@R23 51_0402_5%@ 12

U2

SN74LVC1G07DCKR_SC70-5

U2

SN74LVC1G07DCKR_SC70-5

NC 1

A 2

G3

Y4

P5

R3275_0402_5%

R3275_0402_5%

12R34

43_0402_1%R34

43_0402_1%1 2

G

D

S

Q12N7002H_SOT23-3

@

G

D

S

Q12N7002H_SOT23-3

@2

13

R30200_0402_5%R30200_0402_5%

12

R21 51_0402_5%R21 51_0402_5%12R22

0_0402_5%R22

0_0402_5%1 2

R2710K_0402_5%R2710K_0402_5%

12

R24 51_0402_5%R24 51_0402_5%12

R20 51_0402_5%R20 51_0402_5%12

R10 0_0402_5%R10 0_0402_5%1 2

R3339_0402_5%

@R3339_0402_5%

@

12

R350_0402_5%

@R350_0402_5%

@

12

R1556_0402_5%

R1556_0402_5%

1 2

C330.1U_0402_16V4Z

C330.1U_0402_16V4Z

1

2

R18 200_0402_1%R18 200_0402_1%12

R260_0402_5%

R260_0402_5%1 2

R161 100K_0402_5%R161 100K_0402_5%1 2

U1

74AHC1G09GW_TSSOP5

U1

74AHC1G09GW_TSSOP5

B1

A2

G3

O 4

P5

R11

0_0402_5%

R11

0_0402_5%

1 2

R17 25.5_0402_1%R17 25.5_0402_1%12R16 140_0402_1%R16 140_0402_1%12

R12 1K_0402_5%R12 1K_0402_5%12

R29

130_0402_5%

R29

130_0402_5%1 2

CLOCKS

MISC

THERMAL

PWR MANAGEMENT

DDR3

MISC

JTAG & BPM

JCPU1B

Sandy Bridge_rPGA_Rev1p0ME@

CLOCKS

MISC

THERMAL

PWR MANAGEMENT

DDR3

MISC

JTAG & BPM

JCPU1B

Sandy Bridge_rPGA_Rev1p0ME@

SM_RCOMP[1] A5

SM_RCOMP[2] A4

SM_DRAMRST# R8

SM_RCOMP[0] AK1

BCLK# A27BCLK A28

DPLL_REF_CLK# A15DPLL_REF_CLK A16

CATERR#AL33

PECIAN33

PROCHOT#AL32

THERMTRIP#AN32

SM_DRAMPWROKV8

RESET#AR33

PRDY# AP29

PREQ# AP27

TCK AR26

TMS AR27

TRST# AP30

TDI AR28

TDO AP26

DBR# AL35

BPM#[0] AT28

BPM#[1] AR29

BPM#[2] AR30

BPM#[3] AT30

BPM#[4] AP32

BPM#[5] AR31

BPM#[6] AT31

BPM#[7] AR32

PM_SYNCAM34

SKTOCC#AN34

PROC_SELECT#C26

UNCOREPWRGOODAP33

R28 1K_0402_5%R28 1K_0402_5%12

C340.1U_0402_16V4Z

C340.1U_0402_16V4Z

1

2

R8820_0402_5%@R8820_0402_5%@1 2

R25 51_0402_5%R25 51_0402_5%12

R8800_0402_5%@R8800_0402_5%@1 2

R962_0402_5%

R962_0402_5%

12

Page 7: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_A_D63DDR_A_D62

DDR_A_D8

DDR_A_D3DDR_A_D4

DDR_A_D7

DDR_A_D5DDR_A_D6

DDR_A_D59DDR_A_D58DDR_A_D57DDR_A_D56

DDR_A_D47DDR_A_D46

DDR_A_D42DDR_A_D43

DDR_A_D34

DDR_A_D39

DDR_A_D44DDR_A_D45

DDR_A_D35

DDR_A_D41DDR_A_D40

DDR_A_D38

DDR_A_D36DDR_A_D37

DDR_A_D32DDR_A_D33

DDR_A_D61DDR_A_D60

DDR_A_D2DDR_A_D1DDR_A_D0

DDR_A_D55DDR_A_D54

DDR_A_D51

DDR_A_D48

DDR_A_D50DDR_A_D49

DDR_A_D52DDR_A_D53

DDR_A_D31

DDR_A_D14DDR_A_D15

DDR_A_D25DDR_A_D24

DDR_A_D26DDR_A_D27

DDR_A_D30

DDR_A_D9

DDR_A_D13DDR_A_D12

DDR_A_D10DDR_A_D11

DDR_A_D29DDR_A_D28

DDR_A_D19DDR_A_D20

DDR_A_D16

DDR_A_D21

DDR_A_D17

DDR_A_D22

DDR_A_D18

DDR_A_D23

DDR_A_MA15

DDR_A_DQS0

DDR_A_DQS2DDR_A_DQS1

DDR_A_DQS6DDR_A_DQS5DDR_A_DQS4DDR_A_DQS3

DDR_A_DQS7

DDR_A_DQS#7

DDR_A_DQS#0

DDR_A_DQS#2

DDR_A_DQS#5

DDR_A_DQS#3

DDR_A_DQS#1

DDR_A_DQS#4

DDR_A_DQS#6

DDR_A_MA0

DDR_A_MA14

DDR_A_MA5DDR_A_MA4

DDR_A_MA1DDR_A_MA2DDR_A_MA3

DDR_A_MA9

DDR_A_MA7DDR_A_MA6

DDR_A_MA12DDR_A_MA13

DDR_A_MA8

DDR_A_MA11DDR_A_MA10

DDR_B_D33

DDR_B_D14

DDR_B_D42

DDR_B_D59

DDR_B_D63

DDR_B_D43

DDR_B_D55

DDR_B_D53

DDR_B_D29

DDR_B_D24

DDR_B_D34

DDR_B_D4

DDR_B_D26

DDR_B_D13

DDR_B_D10

DDR_B_D21

DDR_B_D11

DDR_B_D57

DDR_B_D44

DDR_B_D0

DDR_B_D7

DDR_B_D46

DDR_B_D3

DDR_B_D15

DDR_B_D27

DDR_B_D30

DDR_B_D35

DDR_B_D40

DDR_B_D49

DDR_B_D23

DDR_B_D25

DDR_B_D19

DDR_B_D37

DDR_B_D48

DDR_B_D36

DDR_B_D18

DDR_B_D8

DDR_B_D47

DDR_B_D9

DDR_B_D60

DDR_B_D50

DDR_B_D62

DDR_B_D52

DDR_B_D2

DDR_B_D51

DDR_B_D56

DDR_B_D39

DDR_B_D22

DDR_B_D28

DDR_B_D6

DDR_B_D45

DDR_B_D17

DDR_B_D58

DDR_B_D61

DDR_B_D31

DDR_B_D54

DDR_B_D1

DDR_B_D41

DDR_B_D5

DDR_B_D12

DDR_B_D20

DDR_B_D38

DDR_B_D32

DDR_B_D16

DDR_B_MA15

DDR_B_DQS#1

DDR_B_DQS#7

DDR_B_DQS#5DDR_B_DQS#4

DDR_B_DQS#0

DDR_B_DQS#3

DDR_B_DQS#6

DDR_B_DQS#2

DDR_B_DQS7

DDR_B_DQS0DDR_B_DQS1

DDR_B_DQS5DDR_B_DQS4DDR_B_DQS3DDR_B_DQS2

DDR_B_DQS6

DDR_B_MA0

DDR_B_MA9

DDR_B_MA7

DDR_B_MA13

DDR_B_MA2

DDR_B_MA4

DDR_B_MA11

DDR_B_MA3

DDR_B_MA5DDR_B_MA6

DDR_B_MA10

DDR_B_MA8

DDR_B_MA1

DDR_B_MA12

DDR_B_MA14

DDR3_DRAMRST#_RH_DRAMRST#

DRAMRST_CNTRL

DDR_A_D[0..63]<12>

DDR_A_BS0<12>DDR_A_BS1<12>DDR_A_BS2<12>

DDR_A_WE#<12>DDR_A_RAS#<12>DDR_A_CAS#<12>

M_CLK_DDR0 <12>M_CLK_DDR#0 <12>DDR_CKE0_DIMMA <12>

M_CLK_DDR1 <12>M_CLK_DDR#1 <12>DDR_CKE1_DIMMA <12>

DDR_CS0_DIMMA# <12>DDR_CS1_DIMMA# <12>

M_ODT0 <12>M_ODT1 <12>

DDR_A_DQS#[0..7] <12>

DDR_A_DQS[0..7] <12>

DDR_B_BS0<13>DDR_B_BS1<13>DDR_B_BS2<13>

DDR_B_D[0..63]<13>

DDR_B_WE#<13>DDR_B_RAS#<13>DDR_B_CAS#<13>

DDR_CS3_DIMMB# <13>

DDR_B_DQS[0..7] <13>

DDR_B_DQS#[0..7] <13>

M_CLK_DDR2 <13>M_CLK_DDR#2 <13>DDR_CKE2_DIMMB <13>

M_CLK_DDR3 <13>

DDR_CS2_DIMMB# <13>

M_ODT3 <13>M_ODT2 <13>

DDR_CKE3_DIMMB <13>M_CLK_DDR#3 <13>

DDR3_DRAMRST# <12,13>H_DRAMRST#<6>

DRAMRST_CNTRL_PCH<15>

DDR_A_MA[0..15] <12> DDR_B_MA[0..15] <13>

+1.5V

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(3/7) DDRIIICustom

7 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(3/7) DDRIIICustom

7 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(3/7) DDRIIICustom

7 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.Eiffel used 0.01u

Module design used 0.047u

R360_0402_5%@R360_0402_5%@

1 2

DDR SYSTEM MEMORY B

JCPU1D

Sandy Bridge_rPGA_Rev1p0ME@

DDR SYSTEM MEMORY B

JCPU1D

Sandy Bridge_rPGA_Rev1p0ME@

SB_BS[0]AA9

SB_BS[1]AA7

SB_BS[2]R6

SB_CAS#AA10

SB_RAS#AB8

SB_WE#AB9

SB_CLK[0] AE2

SB_CLK[1] AE1

SB_CLK#[0] AD2

SB_CLK#[1] AD1

SB_CKE[0] R9

SB_CKE[1] R10

SB_ODT[0] AE4

SB_ODT[1] AD4

SB_DQS[4] AN6

SB_DQS#[4] AN5

SB_DQS[5] AP8

SB_DQS#[5] AP9

SB_DQS[6] AK11

SB_DQS#[6] AK12

SB_DQS[7] AP14

SB_DQS#[7] AP15

SB_DQS[0] C7

SB_DQS#[0] D7

SB_DQS[1] G3

SB_DQS#[1] F3

SB_DQS[2] J6

SB_DQS#[2] K6

SB_DQS[3] M3

SB_DQS#[3] N3

SB_MA[0] AA8

SB_MA[1] T7

SB_MA[2] R7

SB_MA[3] T6

SB_MA[4] T2

SB_MA[5] T4

SB_MA[6] T3

SB_MA[7] R2

SB_MA[8] T5

SB_MA[9] R3

SB_MA[10] AB7

SB_MA[11] R1

SB_MA[12] T1

SB_MA[13] AB10

SB_MA[14] R5

SB_MA[15] R4

SB_DQ[0]C9

SB_DQ[1]A7

SB_DQ[2]D10

SB_DQ[3]C8

SB_DQ[4]A9

SB_DQ[5]A8

SB_DQ[6]D9

SB_DQ[7]D8

SB_DQ[8]G4

SB_DQ[9]F4

SB_DQ[10]F1

SB_DQ[11]G1

SB_DQ[12]G5

SB_DQ[13]F5

SB_DQ[14]F2

SB_DQ[15]G2

SB_DQ[16]J7

SB_DQ[17]J8

SB_DQ[18]K10

SB_DQ[19]K9

SB_DQ[20]J9

SB_DQ[21]J10

SB_DQ[22]K8

SB_DQ[23]K7

SB_DQ[24]M5

SB_DQ[25]N4

SB_DQ[26]N2

SB_DQ[27]N1

SB_DQ[28]M4

SB_DQ[29]N5

SB_DQ[30]M2

SB_DQ[31]M1

SB_DQ[32]AM5

SB_DQ[33]AM6

SB_DQ[34]AR3

SB_DQ[35]AP3

SB_DQ[36]AN3

SB_DQ[37]AN2

SB_DQ[38]AN1

SB_DQ[39]AP2

SB_DQ[40]AP5

SB_DQ[41]AN9

SB_DQ[42]AT5

SB_DQ[43]AT6

SB_DQ[44]AP6

SB_DQ[45]AN8

SB_DQ[46]AR6

SB_DQ[47]AR5

SB_DQ[48]AR9

SB_DQ[49]AJ11

SB_DQ[50]AT8

SB_DQ[51]AT9

SB_DQ[52]AH11

SB_DQ[53]AR8

SB_DQ[54]AJ12

SB_DQ[55]AH12

SB_DQ[56]AT11

SB_DQ[57]AN14

SB_DQ[58]AR14

SB_DQ[59]AT14

SB_DQ[60]AT12

SB_DQ[61]AN15

SB_DQ[62]AR15

SB_DQ[63]AT15

RSVD_TP[11] AB2

RSVD_TP[12] AA2

RSVD_TP[13] T9

RSVD_TP[14] AA1

RSVD_TP[15] AB1

RSVD_TP[16] T10

SB_CS#[0] AD3

SB_CS#[1] AE3

RSVD_TP[17] AD6

RSVD_TP[18] AE6

RSVD_TP[19] AD5

RSVD_TP[20] AE5

R400_0402_5%

R400_0402_5%1 2

R381K_0402_5%R381K_0402_5%

1 2

DDR SYSTEM MEMORY A

JCPU1C

Sandy Bridge_rPGA_Rev1p0ME@

DDR SYSTEM MEMORY A

JCPU1C

Sandy Bridge_rPGA_Rev1p0ME@

SA_BS[0]AE10

SA_BS[1]AF10

SA_BS[2]V6

SA_CAS#AE8

SA_RAS#AD9

SA_WE#AF9

SA_CLK[0] AB6

SA_CLK[1] AA5

SA_CLK#[0] AA6

SA_CLK#[1] AB5

SA_CKE[0] V9

SA_CKE[1] V10

SA_CS#[0] AK3

SA_CS#[1] AL3

SA_ODT[0] AH3

SA_ODT[1] AG3

SA_DQS[0] D4

SA_DQS#[0] C4

SA_DQS[1] F6

SA_DQS#[1] G6

SA_DQS[2] K3

SA_DQS#[2] J3

SA_DQS[3] N6

SA_DQS#[3] M6

SA_DQS[4] AL5

SA_DQS#[4] AL6

SA_DQS[5] AM9

SA_DQS#[5] AM8

SA_DQS[6] AR11

SA_DQS#[6] AR12

SA_DQS[7] AM14

SA_DQS#[7] AM15

SA_MA[0] AD10

SA_MA[1] W1

SA_MA[2] W2

SA_MA[3] W7

SA_MA[4] V3

SA_MA[5] V2

SA_MA[6] W3

SA_MA[7] W6

SA_MA[8] V1

SA_MA[9] W5

SA_MA[10] AD8

SA_MA[11] V4

SA_MA[12] W4

SA_MA[13] AF8

SA_MA[14] V5

SA_MA[15] V7

SA_DQ[0]C5

SA_DQ[1]D5

SA_DQ[2]D3

SA_DQ[3]D2

SA_DQ[4]D6

SA_DQ[5]C6

SA_DQ[6]C2

SA_DQ[7]C3

SA_DQ[8]F10

SA_DQ[9]F8

SA_DQ[10]G10

SA_DQ[11]G9

SA_DQ[12]F9

SA_DQ[13]F7

SA_DQ[14]G8

SA_DQ[15]G7

SA_DQ[16]K4

SA_DQ[17]K5

SA_DQ[18]K1

SA_DQ[19]J1

SA_DQ[20]J5

SA_DQ[21]J4

SA_DQ[22]J2

SA_DQ[23]K2

SA_DQ[24]M8

SA_DQ[25]N10

SA_DQ[26]N8

SA_DQ[27]N7

SA_DQ[28]M10

SA_DQ[29]M9

SA_DQ[30]N9

SA_DQ[31]M7

SA_DQ[32]AG6

SA_DQ[33]AG5

SA_DQ[34]AK6

SA_DQ[35]AK5

SA_DQ[36]AH5

SA_DQ[37]AH6

SA_DQ[38]AJ5

SA_DQ[39]AJ6

SA_DQ[40]AJ8

SA_DQ[41]AK8

SA_DQ[42]AJ9

SA_DQ[43]AK9

SA_DQ[44]AH8

SA_DQ[45]AH9

SA_DQ[46]AL9

SA_DQ[47]AL8

SA_DQ[48]AP11

SA_DQ[49]AN11

SA_DQ[50]AL12

SA_DQ[51]AM12

SA_DQ[52]AM11

SA_DQ[53]AL11

SA_DQ[54]AP12

SA_DQ[55]AN12

SA_DQ[56]AJ14

SA_DQ[57]AH14

SA_DQ[58]AL15

SA_DQ[59]AK15

SA_DQ[60]AL14

SA_DQ[61]AK14

SA_DQ[62]AJ15

SA_DQ[63]AH15

RSVD_TP[1] AB4

RSVD_TP[2] AA4

RSVD_TP[4] AB3

RSVD_TP[5] AA3

RSVD_TP[3] W9

RSVD_TP[6] W10

RSVD_TP[7] AG1

RSVD_TP[8] AH1

RSVD_TP[9] AG2

RSVD_TP[10] AH2

R394.99K_0402_1%

R394.99K_0402_1%

12

R371K_0402_5%

R371K_0402_5%

12

G

DS

Q2BSS138_NL_SOT23-3

G

DS

Q2BSS138_NL_SOT23-32

13

C350.047U_0402_16V4ZC350.047U_0402_16V4Z

1

2

Page 8: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CFG4

CFG6

CFG2

CFG7

CFG2

CFG4

CFG6CFG7

CFG5

CFG5

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(4/7) RSVD,CFGCustom

8 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(4/7) RSVD,CFGCustom

8 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(4/7) RSVD,CFGCustom

8 59Friday, November 26, 2010

2010/07/12 2012/07/11

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled

PCIE Port Bifurcation Straps

CFG[6:5]

11: (Default) x16 - Device 1 functions 1 and 2 disabled

CFG7

PEG DEFER TRAINING

0: PEG Wait for BIOS for training

1: (Default) PEG Train immediately following xxRESETBde assertion

CFG4

Display Port Presence Strap

0 : Enabled; An external Display Port device isconnected to the Embedded Display Port

1 : Disabled; No Physical Display Portattached to Embedded Display Port

CFG Straps for Processor

01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

PEG Static Lane Reversal - CFG2 is for the 16x

CFG2

0:Lane Reversed

1: Normal Operation; Lane # definition matchessocket pin map definition

Compal Electronics, Inc.

*

*

*

8/5 Check

R3531K_0402_1%

R3531K_0402_1%

12

R431K_0402_1%

@R431K_0402_1%

@

12

T12 PADT12 PAD

R441K_0402_1%@R441K_0402_1%@

12

T11 PADT11 PAD

T9 PADT9 PADT10 PADT10 PAD

T13PAD T13PAD

RESERVED

JCPU1E

Sandy Bridge_rPGA_Rev1p0ME@

RESERVED

JCPU1E

Sandy Bridge_rPGA_Rev1p0ME@

CFG[0]AK28

CFG[1]AK29

CFG[2]AL26

CFG[3]AL27

CFG[4]AK26

CFG[5]AL29

CFG[6]AL30

CFG[7]AM31

CFG[8]AM32

CFG[9]AM30

CFG[10]AM28

CFG[11]AM26

CFG[12]AN28

CFG[13]AN31

CFG[14]AN26

CFG[15]AM27

CFG[16]AK31

CFG[17]AN29

RSVD34 AM33

RSVD35 AJ27

RSVD38 J16

RSVD42 AT34

RSVD39 H16

RSVD40 G16

RSVD41 AR35

RSVD43 AT33

RSVD45 AR34

RSVD56 AT2

RSVD57 AT1

RSVD58 AR1

RSVD46 B34

RSVD47 A33

RSVD48 A34

RSVD49 B35

RSVD50 C35

RSVD51 AJ32

RSVD52 AK32

RSVD30 AE7

RSVD31 AK2

RSVD28 L7

RSVD29 AG7

RSVD27J15

RSVD16C30RSVD15D23

RSVD17A31

RSVD18B30

RSVD20D30RSVD19B29

RSVD22A30RSVD21B31

RSVD23C29

RSVD24J20

RSVD37 T8

RSVD6B4

RSVD7D1

RSVD8F25

RSVD9F24

RSVD11D24

RSVD12G25

RSVD13G24

RSVD14E23

RSVD32 W8

RSVD33 AT26

RSVD25B18

RSVD44 AP35

RSVD10F23

RSVD5AJ26

VAXG_VAL_SENSEAJ31

VSSAXG_VAL_SENSEAH31

VCC_VAL_SENSEAJ33

VSS_VAL_SENSEAH33

KEY B1

VCC_DIE_SENSE AH27

VCCIO_SELA19

RSVD54 AN35

RSVD55 AM35

R451K_0402_1%

@R451K_0402_1%

@

12

R421K_0402_1%

@ R421K_0402_1%

@

12

R411K_0402_1%R411K_0402_1%

12

R641K_0402_1%

R641K_0402_1%

12

Page 9: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+1.05VS

VSSSENSE_RVCCSENSE_R

H_CPU_SVIDCLKH_CPU_SVIDDAT

H_CPU_SVIDALRT#

VSSIO_SENSE

VCCIO_SENSE <51>

VCCSENSE <53>VSSSENSE <53>

VR_SVID_ALRT# <53>VR_SVID_CLK <53>VR_SVID_DAT <53>

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

+1.05VS

+1.05VS

+1.05VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(5/7) PWR,BYPASSCustom

9 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(5/7) PWR,BYPASSCustom

9 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(5/7) PWR,BYPASSCustom

9 59Friday, November 26, 2010

2010/07/12 2012/07/11

18ADC=53A

Compal Electronics, Inc.

VR_SVID_CLK

Cap quantity follow HR_PDDG_Rev07

QC=94A(6/16 change 10uF_0603_6.3V)*5

(22uF_0805_6.3V)*16

(330uF)*4

(22uF_0805_6.3V)*13

series-resistors close to VR

VCC_SENCE 100ohm +-1% pull-up to VCC near processor

VSS_SENCE 100ohm +-1% pull-down to GND near processor

22uF*7 NO-STUFF

(220uF_6.3V_4.2L_ESR17m)*2=(SF000002Y00)OSCAN

OSCAN

10/21 modify

8/12 Modify, need follow diffential routingR74 close CPU,R75 close PWR

C76

22U_0805_6.3V

6MC

7622U

_0805_6.3V6M

1

2

C67

22U_0805_6.3V

6MC

6722U

_0805_6.3V6M

1

2

C58

22U_0805_6.3V

6MC

5822U

_0805_6.3V6M

1

2

C74

22U_0805_6.3V

6MC

7422U

_0805_6.3V6M

1

2

C59

22U_0805_6.3V

6M

@

C59

22U_0805_6.3V

6M

@

1

2

C56

22U_0805_6.3V

6MC

5622U

_0805_6.3V6M

1

2

C54

22U_0805_6.3V

6MC

5422U

_0805_6.3V6M

1

2

+C397

330U_X

_2VM

_R6M

+C397

330U_X

_2VM

_R6M

1

2

+C394

330U_X

_2VM

_R6M

@

+C394

330U_X

_2VM

_R6M

@

1

2

C55

22U_0805_6.3V

6MC

5522U

_0805_6.3V6M

1

2

C87

22U_0805_6.3V

6MC

8722U

_0805_6.3V6M

1

2

R53 0_0402_5%R53 0_0402_5%1 2

C68

22U_0805_6.3V

6MC

6822U

_0805_6.3V6M

1

2

C60

22U_0805_6.3V

6M

@

C60

22U_0805_6.3V

6M

@

1

2

R49 0_0402_5% R49 0_0402_5% 1 2

C84

22U_0805_6.3V

6MC

8422U

_0805_6.3V6M

1

2

+

C91

330U_X

_2VM

_R6M

+

C91

330U_X

_2VM

_R6M

1

2

C38

10U_0805_6.3V

6MC

3810U

_0805_6.3V6M

1

2

C61

22U_0805_6.3V

6M

@

C61

22U_0805_6.3V

6M

@

1

2

C40

10U_0805_6.3V

6MC

4010U

_0805_6.3V6M

1

2

C66

22U_0805_6.3V

6M

@

C66

22U_0805_6.3V

6M

@

1

2

C82

22U_0805_6.3V

6M

@

C82

22U_0805_6.3V

6M

@

1

2

+ C69220U_6.3V_M

+ C69220U_6.3V_M

1

2

C62

22U_0805_6.3V

6M

@

C62

22U_0805_6.3V

6M

@

1

2

C77

22U_0805_6.3V

6MC

7722U

_0805_6.3V6M

1

2

R4675_0402_5%R4675_0402_5%

12

C50

10U_0603_6.3V

6MC

5010U

_0603_6.3V6M

1

2

C52

10U_0603_6.3V

6MC

5210U

_0603_6.3V6M

1

2

C86

22U_0805_6.3V

6MC

8622U

_0805_6.3V6M

1

2

+

C88

330U_X

_2VM

_R6M

+

C88

330U_X

_2VM

_R6M

1

2

R52 0_0402_5%R52 0_0402_5%1 2

C63

22U_0805_6.3V

6M

@

C63

22U_0805_6.3V

6M

@

1

2

R48 0_0402_5% R48 0_0402_5% 1 2

C78

22U_0805_6.3V

6MC

7822U

_0805_6.3V6M

1

2

C81

22U_0805_6.3V

6M

@

C81

22U_0805_6.3V

6M

@

1

2

+

C73

330U_D

2_2.5VY

_R9M

@+

C73

330U_D

2_2.5VY

_R9M

@

1

2

R47 43_0402_5%R47 43_0402_5%1 2

R750_0402_5%

@

R750_0402_5%

@

1 2

C46

22U_0805_6.3V

6MC

4622U

_0805_6.3V6M

1

2

C79

22U_0805_6.3V

6MC

7922U

_0805_6.3V6M

1

2

C36

10U_0805_6.3V

6MC

3610U

_0805_6.3V6M

1

2

C44

22U_0805_6.3V

6MC

4422U

_0805_6.3V6M

1

2

R54100_0402_1%R54100_0402_1%

12

C71

22U_0805_6.3V

6MC

7122U

_0805_6.3V6M

1

2

C70

22U_0805_6.3V

6MC

7022U

_0805_6.3V6M

1

2

+C400

330U_X

_2VM

_R6M

+C400

330U_X

_2VM

_R6M

1

2

C64

22U_0805_6.3V

6M

@

C64

22U_0805_6.3V

6M

@

1

2

+

C89

330U_X

_2VM

_R6M

@

+

C89

330U_X

_2VM

_R6M

@

1

2

R51100_0402_1%R51100_0402_1%

12

+

C90

330U_X

_2VM

_R6M

@

+

C90

330U_X

_2VM

_R6M

@

1

2

C41

22U_0805_6.3V

6MC

4122U

_0805_6.3V6M

1

2

R740_0402_5%

@

R740_0402_5%

@

1 2

C45

22U_0805_6.3V

6MC

4522U

_0805_6.3V6M

1

2

C37

10U_0805_6.3V

6MC

3710U

_0805_6.3V6M

1

2

C39

10U_0805_6.3V

6MC

3910U

_0805_6.3V6M

1

2

C47

22U_0805_6.3V

6MC

4722U

_0805_6.3V6M

1

2

C65

22U_0805_6.3V

6M

@

C65

22U_0805_6.3V

6M

@

1

2

+ C72220U_6.3V_M

+ C72220U_6.3V_M

1

2

C80

22U_0805_6.3V

6MC

8022U

_0805_6.3V6M

1

2

C75

22U_0805_6.3V

6MC

7522U

_0805_6.3V6M

1

2

R50 130_0402_5%R50 130_0402_5%12

C49

10U_0603_6.3V

6MC

4910U

_0603_6.3V6M

1

2

C83

22U_0805_6.3V

6MC

8322U

_0805_6.3V6M

1

2

POWER

CORE SUPPLY

PEG AND DDR

SENSE LINES

SVID

JCPU1F

Sandy Bridge_rPGA_Rev1p0ME@

POWER

CORE SUPPLY

PEG AND DDR

SENSE LINES

SVID

JCPU1F

Sandy Bridge_rPGA_Rev1p0ME@

VCC_SENSE AJ35

VSS_SENSE AJ34

VIDALERT# AJ29

VIDSCLK AJ30

VIDSOUT AJ28

VSSIO_SENSE A10

VCC1AG35

VCC2AG34

VCC3AG33

VCC4AG32

VCC5AG31

VCC6AG30

VCC7AG29

VCC8AG28

VCC9AG27

VCC10AG26

VCC11AF35

VCC12AF34

VCC13AF33

VCC14AF32

VCC15AF31

VCC16AF30

VCC17AF29

VCC18AF28

VCC19AF27

VCC20AF26

VCC21AD35

VCC22AD34

VCC23AD33

VCC24AD32

VCC25AD31

VCC26AD30

VCC27AD29

VCC28AD28

VCC29AD27

VCC30AD26

VCC31AC35

VCC32AC34

VCC33AC33

VCC34AC32

VCC35AC31

VCC36AC30

VCC37AC29

VCC38AC28

VCC39AC27

VCC40AC26

VCC41AA35

VCC42AA34

VCC43AA33

VCC44AA32

VCC45AA31

VCC46AA30

VCC47AA29

VCC48AA28

VCC49AA27

VCC50AA26

VCC51Y35

VCC52Y34

VCC53Y33

VCC54Y32

VCC55Y31

VCC56Y30

VCC57Y29

VCC58Y28

VCC59Y27

VCC60Y26

VCC61V35

VCC62V34

VCC63V33

VCC64V32

VCC65V31

VCC66V30

VCC67V29

VCC68V28

VCC69V27

VCC70V26

VCC71U35

VCC72U34

VCC73U33

VCC74U32

VCC75U31

VCC76U30

VCC77U29

VCC78U28

VCC79U27

VCC80U26

VCC81R35

VCC82R34

VCC83R33

VCC84R32

VCC85R31

VCC86R30

VCC87R29

VCC88R28

VCC89R27

VCC90R26

VCC91P35

VCC92P34

VCC93P33

VCC94P32

VCC95P31

VCC96P30

VCC97P29

VCC98P28

VCC99P27

VCC100P26

VCCIO1 AH13

VCCIO12 J11

VCCIO18 G12

VCCIO19 F14

VCCIO20 F13

VCCIO21 F12

VCCIO22 F11

VCCIO23 E14

VCCIO24 E12

VCCIO2 AH10

VCCIO3 AG10

VCCIO4 AC10

VCCIO5 Y10

VCCIO6 U10

VCCIO7 P10

VCCIO8 L10

VCCIO9 J14

VCCIO10 J13

VCCIO11 J12

VCCIO13 H14

VCCIO14 H12

VCCIO15 H11

VCCIO16 G14

VCCIO17 G13

VCCIO25 E11

VCCIO32 C12

VCCIO33 C11

VCCIO34 B14

VCCIO35 B12

VCCIO36 A14

VCCIO37 A13

VCCIO38 A12

VCCIO39 A11

VCCIO26 D14

VCCIO27 D13

VCCIO28 D12

VCCIO29 D11

VCCIO30 C14

VCCIO31 C13

VCCIO_SENSE B10

VCCIO40 J23

C51

10U_0603_6.3V

6M

@

C51

10U_0603_6.3V

6M

@

1

2

C53

10U_0603_6.3V

6MC

5310U

_0603_6.3V6M

1

2

C57

22U_0805_6.3V

6MC

5722U

_0805_6.3V6M

1

2

C43

22U_0805_6.3V

6MC

4322U

_0805_6.3V6M

1

2

C85

22U_0805_6.3V

6MC

8522U

_0805_6.3V6M

1

2

C42

22U_0805_6.3V

6MC

4222U

_0805_6.3V6M

1

2

C48

10U_0603_6.3V

6MC

4810U

_0603_6.3V6M

1

2

Page 10: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+V_SM_VREF_CNT +V_SM_VREF

+VCCSA

H_FC_C22

+1.8VS_VCCPLL VCCSA_SENSE

VCCSA_SENSE

RUN_ON_CPU1.5VS3# RUN_ON_CPU1.5VS3

RUN_ON_CPU1.5VS3

RUN_ON_CPU1.5VS3#

VCCSA_SEL <50>

VCC_AXG_SENSE <53>VSS_AXG_SENSE <53>

VSSSA_SENSE <50>

VCCSA_SENSE <50>

SUSP#<26,40,44,49,51,52>

CPU1.5V_S3_GATE<40>

SUSP<6,44,51>

+VCCSA

+1.5V_CPU_VDDQ

+1.8VS

+VGFX_CORE

+1.5V_CPU_VDDQ

+1.5V

+1.5V_CPU_VDDQ

+1.5V +1.5V_CPU_VDDQ

+VSB+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(6/7) PWRCustom

10 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(6/7) PWRCustom

10 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(6/7) PWRCustom

10 59Friday, November 26, 2010

2010/07/12 2012/07/11

6/9 change 330U to 22U X2

Change footprint20100814

Change footprint20100814

Change footprint20100814

10/21 Change

8/27 change to @

8/27 change to @

8/27 change to stuff

9/27 update C128 to D2 and @

10/5 change to 1K

11/18 add for sequence

R621K_0402_1%R621K_0402_1%

12

C132

1U_0402_6.3V

6KC

1321U

_0402_6.3V6K

1

2

Q5AP2302GN-HF_SOT23-3

@Q5AP2302GN-HF_SOT23-3

@

1

2

3

R55220_0402_5%

R55220_0402_5%

12

C127

10U_0805_6.3V

6M

@

C127

10U_0805_6.3V

6M

@1

2

POWER

GRAPHICS

DDR3 -1.5V RAILS

SENSE

LINES

1.8V RAIL

SA RAIL

VREF

MISC

JCPU1G

Sandy Bridge_rPGA_Rev1p0ME@

POWER

GRAPHICS

DDR3 -1.5V RAILS

SENSE

LINES

1.8V RAIL

SA RAIL

VREF

MISC

JCPU1G

Sandy Bridge_rPGA_Rev1p0ME@

SM_VREF AL1

VSSAXG_SENSE AK34VAXG_SENSE AK35VAXG1AT24

VAXG2AT23

VAXG3AT21

VAXG4AT20

VAXG5AT18

VAXG6AT17

VAXG7AR24

VAXG8AR23

VAXG9AR21

VAXG10AR20

VAXG11AR18

VAXG12AR17

VAXG13AP24

VAXG14AP23

VAXG15AP21

VAXG16AP20

VAXG17AP18

VAXG18AP17

VAXG19AN24

VAXG20AN23

VAXG21AN21

VAXG22AN20

VAXG23AN18

VAXG24AN17

VAXG25AM24

VAXG26AM23

VAXG27AM21

VAXG28AM20

VAXG29AM18

VAXG30AM17

VAXG31AL24

VAXG32AL23

VAXG33AL21

VAXG34AL20

VAXG35AL18

VAXG36AL17

VAXG37AK24

VAXG38AK23

VAXG39AK21

VAXG40AK20

VAXG41AK18

VAXG42AK17

VAXG43AJ24

VAXG44AJ23

VAXG45AJ21

VAXG46AJ20

VAXG47AJ18

VAXG48AJ17

VAXG49AH24

VAXG50AH23

VAXG51AH21

VAXG52AH20

VAXG53AH18

VAXG54AH17

VDDQ11 U4

VDDQ12 U1

VDDQ13 P7

VDDQ14 P4

VDDQ15 P1

VDDQ1 AF7

VDDQ2 AF4

VDDQ3 AF1

VDDQ4 AC7

VDDQ5 AC4

VDDQ6 AC1

VDDQ7 Y7

VDDQ8 Y4

VDDQ9 Y1

VDDQ10 U7

VCCPLL1B6

VCCPLL2A6

VCCSA1 M27

VCCSA2 M26

VCCSA3 L26

VCCSA4 J26

VCCSA5 J25

VCCSA6 J24

VCCSA7 H26

VCCSA8 H25

VCCSA_SENSE H23

VCCSA_VID1 C24

VCCPLL3A2

FC_C22 C22

C107

22U_0805_6.3V

6M

PX@

C107

22U_0805_6.3V

6M

PX@

1

2

C113

22U_0805_6.3V

6M

PX@

C113

22U_0805_6.3V

6M

PX@

1

2

J1

PAD-OPEN 4x4m

@J1

PAD-OPEN 4x4m

@1 2

R631K_0402_1%R631K_0402_1%

12

R885

0_0402_5%

R885

0_0402_5%

1 2

R580_0402_5%@

R580_0402_5%@1 2

R69 10K_0402_5%

R69 10K_0402_5%

1 2

R600_0402_5%

DIS@R60

0_0402_5%

DIS@

12

C125

10U_0805_6.3V

6MC

12510U

_0805_6.3V6M

1

2

C99

22U_0805_6.3V

6M

PX@

C99

22U_0805_6.3V

6M

PX@

1

2

R590_0402_5%@

R590_0402_5%@1 2

+

C115

330U_D

2_2.5VY

_R9M

PX@+

C115

330U_D

2_2.5VY

_R9M

PX@

1

2

R56

15K_0402_1%

R56

15K_0402_1%

12

C126

10U_0805_6.3V

6MC

12610U

_0805_6.3V6M

1

2

C108

22U_0805_6.3V

6M

PX@

C108

22U_0805_6.3V

6M

PX@

1

2

C104

22U_0805_6.3V

6M

PX@

C104

22U_0805_6.3V

6M

PX@

1

2

C1140.1U_0402_16V4Z

C1140.1U_0402_16V4Z

1

2

C970.1U_0603_25V7KC970.1U_0603_25V7K

1

2

C122

10U_0603_6.3V

6MC

12210U

_0603_6.3V6M

1

2

C129

0.1U_0402_10V

6K

@

C129

0.1U_0402_10V

6K

@

1

2

C106

22U_0805_6.3V

6M

PX@

C106

22U_0805_6.3V

6M

PX@

1

2

C154

22U_0805_6.3V

6M

@

C154

22U_0805_6.3V

6M

@

1

2

R610_0402_5%

R610_0402_5%

12

R666100K_0402_5%

@R666100K_0402_5%

@

12

C121

10U_0603_6.3V

6MC

12110U

_0603_6.3V6M

1

2

C105

22U_0805_6.3V

6M

PX@

C105

22U_0805_6.3V

6M

PX@

1

2

R667100K_0402_5% @

R667100K_0402_5% @

12

C396

0.1U_0402_10V

6K

@

C396

0.1U_0402_10V

6K

@

1

2

C98

22U_0805_6.3V

6M

PX@

C98

22U_0805_6.3V

6M

PX@

1

2

C124

10U_0805_6.3V

6MC

12410U

_0805_6.3V6M

1

2+

C128

330U_D

2_2.5VY

_R9M

@+

C128

330U_D

2_2.5VY

_R9M

@

1

2

C109

22U_0805_6.3V

6M

PX@

C109

22U_0805_6.3V

6M

PX@

1

2

C111

22U_0805_6.3V

6M

@

C111

22U_0805_6.3V

6M

@

1

2

C100

22U_0805_6.3V

6M

PX@

C100

22U_0805_6.3V

6M

PX@

1

2

C345

22U_0805_6.3V

6M

@

C345

22U_0805_6.3V

6M

@

1

2

G

D

S

Q42N7002H_SOT23-3G

D

S

Q42N7002H_SOT23-3

2

13

C120

10U_0603_6.3V

6MC

12010U

_0603_6.3V6M

1

2

C117

10U_0603_6.3V

6MC

11710U

_0603_6.3V6M

1

2

C130

10U_0805_6.3V

6MC

13010U

_0805_6.3V6M

1

2

C920.1U_0402_10V6K

@ C920.1U_0402_10V6K

@

1

2

C95

0.1U_0402_10V

6KC

950.1U

_0402_10V6K

1

2

C119

10U_0603_6.3V

6MC

11910U

_0603_6.3V6M

1

2

+

C116

330U_D

2_2.5VY

_R9M

@+

C116

330U_D

2_2.5VY

_R9M

@

1

2

C112

22U_0805_6.3V

6M

PX@

C112

22U_0805_6.3V

6M

PX@

1

2

C102

22U_0805_6.3V

6M

PX@

C102

22U_0805_6.3V

6M

PX@

1

2

R57330K_0402_5%@

R57330K_0402_5%@

12

C118

10U_0603_6.3V

6MC

11810U

_0603_6.3V6M

1

2

+ C123330U_2.5V_M

+ C123330U_2.5V_M

1

2

R66 0_0402_5%R66 0_0402_5%1 2

G

D

S

Q72N7002H_SOT23-3

@

G

D

S

Q72N7002H_SOT23-3

@

2

13

C131

1U_0402_6.3V

6KC

1311U

_0402_6.3V6K

1

2

R68 0_0402_5%@

R68 0_0402_5%@

1 2

R65 0_0402_5%R65 0_0402_5%1 2

C96

0.1U_0402_10V

6KC

960.1U

_0402_10V6K

1

2

G

D

S

Q32N7002H_SOT23-3 G

D

S

Q32N7002H_SOT23-3

2

13

C103

22U_0805_6.3V

6M

PX@

C103

22U_0805_6.3V

6M

PX@

1

2

C101

22U_0805_6.3V

6M

PX@

C101

22U_0805_6.3V

6M

PX@

1

2

R6680_0402_5% R6680_0402_5%1 2

R670_0805_5%

R670_0805_5%

1 2

C110

22U_0805_6.3V

6M

@

C110

22U_0805_6.3V

6M

@

1

2

U3

DMN3030LSS-13_SOP8L-8

U3

DMN3030LSS-13_SOP8L-8

365

78

2

4

1

Page 11: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(7/7) VSSCustom

11 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(7/7) VSSCustom

11 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PROCESSOR(7/7) VSSCustom

11 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

VSS

JCPU1H

Sandy Bridge_rPGA_Rev1p0ME@

VSS

JCPU1H

Sandy Bridge_rPGA_Rev1p0ME@

VSS1AT35

VSS2AT32

VSS3AT29

VSS4AT27

VSS5AT25

VSS6AT22

VSS7AT19

VSS8AT16

VSS9AT13

VSS10AT10

VSS11AT7

VSS12AT4

VSS13AT3

VSS14AR25

VSS15AR22

VSS16AR19

VSS17AR16

VSS18AR13

VSS19AR10

VSS20AR7

VSS21AR4

VSS22AR2

VSS23AP34

VSS24AP31

VSS25AP28

VSS26AP25

VSS27AP22

VSS28AP19

VSS29AP16

VSS30AP13

VSS31AP10

VSS32AP7

VSS33AP4

VSS34AP1

VSS35AN30

VSS36AN27

VSS37AN25

VSS38AN22

VSS39AN19

VSS40AN16

VSS41AN13

VSS42AN10

VSS43AN7

VSS44AN4

VSS45AM29

VSS46AM25

VSS47AM22

VSS48AM19

VSS49AM16

VSS50AM13

VSS51AM10

VSS52AM7

VSS53AM4

VSS54AM3

VSS55AM2

VSS56AM1

VSS57AL34

VSS58AL31

VSS59AL28

VSS60AL25

VSS61AL22

VSS62AL19

VSS63AL16

VSS64AL13

VSS65AL10

VSS66AL7

VSS67AL4

VSS68AL2

VSS69AK33

VSS70AK30

VSS71AK27

VSS72AK25

VSS73AK22

VSS74AK19

VSS75AK16

VSS76AK13

VSS77AK10

VSS78AK7

VSS79AK4

VSS80AJ25

VSS81 AJ22

VSS82 AJ19

VSS83 AJ16

VSS84 AJ13

VSS85 AJ10

VSS86 AJ7

VSS87 AJ4

VSS88 AJ3

VSS89 AJ2

VSS90 AJ1

VSS91 AH35

VSS92 AH34

VSS93 AH32

VSS94 AH30

VSS95 AH29

VSS96 AH28

VSS97 AH26

VSS98 AH25

VSS99 AH22

VSS100 AH19

VSS101 AH16

VSS102 AH7

VSS103 AH4

VSS104 AG9

VSS105 AG8

VSS106 AG4

VSS107 AF6

VSS108 AF5

VSS109 AF3

VSS110 AF2

VSS111 AE35

VSS112 AE34

VSS113 AE33

VSS114 AE32

VSS115 AE31

VSS116 AE30

VSS117 AE29

VSS118 AE28

VSS119 AE27

VSS120 AE26

VSS121 AE9

VSS122 AD7

VSS123 AC9

VSS124 AC8

VSS125 AC6

VSS126 AC5

VSS127 AC3

VSS128 AC2

VSS129 AB35

VSS130 AB34

VSS131 AB33

VSS132 AB32

VSS133 AB31

VSS134 AB30

VSS135 AB29

VSS136 AB28

VSS137 AB27

VSS138 AB26

VSS139 Y9

VSS140 Y8

VSS141 Y6

VSS142 Y5

VSS143 Y3

VSS144 Y2

VSS145 W35

VSS146 W34

VSS147 W33

VSS148 W32

VSS149 W31

VSS150 W30

VSS151 W29

VSS152 W28

VSS153 W27

VSS154 W26

VSS155 U9

VSS156 U8

VSS157 U6

VSS158 U5

VSS159 U3

VSS160 U2

VSS

JCPU1I

Sandy Bridge_rPGA_Rev1p0ME@

VSS

JCPU1I

Sandy Bridge_rPGA_Rev1p0ME@

VSS161T35

VSS162T34

VSS163T33

VSS164T32

VSS165T31

VSS166T30

VSS167T29

VSS168T28

VSS169T27

VSS170T26

VSS171P9

VSS172P8

VSS173P6

VSS174P5

VSS175P3

VSS176P2

VSS177N35

VSS178N34

VSS179N33

VSS180N32

VSS181N31

VSS182N30

VSS183N29

VSS184N28

VSS185N27

VSS186N26

VSS187M34

VSS188L33

VSS189L30

VSS190L27

VSS191L9

VSS192L8

VSS193L6

VSS194L5

VSS195L4

VSS196L3

VSS197L2

VSS198L1

VSS199K35

VSS200K32

VSS201K29

VSS202K26

VSS203J34

VSS204J31

VSS205H33

VSS206H30

VSS207H27

VSS208H24

VSS209H21

VSS210H18

VSS211H15

VSS212H13

VSS213H10

VSS214H9

VSS215H8

VSS216H7

VSS217H6

VSS218H5

VSS219H4

VSS220H3

VSS221H2

VSS222H1

VSS223G35

VSS224G32

VSS225G29

VSS226G26

VSS227G23

VSS228G20

VSS229G17

VSS230G11

VSS231F34

VSS232F31

VSS233F29

VSS234 F22

VSS235 F19

VSS236 E30

VSS237 E27

VSS238 E24

VSS239 E21

VSS240 E18

VSS241 E15

VSS242 E13

VSS243 E10

VSS244 E9

VSS245 E8

VSS246 E7

VSS247 E6

VSS248 E5

VSS249 E4

VSS250 E3

VSS251 E2

VSS252 E1

VSS253 D35

VSS254 D32

VSS255 D29

VSS256 D26

VSS257 D20

VSS258 D17

VSS259 C34

VSS260 C31

VSS261 C28

VSS262 C27

VSS263 C25

VSS264 C23

VSS265 C10

VSS266 C1

VSS267 B22

VSS268 B19

VSS269 B17

VSS270 B15

VSS271 B13

VSS272 B11

VSS273 B9

VSS274 B8

VSS275 B7

VSS276 B5

VSS277 B3

VSS278 B2

VSS279 A35

VSS280 A32

VSS281 A29

VSS282 A26

VSS283 A23

VSS284 A20

VSS285 A3

Page 12: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_A_D31

DDR_A_D12

DDR_CKE0_DIMMA

DDR_A_D59

DDR_A_D6

DDR_A_MA3

DDR_CS1_DIMMA#

DDR_A_D39

DDR_A_BS1

DDR_A_DQS0

DDR_A_WE#

DDR_A_MA7

DDR_A_MA0

DDR_A_DM2

DDR_A_DM1

DDR_A_DQS7

DDR_A_D0

DDR_A_D57

DDR_A_D46

DDR_A_D28

DDR_A_DM0

DDR_A_D19

DDR_A_DQS#5

DDR_A_D51

DDR_A_D4

DDR_A_DM4

DDR_A_D30

DDR_A_DQS2

DDR_A_D44

DDR_A_RAS#

DDR_A_D33

DDR_A_D58

DDR_A_DM5

DDR_A_DQS3

DDR_A_MA8

DDR_CS0_DIMMA#

DDR_A_D10

DDR_A_MA6

DDR_A_D27

DDR_A_D3

DDR3_DRAMRST#

DDR_A_MA10

DDR_A_DQS#7

DDR_A_D1

DDR_A_DQS#6

DDR_A_D40

DDR_A_MA9

DDR_A_D16

DDR_A_D29

DDR_A_DQS#4

DDR_A_D52

DDR_A_DM3

DDR_A_DQS5

DDR_A_D54

DDR_A_D49

DDR_A_BS2

DDR_A_D45

DDR_A_D9

DDR_A_DM7

DDR_A_D7

DDR_A_MA1

DDR_A_D13

DDR_A_D20

DDR_A_D60

DDR_A_BS0

DDR_A_CAS# M_ODT0

DDR_A_D37

DDR_A_MA5

DDR_A_DQS#1

DDR_A_MA14

DDR_A_D55

DDR_A_MA4

DDR_A_D21

DDR_A_D62

DDR_A_D24

DDR_A_D15

DDR_A_D23

DDR_A_D56

DDR_A_D53

DDR_A_D47

DDR_A_D18

M_ODT1

DDR_A_D43

DDR_A_D34

M_CLK_DDR1M_CLK_DDR#1

DDR_A_D48

DDR_A_DQS#2

DDR_A_D11

DDR_A_D38

M_CLK_DDR0M_CLK_DDR#0

DDR_A_DQS#3

DDR_A_D32

DDR_A_D8

DDR_A_DQS1

DDR_A_MA13

DDR_A_MA11

DDR_A_D50

DDR_A_D61

DDR_A_MA2

DDR_A_D41

DDR_A_D17

DDR_A_D36

DDR_A_D26

DDR_A_D63

DDR_A_D2

DDR_A_D5

DDR_A_D22

DDR_A_D25

DDR_A_DQS6

DDR_A_D35

DDR_A_D14

DDR_A_MA12

DDR_A_DQS#0

DDR_A_DQS4

DDR_A_DM6

DDR_A_D42

DDR_CKE1_DIMMA

+VREF_CA

+VREF_DQ_DIMMA

DDR_A_MA15

DDR_A_DM0DDR_A_DM1DDR_A_DM2DDR_A_DM3DDR_A_DM4DDR_A_DM5DDR_A_DM6DDR_A_DM7

SMB_CLK_S3SMB_DATA_S3

DDR_A_DQS#[0..7]<7>

DDR_A_D[0..63]<7>

DDR_A_DQS[0..7]<7>

DDR_A_MA[0..15]<7>

DDR_CKE0_DIMMA<7>

DDR_A_BS2<7>

M_CLK_DDR0<7>M_CLK_DDR#0<7>

DDR_A_BS0<7>

DDR_A_WE#<7>DDR_A_CAS#<7>

DDR_CS1_DIMMA#<7>

DDR_CKE1_DIMMA <7>

DDR_A_BS1 <7>DDR_A_RAS# <7>

DDR_CS0_DIMMA# <7>M_ODT0 <7>

M_CLK_DDR1 <7>M_CLK_DDR#1 <7>

M_ODT1 <7>

DDR3_DRAMRST# <7,13>

SMB_CLK_S3 <13,15,34>SMB_DATA_S3 <13,15,34>

+0.75VS

+3VS

+1.5V +1.5V+VREF_DQ_DIMMA +1.5V

+VREF_DQ_DIMMA

+1.5V

+0.75VS

+1.5V

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

DDRIII-SODIMM SLOT1Custom

12 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

DDRIII-SODIMM SLOT1Custom

12 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

DDRIII-SODIMM SLOT1Custom

12 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

DDR3 SO-DIMM A

Layout Note:Place near DIMM

����������������������������

������������������������������������

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)

6*0603 10uf (PER CONNECTOR)

VDDQ(1.5V) =

3*0805 10uf

VTT(0.75V) =

4*0402 1uf

1*0402 0.1uf

VREF =

1*0402 2.2uf

VDDSPD (3.3V)=

1*0402 0.1uf 1*0402 2.2uf

Layout Note:Place near DIMM

Layout Note:Place near DIMM

(10uF_0603_6.3V)*8

(0.1uF_402_10V)*4

(220uF_6.3V_4.2L_ESR17m)*1=(SF000002Y00)OSCAN

7/28 Update connect GND directly

C136

2.2U_0603_6.3V

4ZC

1362.2U

_0603_6.3V4Z

1

2

C139

10U_0603_6.3V

6M

C139

10U_0603_6.3V

6M

1

2

C134

2.2U_0603_6.3V

4ZC

1342.2U

_0603_6.3V4Z

1

2

C155

2.2U_0603_6.3V

4ZC

1552.2U

_0603_6.3V4Z

1

2

C143

10U_0603_6.3V

6M

C143

10U_0603_6.3V

6M

1

2

C141

10U_0603_6.3V

6M

C141

10U_0603_6.3V

6M

1

2

R731K_0402_1%

R731K_0402_1%

12

C137

10U_0603_6.3V

6M@

C137

10U_0603_6.3V

6M@

1

2

C138

10U_0603_6.3V

6M

@

C138

10U_0603_6.3V

6M

@

1

2

C156

0.1U_0402_10V

6KC

1560.1U

_0402_10V6K

1

2

C142

10U_0603_6.3V

6M

C142

10U_0603_6.3V

6M

1

2

C145

0.1U_0402_10V

6KC

1450.1U

_0402_10V6K

1

2

R8110K_0402_5%

R8110K_0402_5%

1 2

C146

0.1U_0402_10V

6KC

1460.1U

_0402_10V6K

1

2

C144

10U_0603_6.3V

6M

C144

10U_0603_6.3V

6M

1

2

C133

0.1U_0402_10V

6KC

1330.1U

_0402_10V6K

1

2

JDIMM1

FOX_AS0A626-U4SN-7FME@

JDIMM1

FOX_AS0A626-U4SN-7FME@

VREF_DQ1 VSS1 2

VSS23 DQ4 4

DQ05 DQ5 6

DQ17 VSS3 8

VSS49 DQS#0 10

DM011 DQS0 12

VSS513 VSS6 14

DQ215 DQ6 16

DQ317 DQ7 18

VSS719 VSS8 20

DQ821 DQ12 22

DQ923 DQ13 24

VSS925 VSS10 26

DQS#127 DM1 28

DQS129 RESET# 30

VSS1131 VSS12 32

DQ1033 DQ14 34

DQ1135 DQ15 36

VSS1337 VSS14 38

DQ1639 DQ20 40

DQ1741 DQ21 42

VSS1543 VSS16 44

DQS#245 DM2 46

DQS247 VSS17 48

VSS1849 DQ22 50

DQ1851 DQ23 52

DQ1953 VSS19 54

VSS2055 DQ28 56

DQ2457 DQ29 58

DQ2559 VSS21 60

VSS2261 DQS#3 62

DM363 DQS3 64

VSS2365 VSS24 66

DQ2667 DQ30 68

DQ2769 DQ31 70

VSS2571 VSS26 72

A12/BC#83 A11 84

A985 A7 86

VDD587 VDD6 88

A889 A6 90

CKE073 CKE1 74

VDD175 VDD2 76

NC177 A15 78

BA279 A14 80

VDD381 VDD4 82

A591 A4 92

VDD793 VDD8 94

A395 A2 96

A197 A0 98

VDD999 VDD10 100

CK0101 CK1 102

CK0#103 CK1# 104

VDD11105 VDD12 106

A10/AP107 BA1 108

BA0109 RAS# 110

VDD13111 VDD14 112

WE#113 S0# 114

CAS#115 ODT0 116

VDD15117 VDD16 118

A13119 ODT1 120

S1#121 NC2 122

VDD17123 VDD18 124

NCTEST125 VREF_CA 126

VSS27127 VSS28 128

DQ32129 DQ36 130

DQ33131 DQ37 132

VSS29133 VSS30 134

DQS#4135 DM4 136

DQS4137 VSS31 138

VSS32139 DQ38 140

DQ34141 DQ39 142

DQ35143 VSS33 144

VSS34145 DQ44 146

DQ40147 DQ45 148

DQ41149 VSS35 150

VSS36151 DQS#5 152

DM5153 DQS5 154

VSS37155 VSS38 156

DQ42157 DQ46 158

DQ43159 DQ47 160

VSS39161 VSS40 162

DQ48163 DQ52 164

DQ49165 DQ53 166

VSS41167 VSS42 168

DQS#6169 DM6 170

DQS6171 VSS43 172

VSS44173 DQ54 174

DQ50175 DQ55 176

DQ51177 VSS45 178

VSS46179 DQ60 180

DQ56181 DQ61 182

DQ57183 VSS47 184

VSS48185 DQS#7 186

DM7187 DQS7 188

VSS49189 VSS50 190

DQ58191 DQ62 192

DQ59193 DQ63 194

VSS51195 VSS52 196

SA0197 EVENT# 198

VDDSPD199 SDA 200

SA1201 SCL 202

VTT1203 VTT2 204

G1205 G2 206

C148

0.1U_0402_10V

6KC

1480.1U

_0402_10V6K

1

2

C140

10U_0603_6.3V

6M

C140

10U_0603_6.3V

6M

1

2

C147

0.1U_0402_10V

6KC

1470.1U

_0402_10V6K

1

2

C135

0.1U_0402_10V

6KC

1350.1U

_0402_10V6K

1

2

R83

10K_0402_5%

R83

10K_0402_5%

12

C151

1U_0402_6.3V

6K

C151

1U_0402_6.3V

6K

1

2

R721K_0402_1%

R721K_0402_1%

12

C150

1U_0402_6.3V

6K

@

C150

1U_0402_6.3V

6K

@

1

2

C152

1U_0402_6.3V

6K

C152

1U_0402_6.3V

6K

1

2

R711K_0402_1%

R711K_0402_1%

12

R701K_0402_1%

R701K_0402_1%

12

C153

1U_0402_6.3V

6K

@

C153

1U_0402_6.3V

6K

@

1

2

+ C149220U_6.3V_M

@

+ C149220U_6.3V_M

@

1

2

Page 13: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_B_D36

DDR_B_D63

DDR_B_MA15

DDR_B_DM6

DDR_B_D39

DDR_B_BS1

DDR_B_MA7

DDR_B_MA0

DDR_B_DQS7

DDR_B_D46

DDR_B_DQS#5

DDR_B_DM4

DDR_B_D44

DDR_B_RAS#

DDR_CS2_DIMMB#

DDR_B_MA6

DDR_B_DQS#7

DDR_B_D52

DDR_B_DQS5

DDR_B_D54

DDR_B_D45

DDR_B_D60

M_ODT2

DDR_B_D37

DDR_B_MA14

DDR_B_D55

DDR_B_MA4

DDR_B_D62

DDR_B_D53

DDR_B_D47

M_ODT3

M_CLK_DDR3M_CLK_DDR#3

DDR_B_D38

DDR_B_MA11

DDR_B_D61

DDR_B_MA2

SMB_CLK_S3SMB_DATA_S3

DDR_B_DQS6

DDR_B_D35

DDR_B_MA12

DDR_B_DQS4

DDR_B_D42

DDR_CKE2_DIMMB

DDR_B_D59

DDR_B_MA3

DDR_CS3_DIMMB#

DDR_B_WE#

DDR_B_D57

DDR_B_D51

DDR_B_D33

DDR_B_D58

DDR_B_DM5

DDR_B_MA8

DDR_B_MA10

DDR_B_DQS#6

DDR_B_D40

DDR_B_MA9

DDR_B_DQS#4

DDR_B_D49

DDR_B_BS2

DDR_B_DM7

DDR_B_MA1

DDR_B_BS0

DDR_B_CAS#

DDR_B_MA5

DDR_B_D56

DDR_B_D43

DDR_B_D34

DDR_B_D48

M_CLK_DDR2M_CLK_DDR#2

DDR_B_D32

DDR_B_MA13

DDR_B_D50

DDR_B_D41

DDR_B_DM6DDR_B_DM7

DDR_B_DM0DDR_B_DM1DDR_B_DM2DDR_B_DM3DDR_B_DM4DDR_B_DM5

+VREF_CB

DDR_B_D5

DDR_B_D22

DDR_B_D14

DDR_B_DQS#0

DDR_B_D31

DDR_B_D12

DDR_B_D6

DDR_B_DQS0

DDR_B_DM2

DDR_B_DM1

DDR_B_D28

DDR_B_D4

DDR_B_D30

DDR_B_DQS3

DDR3_DRAMRST#

DDR_B_D29

DDR_B_D7

DDR_B_D13

DDR_B_D20DDR_B_D21

DDR_B_D15

DDR_B_D23

DDR_B_DQS#3

DDR_CKE3_DIMMB

DDR_B_D26

DDR_B_D2

DDR_B_D25

+VREF_DQ_DIMMB

DDR_B_D0

DDR_B_DM0

DDR_B_D19

DDR_B_DQS2

DDR_B_D10

DDR_B_D27

DDR_B_D3

DDR_B_D1

DDR_B_D16

DDR_B_DM3

DDR_B_D9

DDR_B_DQS#1

DDR_B_D24

DDR_B_D18

DDR_B_DQS#2

DDR_B_D11

DDR_B_D8

DDR_B_DQS1

DDR_B_D17

DDR3_DRAMRST# <7,12>

DDR_B_DQS#[0..7]<7>

DDR_B_D[0..63]<7>

DDR_B_DQS[0..7]<7>

DDR_B_MA[0..15]<7>

DDR_CKE3_DIMMB <7>

M_CLK_DDR3 <7>M_CLK_DDR#3 <7>

DDR_B_BS1 <7>DDR_B_RAS# <7>

DDR_CS2_DIMMB# <7>M_ODT2 <7>

M_ODT3 <7>

SMB_DATA_S3 <12,15,34>SMB_CLK_S3 <12,15,34>

DDR_B_BS2<7>

DDR_CKE2_DIMMB<7>

M_CLK_DDR2<7>M_CLK_DDR#2<7>

DDR_B_BS0<7>

DDR_B_WE#<7>DDR_B_CAS#<7>

DDR_CS3_DIMMB#<7>

+0.75VS+3VS

+1.5V

+VREF_DQ_DIMMB

+1.5V

+0.75VS

+1.5V

+VREF_DQ_DIMMB

+1.5V

+1.5V

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

DDRIII-SODIMM SLOT2

13 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

DDRIII-SODIMM SLOT2

13 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

DDRIII-SODIMM SLOT2

13 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Layout Note:Place near DIMM

����������������������������

������������������������������������

1*0402 0.1uf 1*0402 2.2uf

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)

6*0603 10uf (PER CONNECTOR)

3*0805 10uf

VTT(0.75V) =

4*0402 1uf

1*0402 0.1uf

VDDQ(1.5V) =

1*0402 2.2uf

VDDSPD (3.3V)=

For Arranale only +VREF_DQ_DIMMBsupply from a external 1.5V voltage divide circuit. 07/17/2009

Layout Note:Place near DIMM

Layout Note:Place near DIMM

(10uF_0603_6.3V)*8

(0.1uF_402_10V)*4

7/28 Update connect GND directly

C165

10U_0603_6.3V

6M

C165

10U_0603_6.3V

6M

1

2

R861K_0402_1%

R861K_0402_1%

12

R9510K_0402_5%

R9510K_0402_5%

1 2

C170

0.1U_0402_10V

6KC

1700.1U

_0402_10V6K

1

2

C158

2.2U_0603_6.3V

4Z

C158

2.2U_0603_6.3V

4Z

1

2

C161

10U_0603_6.3V

6M

@

C161

10U_0603_6.3V

6M

@

1

2

C162

10U_0603_6.3V

6M

@

C162

10U_0603_6.3V

6M

@

1

2

C168

10U_0603_6.3V

6M

C168

10U_0603_6.3V

6M

1

2

R841K_0402_1%

R841K_0402_1%

12

C163

10U_0603_6.3V

6M

C163

10U_0603_6.3V

6M1

2

C166

10U_0603_6.3V

6M

C166

10U_0603_6.3V

6M

1

2

R871K_0402_1%

R871K_0402_1%

12

JDIMM2

FOX_AS0A626-U8SN-7FME@

JDIMM2

FOX_AS0A626-U8SN-7FME@

VREF_DQ1 VSS1 2

VSS23 DQ4 4

DQ05 DQ5 6

DQ17 VSS3 8

VSS49 DQS#0 10

DM011 DQS0 12

VSS513 VSS6 14

DQ215 DQ6 16

DQ317 DQ7 18

VSS719 VSS8 20

DQ821 DQ12 22

DQ923 DQ13 24

VSS925 VSS10 26

DQS#127 DM1 28

DQS129 RESET# 30

VSS1131 VSS12 32

DQ1033 DQ14 34

DQ1135 DQ15 36

VSS1337 VSS14 38

DQ1639 DQ20 40

DQ1741 DQ21 42

VSS1543 VSS16 44

DQS#245 DM2 46

DQS247 VSS17 48

VSS1849 DQ22 50

DQ1851 DQ23 52

DQ1953 VSS19 54

VSS2055 DQ28 56

DQ2457 DQ29 58

DQ2559 VSS21 60

VSS2261 DQS#3 62

DM363 DQS3 64

VSS2365 VSS24 66

DQ2667 DQ30 68

DQ2769 DQ31 70

VSS2571 VSS26 72

A12/BC#83 A11 84

A985 A7 86

VDD587 VDD6 88

A889 A6 90

CKE073 CKE1 74

VDD175 VDD2 76

NC177 A15 78

BA279 A14 80

VDD381 VDD4 82

A591 A4 92

VDD793 VDD8 94

A395 A2 96

A197 A0 98

VDD999 VDD10 100

CK0101 CK1 102

CK0#103 CK1# 104

VDD11105 VDD12 106

A10/AP107 BA1 108

BA0109 RAS# 110

VDD13111 VDD14 112

WE#113 S0# 114

CAS#115 ODT0 116

VDD15117 VDD16 118

A13119 ODT1 120

S1#121 NC2 122

VDD17123 VDD18 124

NCTEST125 VREF_CA 126

VSS27127 VSS28 128

DQ32129 DQ36 130

DQ33131 DQ37 132

VSS29133 VSS30 134

DQS#4135 DM4 136

DQS4137 VSS31 138

VSS32139 DQ38 140

DQ34141 DQ39 142

DQ35143 VSS33 144

VSS34145 DQ44 146

DQ40147 DQ45 148

DQ41149 VSS35 150

VSS36151 DQS#5 152

DM5153 DQS5 154

VSS37155 VSS38 156

DQ42157 DQ46 158

DQ43159 DQ47 160

VSS39161 VSS40 162

DQ48163 DQ52 164

DQ49165 DQ53 166

VSS41167 VSS42 168

DQS#6169 DM6 170

DQS6171 VSS43 172

VSS44173 DQ54 174

DQ50175 DQ55 176

DQ51177 VSS45 178

VSS46179 DQ60 180

DQ56181 DQ61 182

DQ57183 VSS47 184

VSS48185 DQS#7 186

DM7187 DQS7 188

VSS49189 VSS50 190

DQ58191 DQ62 192

DQ59193 DQ63 194

VSS51195 VSS52 196

SA0197 EVENT# 198

VDDSPD199 SDA 200

SA1201 SCL 202

VTT1203 VTT2 204

G1205 G2 206

C173

1U_0402_6.3V

6K

C173

1U_0402_6.3V

6K

1

2

C174

1U_0402_6.3V

6K

@

C174

1U_0402_6.3V

6K

@

1

2

R97 10K_0402_5%R97 10K_0402_5%1 2

C175

1U_0402_6.3V

6K

C175

1U_0402_6.3V

6K

1

2

C169

0.1U_0402_10V

6KC

1690.1U

_0402_10V6K

1

2

C176

1U_0402_6.3V

6K

@

C176

1U_0402_6.3V

6K

@

1

2

C167

10U_0603_6.3V

6M

C167

10U_0603_6.3V

6M

1

2

C159

0.1U_0402_10V

6KC

1590.1U

_0402_10V6K

1

2

C172

0.1U_0402_10V

6KC

1720.1U

_0402_10V6K

1

2

C178

0.1U_0402_10V

6KC

1780.1U

_0402_10V6K

1

2

C160

2.2U_0603_6.3V

4ZC

1602.2U

_0603_6.3V4Z

1

2

C177

2.2U_0603_6.3V

4ZC

1772.2U

_0603_6.3V4Z

1

2

R851K_0402_1%

R851K_0402_1%

12

C157

0.1U_0402_10V

6K

C157

0.1U_0402_10V

6K

1

2

C171

0.1U_0402_10V

6KC

1710.1U

_0402_10V6K

1

2

C164

10U_0603_6.3V

6M

C164

10U_0603_6.3V

6M

1

2

Page 14: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCH_RTCX1

PCH_RTCX2

PCH_RTCX1

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

SM_INTRUDER#

HDA_SPKR

SPI_CLK_PCH_R

SPI_SI

SPI_SO_R

SPI_SB_CS0#

PCH_JTAG_TCK

HDD_LED#

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

HDA_SYNC

HDA_RST#

HDA_SDIN0

HDA_SDOUT

PCH_GPIO21

PCH_RTCX2

HDA_BIT_CLK

PCH_JTAG_TDO PCH_JTAG_TDIPCH_JTAG_TMS

LPC_AD2

LPC_FRAME#

LPC_AD0

LPC_AD3

LPC_AD1

SERIRQ

SATA_COMP

RBIAS_SATA3

SATA3_COMPHDA_BIT_CLK

HDA_RST#

HDA_SDOUT

PCH_INTVRMEN

HDA_SPKR

HDA_SDOUT

HDA_SYNC

SPI_WP#

SPI_HOLD#

SPI_WP#SPI_HOLD#SPI_SO_R SPI_SO_L

SPI_SI_RSPI_CLK_PCH

SPI_CLK_PCH

SPI_CLK_PCH_R

SPI_SB_CS0#

PCH_GPIO33

SATA_ITX_DRX_P0SATA_ITX_DRX_N0

SATA_DTX_C_IRX_N0SATA_DTX_C_IRX_P0

SATA_ITX_C_DRX_N0SATA_ITX_C_DRX_P0

SPI_SI

SERIRQ

SATA_ITX_DRX_N2_CONN

SATA_DTX_C_IRX_N2

SATA_ITX_DRX_P2_CONN

SATA_DTX_C_IRX_P2SATA_ITX_C_DRX_N2SATA_ITX_C_DRX_P2

ME_FLASH

HDA_SYNC

Kill_SW#

PCH_GPIO19

SATA_ITX_DRX_P4SATA_ITX_DRX_N4

SATA_DTX_C_IRX_N4SATA_DTX_C_IRX_P4

SATA_ITX_C_DRX_N4SATA_ITX_C_DRX_P4

HDA_SYNC_R

HDA_SPKR<39>

HDA_SDIN0<39>

SERIRQ <40>

LPC_AD0 <34,40>LPC_AD1 <34,40>LPC_AD2 <34,40>LPC_AD3 <34,40>

LPC_FRAME# <34,40>

HDA_SYNC_AUDIO<39>

HDA_SDOUT_AUDIO<39>

HDA_RST_AUDIO#<39>

HDA_BITCLK_AUDIO<39>

HDD_LED# <56,57>

SATA_DTX_C_IRX_N0 <38>SATA_DTX_C_IRX_P0 <38>SATA_ITX_DRX_N0 <38>SATA_ITX_DRX_P0 <38>

SATA_DTX_C_IRX_P2 <56,57>SATA_ITX_DRX_N2_CONN <56,57>

SATA_DTX_C_IRX_N2 <56,57>

SATA_ITX_DRX_P2_CONN <56,57>

ME_FLASH<40>

Kill_SW#<56,57>

PCH_RTCX1_OUT <40>

PCH_RTCX2_OUT <40>

SATA_ITX_DRX_N4 <42>SATA_ITX_DRX_P4 <42>

SATA_DTX_C_IRX_N4 <42>SATA_DTX_C_IRX_P4 <42>

+RTCVCC+RTCVCC

+3VALW +3VALW+3VALW

+1.05VS_VCC_SATA

+1.05VS_SATA3

+3VS

+3VALW

+3VALW

+3VS

+3VS

+RTCBATT+RTCVCC

+3VS

+3VS

+3VS

+3VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (1/8) SATA,HDA,SPI, LPC, XDPCustom

14 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (1/8) SATA,HDA,SPI, LPC, XDPCustom

14 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (1/8) SATA,HDA,SPI, LPC, XDPCustom

14 59Friday, November 26, 2010

2010/07/12 2012/07/11

CMOS

HDD

Compal Electronics, Inc.

H����Integrated VRM enableL����Integrated VRM disable

INTVRMEN

*

LOW= Disable (Default)HIGH= Enable ( No Reboot )

*

* Low = Disabled (Default)High = Enabled [Flash Descriptor Security Overide]

This signal has a weak internal pull-down

On Die PLL VR Select is supplied by 1.5V when smapled high 1.8V when sampled lowNeeds to be pulled High for Huron River platfrom

*

(INTVRMEN should always be pull high.)

4MB SPI ROM FOR ME& Non-share ROM.

W=20milsW=20mils

DPDG1.1

EC and Mini card debug port

ODD

9/27 reserve R878 for DG1.5

6/24 Update R663,R670 must be close Y1

6/30 update R121, R122, R123

ESATA

7/28 change from port 5 to port 4

8/16 reserved for MOW

R1320_0402_5% R1320_0402_5%1 2

R3250_0402_5%

@R3250_0402_5%

@

1 2

R1293.3K_0402_5%

R1293.3K_0402_5%

1 2

R11833_0402_5%

R11833_0402_5%1 2

R670 0_0402_5%@ R670 0_0402_5%@1 2

R101 1M_0402_5%R101 1M_0402_5%1 2

R117 10K_0402_5%R117 10K_0402_5%12

R123200_0402_5%

R123200_0402_5%

12

R1300_0402_5%

R1300_0402_5%1 2

R119 10K_0402_5%R119 10K_0402_5%12

R104 10K_0402_5%R104 10K_0402_5%12

R126100_0402_1%R126100_0402_1%

12

C1860.01U_0402_16V7K C1860.01U_0402_16V7K 12

R11051_0402_5%

R11051_0402_5%

12

R107 1K_0402_1%@R107 1K_0402_1%@1 2

C18015P_0402_50V8J

C18015P_0402_50V8J

1

2

R109

0_0402_5%

R109

0_0402_5%1 2

C1870.01U_0402_16V7K C1870.01U_0402_16V7K 12

R105 1K_0402_5%@R105 1K_0402_5%@1 2C1840.01U_0402_16V7K C1840.01U_0402_16V7K 12

R8781M_0402_5%

R8781M_0402_5%

12

C1831U_0603_10V4Z

C1831U_0603_10V4Z

1

2

C1890.01U_0402_16V7KESATA@

C1890.01U_0402_16V7KESATA@

12

CLRP1SHORT PADS

CLRP1SHORT PADS

12

R102 330K_0402_5%R102 330K_0402_5%1 2

R11433_0402_5%

R11433_0402_5%1 2

R103 20K_0402_5%R103 20K_0402_5%1 2

CLR

P3

SH

OR

T P

AD

SC

LRP

3S

HO

RT

PA

DS

12

CLR

P2

SH

OR

T P

AD

SC

LRP

2S

HO

RT

PA

DS

12

R11137.4_0402_1%

R11137.4_0402_1%1 2

R11633_0402_5%

R11633_0402_5%1 2

C1880.01U_0402_16V7KESATA@

C1880.01U_0402_16V7KESATA@

12

R12433_0402_5%

@

R12433_0402_5%

@

12

RTC

IHDA

SATA

LPC

SPI

JTAG

SATA 6G

U4A

COUGARPOINT_FCBGA989

RTC

IHDA

SATA

LPC

SPI

JTAG

SATA 6G

U4A

COUGARPOINT_FCBGA989

RTCX1A20

RTCX2C20

INTVRMENC17

INTRUDER#K22

HDA_BCLKN34

HDA_SYNCL34

HDA_RST#K34

HDA_SDIN0E34

HDA_SDIN1G34

HDA_SDIN2C34

HDA_SDOA36

SATALED# P3

FWH0 / LAD0 C38

FWH1 / LAD1 A38

FWH2 / LAD2 B37

FWH3 / LAD3 C37

LDRQ1# / GPIO23 K36

FWH4 / LFRAME# D36

LDRQ0# E36

RTCRST#D20

HDA_SDIN3A34

HDA_DOCK_EN# / GPIO33C36

HDA_DOCK_RST# / GPIO13N32

SRTCRST#G22

SATA0RXN AM3

SATA0RXP AM1

SATA0TXN AP7

SATA0TXP AP5

SATA1RXN AM10

SATA1RXP AM8

SATA1TXN AP11

SATA1TXP AP10

SATA2RXN AD7

SATA2RXP AD5

SATA2TXN AH5

SATA2TXP AH4

SATA3RXN AB8

SATA3RXP AB10

SATA3TXN AF3

SATA3TXP AF1

SATA4RXN Y7

SATA4RXP Y5

SATA4TXN AD3

SATA4TXP AD1

SATA5RXN Y3

SATA5RXP Y1

SATA5TXN AB3

SATA5TXP AB1

SATAICOMPI Y10

SPI_CLKT3

SPI_CS0#Y14

SPI_CS1#T1

SPI_MOSIV4

SPI_MISOU3

SATA0GP / GPIO21 V14

SATA1GP / GPIO19 P1

JTAG_TCKJ3

JTAG_TMSH7

JTAG_TDIK5

JTAG_TDOH1

SERIRQ V5

SPKRT10

SATAICOMPO Y11

SATA3COMPI AB13

SATA3RCOMPO AB12

SATA3RBIAS AH1

R100 20K_0402_5%R100 20K_0402_5%1 2

R122200_0402_5%

R122200_0402_5%

12

C1850.01U_0402_16V7K C1850.01U_0402_16V7K 12

R663 0_0402_5%@ R663 0_0402_5%@1 2

R121200_0402_5%@

R121200_0402_5%@

12

C1821U_0603_10V4Z

C1821U_0603_10V4Z

1

2

Y1

32.7

68K

HZ

_12.

5PF

_9H

0320

0413

Y1

32.7

68K

HZ

_12.

5PF

_9H

0320

0413

OS

C4

OS

C1

NC

3

NC

2

R125100_0402_1%@

R125100_0402_1%@

12

R108 1K_0402_5% R108 1K_0402_5% 12

R115 750_0402_1%R115 750_0402_1%1 2

R187 10K_0402_5%

@

R187 10K_0402_5%

@

12

U5

S IC FL 32M W25Q32BVSSIG SOIC 8P

U5

S IC FL 32M W25Q32BVSSIG SOIC 8P

CS#1

SO2

WP#3

GND4

VCC 8

HOLD# 7

SCLK 6

SI 5

C1791U_0603_10V4ZC1791U_0603_10V4Z

1

2

R98 10M_0402_5%R98 10M_0402_5%1 2

G

DS

Q10BSS138_NL_SOT23-3

G

DS

Q10BSS138_NL_SOT23-3

2

13

R1273.3K_0402_5%

R1273.3K_0402_5%

1 2

C181

15P_0402_50V8J

C181

15P_0402_50V8J

1

2

C191

0.1U_0402_16V4Z

C191

0.1U_0402_16V4Z

1 2

R13133_0402_5%

R13133_0402_5%

1 2

R106 1K_0402_5%@R106 1K_0402_5%@ 12

R13333_0402_5%

R13333_0402_5%

1 2

R128100_0402_1%

R128100_0402_1%

12

R991K_0402_5%

R991K_0402_5%1 2

C19022P_0402_50V8J

@

C19022P_0402_50V8J

@

R11233_0402_5%

R11233_0402_5%1 2

R11349.9_0402_1%

R11349.9_0402_1%1 2

Page 15: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

XTAL25_INXTAL25_OUT

PCH_SML1DATA

XCLK_RCOMP

CLK_PCI_LPBACK

CLK_CPU_DMI#

PCIE_PTX_DRX_N2

PCIE_PTX_DRX_P1

PCIE_PRX_DTX_P2PCIE_PRX_DTX_N2

PCIE_PTX_DRX_P2

PCIE_PTX_DRX_N1PCIE_PRX_DTX_P1PCIE_PRX_DTX_N1

CLK_BUF_ICH_14M

CLK_PCI_LPBACK

CLK_BUF_DREF_96MCLK_BUF_DREF_96M#

CLK_BUF_CPU_DMICLK_BUF_CPU_DMI#

CLK_BUF_PCIE_SATACLK_BUF_PCIE_SATA#

PCH_GPIO26

PCH_GPIO44

XTAL25_OUT

XTAL25_IN

EC_SMB_CK2

EC_SMB_DA2

CLKIN_DMI2#CLKIN_DMI2

PCH_GPIO56

PCH_GPIO73

PCH_GPIO74

EC_LID_OUT#

CLK_PCIE_VGA#_R CLK_PCIE_VGA#CLK_PCIE_VGACLK_PCIE_VGA_R

PEG_CLKREQ#_R

CLK_CPU_DMI

CLK_PCI_DB_R

CLK_BUF_ICH_14M

PCH_SMBCLK

PCH_SMBDATA

DRAMRST_CNTRL_PCH

PCH_SML1CLK

PCH_GPIO45

PCH_GPIO46

SMB_CLK_S3

SMB_DATA_S3

CLK_CPU_DMICLK_CPU_DMI#

PCH_GPIO25

CLK_PCIE_LAN_RCLK_PCIE_LAN#_R

WLAN_CLKREQ1#_R

CLK_PCIE_WLAN1_RCLK_PCIE_WLAN1#_R

PE_GPIO1

PE_GPIO0

PCIE_CLK_8NPCIE_CLK_8P

PCH_SML0DATA

PCH_SML0CLK

PCH_SML0CLK

PCH_SML0DATA

CLK_CPU_DMI# <6>CLK_CPU_DMI <6>

PCIE_PRX_DTX_N1<35>

PCIE_PTX_C_DRX_N1<35>PCIE_PRX_DTX_P1<35>

PCIE_PTX_C_DRX_P1<35>

PCIE_PRX_DTX_N2<34>PCIE_PRX_DTX_P2<34>

PCIE_PTX_C_DRX_N2<34>PCIE_PTX_C_DRX_P2<34>

CLK_PCI_LPBACK <18>

DRAMRST_CNTRL_PCH <7>

EC_SMB_CK2 <24,37,40>

EC_SMB_DA2 <24,37,40>

EC_LID_OUT# <40>

PEG_CLKREQ# <24>

CLK_PCIE_VGA# <23>CLK_PCIE_VGA <23>

CLK_PCI_DB <34>

SMB_DATA_S3 <12,13,34>

SMB_CLK_S3 <12,13,34>

CLK_PCIE_LAN<35>CLK_PCIE_LAN#<35>

CLKREQ_LAN#<35>

CLK_PCIE_WLAN1<34>CLK_PCIE_WLAN1#<34>

WLAN_CLKREQ1#<34>

PE_GPIO1<18,25,26,52>

PE_GPIO0<18>

+1.05VS_VCCDIFFCLKN

+3VALW

+3VALW

+3VALW

+3VALW

+3VALW

+3VALW

+3VALW +3VS

+3VS

+3VALW

+3VALW

+3VALW

+3VALW

+3VALW

+3VALW

+3VS

+3VS

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (2/8) PCIE, SMBUS, CLKCustom

15 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (2/8) PCIE, SMBUS, CLKCustom

15 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (2/8) PCIE, SMBUS, CLKCustom

15 59Friday, November 26, 2010

2010/07/12 2012/07/11

WLAN

LAN

Compal Electronics, Inc.

Reserve for EMI please close to PCH

Reserve for EMI please close to PCH

Desktop Only

DIMM1DIMM2MINI CARD

ECthermal sensor

VGA

LAN

WLAN

6/23 for GPU

6/30 Update to @

7/5 change to 1K

7/28 reserved

7/28 reserved

8/14 change P/N to2N7002KDW(SB00000EO10)

R700 0_0402_5%@

R700 0_0402_5%@1 2

R169 1M_0402_5%R169 1M_0402_5%1 2

Y2

25MHZ_20PF_7A25000012

Y2

25MHZ_20PF_7A25000012

12

Q61B2N7002DW-T/R7_SOT363-6Q61B2N7002DW-T/R7_SOT363-6

3

5

4

R701 0_0402_5%@

R701 0_0402_5%@

1 2

C19922P_0402_50V8J

@C19922P_0402_50V8J

@

1 2

R149 0_0402_5%R149 0_0402_5%1 2

PCI-E*

CLOCKS

FLEX CLOCKS

SMBUS

Controller

Link

U4B

COUGARPOINT_FCBGA989

PCI-E*

CLOCKS

FLEX CLOCKS

SMBUS

Controller

Link

U4B

COUGARPOINT_FCBGA989

PERN1BG34

PERP1BJ34

PERN2BE34

PERP2BF34

PERN3BG36

PERP3BJ36

PERN4BF36

PERP4BE36

PERN5BG37

PERP5BH37

PERN6BJ38

PERP6BG38

PERN7BG40

PERP7BJ40

PERN8BE38

PERP8BC38

PETN1AV32

PETP1AU32

PETN2BB32

PETP2AY32

PETN3AV34

PETP3AU34

PETN4AY34

PETP4BB34

PETN5AY36

PETP5BB36

PETN6AU36

PETP6AV36

PETN7AY40

PETP7BB40

PETN8AW38

PETP8AY38

CLKOUT_PCIE0NY40

CLKOUT_PCIE0PY39

CLKOUT_PCIE1NAB49

CLKOUT_PCIE1PAB47

CLKOUT_PCIE2NAA48

CLKOUT_PCIE2PAA47

CLKOUT_PCIE3NY37

CLKOUT_PCIE3PY36

CLKOUT_PCIE4NY43

CLKOUT_PCIE4PY45

CLKOUT_PCIE5NV45

CLKOUT_PCIE5PV46

CLKIN_DMI2_N BJ30

CLKIN_DMI2_P BG30

CLKIN_DMI_N BF18

CLKIN_DMI_P BE18

CLKIN_DOT_96N G24

CLKIN_DOT_96P E24

CLKIN_SATA_N / CKSSCD_N AK7

CLKIN_SATA_P / CKSSCD_P AK5

XTAL25_IN V47

XTAL25_OUT V49

REFCLK14IN K45

CLKIN_PCILOOPBACK H45

CLKOUT_PEG_A_N AB37

CLKOUT_PEG_A_P AB38

PEG_A_CLKRQ# / GPIO47 M10

PCIECLKRQ0# / GPIO73J2

PCIECLKRQ1# / GPIO18M1

PCIECLKRQ2# / GPIO20V10

PCIECLKRQ3# / GPIO25A8

PCIECLKRQ4# / GPIO26L12

PCIECLKRQ5# / GPIO44L14

CLKOUTFLEX0 / GPIO64 K43

CLKOUTFLEX1 / GPIO65 F47

CLKOUTFLEX2 / GPIO66 H47

CLKOUTFLEX3 / GPIO67 K49

CLKOUT_DMI_N AV22

CLKOUT_DMI_P AU22

PEG_B_CLKRQ# / GPIO56E6

CLKOUT_PEG_B_PAB40CLKOUT_PEG_B_NAB42

XCLK_RCOMP Y47

CLKOUT_DP_P / CLKOUT_BCLK1_P AM13CLKOUT_DP_N / CLKOUT_BCLK1_N AM12

CLKOUT_PCIE6NV40

CLKOUT_PCIE6PV42

PCIECLKRQ7# / GPIO46K12

CLKOUT_PCIE7NV38

CLKOUT_PCIE7PV37

CLKOUT_BCLK0_N / CLKOUT_PCIE8NAK14

CLKOUT_BCLK0_P / CLKOUT_PCIE8PAK13

SMBALERT# / GPIO11 E12

SMBCLK H14

SMBDATA C9

SML0ALERT# / GPIO60 A12

SML0CLK C8

SML0DATA G12

SML1ALERT# / PCHHOT# / GPIO74 C13

SML1CLK / GPIO58 E14

SML1DATA / GPIO75 M16

CL_CLK1 M7

CL_DATA1 T11

CL_RST1# P10

PCIECLKRQ6# / GPIO45T13

R168 10K_0402_5%R168 10K_0402_5%12

R17190.9_0402_1%

R17190.9_0402_1%1 2

R165 10K_0402_5%R165 10K_0402_5%12

R150 0_0402_5%R150 0_0402_5%1 2

C192 0.1U_0402_10V7KC192 0.1U_0402_10V7K1 2

R162 10K_0402_5%R162 10K_0402_5%1 2

R1382.2K_0402_5%

R1382.2K_0402_5%

1 2

R1362.2K_0402_5%

R1362.2K_0402_5%1 2

R157 10K_0402_5%R157 10K_0402_5%1 2

R5442.2K_0402_5%

R5442.2K_0402_5%

12

R167 10K_0402_5%R167 10K_0402_5%1 2

R1412.2K_0402_5%

R1412.2K_0402_5%1 2

R160 10K_0402_5%R160 10K_0402_5%1 2

C19627P_0402_50V8J

C19627P_0402_50V8J

1

2

R152 10K_0402_5%R152 10K_0402_5%12R163 10K_0402_5%R163 10K_0402_5%1 2

R147 10K_0402_5%R147 10K_0402_5%12

R1372.2K_0402_5%

R1372.2K_0402_5%1 2

R155 10K_0402_5%R155 10K_0402_5%1 2

R5452.2K_0402_5%R5452.2K_0402_5%

12

C195 0.1U_0402_10V7KC195 0.1U_0402_10V7K1 2

R1422.2K_0402_5%

R1422.2K_0402_5%

1 2

R14510K_0402_5% R14510K_0402_5%1 2

R159 10K_0402_5%R159 10K_0402_5%1 2

Q60A2N7002DW-T/R7_SOT363-6Q60A2N7002DW-T/R7_SOT363-6

6 1

2

R158 10K_0402_5%R158 10K_0402_5%12R156 0_0402_5%R156 0_0402_5%1 2

R347 10K_0402_5%

@

R347 10K_0402_5%

@

1 2

R170 10K_0402_5%R170 10K_0402_5%12

C19822P_0402_50V8J

@C19822P_0402_50V8J

@

1 2

R1391K_0402_5%

R1391K_0402_5%

12

R301 10K_0402_5%R301 10K_0402_5%12

R17533_0402_5%

@R17533_0402_5%

@

12

R1352.2K_0402_5%

R1352.2K_0402_5%

1 2

C19727P_0402_50V8JC19727P_0402_50V8J

1

2

R153 0_0402_5%R153 0_0402_5%1 2

R174 10K_0402_5%R174 10K_0402_5%12

R349 10K_0402_5%@

R349 10K_0402_5%@

1 2

R520 100K_0402_5%@ R520 100K_0402_5%@ 1 2

R164 10K_0402_5%R164 10K_0402_5%1 2

R172 10K_0402_5%R172 10K_0402_5%12

R154 0_0402_5%R154 0_0402_5%1 2

R148 0_0402_5%R148 0_0402_5%1 2

Q61A2N7002DW-T/R7_SOT363-6Q61A2N7002DW-T/R7_SOT363-6

6 1

2

Q60B2N7002DW-T/R7_SOT363-6Q60B2N7002DW-T/R7_SOT363-6

3

5

4

R166 10K_0402_5%R166 10K_0402_5%1 2

R140

10K_0402_5%

R140

10K_0402_5%12

R151 0_0402_5%R151 0_0402_5%1 2

R134

10K_0402_5%

R134

10K_0402_5%12

R1440_0402_5%

@

R1440_0402_5%

@ 1 2

R17322_0402_5%

@

R17322_0402_5%

@1 2

C194 0.1U_0402_10V7KC194 0.1U_0402_10V7K1 2

R14310K_0402_5%

@

R14310K_0402_5%

@

12

R17633_0402_5%@R17633_0402_5%@

12

C193 0.1U_0402_10V7KC193 0.1U_0402_10V7K1 2

R146 0_0402_5%R146 0_0402_5%1 2

Page 16: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DMI_IRCOMP

DMI_CRX_PTX_N1

DMI_CRX_PTX_P0

DMI_CRX_PTX_P3

DMI_CTX_PRX_P0

DMI_CRX_PTX_N2

DMI_CRX_PTX_P1

DMI_CTX_PRX_P2

DMI_CTX_PRX_N2DMI_CTX_PRX_N3

DMI_CTX_PRX_P3

DMI_CRX_PTX_P2

DMI_CTX_PRX_N1

DMI_CRX_PTX_N0

DMI_CTX_PRX_N0

DMI_CTX_PRX_P1

DMI_CRX_PTX_N3

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC1

FDI_LSYNC0

FDI_CTX_PRX_N0FDI_CTX_PRX_N1FDI_CTX_PRX_N2FDI_CTX_PRX_N3FDI_CTX_PRX_N4FDI_CTX_PRX_N5FDI_CTX_PRX_N6FDI_CTX_PRX_N7

FDI_CTX_PRX_P0FDI_CTX_PRX_P1FDI_CTX_PRX_P2FDI_CTX_PRX_P3FDI_CTX_PRX_P4

FDI_CTX_PRX_P6FDI_CTX_PRX_P7

FDI_CTX_PRX_P5

PCH_GPIO72

RI#

SUSACK#

RBIAS_CPY

APWROK

PM_DRAM_PWRGD

PCH_RSMRST#_R

PBTN_OUT#_R

ACIN_R

DSWODVREN

WAKE#

PCH_RSMRST#_R

PCH_DPWROK_R

SLP_S5#

SLP_S4#

PM_SLP_SUS#

SUS_STAT#

H_PM_SYNC

SUSCLK

PCH_POK_R

SYS_RST#

SUSWARN#

PCH_RSMRST#_R

ACIN_R

SYS_PWROK

PM_DRAM_PWRGD

SYS_PWROK

SYS_PWROKVGATE

PCH_POK

SUSWARN#_R SLP_S3#

PM_CLKRUN#

PCH_POK_R APWROK

SYS_PWROKPCH_POK_R

PM_DRAM_PWRGD

DMI_CTX_PRX_N0<5>

DMI_CRX_PTX_N2<5>

DMI_CTX_PRX_N1<5>

DMI_CTX_PRX_N3<5>DMI_CTX_PRX_N2<5>

DMI_CTX_PRX_P0<5>DMI_CTX_PRX_P1<5>

DMI_CTX_PRX_P3<5>DMI_CTX_PRX_P2<5>

DMI_CRX_PTX_N3<5>

DMI_CRX_PTX_N1<5>DMI_CRX_PTX_N0<5>

DMI_CRX_PTX_P2<5>DMI_CRX_PTX_P3<5>

DMI_CRX_PTX_P1<5>DMI_CRX_PTX_P0<5>

FDI_CTX_PRX_N0 <5>FDI_CTX_PRX_N1 <5>FDI_CTX_PRX_N2 <5>FDI_CTX_PRX_N3 <5>FDI_CTX_PRX_N4 <5>FDI_CTX_PRX_N5 <5>FDI_CTX_PRX_N6 <5>FDI_CTX_PRX_N7 <5>

FDI_CTX_PRX_P0 <5>FDI_CTX_PRX_P1 <5>FDI_CTX_PRX_P2 <5>FDI_CTX_PRX_P3 <5>FDI_CTX_PRX_P4 <5>FDI_CTX_PRX_P5 <5>FDI_CTX_PRX_P6 <5>FDI_CTX_PRX_P7 <5>

FDI_FSYNC1 <5>

FDI_LSYNC0 <5>

FDI_FSYNC0 <5>

FDI_INT <5>

FDI_LSYNC1 <5>

PM_DRAM_PWRGD<6>

PBTN_OUT#<40>

PCH_DPWROK <40>

PCIE_WAKE# <34,35>

H_PM_SYNC <6>

SLP_S3# <40>

SLP_S4# <40>

SLP_S5# <40>

EC_RSMRST#<40>

SUSWARN#<40>

SUSCLK <40>PCH_APWROK<40>

ACIN<24,40,47>

VGATE<53>

PCH_POK<6,40>

SYS_PWROK_EC<40>

SYS_PWROK <6>

+1.05VS_PCH

+3VALW

+3VS

+3VS

+3VALW

+3VALW

+3VS

+RTCVCC

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (3/8) DMI,FDI,PM,Custom

16 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (3/8) DMI,FDI,PM,Custom

16 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (3/8) DMI,FDI,PM,Custom

16 59Friday, November 26, 2010

2010/07/12 2012/07/11

4mil width and placewithin 500mil of the PCH

Can be left NCwhen IAMT is notsupport on theplatfrom

Compal Electronics, Inc.

AEPWROK can be connect to PWROK if iAMT disable

SUSACK# is only used on platformthat support the Deep Sx state.

Can be left NC if no useintegrated LAN.

* DSWODVREN - On Die DSW VR EnableH�EnableL�Disable

7/22 modify

7/22 modify

7/28 modify

7/28 Update

* 7/28 Defult use AND Gate

7/28 Modify follow CRB & ORB

R201

10K_0402_5%

R201

10K_0402_5%12

R188 0_0402_5%@R188 0_0402_5%@1 2

R194 10K_0402_5%R194 10K_0402_5%12

R192 200_0402_5%@

R192 200_0402_5%@

12

R190 0_0402_5%R190 0_0402_5%1 2

R179330K_0402_5%R179330K_0402_5%

12

R199 0_0402_5%@R199 0_0402_5%@1 2

T66 PAD@T66 PAD@

R195

200K_0402_1%

R195

200K_0402_1%12

R177 49.9_0402_1%R177 49.9_0402_1%1 2

R183330K_0402_5%@

R183330K_0402_5%@

12

T71PAD T71PAD

R184 10K_0402_5%R184 10K_0402_5%12

DMI

FDI

System Power Management

U4C

COUGARPOINT_FCBGA989

DMI

FDI

System Power Management

U4C

COUGARPOINT_FCBGA989

DMI0RXNBC24

DMI1RXNBE20

DMI2RXNBG18

DMI3RXNBG20

DMI0RXPBE24

DMI1RXPBC20

DMI2RXPBJ18

DMI3RXPBJ20

DMI0TXNAW24

DMI1TXNAW20

DMI2TXNBB18

DMI3TXNAV18

DMI0TXPAY24

DMI1TXPAY20

DMI2TXPAY18

DMI3TXPAU18

DMI_ZCOMPBJ24

DMI_IRCOMPBG25

FDI_RXN0 BJ14

FDI_RXN1 AY14

FDI_RXN2 BE14

FDI_RXN3 BH13

FDI_RXN4 BC12

FDI_RXN5 BJ12

FDI_RXN6 BG10

FDI_RXN7 BG9

FDI_RXP0 BG14

FDI_RXP1 BB14

FDI_RXP2 BF14

FDI_RXP3 BG13

FDI_RXP4 BE12

FDI_RXP5 BG12

FDI_RXP6 BJ10

FDI_RXP7 BH9

FDI_FSYNC0 AV12

FDI_FSYNC1 BC10

FDI_LSYNC0 AV14

FDI_LSYNC1 BB10

FDI_INT AW16

PMSYNCH AP14

SLP_SUS# G16

SLP_S3# F4

SLP_S4# H4

SLP_S5# / GPIO63 D10

SYS_RESET#K3

SYS_PWROKP12

PWRBTN#E20

RI#A10

WAKE# B9

SUS_STAT# / GPIO61 G8

SUSCLK / GPIO62 N14

ACPRESENT / GPIO31H20

BATLOW# / GPIO72E10

PWROKL22

CLKRUN# / GPIO32 N3

SUSWARN# / SUS_PWR_DN_ACK / GPIO30K16

RSMRST#C21

DRAMPWROKB13

SLP_LAN# / GPIO29 K14

APWROKL10

DPWROK E22

DMI2RBIASBH21

SLP_A# G10

DSWVRMEN A18

SUSACK#C12

T73PAD T73PAD

R178 750_0402_1%R178 750_0402_1%1 2

R742

0_0402_5%@

R742

0_0402_5%@1 2

U6

MC74VHC1G08DFT2G SC70 5P

U6

MC74VHC1G08DFT2G SC70 5P

B2

A1

Y 4

P5

G3

R546 200_0402_5%R546 200_0402_5%12

R1850_0402_5%R1850_0402_5%

1 2

R180 100K_0402_1%R180 100K_0402_1%12

R743

0_0402_5%@

R743

0_0402_5%@1 2

R1810_0402_5% @R1810_0402_5% @1 2

R18610K_0402_5%

R18610K_0402_5%1 2

R2008.2K_0402_5%

R2008.2K_0402_5%1 2

R193 0_0402_5%R193 0_0402_5%1 2

R198 0_0402_5%R198 0_0402_5%1 2

R1898.2K_0402_5%

R1898.2K_0402_5%1 2

R302 0_0402_5%R302 0_0402_5%1 2R191

0_0402_5% @

R191

0_0402_5% @

1 2

R1820_0402_5% R1820_0402_5% 1 2T72 PADT72 PAD

R197 10K_0402_5%R197 10K_0402_5%12

R196 0_0402_5%R196 0_0402_5%1 2

D29CH751H-40PT_SOD323-2

D29CH751H-40PT_SOD323-2

21

Page 17: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CRT_IREF

CTRL_CLKCTRL_DATA

LVDS_IBG

LVD_VREF

PCH_ENBKLPCH_ENVDD

EDID_DATAEDID_CLK

DAC_BLU

DAC_GRN

DAC_RED

CRT_DDC_DATACRT_DDC_CLK

HDMIDAT_NBHDMICLK_NB

TMDS_B_CLK#_PCH

TMDS_B_DATA2_PCHTMDS_B_DATA1#_PCH

TMDS_B_DATA0#_PCH

TMDS_B_DATA2#_PCH

TMDS_B_DATA1_PCH

TMDS_B_DATA0_PCH

TMDS_B_CLK_PCH

EDID_CLKEDID_DATA

CRT_DDC_CLKCRT_DDC_DATA

PCH_ENBKL<31>PCH_ENVDD<31>

PCH_PWM<31>

EDID_DATA<31>EDID_CLK<31>

LVDS_ACLK#<31>LVDS_ACLK<31>

LVDS_A0#<31>LVDS_A1#<31>LVDS_A2#<31>

LVDS_A0<31>LVDS_A1<31>LVDS_A2<31>

CRT_HSYNC<32>CRT_VSYNC<32>

CRT_DDC_CLK<32>CRT_DDC_DATA<32>

DAC_BLU<32>

DAC_GRN<32>

DAC_RED<32>

HDMIDAT_NB <33>HDMICLK_NB <33>

HDMI_TX2-_CK <33>HDMI_TX2+_CK <33>HDMI_TX1-_CK <33>HDMI_TX1+_CK <33>HDMI_TX0-_CK <33>HDMI_TX0+_CK <33>HDMI_CLK-_CK <33>HDMI_CLK+_CK <33>

TMDS_B_HPD# <33>

+3VS

+3VS

+3VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (4/9) LVDS,CRT,DP,HDMICustom

17 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (4/9) LVDS,CRT,DP,HDMICustom

17 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (4/9) LVDS,CRT,DP,HDMICustom

17 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

HDMI

UMA_HDMI@

Pull up R for Chipset SIDE

Pull up R for Chipset SIDE

LVDS

Digital Display Interface

CRT

U4D

COUGARPOINT_FCBGA989

LVDS

Digital Display Interface

CRT

U4D

COUGARPOINT_FCBGA989

L_BKLTCTLP45

L_BKLTENJ47

L_CTRL_CLKT45

L_CTRL_DATAP39

L_DDC_CLKT40

L_DDC_DATAK47

L_VDD_ENM45

LVDSA_CLK#AK39

LVDSA_CLKAK40

LVDSA_DATA#0AN48

LVDSA_DATA#1AM47

LVDSA_DATA#2AK47

LVDSA_DATA#3AJ48

LVDSA_DATA0AN47

LVDSA_DATA1AM49

LVDSA_DATA2AK49

LVDSA_DATA3AJ47

LVDSB_CLK#AF40

LVDSB_CLKAF39

LVDSB_DATA#0AH45

LVDSB_DATA#1AH47

LVDSB_DATA#2AF49

LVDSB_DATA#3AF45

LVDSB_DATA0AH43

DDPB_0N AV42

DDPB_1N AV45

LVD_VREFHAE48

LVD_VREFLAE47

DDPD_2N BF42

DDPD_3N BJ42

DDPB_2N AU48

DDPB_3N AV47

DDPC_0N AY47

DDPC_1N AY43

DDPC_2N BA47

DDPC_3N BB47

DDPD_0N BB43

DDPD_1N BF44

DDPB_0P AV40

DDPB_1P AV46

DDPD_2P BE42

DDPD_3P BG42

DDPB_2P AU47

DDPB_3P AV49

LVDSB_DATA1AH49

LVDSB_DATA2AF47

LVDSB_DATA3AF43

LVD_IBGAF37

LVD_VBGAF36

DDPC_1P AY45

DDPC_0P AY49

DDPC_2P BA48

DDPC_3P BB49

DDPD_0P BB45

DDPD_1P BE44

CRT_BLUEN48

CRT_DDC_CLKT39

CRT_DDC_DATAM40

CRT_GREENP49

CRT_HSYNCM47

CRT_IRTNT42

CRT_REDT49

CRT_VSYNCM49

DAC_IREFT43

SDVO_CTRLCLK P38

SDVO_CTRLDATA M39

DDPC_CTRLCLK P46

DDPC_CTRLDATA P42

DDPD_CTRLCLK M43

DDPD_CTRLDATA M36

DDPB_AUXN AT49

DDPC_AUXN AP47

DDPD_AUXN AT45

DDPB_AUXP AT47

DDPC_AUXP AP49

DDPD_AUXP AT43

DDPB_HPD AT40

DDPC_HPD AT38

DDPD_HPD BH41

SDVO_TVCLKINP AP45SDVO_TVCLKINN AP43

SDVO_STALLP AM40SDVO_STALLN AM42

SDVO_INTP AP40SDVO_INTN AP39

R2070_0402_5%

PX@R207

0_0402_5%

PX@12

R2342.2K_0402_5%PX@

R2342.2K_0402_5%PX@

12

R5232.2K_0402_5%

PX@

R5232.2K_0402_5%

PX@

12

C205 0.1U_0402_10V6KUMA_HDMI@ C205 0.1U_0402_10V6KUMA_HDMI@ 1 2C206 0.1U_0402_10V6KUMA_HDMI@ C206 0.1U_0402_10V6KUMA_HDMI@ 1 2

R209 150_0402_1%PX@

R209 150_0402_1%PX@

12

C201 0.1U_0402_10V6KUMA_HDMI@ C201 0.1U_0402_10V6KUMA_HDMI@ 1 2

R208 150_0402_1%PX@

R208 150_0402_1%PX@

12

C202 0.1U_0402_10V6KUMA_HDMI@ C202 0.1U_0402_10V6KUMA_HDMI@ 1 2

R210 150_0402_1%PX@

R210 150_0402_1%PX@

12

C207 0.1U_0402_10V6KUMA_HDMI@ C207 0.1U_0402_10V6KUMA_HDMI@ 1 2

R2111K_0402_1%

R2111K_0402_1%

12

R5242.2K_0402_5%PX@

R5242.2K_0402_5%PX@

12

C203 0.1U_0402_10V6KUMA_HDMI@ C203 0.1U_0402_10V6KUMA_HDMI@ 1 2

R2022.2K_0402_5%UMA_HDMI@

R2022.2K_0402_5%UMA_HDMI@

12

C200 0.1U_0402_10V6KUMA_HDMI@ C200 0.1U_0402_10V6KUMA_HDMI@ 1 2

R204 2.2K_0402_5%R204 2.2K_0402_5%1 2

C204 0.1U_0402_10V6KUMA_HDMI@ C204 0.1U_0402_10V6KUMA_HDMI@ 1 2

R2032.2K_0402_5%UMA_HDMI@

R2032.2K_0402_5%UMA_HDMI@

12

R5592.2K_0402_5%PX@

R5592.2K_0402_5%PX@

12

R2062.37K_0402_1%

PX@R206

2.37K_0402_1%

PX@12

R205 2.2K_0402_5%R205 2.2K_0402_5%1 2

Page 18: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PLT_RST#

WL_OFF#

PCI_PIRQA#

PCI_PIRQD#PCI_PIRQC#PCI_PIRQB#

PCH_GPIO4

PCH_GPIO52

USB_OC7#

USB_OC4#USB_OC5#USB_OC6#

USB_OC3#

USB_OC1#USB_OC0#

USB_OC2#

NV_CLE

PCH_GPIO53

NV_CLE

PCH_GPIO2

USB_OC4#USB_OC3#

USB_OC1#

USB_OC0#

USB_OC6#

USB_OC5#USB_OC7#USB_OC2#PCH_GPIO51

PCH_GPIO2PCH_GPIO54PCH_GPIO4PCH_GPIO3

PCI_PIRQA#PCI_PIRQD#PCI_PIRQC#PCI_PIRQB#

WL_OFF#

PCH_GPIO52

PCH_GPIO5

PLT_RST#

USBRBIAS

USB20_N11

USB20_P1

USB20_P0USB20_N0

USB20_N8USB20_P8

USB20_N1

USB20_P11

PCH_GPIO54

PCH_GPIO51

USB20_N2USB20_P2

USB20_N9USB20_P9USB20_N10USB20_P10

CLK_PCI_LPBACK_RCLK_PCI_LPC_R

PCH_GPIO5

USB20_N3USB20_P3

USB20_N5USB20_P5

USB20_N13USB20_P13

PE_GPIO0 PCH_GPIO50

PLT_RST#

PE_GPIO1

VGA_RST#_RPE_GPIO0

PCH_GPIO50

WL_OFF#

ODD_DA# PCH_GPIO3

PE_GPIO0 VGA_RST#

VGA_RST#PE_GPIO0

PCH_GPIO53

USB_OC0# <38,56,57>

H_SNB_IVB# <6>

PCI_PME#<40>

BUF_PLT_RST#<34,35,40>

USB20_N0 <56,57>USB20_P0 <56,57>USB20_N1 <38>

USB20_P11 <43>

USB20_P1 <38>

USB20_N11 <43>

USB20_N2 <42>USB20_P2 <42>

CLK_PCI_LPC<40>CLK_PCI_LPBACK<15>

PLT_RST#<6>

USB20_N3 <42>USB20_P3 <42>

USB20_N5 <31>USB20_P5 <31>

USB20_N13 <42>USB20_P13 <42>

USB_OC1# <42>

PE_GPIO0<15>

VGA_RST# <23>

PE_GPIO1<15,25,26,52>

WL_OFF#<34>

ODD_DA#<40,56,57>

USB20_N9 <34>USB20_P9 <34>

+3VS

+1.8VS

+3VALW

+3VS

+3VGS+3VGS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.1

PCH (5/9) PCI, USBCustom

18 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.1

PCH (5/9) PCI, USBCustom

18 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.1

PCH (5/9) PCI, USBCustom

18 59Friday, November 26, 2010

2010/07/12 2012/07/11

*

override/Top-BlockLow=A16 swap

PCI_GNT3#

A16 swap overide Strap/Top-BlockSwap Override jumper

Swap Override enabledHigh=Default

Set to Vcc when HIGH

DMI Termination Voltage

NV_CLESet to Vss when LOW

Within 500 mils

CLOSE TO THE BRANCHING POINT

Compal Electronics, Inc.

USB Camera

CARD READER

Bluetooth

LEFT USB (COMBO)* SPI

0

1

Reserved

0

Boot BIOS Strap bit1 BBS1

Bit11

LPC

Boot BIOS Destination

GNT1#/GPIO51

(Default)

Reserved

1

0

Bit10

0 1

1 LEFT USB

RIGHT USB

USB DEBUG=PORT1 AND PORT9

LEFT USB

GPIO53=This Signal has a weak internal pull-up.NOTE: The internal pull-up is disabled afterPLTRST# deasserts.

USB charger

10/5 change to PX@

6/24 change to 1K

GPIO55

7/12 Reserve for BACO suggestion

7/12 Reserve for PX3.0

7/12 For DIS only

WLAN

8/6 WLAN changeto port 9

8/17 reserved

10/5 change to PX@

R693

0_0402_5%

@R693

0_0402_5%

@12

R222 0_0402_5%R222 0_0402_5%1 2

R218 22.6_0402_1%R218 22.6_0402_1%1 2

R553 0_0402_5%

PX@

R553 0_0402_5%

PX@1 2

R214 8.2K_0402_5%

@

R214 8.2K_0402_5%

@

1 2

R551 8.2K_0402_5%@R551 8.2K_0402_5%@1 2

C2081U_0402_6.3V4Z

@C208

1U_0402_6.3V4Z

@

1

2

R2161K_0402_5%R2161K_0402_5%

12

R225 8.2K_0402_5%R225 8.2K_0402_5%1 2

RP4

10K_1206_8P4R_5%

RP4

10K_1206_8P4R_5%

1 82 73 64 5

RP2

8.2K_0804_8P4R_5%

RP2

8.2K_0804_8P4R_5%

18273645

R219 22_0402_5%R219 22_0402_5%1 2

R7150_0402_5%@

R7150_0402_5%@1 2

R741

0_0402_5%

@R741

0_0402_5%

@12

R691 0_0402_5%PX@

R691 0_0402_5%PX@

1 2

R220 22_0402_5%R220 22_0402_5%1 2

R48710K_0402_5%

@

R48710K_0402_5%

@

1 2

R215 1K_0402_5%@R215 1K_0402_5%@1 2

D27

CH751H-40PT_SOD323-2

@D27

CH751H-40PT_SOD323-2

@

21

RSVD

NVRAM

PCI

USB

U4E

COUGARPOINT_FCBGA989

RSVD

NVRAM

PCI

USB

U4E

COUGARPOINT_FCBGA989

NV_ALE AV5

NV_CE#0 AY7

NV_CE#1 AV7

NV_CE#2 AU3

NV_CE#3 BG4

NV_CLE AY1

NV_DQS0 AT10

NV_DQS1 BC8

NV_DQ0 / NV_IO0 AU2

NV_DQ1 / NV_IO1 AT4

NV_DQ10 / NV_IO10 BB5

NV_DQ11 / NV_IO11 BB3

NV_DQ12 / NV_IO12 BB7

NV_DQ13 / NV_IO13 BE8

NV_DQ14 / NV_IO14 BD4

NV_DQ15 / NV_IO15 BF6

NV_DQ2 / NV_IO2 AT3

NV_DQ3 / NV_IO3 AT1

NV_DQ4 / NV_IO4 AY3

NV_DQ5 / NV_IO5 AT5

NV_DQ6 / NV_IO6 AV3

NV_DQ7 / NV_IO7 AV1

NV_DQ8 / NV_IO8 BB1

NV_DQ9 / NV_IO9 BA3

NV_RB# AT8

NV_RCOMP AV10

NV_RE#_WRB0 AY5

NV_RE#_WRB1 BA2

NV_WE#_CK0 AT12

NV_WE#_CK1 BF3

PIRQA#K40

PIRQB#K38

PIRQC#H38

PIRQD#G38

REQ1# / GPIO50C46

REQ2# / GPIO52C44

REQ3# / GPIO54E40

GNT1# / GPIO51D47

GNT2# / GPIO53E42

GNT3# / GPIO55F46

PIRQE# / GPIO2G42

PIRQF# / GPIO3G40

PIRQG# / GPIO4C42

PIRQH# / GPIO5D44

USBP0N C24

USBP0P A24

USBP1N C25

USBP1P B25

USBP2N C26

USBP2P A26

USBP3N K28

USBP3P H28

USBP4N E28

USBP4P D28

USBP5N C28

USBP5P A28

USBP6N C29

USBP6P B29

USBP7N N28

USBP7P M28

USBP8N L30

USBP8P K30

USBP9N G30

USBP9P E30

USBP10N C30

USBP10P A30

USBP11N L32

USBP11P K32

USBP12N G32

USBP12P E32

USBP13N C32

USBP13P A32

PME#K10

CLKOUT_PCI0H49

CLKOUT_PCI1H43

CLKOUT_PCI2J48

USBRBIAS# C33

USBRBIAS B33

OC0# / GPIO59 A14

OC1# / GPIO40 K20

OC2# / GPIO41 B17

OC3# / GPIO42 C16

OC4# / GPIO43 L16

OC5# / GPIO9 A16

OC6# / GPIO10 D14

OC7# / GPIO14 C14CLKOUT_PCI4H40CLKOUT_PCI3K42

PLTRST#C6

TP1BG26

TP2BJ26

TP3BH25

TP6AH38

TP7AH37

TP8AK43

TP9AK45

TP16Y13

TP17K24

TP18L24

TP19AB46

TP20AB45

TP21B21

TP22M20

TP23AY16

TP25BE28

TP26BC30

TP27BE32

TP28BJ32

TP29BC28

TP30BE30

TP31BF32

TP32BG32

TP33AV26

TP34BB26

TP35AU28

TP36AY30

TP37AU26

TP38AY26

TP39AV28

TP40AW30

TP4BJ16

TP5BG16

TP15AM5TP14AM4TP13AH12TP12H3TP11N30TP10C18

TP24BG46

R217 4.7K_0402_5%R217 4.7K_0402_5%12

R213 8.2K_0402_5%R213 8.2K_0402_5%1 2

R684100K_0402_5%PX@ R684100K_0402_5%PX@

12

R6900_0402_5%

DIS@R6900_0402_5%

DIS@ 12

R221 1K_0402_5%@R221 1K_0402_5%@1 2

R682

0_0402_5%

PX@ R682

0_0402_5%

PX@12

U7

MC74VHC1G08DFT2G SC70 5P@

U7

MC74VHC1G08DFT2G SC70 5P@

B 2

A 1

Y4

P5

G3

U12

NC7SZ08P5X_NL_SC70-5 PX@

U12

NC7SZ08P5X_NL_SC70-5 PX@

B2

A1Y 4

P5

G3

R223100K_0402_5%R223100K_0402_5%

12

RP1

8.2K_0804_8P4R_5%

RP1

8.2K_0804_8P4R_5%

18273645

R212 8.2K_0402_5%R212 8.2K_0402_5%1 2

RP3

10K_1206_8P4R_5%

RP3

10K_1206_8P4R_5%

1 82 73 64 5

Page 19: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCH_GPIO57

CPUSB#

PCH_GPIO15

PCH_GPIO28

PCH_GPIO27

PCH_GPIO22

PCH_GPIO37

PCH_GPIO38

PCH_GPIO27

PCH_GPIO6

PCH_GPIO69

PCH_GPIO48

PCH_GPIO16

PCH_THRMTRIP#_R

EC_SCI#

PCH_GPIO28

PCH_PECI_R

PCH_GPIO71

KB_RST#

H_THRMTRIP#

EC_SMI#

EC_SMI#

GPIO17

PCH_GPIO35

PCH_GPIO39

PCH_GPIO68

PCH_GPIO68

PCH_GPIO70

KB_RST#

PCH_GPIO36

ODD_EN

PCH_GPIO36

BT_OFF#

ESATA_DET#

PCH_GPIO0

PCH_GPIO69

PCH_GPIO70

PCH_GPIO71

ESATA_DET#_R

PCH_GPIO36

PCH_GPIO37

GATEA20 <40>

EC_SCI#<40>

H_PECI <6,40>

H_CPUPWRGD <6>

KB_RST# <40>

H_THRMTRIP# <6>

ODD_EN<38>

EC_SMI#<40>

BT_OFF#<42>

ESATA_DET#<42>

+3VALW

+3VS

+3VS

+3VS

+3VS

+3VS

+3VALW

+3VALW

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (6/9) GPIO, CPU, MISCCustom

19 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (6/9) GPIO, CPU, MISCCustom

19 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (6/9) GPIO, CPU, MISCCustom

19 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

H ; Disable

Integrated Clock Chip EnableICC_EN#

*

This signal has a weak internal pull upOn-Die PLL Voltage Regulator

L�On-Die PLL Voltage Regulator disable

GPIO28

H�On-Die voltage regulator enable

* L ; Enable

Weak internal pull-high

*PCH_GPIO27 (Have internal Pull-High)High: VCCVRM VR EnableLow: VCCVRM VR Disable

INIT3_3V

This signal has weak internalPU, can't pull low

Intel schematic reviwe recommand.

7/22 update to reserve only

6/23 update for MB ID

PCH_GPIO69 PCH_GPIO70 PCH_GPIO71 Function

1

0 0

0

0 1

11

0

0

0

0

UMA

DIS

*

PX3.0

PX4.0

8/5 update to pull down

7/22 update to usedintel function

10/8 update to pull down for checklist Rev1.2

R2370_0402_5%@

R2370_0402_5%@1 2

T31PAD @T31PAD @

T39PAD @T39PAD @

R238 10K_0402_5%R238 10K_0402_5%1 2

T19PAD @T19PAD @

R249 10K_0402_5%R249 10K_0402_5%1 2

R703

10K

_040

2_5%

PX@

R703

10K

_040

2_5%

PX@

12

R235 1K_0402_5%@

R235 1K_0402_5%@

1 2

T46 PAD@T46 PAD@

R248 10K_0402_5%R248 10K_0402_5%1 2

R547 10K_0402_5% R547 10K_0402_5% 1 2

T40 PAD@T40 PAD@

R702

10K

_040

2_5%

R702

10K

_040

2_5%

12

T32 PAD@T32 PAD@

T23PAD @T23PAD @

T17 PAD@T17 PAD@

R3030_0402_5%

@

R3030_0402_5%

@1 2

R24110K_0402_5%

R24110K_0402_5% 1 2

T36 PAD@T36 PAD@

R704

10K

_040

2_5%

@

R704

10K

_040

2_5%

@

12

R239 390_0402_5%R239 390_0402_5%1 2

T25PAD @T25PAD @

R705

10K

_040

2_5%

DIS@

R705

10K

_040

2_5%

DIS@

12

T34 PAD@T34 PAD@

R250 10K_0402_5%@R250 10K_0402_5%@1 2

T43PAD @T43PAD @

T26 PAD@T26 PAD@

CPU/MISC

NCTF

GPIO

U4F

COUGARPOINT_FCBGA989CPU/MISC

NCTF

GPIO

U4F

COUGARPOINT_FCBGA989

GPIO27E16

GPIO28P8

GPIO24 / MEM_LEDE8

GPIO57D6

LAN_PHY_PWR_CTRL / GPIO12C4

VSS_NCTF_1A4

VSS_NCTF_2A44

VSS_NCTF_3A45

VSS_NCTF_4A46

VSS_NCTF_5A5

VSS_NCTF_6A6

VSS_NCTF_7B3

VSS_NCTF_8B47

VSS_NCTF_9BD1

VSS_NCTF_10BD49

VSS_NCTF_11BE1

VSS_NCTF_12BE49

TACH2 / GPIO6H36

TACH0 / GPIO17D40

TACH3 / GPIO7E38

SATA3GP / GPIO37M5

SATA5GP / GPIO49V3

SCLOCK / GPIO22T5

SLOAD / GPIO38N2

SDATAOUT0 / GPIO39M3

SDATAOUT1 / GPIO48V13

PROCPWRGD AY11

RCIN# P5

PECI AU16

THRMTRIP# AY10

GPIO8C10

BMBUSY# / GPIO0T7

GPIO15G2

TACH1 / GPIO1A42

SATA2GP / GPIO36V8

INIT3_3V# T14

STP_PCI# / GPIO34K1

GPIO35K4

SATA4GP / GPIO16U2

VSS_NCTF_32 F49

A20GATE P4

TACH4 / GPIO68 C40

TACH6 / GPIO70 C41

TACH7 / GPIO71 A40

TACH5 / GPIO69 B41

VSS_NCTF_17 BH3

VSS_NCTF_18 BH47

VSS_NCTF_19 BJ4

VSS_NCTF_20 BJ44

VSS_NCTF_21 BJ45

VSS_NCTF_22 BJ46

VSS_NCTF_23 BJ5

VSS_NCTF_24 BJ6

VSS_NCTF_25 C2

VSS_NCTF_26 C48

VSS_NCTF_27 D1

VSS_NCTF_28 D49

VSS_NCTF_29 E1

VSS_NCTF_30 E49

VSS_NCTF_31 F1

NC_4 AK10

NC_3 AH10

NC_2 AK11

NC_1 AH8

NC_5 P37

VSS_NCTF_13BF1

VSS_NCTF_14BF49

VSS_NCTF_15 BG2

VSS_NCTF_16 BG48

T24 PAD@T24 PAD@

R251 10K_0402_5% R251 10K_0402_5% 1 2

R706

10K

_040

2_5%

R706

10K

_040

2_5%

12

T28 PAD@T28 PAD@

R23610K_0402_5%R23610K_0402_5%

12

R227 10K_0402_5%R227 10K_0402_5%1 2

T27PAD @T27PAD @

R233 10K_0402_5%R233 10K_0402_5%1 2

R881 10K_0402_5%R881 10K_0402_5%1 2T29PAD @T29PAD @

R707

10K

_040

2_5%

@

R707

10K

_040

2_5%

@

12

T45PAD @T45PAD @

R542 0_0402_5%@R542 0_0402_5%@1 2

R224 10K_0402_5%R224 10K_0402_5%1 2

T18 PAD@T18 PAD@

R247 10K_0402_5%R247 10K_0402_5%1 2

R229 10K_0402_5%@R229 10K_0402_5%@1 2

T20 PAD@T20 PAD@

T37PAD @T37PAD @

T21PAD @T21PAD @

R244 10K_0402_5%@R244 10K_0402_5%@1 2

R246 10K_0402_5%R246 10K_0402_5%1 2

R230 1K_0402_5%R230 1K_0402_5%1 2

R228 10K_0402_5%R228 10K_0402_5%1 2

T15 PAD@T15 PAD@

T44 PAD@T44 PAD@

R243 10K_0402_5%R243 10K_0402_5%1 2

T41PAD @T41PAD @

T33PAD @T33PAD @

R240 1K_0402_5%@R240 1K_0402_5%@1 2

R245 10K_0402_5%@R245 10K_0402_5%@1 2

T16 PAD@T16 PAD@

T42 PAD@T42 PAD@

R231 10K_0402_5%R231 10K_0402_5%1 2

T35PAD @T35PAD @

R232 10K_0402_1%R232 10K_0402_1%1 2

T38 PAD@T38 PAD@

T22 PAD@T22 PAD@

T30 PAD@T30 PAD@

R226 10K_0402_5%R226 10K_0402_5%1 2

R24210K_0402_5%@

R24210K_0402_5%@1 2

Page 20: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+VCCAFDI_VRM

+VCCAPLLEXP

+1.05VS_PCH

+1.05VS_VCC_EXP

+VCCAFDI_VRM

+1.05VS_VCCAPLL_FDI

+VCCADAC

+VCCAFDI_VRM

+3VS_VCC3_3_6

+3V_VCCPSPI

+1.05VS_VCCDPLLEXP

+3VS_VCCA3GBG

+1.05VS_VCCDPLL_FDI

+VCCP_VCCDMI

+VCCA_LVDS

+VCCTX_LVDS

+1.05VS_VCC_DMI_CCI

+1.5VS

+1.8VS

+VCCAFDI_VRM

+VCCP_VCCDMI

+1.05VS

+1.05VS_PCH

+1.05VS_PCH

+1.05VS_PCH

+1.05VS_PCH

+3VS

+1.05VS

+1.8VS+VCCPNAND

+3VS

+3VS

+VCCP_VCCDMI

+1.05VS_PCH

+3VS

+1.8VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (7/9) PWRCustom

20 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (7/9) PWRCustom

20 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (7/9) PWRCustom

20 59Friday, November 26, 2010

2010/07/12 2012/07/11

3.3

1.05

1.05

1.05

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

Voltage Rail

VccCore

VccDMI

1.05

5

3.3

0.001

0.001

0.001

0.266

0.001

0.08

0.08

1.3

0.042

5

VoltageS0 IccmaxCurrent (A)

1.05

1.05VccIO 2.925

1.05VccASW 1.01

3.3VccSPI 0.02

3.3VccDSW 0.003

1.8 0.19VccpNAND

3.3VccRTC 6 uA

3.3VccSus3_3

3.3 / 1.5VccSusHDA

0.119

0.01

VccVRM 1.8 / 1.5 0.16

1.05VccCLKDMI

VccALVDS 3.3

1.8VccTX_LVDS 0.06

0.001

0.02

PCH Power Rail Table

Place CH53 Near BG6 pin

Compal Electronics, Inc.

1mA1300mA

2925mA

20mA

190mA

VCCVRM = 160mA detal waiting for newest spec

20mA

1mA

60mA

VccSSC 1.05 0.095

VccDIFFCLKN 1.05 0.055

VCCVRM==>1.5V FOR MOBILEVCCVRM==>1.8V FOR DESKTOP

Intel recommandstuff R265 and unstuff R266

This pin can be left as no connect inOn-Die VR enabled mode (default).

0.1uH inductor, 200mA

6/30 update

8/5 Reserved

8/11 update for PDGD 1.2 8/27 update L75 symbol

R2550_0402_5%

DIS@R2550_0402_5%

DIS@

12

J12

PAD-OPEN 4x4m

@J12

PAD-OPEN 4x4m

@12

C214

0.1U_0402_10V

7KC

2140.1U

_0402_10V7K

1

2

R265 0_0603_5%R265 0_0603_5%12

C2261U_0402_6.3V6K

C2261U_0402_6.3V6K

1

2

C2201U_0402_6.3V6KC2201U_0402_6.3V6K

1

2

C224

1U_0402_6.3V

6KC

2241U

_0402_6.3V6K

1

2

C21510U_0805_6.3V6MC21510U_0805_6.3V6M

1

2

C2270.1U_0402_10V7KC2270.1U_0402_10V7K

1

2R262

0_0603_5%@R262

0_0603_5%@

12

R2530_0402_5%

DIS@R2530_0402_5%

DIS@

12

R266 0_0603_5%@R266 0_0603_5%@ 12

L7510UH_LBR2012T100M_20%

L7510UH_LBR2012T100M_20%

1 2

C2291U_0402_6.3V6K

@C2291U_0402_6.3V6K

@

1

2

POWER

VCC CORE

DMI

VCCIO

CRT

LVDS

FDI

NAND / SPI

HVCMOS

U4G

COUGARPOINT_FCBGA989

POWER

VCC CORE

DMI

VCCIO

CRT

LVDS

FDI

NAND / SPI

HVCMOS

U4G

COUGARPOINT_FCBGA989

VCCCORE[1]AA23

VCCCORE[2]AC23

VCCCORE[3]AD21

VCCCORE[4]AD23

VCCCORE[5]AF21

VCCCORE[6]AF23

VCCCORE[7]AG21

VCCCORE[8]AG23

VCCCORE[9]AG24

VCCCORE[10]AG26

VCCCORE[11]AG27

VCCCORE[12]AG29

VCCCORE[13]AJ23

VCCCORE[14]AJ26

VCCCORE[15]AJ27

VCCPNAND[4] AJ17

VCCPNAND[3] AJ16

VCCIO[17]AN21

VCCIO[18]AN26

VCCIO[19]AN27

VCCIO[20]AP21

VCCIO[23]AP26

VCCIO[24]AT24

VCCIO[15]AN16

VCCIO[16]AN17

VCCIO[21]AP23

VCCIO[22]AP24

VCCADAC U48

VCCTX_LVDS[1] AM37

VCCTX_LVDS[2] AM38

VCCALVDS AK36

VCCVRM[3] AT16

VCCVRM[2]AP16

VCCAPLLEXPBJ22

VCCFDIPLLBG6

VCCIO[28]AN19VCCTX_LVDS[4] AP37

VCCTX_LVDS[3] AP36

VSSADAC U47

VSSALVDS AK37

VCCIO[27]AP17

VCC3_3[6] V33

VCC3_3[7] V34

VCC3_3[3]BH29 VCCPNAND[2] AG17

VCCPNAND[1] AG16

VCCDMI[1] AT20

VCCIO[25]AN33

VCCIO[26]AN34

VCCCORE[16]AJ29

VCCCORE[17]AJ31

VCCSPI V1

VCCIO[1] AB36

VCCDMI[2]AU20

L1MBK1608221YZF_2P

L1MBK1608221YZF_2P

12

C223

1U_0402_6.3V

6KC

2231U

_0402_6.3V6K

1

2

PJP1

PAD-OPEN 4x4m

@PJP1

PAD-OPEN 4x4m

@12

C2170.01U_0402_16V7KPX@

C2170.01U_0402_16V7KPX@

1

2R256

0_0805_5%R256

0_0805_5%1 2

C2160.01U_0402_16V7KPX@

C2160.01U_0402_16V7KPX@

1

2

R399

0_0805_5%

R399

0_0805_5%

1 2

L20.1UH_MLF1608DR10KT_10%_1608

[email protected]_MLF1608DR10KT_10%_1608

PX@

12

C209

10U_0603_6.3V

6MC

20910U

_0603_6.3V6M

1

2

R254 0_0603_5%R254 0_0603_5%12

C222

1U_0402_6.3V

6KC

2221U

_0402_6.3V6K

1

2

R2610_0805_5%R2610_0805_5%1 2

C2190.1U_0402_10V7KC2190.1U_0402_10V7K

1

2

C211

1U_0402_6.3V

6KC

2111U

_0402_6.3V6K

1

2

C225

1U_0402_6.3V

6KC

2251U

_0402_6.3V6K

1

2

R2520.022_0805_1%

PX@

R2520.022_0805_1%

PX@1 2

R2600_0805_5%

R2600_0805_5%1 2

R263

0_0805_5%

R263

0_0805_5%1 2

C2301U_0402_6.3V6KC2301U_0402_6.3V6K

1

2

C218

22U_0805_6.3V

6M

PX@

C218

22U_0805_6.3V

6M

PX@

1

2

R2590_0805_5%@

R2590_0805_5%@

1 2

C39510U_0805_6.3V6M

@

C39510U_0805_6.3V6M

@

1

2

C210

1U_0402_6.3V

6KC

2101U

_0402_6.3V6K

1

2

C221

10U_0805_6.3V

6MC

22110U

_0805_6.3V6M

1

2 C917

10U_0603_6.3V6M

@

C917

10U_0603_6.3V6M

@

1

2

C2280.1U_0402_10V7KC2280.1U_0402_10V7K

1

2

T47PAD @T47PAD @

C212

1U_0402_6.3V

6KC

2121U

_0402_6.3V6K

1

2

R257 0_0805_5%

@

R257 0_0805_5%

@1 2

C213

0.01U_0402_16V

7KC

2130.01U

_0402_16V7K

1

2

R258

0_0805_5%

R258

0_0805_5%

1 2

Page 21: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+PCH_V5REF_RUN

+PCH_V5REF_SUS

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

+3V_VCCPSUS

+VCCSUSHDA

+1.05VS_VCCUSBCORE

+PCH_V5REF_RUN

+PCH_V5REF_SUS

+VCCME_22

+VCCME_23

+VCCME_21

+3V_VCCPSUS

+3VS_VCCPCORE

+VCCA_USBSUS

+3VS_VCCPPCI

+3V_VCCPUSB

+3V_VCCAUBG

+VCCSATAPLL_R

+VCCAFDI_VRM

+1.05VS_SATA3

+1.05VM_VCCASW

+PCH_VCCDSW

+3VS_VCC_CLKF33

+VCCDPLL_CPY

+VCCPDSW

+VCCAPLL_CPY

+3VS_VCC_CLKF33

+VCCSUS1

+VCCACLK

+VCCAPLL_CPY_PCH

+VCCRTCEXT

+VCCSST

+1.05VM_VCCSUS

+V_CPU_IO

+VCCAFDI_VRM

+VCCDIFFCLK

+1.05VS_VCCDIFFCLKN

+1.05VS_SSCVCC

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

+1.05VS_VCCAUPLL

+VCC3_3_2

+1.05VS_VCC_SATA

+VCCSATAPLL

+VCCDIFFCLK

+1.05VS_VCCDIFFCLKN

+VCCA_DPLL_L

+1.05VM_VCCSUS

+1.05VS_SSCVCC

+3VS+5VS

+3VALW+5VALW

+1.05VS_PCH

+3VALW

+1.05VS_PCH

+3VS

+3VS

+1.05VS_PCH

+3VALW

+1.05VS_PCH

+1.05VS_PCH

+3VALW

+3VS

+3VALW

+1.05VS_PCH

+3VALW

+3VS

+1.05VS_PCH

+1.05VS_PCH

+1.05VS_PCH

+1.05VS

+RTCVCC

+VCCAFDI_VRM

+1.05VS_SATA3

+1.05VS_VCC_SATA

+1.05VS_PCH

+1.05VS_PCH

+1.05VS_PCH

+1.05VS_PCH

+1.05VS_PCH

+1.05VS_PCH

+1.05VS_VCCDIFFCLKN

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (8/9) PWR

Custom

21 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (8/9) PWR

Custom

21 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (8/9) PWR

Custom

21 59Friday, November 26, 2010

2010/07/12 2012/07/11

Place CH80 Near AK1 pin

Compal Electronics, Inc.

1mA

1mA

1mA

119mA

80mA

80mA

VCC3_3 = 266mA detal waiting for newest spec

VCCDMI = 42mA detal waiting for newest spec

1010mA

3mA

10mA

95mA

55mA

Have internal VRM

7/1 update to @

+

C250

220U_B

2_2.5VM

_R35

+

C250

220U_B

2_2.5VM

_R35

1

2

+

C252

220U_B

2_2.5VM

_R35

+

C252

220U_B

2_2.5VM

_R35

1

2

C268

1U_0402_6.3V

6KC

2681U

_0402_6.3V6K

1

2

R2730_0603_5%

R2730_0603_5%

12

L410UH_LBR2012T100M_20%

@ L410UH_LBR2012T100M_20%

@

1 2

C2481U_0603_10V6KC2481U_0603_10V6K

1

2

C237

10U_0805_6.3V

6M

@

C237

10U_0805_6.3V

6M

@

1

2

R2900_0603_5%

@R2900_0603_5%

@

12

C2350.1U_0402_10V7K

@ C2350.1U_0402_10V7K

@

12

C243 1U_0402_6.3V6K@

C243 1U_0402_6.3V6K@

1 2

C232

1U_0402_6.3V

6KC

2321U

_0402_6.3V6K

1

2

C267

0.1U_0402_10V

7K@

C267

0.1U_0402_10V

7K@

1

2

R2680_0603_5%@R2680_0603_5%@

12

C2561U_0402_6.3V6KC2561U_0402_6.3V6K

1

2

C2490.1U_0402_10V7KC2490.1U_0402_10V7K

1

2 R2820_0603_5%R2820_0603_5%

12

C2591U_0402_6.3V6KC2591U_0402_6.3V6K

1

2

L710UH_LB2012T100MR_20%

@L710UH_LB2012T100MR_20%

@

1 2

C266

0.1U_0402_10V

7KC

2660.1U

_0402_10V7K

1

2

R2710_0603_5%@R2710_0603_5%@

1 2

C2571U_0402_6.3V6KC2571U_0402_6.3V6K

1

2C258

0.1U_0402_10V7KC258

0.1U_0402_10V7K

1

2

R2840_0603_5%

R2840_0603_5%

12

R275100_0402_5%

R275100_0402_5%

12

C241

22U_0805_6.3V

6MC

24122U

_0805_6.3V6M

1

2

C245

1U_0402_6.3V

6KC

2451U

_0402_6.3V6K

1

2

R2830_0603_5%

R2830_0603_5%

12

R2930_0603_5%

R2930_0603_5%1 2

C26010U_0805_6.3V6M@C26010U_0805_6.3V6M@

1

2

C2471U_0402_6.3VC2471U_0402_6.3V

1

2

C244

1U_0402_6.3V

6KC

2441U

_0402_6.3V6K

1

2

L510UH_LB2012T100MR_20%

L510UH_LB2012T100MR_20%

1 2

C242

22U_0805_6.3V

6MC

24222U

_0805_6.3V6M

1

2

R2690_0603_5%

R2690_0603_5%1 2

L310UH_LBR2012T100M_20%

L310UH_LBR2012T100M_20%

1 2

R279100_0402_5%

R279100_0402_5%

12

C253

1U_0402_6.3V

6KC

2531U

_0402_6.3V6K

1

2

C2630.1U_0402_10V7K

C2630.1U_0402_10V7K

1

2

C231

10U_0805_10V

4ZC

23110U

_0805_10V4Z

1

2

D2CH751H-40PT_SOD323-2D2CH751H-40PT_SOD323-2

21

L610UH_LB2012T100MR_20%

L610UH_LB2012T100MR_20%

1 2

R2720_0603_5%R2720_0603_5%

12

C2380.1U_0402_10V7KC2380.1U_0402_10V7K

1

2

C269

0.1U_0402_10V

7KC

2690.1U

_0402_10V7K

1

2

R2770_0805_5%

R2770_0805_5%1 2

R2810_0805_5%R2810_0805_5%

12

R294 0_0603_5%R294 0_0603_5%12

C246

1U_0402_6.3V

6KC

2461U

_0402_6.3V6K

1

2

C2331U_0402_6.3V6KC2331U_0402_6.3V6K

1

2

R2880_0603_5%

R2880_0603_5%

12

C2540.1U_0402_10V7KC2540.1U_0402_10V7K

1

2

R274 0_0603_5%R274 0_0603_5%1 2

R2700_0603_5%

R2700_0603_5%

12

C270

0.1U_0402_10V

7K

@

C270

0.1U_0402_10V

7K

@

1

2

R2760_0603_5%

R2760_0603_5%

12

C2391U_0402_6.3V6K@C2391U_0402_6.3V6K@

1

2

C265

4.7U_0603_6.3V

6KC

2654.7U

_0603_6.3V6K

1

2

C2550.1U_0402_10V7KC2550.1U_0402_10V7K

1

2

C2400.1U_0603_25V7KC2400.1U_0603_25V7K

1

2

C251

1U_0402_6.3V

6KC

2511U

_0402_6.3V6K

1

2

R295 0_0603_5%R295 0_0603_5%12

C236

0.1U_0402_10V

7KC

2360.1U

_0402_10V7K

1

2

C2340.1U_0402_10V7KC2340.1U_0402_10V7K

1

2

C2611U_0402_6.3V6KC2611U_0402_6.3V6K

1

2

C2641U_0402_6.3V6K

@ C2641U_0402_6.3V6K

@

1

2R292 0_0603_5%R292 0_0603_5%12

D1CH751H-40PT_SOD323-2D1CH751H-40PT_SOD323-2

21

C2710.1U_0402_16V4ZC2710.1U_0402_16V4Z

1

2

R2670_0805_5%@R2670_0805_5%@

1 2

R291 0_0603_5%R291 0_0603_5%12

POWER

SATA

USB

Clock and Miscellaneous

HDA

CPU

RTC

PCI/GPIO/LPC

MISC

U4J

COUGARPOINT_FCBGA989

POWER

SATA

USB

Clock and Miscellaneous

HDA

CPU

RTC

PCI/GPIO/LPC

MISC

U4J

COUGARPOINT_FCBGA989

DCPSUSBYPV12

VCCASW[1]AA19

VCCASW[2]AA21

VCCASW[3]AA24

VCCASW[5]AA27

VCCASW[6]AA29

VCCSUSHDA P32

VCCSUS3_3[6] P24

VCCIO[34] T26

VCCIO[4] AD17

VCCASW[7]AA31

VCCASW[8]AC26

VCCASW[9]AC27

VCCASW[10]AC29

VCCASW[11]AC31

VCCASW[12]AD29

V5REF P34

VCC3_3[4] T34

VCCRTCA22

VCCSUS3_3[10] V24

VCCSUS3_3[9] V23

VCCSUS3_3[8] T24

VCCSUS3_3[7] T23

VCCIO[2] AC16

VCCADPLLBBF47

VCCIO[8]AF33

V5REF_SUS M26

VCCIO[3] AC17

DCPSUS[1]T17

VCCIO[10]AG33

VCCADPLLABD47

VCCVRM[4]Y49

VCCACLKAD49

DCPRTCN16

VCCASW[4]AA26

VCCIO[9]AF34

VCCIO[7]AF17

DCPSSTV16

VCCIO[5] AF13

VCCASW[22] T21

VCCASW[23] V21

VCCASW[21] T19

VCC3_3[1] AA16

VCC3_3[8] W16

VCCSUS3_3[2] N20

VCCSUS3_3[3] N22

VCCSUS3_3[4] P20

VCCSUS3_3[5] P22

VCCIO[29] N26

VCCIO[30] P26

VCCIO[31] P28

VCCIO[32] T27

V_PROC_IOBJ8

VCCIO[33] T29

VCCIO[11]AG34

VCCASW[13]AD31

VCCASW[14]W21

VCCASW[15]W23

VCCASW[16]W24

VCCASW[17]W26

VCCASW[18]W29

VCCASW[19]W31

VCCASW[20]W33

VCCIO[6] AF14

VCCVRM[1] AF11

VCCIO[12] AH13

VCCIO[13] AH14

VCC3_3[2] AJ2

VCCAPLLSATA AK1

DCPSUS[3]AL24

VCCIO[14]AL29

DCPSUS[4] AN23

VCCSUS3_3[1] AN24

VCCAPLLDMI2BH23

DCPSUS[2]V19

VCCDSW3_3T16

VCC3_3[5]T38

R2860_0603_5%

R2860_0603_5%

12 R2870_0805_5%@R2870_0805_5%@

12

C2621U_0402_6.3V6KC2621U_0402_6.3V6K

1

2

R2850_0805_5%

R2850_0805_5%

12

R2890_0805_5%

R2890_0805_5%

12

R2780_0603_5%R2780_0603_5%

12

Page 22: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (9/9) VSSCustom

22 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (9/9) VSSCustom

22 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

PCH (9/9) VSSCustom

22 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

U4I

COUGARPOINT_FCBGA989

U4I

COUGARPOINT_FCBGA989

VSS[159]AY4

VSS[160]AY42

VSS[161]AY46

VSS[162]AY8

VSS[163]B11

VSS[164]B15

VSS[165]B19

VSS[166]B23

VSS[167]B27

VSS[168]B31

VSS[169]B35

VSS[170]B39

VSS[171]B7

VSS[173]BB12

VSS[174]BB16

VSS[175]BB20

VSS[176]BB22

VSS[177]BB24

VSS[178]BB28

VSS[179]BB30

VSS[180]BB38

VSS[181]BB4

VSS[182]BB46

VSS[183]BC14

VSS[184]BC18

VSS[185]BC2

VSS[186]BC22

VSS[187]BC26

VSS[188]BC32

VSS[189]BC34

VSS[190]BC36

VSS[191]BC40

VSS[192]BC42

VSS[193]BC48

VSS[194]BD46

VSS[195]BD5

VSS[196]BE22

VSS[197]BE26

VSS[198]BE40

VSS[199]BF10

VSS[200]BF12

VSS[201]BF16

VSS[202]BF20

VSS[203]BF22

VSS[204]BF24

VSS[205]BF26

VSS[206]BF28

VSS[207]BD3

VSS[208]BF30

VSS[209]BF38

VSS[210]BF40

VSS[211]BF8

VSS[212]BG17

VSS[213]BG21

VSS[214]BG33

VSS[215]BG44

VSS[216]BG8

VSS[217]BH11

VSS[218]BH15

VSS[219]BH17

VSS[220]BH19

VSS[222]BH27

VSS[223]BH31

VSS[224]BH33

VSS[225]BH35

VSS[226]BH39

VSS[227]BH43

VSS[228]BH7

VSS[229]D3

VSS[230]D12

VSS[231]D16

VSS[232]D18

VSS[233]D22

VSS[234]D24

VSS[235]D26

VSS[236]D30

VSS[237]D32

VSS[264] K7

VSS[265] L18

VSS[266] L2

VSS[267] L20

VSS[268] L26

VSS[269] L28

VSS[270] L36

VSS[271] L48

VSS[272] M12

VSS[273] P16

VSS[274] M18

VSS[275] M22

VSS[276] M24

VSS[277] M30

VSS[278] M32

VSS[279] M34

VSS[280] M38

VSS[281] M4

VSS[282] M42

VSS[283] M46

VSS[284] M8

VSS[285] N18

VSS[286] P30

VSS[288] P11

VSS[289] P18

VSS[290] T33

VSS[291] P40

VSS[292] P43

VSS[293] P47

VSS[294] P7

VSS[295] R2

VSS[296] R48

VSS[297] T12

VSS[298] T31

VSS[299] T37

VSS[300] T4

VSS[301] W34

VSS[302] T46

VSS[303] T47

VSS[304] T8

VSS[305] V11

VSS[306] V17

VSS[307] V26

VSS[308] V27

VSS[309] V29

VSS[310] V31

VSS[311] V36

VSS[312] V39

VSS[313] V43

VSS[314] V7

VSS[315] W17

VSS[316] W19

VSS[238]D34

VSS[239]D38

VSS[240]D42

VSS[241]D8

VSS[242]E18

VSS[243]E26

VSS[244]G18

VSS[245]G20

VSS[246]G26

VSS[247]G28

VSS[248]G36

VSS[249]G48

VSS[250]H12

VSS[251]H18

VSS[317] W2

VSS[318] W27

VSS[319] W48

VSS[320] Y12

VSS[321] Y38

VSS[322] Y4

VSS[323] Y42

VSS[324] Y46

VSS[325] Y8

VSS[328] BG29

VSS[329] N24

VSS[330] AJ3

VSS[287] N47

VSS[252]H22

VSS[253]H24

VSS[254]H26

VSS[255]H30

VSS[256]H32

VSS[257]H34

VSS[258]F3

VSS[262] K39

VSS[263] K46

VSS[259] H46

VSS[260] K18

VSS[261] K26

VSS[331] AD47

VSS[333] B43

VSS[334] BE10

VSS[335] BG41

VSS[337] G14

VSS[338] H16

VSS[340] T36

VSS[342] BG22

VSS[343] BG24

VSS[344] C22

VSS[345] AP13

VSS[172]F45

VSS[221]H10

VSS[346] M14

VSS[347] AP3

VSS[348] AP1

VSS[349] BE16

VSS[350] BC16

VSS[351] BG28

VSS[352] BJ28

U4H

COUGARPOINT_FCBGA989

U4H

COUGARPOINT_FCBGA989

VSS[1]AA17

VSS[2]AA2

VSS[3]AA3

VSS[5]AA34

VSS[6]AB11

VSS[7]AB14

VSS[8]AB39

VSS[9]AB4

VSS[10]AB43

VSS[11]AB5

VSS[12]AB7

VSS[13]AC19

VSS[14]AC2

VSS[15]AC21

VSS[16]AC24

VSS[17]AC33

VSS[18]AC34

VSS[19]AC48

VSS[20]AD10

VSS[21]AD11

VSS[22]AD12

VSS[23]AD13

VSS[24]AD19

VSS[25]AD24

VSS[26]AD26

VSS[27]AD27

VSS[28]AD33

VSS[29]AD34

VSS[30]AD36

VSS[31]AD37

VSS[33]AD39

VSS[34]AD4

VSS[35]AD40

VSS[36]AD42

VSS[37]AD43

VSS[38]AD45

VSS[39]AD46

VSS[43]AF10

VSS[44]AF12

VSS[46]AD16

VSS[47]AF16

VSS[48]AF19

VSS[49]AF24

VSS[50]AF26

VSS[51]AF27

VSS[52]AF29

VSS[53]AF31

VSS[54]AF38

VSS[55]AF4

VSS[56]AF42

VSS[57]AF46

VSS[59]AF7

VSS[60]AF8

VSS[61]AG19

VSS[62]AG2

VSS[63]AG31

VSS[64]AG48

VSS[65]AH11

VSS[66]AH3

VSS[67]AH36

VSS[68]AH39

VSS[69]AH40

VSS[70]AH42

VSS[71]AH46

VSS[72]AH7

VSS[73]AJ19

VSS[76]AJ33

VSS[77]AJ34

VSS[78]AK12

VSS[79]AK3

VSS[80] AK38

VSS[81] AK4

VSS[82] AK42

VSS[83] AK46

VSS[84] AK8

VSS[85] AL16

VSS[86] AL17

VSS[87] AL19

VSS[88] AL2

VSS[89] AL21

VSS[90] AL23

VSS[91] AL26

VSS[92] AL27

VSS[93] AL31

VSS[96] AL48

VSS[97] AM11

VSS[98] AM14

VSS[99] AM36

VSS[100] AM39

VSS[102] AM45

VSS[103] AM46

VSS[104] AM7

VSS[105] AN2

VSS[106] AN29

VSS[107] AN3

VSS[108] AN31

VSS[109] AP12

VSS[110] AP19

VSS[111] AP28

VSS[112] AP30

VSS[113] AP32

VSS[114] AP38

VSS[116] AP42

VSS[117] AP46

VSS[118] AP8

VSS[119] AR2

VSS[120] AR48

VSS[121] AT11

VSS[122] AT13

VSS[123] AT18

VSS[124] AT22

VSS[125] AT26

VSS[126] AT28

VSS[127] AT30

VSS[128] AT32

VSS[131] AT42

VSS[132] AT46

VSS[133] AT7

VSS[134] AU24

VSS[135] AU30

VSS[136] AV16

VSS[137] AV20

VSS[138] AV24

VSS[139] AV30

VSS[140] AV38

VSS[141] AV4

VSS[142] AV43

VSS[143] AV8

VSS[144] AW14

VSS[145] AW18

VSS[146] AW2

VSS[147] AW22

VSS[148] AW26

VSS[149] AW28

VSS[150] AW32

VSS[151] AW34

VSS[152] AW36

VSS[153] AW40

VSS[154] AW48

VSS[155] AV11

VSS[156] AY12

VSS[157] AY22

VSS[158] AY28

VSS[40]AD8

VSS[42]AE3

VSS[45]AD14

VSS[115] AP4

VSS[0]H5

VSS[58]AF5

VSS[32]AD38

VSS[4]AA33

VSS[74]AJ21

VSS[75]AJ24

VSS[41]AE2

VSS[129] AT34

VSS[130] AT39

VSS[101] AM43

VSS[95] AL34VSS[94] AL33

Page 23: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CLK_PCIE_VGACLK_PCIE_VGA#

PCIE_CRX_C_GTX_P4PCIE_CRX_C_GTX_N4 PCIE_CRX_GTX_N4

PCIE_CRX_GTX_P4

PCIE_CRX_C_GTX_P14PCIE_CRX_C_GTX_N14

PCIE_CRX_GTX_P14PCIE_CRX_GTX_N14

PCIE_CRX_C_GTX_P6PCIE_CRX_C_GTX_N6

PCIE_CRX_GTX_P6PCIE_CRX_GTX_N6

PCIE_CRX_C_GTX_P15PCIE_CRX_C_GTX_N15 PCIE_CRX_GTX_N15

PCIE_CRX_GTX_P15

PCIE_CRX_C_GTX_P10PCIE_CRX_C_GTX_N10 PCIE_CRX_GTX_N10

PCIE_CRX_GTX_P10

PCIE_CRX_C_GTX_P12PCIE_CRX_C_GTX_N12 PCIE_CRX_GTX_N12

PCIE_CRX_GTX_P12

PCIE_CRX_C_GTX_P13PCIE_CRX_C_GTX_N13 PCIE_CRX_GTX_N13

PCIE_CRX_GTX_P13

PCIE_CRX_C_GTX_P7PCIE_CRX_C_GTX_N7 PCIE_CRX_GTX_N7

PCIE_CRX_GTX_P7

PCIE_CRX_C_GTX_P11PCIE_CRX_C_GTX_N11 PCIE_CRX_GTX_N11

PCIE_CRX_GTX_P11

PCIE_CRX_C_GTX_P1PCIE_CRX_C_GTX_N1 PCIE_CRX_GTX_N1

PCIE_CRX_GTX_P1

PCIE_CRX_C_GTX_P0PCIE_CRX_C_GTX_N0

PCIE_CRX_GTX_P0PCIE_CRX_GTX_N0

PCIE_CRX_C_GTX_P5PCIE_CRX_C_GTX_N5 PCIE_CRX_GTX_N5

PCIE_CRX_GTX_P5

PCIE_CRX_C_GTX_P3PCIE_CRX_C_GTX_N3 PCIE_CRX_GTX_N3

PCIE_CRX_GTX_P3

PCIE_CRX_C_GTX_P8PCIE_CRX_C_GTX_N8 PCIE_CRX_GTX_N8

PCIE_CRX_GTX_P8

PCIE_CRX_C_GTX_P2PCIE_CRX_C_GTX_N2

PCIE_CRX_GTX_P2PCIE_CRX_GTX_N2

PCIE_CRX_C_GTX_P9PCIE_CRX_C_GTX_N9 PCIE_CRX_GTX_N9

PCIE_CRX_GTX_P9

PCIE_CTX_GRX_P5PCIE_CTX_GRX_N5

PCIE_CTX_GRX_P8PCIE_CTX_GRX_N8

PCIE_CTX_GRX_P11PCIE_CTX_GRX_N11

PCIE_CTX_GRX_P4PCIE_CTX_GRX_N4

PCIE_CTX_GRX_P7

PCIE_CTX_GRX_P12PCIE_CTX_GRX_N12

PCIE_CTX_GRX_N7

PCIE_CTX_GRX_P3PCIE_CTX_GRX_N3

PCIE_CTX_GRX_P13PCIE_CTX_GRX_N13

PCIE_CTX_GRX_P6PCIE_CTX_GRX_N6

PCIE_CTX_GRX_P2PCIE_CTX_GRX_N2

PCIE_CTX_GRX_P14PCIE_CTX_GRX_N14

PCIE_CTX_GRX_P1PCIE_CTX_GRX_N1

PCIE_CTX_GRX_P15PCIE_CTX_GRX_N15

PCIE_CTX_GRX_P0PCIE_CTX_GRX_N0

PCIE_CTX_GRX_P9PCIE_CTX_GRX_N9

PCIE_CTX_GRX_P10PCIE_CTX_GRX_N10

VGA_PWRGD

PCIE_CTX_GRX_P[15..0]

PCIE_CTX_GRX_N[15..0]

PCIE_CRX_GTX_P[15..0]

PCIE_CRX_GTX_N[15..0]

VGA_ENVDD

CLK_PCIE_VGA<15>CLK_PCIE_VGA#<15>

VGA_PWRGD<25>

PCIE_CTX_GRX_P[15..0]<5>

PCIE_CTX_GRX_N[15..0]<5>

PCIE_CRX_GTX_P[15..0] <5>

PCIE_CRX_GTX_N[15..0] <5>

VGA_ENVDD <31>

VGA_LVDS_ACLK <31>VGA_LVDS_ACLK# <31>

VGA_LVDS_A0 <31>VGA_LVDS_A0# <31>

VGA_LVDS_A1 <31>VGA_LVDS_A1# <31>

VGA_LVDS_A2 <31>VGA_LVDS_A2# <31>

VGA_RST#<18>

+1.0VGS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

RobsonXT-S3 PCIE/LVDSB

23 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

RobsonXT-S3 PCIE/LVDSB

23 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

RobsonXT-S3 PCIE/LVDSB

23 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

PCIE LANE

LVDS

C2870.1U_0402_10V7K C2870.1U_0402_10V7K12

C2810.1U_0402_10V7K C2810.1U_0402_10V7K12

C2760.1U_0402_10V7K C2760.1U_0402_10V7K 12

C2990.1U_0402_10V7K C2990.1U_0402_10V7K12

C2790.1U_0402_10V7K C2790.1U_0402_10V7K12

R296

10K_0402_5%

R296

10K_0402_5%1 2

C2750.1U_0402_10V7K C2750.1U_0402_10V7K12

R3002K_0402_5% R3002K_0402_5% 1 2

C2900.1U_0402_10V7K C2900.1U_0402_10V7K 12

LVTMDP

LVDS CONTROL

U8F

216-0774207-A11ROB_FCBGA631

LVTMDP

LVDS CONTROL

U8F

216-0774207-A11ROB_FCBGA631

DIGON AB12

TXCLK_LN_DPE3N AK14TXCLK_LP_DPE3P AL15

TXCLK_UN_DPF3N AJ19TXCLK_UP_DPF3P AH20

TXOUT_L0N_DPE2N AJ15TXOUT_L0P_DPE2P AH16

TXOUT_L1N_DPE1N AK16TXOUT_L1P_DPE1P AL17

TXOUT_L2N_DPE0N AJ17TXOUT_L2P_DPE0P AH18

TXOUT_L3N AK18TXOUT_L3P AL19

TXOUT_U0N_DPF2N AK20TXOUT_U0P_DPF2P AL21

TXOUT_U1N_DPF1N AJ21TXOUT_U1P_DPF1P AH22

TXOUT_U2N_DPF0N AK22TXOUT_U2P_DPF0P AL23

TXOUT_U3N AJ23TXOUT_U3P AK24

VARY_BL AB11

C2980.1U_0402_10V7K C2980.1U_0402_10V7K 12

C2840.1U_0402_10V7K C2840.1U_0402_10V7K 12

C2960.1U_0402_10V7K C2960.1U_0402_10V7K 12

C2890.1U_0402_10V7K C2890.1U_0402_10V7K12

C2950.1U_0402_10V7K C2950.1U_0402_10V7K12

C2970.1U_0402_10V7K C2970.1U_0402_10V7K12

C2860.1U_0402_10V7K C2860.1U_0402_10V7K 12

R29710K_0402_5%

R29710K_0402_5%

1 2

R2981.27K_0402_1% R2981.27K_0402_1% 1 2

C2940.1U_0402_10V7K C2940.1U_0402_10V7K 12

C3020.1U_0402_10V7K C3020.1U_0402_10V7K 12

C3030.1U_0402_10V7K C3030.1U_0402_10V7K12

C2880.1U_0402_10V7K C2880.1U_0402_10V7K 12

T48 PADT48 PAD

C2800.1U_0402_10V7K C2800.1U_0402_10V7K 12

C2910.1U_0402_10V7K C2910.1U_0402_10V7K12

PCI EXPRESS INTERFACE

CLOCK

CALIBRATION

U8A

216-0774207-A11ROB_FCBGA631

PCI EXPRESS INTERFACE

CLOCK

CALIBRATION

U8A

216-0774207-A11ROB_FCBGA631

PWRGOODN10 PCIE_CALRN AA22

PCIE_CALRP Y22

PCIE_REFCLKNAK32PCIE_REFCLKPAK30

PCIE_RX0NAE31PCIE_RX0PAF30

PCIE_RX10NR31PCIE_RX10PT30

PCIE_RX11NP28PCIE_RX11PR29

PCIE_RX12NN31PCIE_RX12PP30

PCIE_RX13NM28PCIE_RX13PN29

PCIE_RX14NL31PCIE_RX14PM30

PCIE_RX15NK30PCIE_RX15PL29

PCIE_RX1NAD28PCIE_RX1PAE29

PCIE_RX2NAC31PCIE_RX2PAD30

PCIE_RX3NAB28PCIE_RX3PAC29

PCIE_RX4NAA31PCIE_RX4PAB30

PCIE_RX5NY28PCIE_RX5PAA29

PCIE_RX6NW31PCIE_RX6PY30

PCIE_RX7NV28PCIE_RX7PW29

PCIE_RX8NU31PCIE_RX8PV30

PCIE_RX9NT28PCIE_RX9PU29

PERSTBAL27

PCIE_TX0N AG31PCIE_TX0P AH30

PCIE_TX10N U23PCIE_TX10P U24

PCIE_TX11N T27PCIE_TX11P T26

PCIE_TX12N T23PCIE_TX12P T24

PCIE_TX13N P26PCIE_TX13P P27

PCIE_TX14N P23PCIE_TX14P P24

PCIE_TX15N N26PCIE_TX15P M27

PCIE_TX1N AF28PCIE_TX1P AG29

PCIE_TX2N AF26PCIE_TX2P AF27

PCIE_TX3N AD26PCIE_TX3P AD27

PCIE_TX4N AB25PCIE_TX4P AC25

PCIE_TX5N Y24PCIE_TX5P Y23

PCIE_TX6N AB26PCIE_TX6P AB27

PCIE_TX7N Y26PCIE_TX7P Y27

PCIE_TX8N W23PCIE_TX8P W24

PCIE_TX9N U26PCIE_TX9P V27

C2720.1U_0402_10V7K C2720.1U_0402_10V7K12

C3010.1U_0402_10V7K C3010.1U_0402_10V7K12

C2770.1U_0402_10V7K C2770.1U_0402_10V7K12

C2730.1U_0402_10V7K C2730.1U_0402_10V7K 12

R29910K_0402_5%R29910K_0402_5%

12

C2740.1U_0402_10V7K C2740.1U_0402_10V7K 12

C2930.1U_0402_10V7K C2930.1U_0402_10V7K12

C2850.1U_0402_10V7K C2850.1U_0402_10V7K12

C2830.1U_0402_10V7K C2830.1U_0402_10V7K12

C2780.1U_0402_10V7K C2780.1U_0402_10V7K 12

C3000.1U_0402_10V7K C3000.1U_0402_10V7K 12

T49 PADT49 PAD

C2920.1U_0402_10V7K C2920.1U_0402_10V7K 12

C2820.1U_0402_10V7K C2820.1U_0402_10V7K 12

Page 24: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

THM_ALERT#

VGA_SMB_CK2_R

GPU_THERMAL_D-

GPU_THERMAL_D+ VGA_SMB_DA2_R

GPU_THERMAL_D+GPU_THERMAL_D-

GPU_GPIO0GPU_GPIO1GPU_GPIO2

GPU_GPIO9

GPU_GPIO12GPU_GPIO13

GPU_GPIO11

GPU_VID0

TEST_EN

GPIO25_TDIGPIO24_TRSTB

GPIO26_TCKGPIO27_TMSGPIO28_TDO

XTALIN

GPU_GPIO5

+DPC_VDD10

+DPC_VDD18

+DPC_VDD10

+DPC_VDD18

XTALOUT

+DPLL_VDDC

+DPLL_PVDD

VRAM_ID0VRAM_ID1VRAM_ID2

+AVDD

+VDD1DI

+VDD2DI

+A2VDD

+A2VDDQ

+AVDD

+VDD1DI

THM_ALERT#

+TSVDD

+TSVDD

XTALINXTALOUT

+VREFG_GPU

GPU_VID1

GPIO24_TRSTB

+DPC_VDD18

GPIO25_TDI

GPIO26_TCKGPIO27_TMS

+VREFG_GPU

+VDD2DI

+A2VDD

+A2VDDQ

GPU_GPIO9

GPU_GPIO13GPU_GPIO12

GPU_GPIO0

GPU_GPIO2GPU_GPIO1

GPU_GPIO11

GPU_GPIO8

PEG_CLKREQ#

VGA_SMB_DA2_R

VGA_SMB_CK2_R

VGA_CRT_R

VGA_CRT_G

VGA_CRT_B

VGA_HSYNCVGA_VSYNC

VGA_DDCDATAVGA_DDCCLK

VGA_HDMI_SCLVGA_HDMI_SDA

VGA_LVDS_SCLVGA_LVDS_SDA

+DPLL_VDDC

+DPLL_PVDD

VGA_SMB_CK2_RVGA_SMB_DA2_R

VGA_SMB_CK2_RVGA_SMB_DA2_R

VGA_CRT_R

VGA_CRT_G

VGA_CRT_B

VGA_ENBKLGPU_GPIO8

VGA_ENBKL

GPU_GPIO5

PX_EN

VGA_LVDS_SCLVGA_LVDS_SDA

VGA_HDMI_SCLVGA_HDMI_SDA

VGA_DDCCLKVGA_DDCDATA

VGA_HSYNCVGA_VSYNC

GPU_VID0<52>

ACIN<16,40,47>

GPU_VID1<52>

PX_EN<25>HDMI_DETECT_VGA<33>

PEG_CLKREQ#<15>

EC_SMB_DA2 <15,37,40>

EC_SMB_CK2 <15,37,40>

VGA_CRT_R <32>

VGA_CRT_G <32>

VGA_CRT_B <32>

VGA_HSYNC <32>VGA_VSYNC <32>

VGA_DDCDATA <32>VGA_DDCCLK <32>

VGA_HDMI_SDA <33>VGA_HDMI_SCL <33>

VGA_HDMI_CLK+ <33>VGA_HDMI_CLK- <33>

VGA_HDMI_TX0+ <33>VGA_HDMI_TX0- <33>

VGA_HDMI_TX1+ <33>VGA_HDMI_TX1- <33>

VGA_HDMI_TX2+ <33>VGA_HDMI_TX2- <33>

VGA_LVDS_SCL <31>VGA_LVDS_SDA <31>

VGA_ENBKL<31>

VRAM_ID2<29>VRAM_ID1<29>VRAM_ID0<29>

+3VGS

+1.8VGS

+DPLL_VDDC

+1.8VGS

+1.8VGS

+1.8VGS

+3VGS

+1.8VGS

+DPLL_PVDD

+3VGS

+1.8VGS

+1.0VGS

+3VGS

+3VGS

+1.8VGS

+3VGS

+3VGS

+3VGS

+3VGS

+DPC_VDD10

+DPC_VDD18

+DPC_VDD18

+DPC_VDD18

+DPC_VDD10

+1.8VGS +DPLL_PVDD

+DPLL_VDDC+1.0VGS

+TSVDD

+TSVDD

+A2VDDQ

+A2VDDQ

+A2VDD

+VDD2DI

+VDD1DI

+AVDD

+AVDD

+VDD1DI

+VDD2DI

+A2VDD

+3VGS

+3VGS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

RobsonXT-S3 Main Generic/MSICC

24 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

RobsonXT-S3 Main Generic/MSICC

24 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

RobsonXT-S3 Main Generic/MSICC

24 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

VGA Thermal Sensor EMC1402-1 Closed to GPU

AUD[1] AUD[0]0 0 No audio function0 1 Audio for DisplayPort and HDMI if dongle is detected1 0 Audio for DisplayPort only1 1 Audio for both DisplayPort and HDMI

HSYNCAUD[1]

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESEGPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

ENABLE EXTERNAL BIOS ROM

GPIO0 PCIE FULL TX OUTPUT SWINGTX_PWRS_ENB

GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS ENABLED

GPIO9 VGA ENABLEDBIF_VGA DIS

VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS

GPIO_22_ROMCSB

GPIO2

STRAPS

RESERVED

DESCRIPTION OF DEFAULT SETTINGSPIN

GPIO[13:11]ROMIDCFG(2:0)

RECOMMENDED SETTINGS

RSVD

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT

CONFIGURATION STRAPS

BIOS_ROM_EN

VSYNCAUD[0]

H2SYNC

GPIO8

GPIO21

GENERICC

X

X

0

0

0

0

11

X

XXX

0

0

0

H2SYNC GENERICC

AMD RESERVED CONFIGURATION STRAPSALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INSTALLRESISTOR. IF THESE GPIOS ARE USED, THEY MUST KEEP "LOW" ANDNOT CONFLICT DURING RESET

RECOMMENDED SETTINGS 0= DO NOT INSTALL RESISTOR 1 = INSTALL 10K RESISTOR X = DESIGN DEPENDANT NA = NOT APPLICABLE

110mA

150mA

0.60 V level, PleaseVREFG Divider anscap close to ASIC

XTALINVoltage Swing: 1.8 V

TX_PWRS_ENB GPIO0Transmitter Power Saving Enable0: 50% Tx output swing for mobile mode1: full Tx output swing (Default setting for Desktop)

GPIO1TX_DEEMPH_ENPCI Express Transmitter De-emphasis Enable0: Tx de-emphasis diabled for mobile mode1: Tx de-emphasis enabled (Defailt setting for desktop)

EMC1412-A (SA00003YA00)Address 1111_100xbS IC EMC1412-A-ACZL-TR MSOP 8P SENSOR

GPIO21 GPIO2 GPIO8

RSVD RESERVED

RSVD RESERVED

RSVD

RSVD

STRAPS

75mA

125mA

20mA

65mA

110mA

2mA

100mA

130mA

SD013000080

8/5 Add For DIS HDMI audio strap

8/13 update to @

8/14 change P/N toDMN66D0LDW-7_SOT363-6(SB00000DH00)

Change to 0 ohmP/N

Change to 0 ohmP/N

Change to 0 ohmP/N

Change to 0 ohmP/N

Change to 0 ohmP/N

Change to 0 ohmP/N

Change to 0 ohmP/N

T52T52

T51T51

R621 10K_0402_5%DIS@R621 10K_0402_5%DIS@ 12

R54

115

0_04

02_1

%R

541

150_

0402

_1%

12

T63T63

C33818P_0402_50V8J

C33818P_0402_50V8J

C33

60.

1U_0

402_

16V

4Z@

C33

60.

1U_0

402_

16V

4Z@

1

2

L9

BLM15BD121SN1D_0402

L9

BLM15BD121SN1D_040212

C31

41U

_040

2_6.

3V4Z

C31

41U

_040

2_6.

3V4Z1

2

C31

210

U_0

603_

6.3V

6MC

312

10U

_060

3_6.

3V6M1

2

T58T58

R32810K_0402_5%R32810K_0402_5%

12

C322 0.1U_0402_10V6KC322 0.1U_0402_10V6K12

R313 10K_0402_5%@R313 10K_0402_5%@ 12

R714 10K_0402_5%DIS_HDMI@R714 10K_0402_5%DIS_HDMI@12

C33

11U

_040

2_6.

3V4Z

C33

11U

_040

2_6.

3V4Z1

2

R712 10K_0402_5%DIS@R712 10K_0402_5%DIS@ 12

R6134.7K_0402_5%

R6134.7K_0402_5%1 2

D3CH751H-40PT_SOD323-2 @D3CH751H-40PT_SOD323-2 @21

T70T70

R321 10K_0402_5%R321 10K_0402_5%1 2

T50T50

R31

815

0_04

02_1

%R

318

150_

0402

_1%

12

R335

4.7K_0402_5%

@

R335

4.7K_0402_5%

@

1 2

T53T53

L15

BLM15BD121SN1D_0402

L15

BLM15BD121SN1D_04021 2

R548 10K_0402_5%DIS@R548 10K_0402_5%DIS@1 2

L17

0_0603 5%

L17

0_0603 5%

C3290.1U_0402_16V4Z

C3290.1U_0402_16V4Z

1

2

C32

310

U_0

603_

6.3V

6MC

323

10U

_060

3_6.

3V6M1

2

C30

81U

_040

2_6.

3V4Z

C30

81U

_040

2_6.

3V4Z1

2

R332 0_0402_5%R332 0_0402_5%12

T54T54

R324 10K_0402_5%R324 10K_0402_5%1 2

R549 10K_0402_5%DIS@R549 10K_0402_5%DIS@1 2

R330715_0402_1%R330715_0402_1%

1 2

L8

BLM15BD121SN1D_0402

L8

BLM15BD121SN1D_040212

C31

00.

1U_0

402_

10V

6KC

310

0.1U

_040

2_10

V6K1

2

L14

BLM15BD121SN1D_0402

L14

BLM15BD121SN1D_040212

C32

810

U_0

603_

6.3V

6MC

328

10U

_060

3_6.

3V6M1

2

R32

015

0_04

02_1

%R

320

150_

0402

_1%

12

T64T64

R32710K_0402_5%

R32710K_0402_5%

12

L17

BLM18AG121SN1D_0603

@L17

BLM18AG121SN1D_0603

@

12

Q64B2N7002DW-T/R7_SOT363-6

Q64B2N7002DW-T/R7_SOT363-6

3

5

4

DPA

DPB

DVO

I2C

GENERAL PURPOSE I/O

DAC1

DAC2

DDC/AUX

THERMAL

PLL/CLOCK

DPC

U8B

216-0774207-A11ROB_FCBGA631

DPA

DPB

DVO

I2C

GENERAL PURPOSE I/O

DAC1

DAC2

DDC/AUX

THERMAL

PLL/CLOCK

DPC

U8B

216-0774207-A11ROB_FCBGA631

DMINUST2

DPLL_PVDDAF14

DPLL_PVSSAE14

DPLL_VDDCAD14

DPLUST4

DPC_VSSR#1U1

DVDATA_7AC7

TX2M_DPC0N Y2

TXCCM_DPC3N U5

DPC_VSSR#5AA1

TX1P_DPC1P Y4

DVDATA_0Y7

TX0M_DPC2N V2

DPC_VDD18#1AC6

DPC_PVDDW6

DVDATA_9AD7

TX2P_DPC0P AA3

DVDATA_8AC8

DPC_VDD10#1AA5

DVDATA_12AE8

DPC_VDD10#2AA6

DVCNTL_0AE9

DVDATA_3AB4

DVDATA_1Y8

DVDATA_11AD9

DVDATA_2AB2

DVDATA_10AC10

DPC_VDD18#2AC5

TXCCP_DPC3P V4

DVDATA_4AB7

DPC_VSSR#2W1

DVDATA_5AB8

TX0P_DPC2P W3

DVDATA_6AB9

TX1M_DPC1N W5

GENERICAAB13

GENERICBW8

GENERICCW9

GENERICDW7

GENERICE_HPD4AD10

GPIO_0U6

GPIO_1U10

GPIO_10_ROMSCKP2

GPIO_11N6

GPIO_12N5

GPIO_13N3

GPIO_14_HPD2Y9

GPIO_15_PWRCNTL_0N1

GPIO_16_SSINM4

GPIO_17_THERMAL_INTR6

GPIO_18_HPD3W10

GPIO_19_CTFM2

GPIO_2T10

GPIO_20_PWRCNTL_1P8

GPIO_21_BB_ENP7

GPIO_22_ROMCSBN8

GPIO_23_CLKREQBN7

GPIO_3_SMBDATAU8

GPIO_4_SMBCLKU7

GPIO_5_AC_BATTT9

GPIO_6T8

GPIO_7_BLONT7

GPIO_8_ROMSOP10

GPIO_9_ROMSIP4

H2SYNC AL13

HPD1AC14

HSYNC AH26

JTAG_TCKL3JTAG_TDIL5

JTAG_TDOK4JTAG_TMSL1

JTAG_TRSTBL6

DDCDATA_AUX3N AC20DDCCLK_AUX3P AD20

TS_FDOR5

TSVDDAD17

TSVSSAC17

VREFGAC16

VSS1DI AD23

VSS2DI AC19

XTALINAM28

XTALOUTAK28

A2VDD AE20

A2VDDQ AE17

A2VSSQ AE19

AUX1N AD4AUX1P AD2

AUX2N AD11AUX2P AD13

AVDD AG24

AVSSQ AE22

B AH24

B2 AK10

B2B AL9

BB AG25

C AH12

COMP AJ9

DDC1CLK AE6

DDC1DATA AE5

DDC2CLK AC11

DDC2DATA AC13

DDC6CLK AC1

DDC6DATA AC3

DDCDATA_AUX5N AD16DDCCLK_AUX5P AE16

G AL25

G2 AL11

G2B AJ11

GB AJ25

R AM26

R2 AM12

R2B AK12

R2SET AG13

RB AK26

RSET AD22

SCLR1

SDAR3

TX0M_DPA2N AG5TX0P_DPA2P AG3

TX1M_DPA1N AH1TX1P_DPA1P AH3

TX2M_DPA0N AK1TX2P_DPA0P AK3

TX3M_DPB2N AM5TX3P_DPB2P AK6

TX4M_DPB1N AH6TX4P_DPB1P AJ7

TX5M_DPB0N AL7TX5P_DPB0P AK8

TXCAM_DPA3N AF4TXCAP_DPA3P AF2

TXCBM_DPB3N AM3TXCBP_DPB3P AK5

V2SYNC AJ13

VDD1DI AE23

VDD2DI AD19

VSYNC AJ27

Y AM10

XO_IN2AB22XO_INAC22

TESTEN_LEGACYAF24

DVCNTL_2N9

DPC_VSSR#3U3

DPC_PVSSV6

DPC_VSSR#4Y6

DVCNTL_1L9

DVCLKY11

DPC_CALR J8

PX_ENAB16

TESTENK7

T59T59

T55T55

C33

51U

_040

2_6.

3V4Z

@C

335

1U_0

402_

6.3V

4Z@

1

2

C30

410

U_0

603_

6.3V

6MC

304

10U

_060

3_6.

3V6M1

2

R322 10K_0402_5%R322 10K_0402_5%1 2

C30

710

U_0

603_

6.3V

6MC

307

10U

_060

3_6.

3V6M1

2

R316 10K_0402_5%@R316 10K_0402_5%@ 12

R310 10K_0402_5%R310 10K_0402_5%12

T56T56

C30

60.

1U_0

402_

10V

6KC

306

0.1U

_040

2_10

V6K1

2

R315 10K_0402_5%R315 10K_0402_5%12

R426 10K_0402_5%DIS@R426 10K_0402_5%DIS@ 12

R32610K_0402_5%R32610K_0402_5%

12

R329 499_0402_1%R329 499_0402_1%12

C31

60.

1U_0

402_

10V

6KC

316

0.1U

_040

2_10

V6K1

2

R323 10K_0402_5%R323 10K_0402_5%1 2

R3364.7K_0402_5%

R3364.7K_0402_5%

12

R308 10K_0402_5%@R308 10K_0402_5%@ 12

C32

71U

_040

2_6.

3V4Z

C32

71U

_040

2_6.

3V4Z1

2

C31

30.

1U_0

402_

10V

6KC

313

0.1U

_040

2_10

V6K1

2

T57T57

R713 10K_0402_5%DIS_HDMI@R713 10K_0402_5%DIS_HDMI@12

R711 10K_0402_5%DIS@R711 10K_0402_5%DIS@ 12

C32

01U

_040

2_6.

3V4Z

C32

01U

_040

2_6.

3V4Z1

2

C30

90.

1U_0

402_

10V

6KC

309

0.1U

_040

2_10

V6K1

2

R305150_0402_1%

R305150_0402_1%1 2

L12

BLM15BD121SN1D_0402

L12

BLM15BD121SN1D_04021 2

L10

BLM15BD121SN1D_0402

L10

BLM15BD121SN1D_04021 2

C33

20.

1U_0

402_

10V

6KC

332

0.1U

_040

2_10

V6K1

2

R66210K_0402_5%

@

R66210K_0402_5%

@

1 2

R3371M_0603_5%

R3371M_0603_5%

C31

510

U_0

603_

6.3V

6MC

315

10U

_060

3_6.

3V6M1

2

L13

BLM15BD121SN1D_0402

L13

BLM15BD121SN1D_04021 2

R306 4.7K_0402_5%@ R306 4.7K_0402_5%@ 1 2

Q64A2N7002DW-T/R7_SOT363-6

Q64A2N7002DW-T/R7_SOT363-6

61

2

L11

BLM15BD121SN1D_0402

L11

BLM15BD121SN1D_04021 2

R317 10K_0402_5%@R317 10K_0402_5%@ 12

C31

810

U_0

603_

6.3V

6MC

318

10U

_060

3_6.

3V6M1

2

C32

50.

1U_0

402_

10V

6KC

325

0.1U

_040

2_10

V6K1

2

C31

11U

_040

2_6.

3V4Z

C31

11U

_040

2_6.

3V4Z1

2

C33

410

U_0

603_

6.3V

6M@

C33

410

U_0

603_

6.3V

6M@

1

2C

319

0.1U

_040

2_10

V6K

C31

90.

1U_0

402_

10V

6K1

2

U9

EMC1402-2-ACZL-TR MSOP 8P

U9

EMC1402-2-ACZL-TR MSOP 8P

VDD1

ALERT# 6

THERM#4 GND 5

D+2

D-3

SCLK 8

SDATA 7

Y3

27MHZ_16PF_X5H027000FG1H

Y3

27MHZ_16PF_X5H027000FG1H

2 1

T65T65

C33

010

U_0

603_

6.3V

6MC

330

10U

_060

3_6.

3V6M1

2

R319 10K_0402_5%R319 10K_0402_5%1 2

C32

110

U_0

603_

6.3V

6MC

321

10U

_060

3_6.

3V6M1

2

C33718P_0402_50V8J

C33718P_0402_50V8J

C32

60.

1U_0

402_

10V

6KC

326

0.1U

_040

2_10

V6K1

2

L16

BLM15BD121SN1D_0402

L16

BLM15BD121SN1D_040212

R309 10K_0402_5%@R309 10K_0402_5%@ 12

R314 10K_0402_5%@R314 10K_0402_5%@ 12

C3332200P_0402_50V7K

C3332200P_0402_50V7K

1 2

R333 0_0402_5%R333 0_0402_5%12

R311 10K_0402_5%R311 10K_0402_5%12

R307 4.7K_0402_5%@ R307 4.7K_0402_5%@ 1 2

R334 2.61K_0402_5%R334 2.61K_0402_5%1 2

R312499_0402_1%R312499_0402_1%

1 2

T62T62T61T61

C31

71U

_040

2_6.

3V4Z

C31

71U

_040

2_6.

3V4Z1

2

C30

51U

_040

2_6.

3V4Z

C30

51U

_040

2_6.

3V4Z1

2

C32

41U

_040

2_6.

3V4Z

C32

41U

_040

2_6.

3V4Z1

2

R331 249_0402_1%R331 249_0402_1%12

T60T60

Page 25: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

1.0V_ON#

VGA_CORE_PG

1.0V_ON#

VDDC_ON#

RUNPWROKPE_GPIO1

VGA_PWRGD

PX_MODE

PX_MODE

VDDC_ON#

PX_EN<24>

VGA_CORE_PG<52>

PX_MODE <26,52>

PE_GPIO1<15,18,26,52>

VGA_PWRGD <23>

+3VGS

+1.0VGS

+VGA_CORE

+BIF_VDDC

+5VS+5VS

+VGA_CORE

+3VS

+3VGS

+3VGS

+3VGS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.1

PARK-S3 Main Generic/MSICB

25 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.1

PARK-S3 Main Generic/MSICB

25 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.1

PARK-S3 Main Generic/MSICB

25 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Add when verify BACO

9/28 modify to AO3414

D28 with leakage need to check

Change footprint20100814

Change footprint20100814

Change footprint20100814

G

D

S

Q682N7002H_SOT23-3

BACO@

G

D

S

Q682N7002H_SOT23-3

BACO@

21

3

R8730_0402_5% BACO@

R8730_0402_5% BACO@

12

C33

9

0.1U

_040

2_10

V6K

@

C33

9

0.1U

_040

2_10

V6K

@

1

2

R61210K_0402_5%

BACO@

R61210K_0402_5%

BACO@

1 2

C34

30.

1U_0

402_

10V

6KB

AC

O@

C34

30.

1U_0

402_

10V

6KB

AC

O@

1

2

G

DS

Q69AO3414_SOT23-3

BACO@G

DS

Q69AO3414_SOT23-3

BACO@

1

2

3

R689

0_0402_5%@

R689

0_0402_5%@1 2

G

D

S

Q662N7002H_SOT23-3

BACO@

G

D

S

Q662N7002H_SOT23-3

BACO@

2

13

R3410_0402_5%BACO@

R3410_0402_5%BACO@

1 2

R340

10K_0402_5%@

R340

10K_0402_5%@

1 2

U40SN74LVC1G07DCKR_SC70-5

@

U40SN74LVC1G07DCKR_SC70-5

@

NC1

A2 G3

Y 4

P5

U37

MC74VHC1G08DFT2G SC70 5PBACO@

U37

MC74VHC1G08DFT2G SC70 5PBACO@

B2

A1Y 4

P5

G3 R342

0_0402_5%DIS@

R3420_0402_5%

DIS@

1 2

C7321U_0603_10V4Z

@

C7321U_0603_10V4Z

@

1

2

C382

0.1U_0402_10V6K @

C382

0.1U_0402_10V6K @1 2

G

D S

Q70AO3414_SOT23-3

BACO@

G

D S

Q70AO3414_SOT23-3

BACO@

1

2

3

C731

0.1U_0402_10V6K@

C731

0.1U_0402_10V6K@

1 2

C3860.1U_0402_10V6K

@

C3860.1U_0402_10V6K

@

1

2

R33910K_0402_5%

BACO@

R33910K_0402_5%

BACO@

12

G

D S

Q72AO3414_SOT23-3

BACO@

G

D S

Q72AO3414_SOT23-3

BACO@

1

2

3

R692

0_0402_5%

@ R692

0_0402_5%

@1 2 G

D

S

Q672N7002H_SOT23-3

BACO@

G

D

S

Q672N7002H_SOT23-3

BACO@

2

13

G

DS

Q71AO3414_SOT23-3

BACO@G

DS

Q71AO3414_SOT23-3

BACO@

1

2

3

D28CH751H-40PT_SOD323-2

BACO@

D28CH751H-40PT_SOD323-2

BACO@

21

R33810K_0402_5%

BACO@

R33810K_0402_5%

BACO@

12

U10

MC74VHC1G08DFT2G SC70 5P

BACO@U10

MC74VHC1G08DFT2G SC70 5P

BACO@B2

A1Y 4

P5

G3

R87220K_0402_5%

BACO@R872

20K_0402_5%

BACO@

12

Page 26: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PE_GPIO1#

PE_GPIO1#

PX_MODE#

PE_GPIO1#PE_GPIO1#

PX_MODE#

PE_GPIO1#

PE_GPIO1#

PE_GPIO1#PE_GPIO1

PE_GPIO1

PE_GPIO1#

PX_MODE

PX_MODE#

PE_GPIO1

PE_GPIO1<15,18,25,52>

PX_MODE<25,52>

SUSP#<10,40,44,49,51,52>

+1.8VS +1.8VGS

+VSB

+1.5V +1.5VGS

+VSB

+VGA_PCIE +1.0VGS

+VSB

+3VS +3VGS

+5VALW

+3VALW+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.1

PARK-S3 Main Generic/MSICCustom

26 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.1

PARK-S3 Main Generic/MSICCustom

26 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.1

PARK-S3 Main Generic/MSICCustom

26 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

+1.8VS TO +1.8VGS

+1.5VS TO +1.5VGS

Add when verify BACO

Short J2 for control sequence at PWM

+VGA_PCIE TO +1.0VGS

+3.3VS TO +3.3VGS

Change footprint20100814

Change footprint20100814

Change footprint20100814

Change footprint20100814

Change footprint20100814

Change footprint20100814

Change footprint20100814

Change footprint20100814

Change footprint20100814

Change footprint20100814

R641

20K_0402_5%

R641

20K_0402_5%

C375

10U_0805_10V4Z

C375

10U_0805_10V4Z

1

2

G

D

S

Q86

2N7002H_SOT23-3

G

D

S

Q86

2N7002H_SOT23-3

2

13

C376

10U_0805_10V4Z

C376

10U_0805_10V4Z

1

2

C3440.1U_0603_25V7KC3440.1U_0603_25V7K

1

2

R688

20K_0402_5%

R688

20K_0402_5%

C368

1U_0603_10V4Z

C368

1U_0603_10V4Z

1

2

R3520_0402_5%R3520_0402_5%

1 2G

D

S

Q852N7002H_SOT23-3

@G

D

S

Q852N7002H_SOT23-3

@

2

13

R719100K_0402_5%

R719100K_0402_5%

12

R34420K_0402_5%R34420K_0402_5%

J52MM

@

J52MM

@

2 1

C377

1U_0603_10V4Z

C377

1U_0603_10V4Z

1

2

R681

0_0402_5%@

R681

0_0402_5%@1 2

R343470_0603_5%@

R343470_0603_5%@

12

C34610U_0805_10V4Z

@

C34610U_0805_10V4Z

@

1

2

R345

200K_0402_1%

R345

200K_0402_1%1 2

R676100K_0402_5%

R676100K_0402_5%

12

C34910U_0805_10V4ZC34910U_0805_10V4Z

1

2

R680

0_0402_5%@

R680

0_0402_5%@1 2

C7300.1U_0603_25V7K

@

C7300.1U_0603_25V7K

@

1

2

U11DMN3030LSS-13_SOP8L-8

U11DMN3030LSS-13_SOP8L-8

365

78

2

4

1

R3460_0402_5%@

R3460_0402_5%@

12

U14DMN3030LSS-13_SOP8L-8

@U14DMN3030LSS-13_SOP8L-8

@

365

78

2

4

1

G

D

S

Q732N7002H_SOT23-3

@G

D

S

Q732N7002H_SOT23-3

@

2

13

C3510.1U_0603_25V7KC3510.1U_0603_25V7K

1

2

R640

20K_0402_5%@

R640

20K_0402_5%@

R348470_0603_5%@

R348470_0603_5%@

12

Q121DTC124EKAT146_SC59-3

Q121DTC124EKAT146_SC59-3

IN2

OU

T1

GN

D3

G

D

S

Q762N7002H_SOT23-3

@G

D

S

Q762N7002H_SOT23-3

@

2

13

J42MM

@

J42MM

@2 1

G

D

S

Q74

2N7002H_SOT23-3

G

D

S

Q74

2N7002H_SOT23-3

2

13

J22MM

@

J22MM

@

2 1

G

D

S

Q772N7002H_SOT23-3

@G

D

S

Q772N7002H_SOT23-3

@

2

13

C34810U_0805_10V4ZC34810U_0805_10V4Z

1

2

J32MM @J32MM @

2 1

C3520.1U_0603_25V7KC3520.1U_0603_25V7K

1

2

R686470_0603_5%@

R686470_0603_5%@

12

G

D

S

Q872N7002H_SOT23-3

G

D

S

Q872N7002H_SOT23-3

2

13

C34110U_0805_10V4ZC34110U_0805_10V4Z

1

2

C3501U_0603_10V4ZC3501U_0603_10V4Z

1

2

Q65AP2301GN-HF_SOT23-3

Q65AP2301GN-HF_SOT23-32

3 1

U13

DMN3030LSS-13_SOP8L-8

U13

DMN3030LSS-13_SOP8L-8

365

78

2

4

1

R677

0_0402_5%

BACO@R677

0_0402_5%

BACO@

1 2

R674

0_0402_5%DIS@

R674

0_0402_5%DIS@1 2

R3540_0402_5%@

R3540_0402_5%@

12

C34010U_0805_10V4ZC34010U_0805_10V4Z

1

2

R744

0_0402_5%

DIS@

R744

0_0402_5%

DIS@

1 2

R718100K_0402_5%

R718100K_0402_5%

12

R687

0_0402_5%

@R687

0_0402_5%

@

1 2

R664470_0603_5%

@

R664470_0603_5%

@

12

G

D

S

Q752N7002H_SOT23-3

@G

D

S

Q752N7002H_SOT23-3

@

2

13

G

D

S

Q78

2N7002H_SOT23-3

G

D

S

Q78

2N7002H_SOT23-3

2

13

R350330K_0402_5%R350330K_0402_5%

12

C3421U_0603_10V4ZC3421U_0603_10V4Z

1

2

Page 27: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+DPAB_VDD18

+DPAB_VDD10

+DPAB_VDD18+DPEF_VDD18

+DPEF_VDD18

+DPAB_VDD18

+DPAB_VDD18

+1.8VGS

+1.0VGS

+1.0VGS

+1.8VGS+DPAB_VDD18

+DPAB_VDD18

+DPAB_VDD10

+DPAB_VDD10

+DPAB_VDD18

+DPAB_VDD18

+DPEF_VDD18

+DPEF_VDD10

+DPEF_VDD18

+DPEF_VDD18

+DPEF_VDD18

+DPEF_VDD10

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

RobsonXT-S3 DP PWRB

27 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

RobsonXT-S3 DP PWRB

27 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

RobsonXT-S3 DP PWRB

27 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

total:300mA

130mA

130mA

110mA

110mA

20mA

20mA20mA

20mA

total:220mA

total:440mA@LVDStotal:300mA@DP

total:240mA@LVDStotal:220mA@DP

Change to 0 ohmP/N

Change to 0 ohmP/N

Change to 0 ohmP/N

Change to 0 ohmP/N

C36

10.

1U_0

402_

10V

6KC

361

0.1U

_040

2_10

V6K1

2

R356150_0402_1%

R356150_0402_1%

1 2

L20

MBK1608121YZF_0603

L20

MBK1608121YZF_0603

12

C36

01U

_040

2_6.

3V4Z

C36

01U

_040

2_6.

3V4Z1

2

R355

150_0402_1%

R355

150_0402_1%12

C35

81U

_040

2_6.

3V4Z

C35

81U

_040

2_6.

3V4Z1

2

L19

MBK1608121YZF_0603

L19

MBK1608121YZF_0603

12

C36

410

U_0

603_

6.3V

6MC

364

10U

_060

3_6.

3V6M1

2

DP PLL POWER

DP A/B POWERDP E/F POWER

U8G

216-0774207-A11ROB_FCBGA631

DP PLL POWER

DP A/B POWERDP E/F POWER

U8G

216-0774207-A11ROB_FCBGA631

DPA_PVDD AG8

DPA_PVSS AG7

DPA_VDD10#1 AF6

DPA_VDD10#2 AF7

DPA_VDD18#1 AE11

DPA_VDD18#2 AF11

DPA_VSSR#1 AE1

DPA_VSSR#2 AE3

DPA_VSSR#3 AG1

DPA_VSSR#4 AG6

DPA_VSSR#5 AH5

DPAB_CALR AE10

DPB_PVDD AG10

DPB_PVSS AG11

DPB_VDD10#1 AF8

DPB_VDD10#2 AF9

DPB_VSSR#1 AF10

DPB_VSSR#2 AG9

DPB_VSSR#3 AH8

DPB_VSSR#4 AM6

DPB_VSSR#5 AM8

DPB_VDD18#1 AE13

DPB_VDD18#2 AF13

DPE_PVDDAG18

DPE_PVSSAF19

DPE_VDD10#1AG20

DPE_VDD10#2AG21

DPE_VDD18#1AG15

DPE_VDD18#2AG16

DPE_VSSR#1AG14

DPE_VSSR#2AH14

DPE_VSSR#3AM14

DPE_VSSR#4AM16

DPE_VSSR#5AM18

DPEF_CALRAF17

DPF_PVDDAG19

DPF_PVSSAF20

DPF_VDD10#1AF22

DPF_VDD10#2AG22

DPF_VDD18#1AF16

DPF_VDD18#2AG17

DPF_VSSR#1AF23

DPF_VSSR#2AG23

DPF_VSSR#3AM20

DPF_VSSR#4AM22

DPF_VSSR#5AM24

L18

MBK1608121YZF_0603

L18

MBK1608121YZF_0603

12

C35

70.

1U_0

402_

10V

6KC

357

0.1U

_040

2_10

V6K1

2

C35

310

U_0

603_

6.3V

6MC

353

10U

_060

3_6.

3V6M1

2

C35

910

U_0

603_

6.3V

6MC

359

10U

_060

3_6.

3V6M1

2

C35

610

U_0

603_

6.3V

6MC

356

10U

_060

3_6.

3V6M1

2

C36

20.

1U_0

402_

10V

6KC

362

0.1U

_040

2_10

V6K1

2

L21

MBK1608121YZF_0603

L21

MBK1608121YZF_0603

1 2

C35

50.

1U_0

402_

10V

6KC

355

0.1U

_040

2_10

V6K1

2

C36

31U

_040

2_6.

3V4Z

C36

31U

_040

2_6.

3V4Z1

2

C35

41U

_040

2_6.

3V4Z

C35

41U

_040

2_6.

3V4Z1

2

Page 28: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+PCIE_VDDR

+SPV10

+MPV18

+SPV18

+1.8VGS

+VGA_CORE

+VGA_CORE

+1.8VGS +VDDC_CT

+3VGS

+1.0VGS

+1.0VGS

+1.5VGS

+PCIE_VDDR

+1.8VGS

+VDDCI

+BIF_VDDC

+VGA_CORE

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

RobsonXT-S3 PWR/GNDC

28 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

RobsonXT-S3 PWR/GNDC

28 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

RobsonXT-S3 PWR/GNDC

28 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

504mA

1920mA

2.3A(RMS)/2.8A(Peak)

11.8A(RMS)/12.9A(Peak)17mA

60mA

170mA

For Seymour, PCIE_PVDD is PCIE_VDDR.

75mA

75mA

120mA

110mA

7/22 modify

9/28 Reserved for VGA_CORE10/8 change to B2 size

Change to 0 ohmP/N

Change to 0 ohmP/N

Change to 0 ohmP/N

C44

71U

_040

2_6.

3V4Z

C44

71U

_040

2_6.

3V4Z1

2

C38

71U

_040

2_6.

3V4Z

C38

71U

_040

2_6.

3V4Z1

2C

405

1U_0

402_

6.3V

4ZC

405

1U_0

402_

6.3V

4Z1

2

C39

10.

1U_0

402_

10V

6KC

391

0.1U

_040

2_10

V6K1

2

C38

31U

_040

2_6.

3V4Z

C38

31U

_040

2_6.

3V4Z1

2

C45

310

U_0

603_

6.3V

6MC

453

10U

_060

3_6.

3V6M1

2

C40

31U

_040

2_6.

3V4Z

C40

31U

_040

2_6.

3V4Z1

2

C41

91U

_040

2_6.

3V4Z

C41

91U

_040

2_6.

3V4Z1

2

C41

51U

_040

2_6.

3V4Z

C41

51U

_040

2_6.

3V4Z1

2

C42

310

U_0

603_

6.3V

6MC

423

10U

_060

3_6.

3V6M1

2

C41

31U

_040

2_6.

3V4Z

C41

31U

_040

2_6.

3V4Z1

2

C40

910

U_0

603_

6.3V

6MC

409

10U

_060

3_6.

3V6M1

2

C38

10.

1U_0

402_

10V

6KC

381

0.1U

_040

2_10

V6K1

2

C40

80.

1U_0

402_

10V

6KC

408

0.1U

_040

2_10

V6K1

2

C37

11U

_040

2_6.

3V4Z

C37

11U

_040

2_6.

3V4Z1

2

C43

00.

1U_0

402_

10V

6KC

430

0.1U

_040

2_10

V6K

1

2

C41

81U

_040

2_6.

3V4Z

C41

81U

_040

2_6.

3V4Z1

2

C41

71U

_040

2_6.

3V4Z

C41

71U

_040

2_6.

3V4Z1

2

C46

610

U_0

603_

6.3V

6MC

466

10U

_060

3_6.

3V6M1

2

C41

41U

_040

2_6.

3V4Z

C41

41U

_040

2_6.

3V4Z1

2

C38

90.

1U_0

402_

10V

6KC

389

0.1U

_040

2_10

V6K1

2

GND

U8E

216-0774207-A11ROB_FCBGA631

GND

U8E

216-0774207-A11ROB_FCBGA631

PCIE_VSS#1AA27

PCIE_VSS#10AF32

PCIE_VSS#11AG27

PCIE_VSS#12AH32

PCIE_VSS#13K28

PCIE_VSS#14K32

PCIE_VSS#15L27

PCIE_VSS#16M32

PCIE_VSS#17N25

PCIE_VSS#18N27

PCIE_VSS#19P25

PCIE_VSS#2AB24

PCIE_VSS#20P32

PCIE_VSS#21R27

PCIE_VSS#22T25

PCIE_VSS#23T32

PCIE_VSS#24U25

PCIE_VSS#25U27

PCIE_VSS#26V32

PCIE_VSS#27W25

PCIE_VSS#28W26

PCIE_VSS#29W27

PCIE_VSS#3AB32

PCIE_VSS#30Y25

PCIE_VSS#31Y32

PCIE_VSS#4AC24

PCIE_VSS#5AC26

PCIE_VSS#6AC27

PCIE_VSS#7AD25

PCIE_VSS#8AD32

PCIE_VSS#9AE27

VSS_MECH#1 A32

VSS_MECH#2 AM1

VSS_MECH#3 AM32

GND#1 A3

GND#10 AD8

GND#11 AE7

GND#12 AG12

GND#13 AH10

GND#14 AH28

GND#15 B10

GND#16 B12

GND#17 B14

GND#18 B16

GND#19 B18

GND#2 A30

GND#20 B20

GND#21 B22

GND#22 B24

GND#23 B26

GND#24 B6

GND#25 B8

GND#26 C1

GND#27 C32

GND#28 E28

GND#29 F10

GND#3 AA13

GND#30 F12

GND#31 F14

GND#32 F16

GND#33 F18

GND#34 F2

GND#35 F20

GND#36 F22

GND#37 F24

GND#38 F26

GND#39 F6

GND#4 AA16

GND#40 F8

GND#41 G10

GND#42 G27

GND#43 G31

GND#44 G8

GND#45 H14

GND#46 H17

GND#47 H2

GND#48 H20

GND#49 H6

GND#5 AB10

GND#50 J27

GND#51 J31

GND#52 K11

GND#53 K2

GND#54 K22

GND#55 K6

GND#56M6

GND#57N11

GND#58N12

GND#59N13

GND#6 AB15

GND#60N16

GND#61N18

GND#62N21

GND#63P6

GND#64P9

GND#65R12

GND#66R15

GND#67R17

GND#68R20

GND#69T13

GND#7 AB6

GND#70T16

GND#71T18

GND#72T21

GND#73T6

GND#74U15

GND#75U17

GND#76U20

GND#77U9

GND#78V13

GND#8 AC9

GND#79V16

GND#80V18

GND#81Y10

GND#82Y15

GND#83Y17

GND#84Y20

GND#9 AD6

GND#85R11

GND#86T11

C46

11U

_040

2_6.

3V4Z

C46

11U

_040

2_6.

3V4Z1

2

L28

BLM15BD121SN1D_0402

L28

BLM15BD121SN1D_04021 2

C42

91U

_040

2_6.

3V4Z

C42

91U

_040

2_6.

3V4Z

1

2

C38

010

U_0

603_

6.3V

6MC

380

10U

_060

3_6.

3V6M1

2

C39

81U

_040

2_6.

3V4Z

C39

81U

_040

2_6.

3V4Z1

2

C45

71U

_040

2_6.

3V4Z

C45

71U

_040

2_6.

3V4Z1

2

L26

BLM15BD121SN1D_0402

L26

BLM15BD121SN1D_04021 2

C45

610

U_0

603_

6.3V

6MC

456

10U

_060

3_6.

3V6M1

2

C37

21U

_040

2_6.

3V4Z

C37

21U

_040

2_6.

3V4Z1

2

C38

81U

_040

2_6.

3V4Z

C38

81U

_040

2_6.

3V4Z1

2

C41

11U

_040

2_6.

3V4Z

@C

411

1U_0

402_

6.3V

4Z

@

1

2

C45

41U

_040

2_6.

3V4Z

C45

41U

_040

2_6.

3V4Z1

2

C42

410

U_0

603_

6.3V

6MC

424

10U

_060

3_6.

3V6M1

2

L25

BLM15BD121SN1D_0402

L25

BLM15BD121SN1D_04021 2

C36

522

U_0

805_

6.3V

6MC

365

22U

_080

5_6.

3V6M1

2

C42

01U

_040

2_6.

3V4Z

C42

01U

_040

2_6.

3V4Z1

2

C37

01U

_040

2_6.

3V4Z

C37

01U

_040

2_6.

3V4Z1

2

C45

11U

_040

2_6.

3V4Z

C45

11U

_040

2_6.

3V4Z1

2

C38

410

U_0

603_

6.3V

6MC

384

10U

_060

3_6.

3V6M1

2L23

BLM15BD121SN1D_0402

L23

BLM15BD121SN1D_04021 2

C38

50.

1U_0

402_

10V

6KC

385

0.1U

_040

2_10

V6K1

2

C37

41U

_040

2_6.

3V4Z

C37

41U

_040

2_6.

3V4Z1

2

C44

90.

1U_0

402_

10V

6KC

449

0.1U

_040

2_10

V6K1

2

C39

00.

1U_0

402_

10V

6KC

390

0.1U

_040

2_10

V6K1

2

+

C736

220U_B

2_2.5VM

_R35

@+

C736

220U_B

2_2.5VM

_R35

@

1

2

C39

20.

1U_0

402_

10V

6KC

392

0.1U

_040

2_10

V6K1

2

C45

80.

1U_0

402_

10V

6KC

458

0.1U

_040

2_10

V6K1

2

C41

01U

_040

2_6.

3V4Z

C41

01U

_040

2_6.

3V4Z1

2

L24

BLM15BD121SN1D_0402

L24

BLM15BD121SN1D_04021 2

C42

622

U_0

805_

6.3V

6MC

426

22U

_080

5_6.

3V6M1

2

C41

61U

_040

2_6.

3V4Z

C41

61U

_040

2_6.

3V4Z1

2

C44

610

U_0

603_

6.3V

6MC

446

10U

_060

3_6.

3V6M1

2

C42

522

U_0

805_

6.3V

6MC

425

22U

_080

5_6.

3V6M1

2

C45

21U

_040

2_6.

3V4Z

C45

21U

_040

2_6.

3V4Z1

2

L22

MBK1608121YZF_0603

L22

MBK1608121YZF_0603

12

C39

91U

_040

2_6.

3V4Z

C39

91U

_040

2_6.

3V4Z1

2

C40

410

U_0

603_

6.3V

6MC

404

10U

_060

3_6.

3V6M1

2

C37

31U

_040

2_6.

3V4Z

C37

31U

_040

2_6.

3V4Z1

2

C36

622

U_0

805_

6.3V

6MC

366

22U

_080

5_6.

3V6M1

2

C45

91U

_040

2_6.

3V4Z

C45

91U

_040

2_6.

3V4Z1

2

C36

910

U_0

603_

6.3V

6MC

369

10U

_060

3_6.

3V6M1

2

C46

01U

_040

2_6.

3V4Z

C46

01U

_040

2_6.

3V4Z1

2

C45

50.

1U_0

402_

10V

6KC

455

0.1U

_040

2_10

V6K1

2

R7450_0603_5%

R7450_0603_5%1 2

POWER

PLL

PCIE

CORE

MEM I/O

MEM CLK

I/O

LEVELTRANSLATION

ISOLATEDCORE I/O

U8D

216-0774207-A11ROB_FCBGA631

POWER

PLL

PCIE

CORE

MEM I/O

MEM CLK

I/O

LEVELTRANSLATION

ISOLATEDCORE I/O

U8D

216-0774207-A11ROB_FCBGA631

PCIE_PVDDAM30

NC_MPV18L8

SPV18H7

PCIE_VDDC#1 L23

PCIE_VDDC#10 T22

PCIE_VDDC#11 U22

PCIE_VDDC#12 V22

PCIE_VDDC#2 L24

PCIE_VDDC#3 L25

PCIE_VDDC#4 L26

PCIE_VDDC#5 M22

PCIE_VDDC#6 N22

PCIE_VDDC#7 N23

PCIE_VDDC#8 N24

PCIE_VDDC#9 R22

PCIE_VDDR#1 AB23

PCIE_VDDR#2 AC23

PCIE_VDDR#3 AD24

PCIE_VDDR#4 AE24

PCIE_VDDR#5 AE25

PCIE_VDDR#6 AE26

PCIE_VDDR#7 AF25

PCIE_VDDR#8 AG26

SPV10H8

SPVSSJ7

VDDR1#1H13

VDDR1#10K24

VDDR1#11K9

VDDR1#12L11

VDDR1#13L12

VDDR1#14L13

VDDR1#15L20

VDDR1#16L21

VDDR1#17L22

VDDR1#2H16

VDDR1#3H19

VDDR1#4J10

VDDR1#5J23

VDDR1#6J24

VDDR1#7J9

VDDR1#8K10

VDDR1#9K23

VDDR3#1AA17

VDDR3#2AA18

VDDR3#3AB17

VDDR3#4AB18

VDDR4#1V12

VDDR4#2Y12

NC_VDDRHAL17

NC_VSSRHAL16

VDD_CT#1AA20

VDD_CT#2AA21

VDD_CT#3AB20

VDD_CT#4AB21VDDC#1 AA15

VDDC#10 T17

VDDC#11 T20

VDDC#12 U13

VDDC#13 U16

VDDC#14 U18

BIF_VDDC#2 U21

VDDC#16 V15

VDDC#17 V17

VDDC#18 V20

VDDC#15 V21

VDDC#2 N15

VDDC#19 Y13

VDDC#20 Y16

VDDC#21 Y18

VDDC#7 Y21

VDDC#3 N17

VDDC#4 R13

VDDC#5 R16

VDDC#6 R18

BIF_VDDC#1 R21

VDDC#8 T12

VDDC#9 T15

VDDCI#1 M13

VDDCI#2 M15

VDDCI#3 M16

VDDCI#4 M17

VDDC#22 M11

VDDC#23 M12

VDDCI#5 M18

VDDCI#7 M21VDDCI#6 M20

VDDCI#8 N20

NC#1AA11

NC#3V11

NC#4U11

VDDR4#3U12

NC#2AA12

Page 29: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

M_DA0M_DA1M_DA2M_DA3M_DA4M_DA5M_DA6M_DA7

M_DA12M_DA13M_DA14M_DA15

M_DA8M_DA9M_DA10M_DA11

M_DA20M_DA21M_DA22M_DA23

M_DA28M_DA29M_DA30M_DA31

M_DA24M_DA25M_DA26M_DA27

M_DA16M_DA17M_DA18M_DA19

M_DA36M_DA37M_DA38M_DA39

M_DA44M_DA45M_DA46M_DA47

M_DA40M_DA41M_DA42M_DA43

M_DA52M_DA53M_DA54M_DA55

M_DA60M_DA61M_DA62M_DA63

M_DA56M_DA57M_DA58M_DA59

M_DA48M_DA49M_DA50M_DA51

M_DA32M_DA33M_DA34M_DA35

M_MA4M_MA5M_MA6M_MA7

M_MA12M_BA2M_BA0M_BA1

M_MA8M_MA9M_MA10M_MA11

M_DQM3M_DQM4M_DQM5M_DQM6

M_DQS2M_DQS3M_DQS4M_DQS5

M_DQM7

M_DQS0M_DQS1

M_DQM0M_DQM1M_DQM2

M_MA0M_MA1M_MA2M_MA3

M_DQS6M_DQS7

M_DQS#2M_DQS#3M_DQS#4M_DQS#5

M_DQS#0M_DQS#1

M_DQS#6M_DQS#7

M_CLK0M_CLK#0

VRAM_ODT0VRAM_ODT1

M_CLK1M_CLK#1

M_CAS#0M_CAS#1

M_RAS#0M_RAS#1

M_CS#0

M_CKE0M_CKE1

M_CS#1

M_WE#0M_WE#1

MVREFDAMVREFSA

M_DA[63..0]

M_DQM[7..0]

M_DQS[7..0]

M_MA[13..0]

M_DQS#[7..0]

DRAM_RST

VRAM_ID1

VRAM_ID0

VRAM_ID2

MVREFSAMVREFDA

DRAM_RST

M_MA13

M_DQS#[7..0]<30>

M_DQS[7..0]<30>

M_DQM[7..0]<30>

M_BA2 <30>M_BA0 <30>M_BA1 <30>

VRAM_ODT0 <30>VRAM_ODT1 <30>

M_CLK0 <30>M_CLK#0 <30>

M_CLK1 <30>M_CLK#1 <30>

M_RAS#0 <30>M_RAS#1 <30>

M_CAS#0 <30>M_CAS#1 <30>

M_CS#0 <30>

M_CS#1 <30>

M_CKE0 <30>M_CKE1 <30>

M_WE#0 <30>M_WE#1 <30>

VRAM_ID0 <24>

VRAM_ID1 <24>

VRAM_ID2 <24>

M_DA[63..0]<30>

M_MA[13..0]<30>

DRAM_RST#<30>

+1.8VGS

+1.5VGS

+1.5VGS+1.5VGS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

RobsonXT-S3 MEM InterfaceB

29 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

RobsonXT-S3 MEM InterfaceB

29 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

RobsonXT-S3 MEM InterfaceB

29 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Route 50ohms single-ended/100ohm diff and keep short

debug only, for clock observation,if not need,DNI.

PARK SCL has differentrecommand

Hynix 1GBPN:SA00003VS20

Samsung 1GBPN:SA00003MQ20

R357

R358

R360

R359

R361

R361

R357

R359

R360

R358

R362

Vendor VRAM_ID0 VRAM_ID1 VRAM_ID2

Hynix 512MBPN:SA000032460

Samsung 512MBPN:SA000035700 R362

9/28 change P/N to SD034100A80

R357 10K_0402_5%X76@R357 10K_0402_5%X76@1 2

R36340.2_0402_1%

R36340.2_0402_1%

12

MEMORY INTERFACE

GDDR5/DDR3

GDDR5

GDDR5/DDR3

U8C

216-0774207-A11ROB_FCBGA631

MEMORY INTERFACE

GDDR5/DDR3

GDDR5

GDDR5/DDR3

U8C

216-0774207-A11ROB_FCBGA631

DQA0_0/DQA_0K27

DQA0_1/DQA_1J29

DQA0_10/DQA_10A28

DQA0_11/DQA_11C28

DQA0_12/DQA_12E27

DQA0_13/DQA_13G26

DQA0_14/DQA_14D26

DQA0_15/DQA_15F25

DQA0_16/DQA_16A25

DQA0_17/DQA_17C25

DQA0_18/DQA_18E25

DQA0_19/DQA_19D24

DQA0_2/DQA_2H30

DQA0_20/DQA_20E23

DQA0_21/DQA_21F23

DQA0_22/DQA_22D22

DQA0_23/DQA_23F21

DQA0_24/DQA_24E21

DQA0_25/DQA_25D20

DQA0_26/DQA_26F19

DQA0_27/DQA_27A19

DQA0_28/DQA_28D18

DQA0_29/DQA_29F17

DQA0_3/DQA_3H32

DQA0_30/DQA_30A17

DQA0_31/DQA_31C17

DQA1_0/DQA_32E17

DQA1_1/DQA_33D16

DQA1_2/DQA_34F15

DQA1_3/DQA_35A15

DQA1_4/DQA_36D14

DQA1_5/DQA_37F13

DQA1_6/DQA_38A13

DQA1_7/DQA_39C13

DQA0_4/DQA_4G29

DQA1_8/DQA_40E11

DQA1_9/DQA_41A11

DQA1_10/DQA_42C11

DQA1_11/DQA_43F11

DQA1_12/DQA_44A9

DQA1_13/DQA_45C9

DQA1_14/DQA_46F9

DQA1_15/DQA_47D8

DQA1_16/DQA_48E7

DQA1_17/DQA_49A7

DQA0_5/DQA_5F28

DQA1_18/DQA_50C7

DQA1_19/DQA_51F7

DQA1_20/DQA_52A5

DQA1_21/DQA_53E5

DQA1_22/DQA_54C3

DQA1_23/DQA_55E1

DQA1_24/DQA_56G7

DQA1_25/DQA_57G6

DQA1_26/DQA_58G1

DQA1_27/DQA_59G3

DQA0_6/DQA_6F32

DQA1_28/DQA_60J6

DQA1_29/DQA_61J1

DQA1_30/DQA_62J3

DQA1_31/DQA_63J5

DQA0_7/DQA_7F30

DQA0_8/DQA_8C30

DQA0_9/DQA_9F27

MVREFDAK26

MVREFSAJ26

MEM_CALRN0J25

MEM_CALRP0K25

CASA0B G19

CASA1B G16

CKEA0 K20

CKEA1 J17

CLKA0 H26

CLKA0B H25

CLKA1 G9

CLKA1B H9

CSA0B_0 H22

CSA0B_1 J22

CSA1B_0 G13

CSA1B_1 K13

WCKA0_0/DQMA_0 E32

WCKA0B_0/DQMA_1 E30

WCKA0_1/DQMA_2 A21

WCKA0B_1/DQMA_3 C21

WCKA1_0/DQMA_4 E13

WCKA1B_0/DQMA_5 D12

WCKA1_1/DQMA_6 E3

WCKA1B_1/DQMA_7 F4

MAA0_0/MAA_0 K17

MAA0_1/MAA_1 J20

MAA1_2/MAA_10 J11

MAA1_3/MAA_11 J13

MAA1_4/MAA_12 H11

MAA1_5/MAA_13/BA2 G11

MAA1_6/MAA_14/BA0 J16

MAA1_7/MAA_15/BA1 L15

MAA0_2/MAA_2 H23

MAA0_3/MAA_3 G23

MAA0_4/MAA_4 G24

MAA0_5/MAA_5 H24

MAA0_6/MAA0_6 J19

MAA0_7/MAA0_7 K19

MAA1_0/MAA_8 J14

MAA1_1/MAA_9 K14

ADBIA0/ODTA0 L18

ADBIA1/ODTA1 K16

RASA0B G22

RASA1B G17

EDCA0_0/RDQSA_0 H28

EDCA0_1/RDQSA_1 C27

EDCA0_2/RDQSA_2 A23

EDCA0_3/RDQSA_3 E19

EDCA1_0/RDQSA_4 E15

EDCA1_1/RDQSA_5 D10

EDCA1_2/RDQSA_6 D6

EDCA1_3/RDQSA_7 G5

MAA1_8 G14

MAA0_8 G20

DDBIA0_0/WDQSA_0 H27

DDBIA0_1/WDQSA_1 A27

DDBIA0_2/WDQSA_2 C23

DDBIA0_3/WDQSA_3 C19

DDBIA1_0/WDQSA_4 C15

DDBIA1_1/WDQSA_5 E9

DDBIA1_2/WDQSA_6 C5

DDBIA1_3/WDQSA_7 H4

WEA0B G25

WEA1B H10

DRAM_RSTL10

CLKTESTAK8

CLKTESTBL7

R360 10K_0402_5%X76@R360 10K_0402_5%X76@1 2

R3714.99K_0402_1%

R3714.99K_0402_1%

12

R366

49.9_0402_1%

R366

49.9_0402_1%

12

R362 10K_0402_5%X76@R362 10K_0402_5%X76@1 2R361 10K_0402_5%X76@R361 10K_0402_5%X76@1 2

R36540.2_0402_1%

R36540.2_0402_1%

12

R358 10K_0402_5%X76@R358 10K_0402_5%X76@1 2

R368243_0402_1%R368243_0402_1%1 2

R36910_0402_1%

R36910_0402_1%

12

R372 51.1_0402_1%@R372 51.1_0402_1%@1 2

R359 10K_0402_5%X76@R359 10K_0402_5%X76@1 2

C4680.1U_0402_16V4ZC4680.1U_0402_16V4Z

1

2

C469120P_0402_50V8J

C469120P_0402_50V8J

1

2

C470 0.1U_0402_16V4Z@C470 0.1U_0402_16V4Z@1 2

C4670.1U_0402_16V4ZC4670.1U_0402_16V4Z

1

2

R364100_0402_1%

R364100_0402_1%

12

C471 0.1U_0402_16V4Z@C471 0.1U_0402_16V4Z@1 2

R370243_0402_1%R370243_0402_1%

1 2

R373 51.1_0402_1%@R373 51.1_0402_1%@1 2

R367100_0402_1%

R367100_0402_1%

12

Page 30: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VREFC_A2 VREFD_Q2 VREFD_Q3VREFC_A3 VREFC_A4 VREFD_Q4

M_DQM3

M_DQS#1M_DQS#3

M_DQS3M_DQS1

M_DQM1

M_BA0M_BA1

VRAM_ODT0

M_WE#0

M_CKE0

M_RAS#0M_CAS#0

M_CS#0

DRAM_RST#

VREFD_Q2VREFC_A2

M_BA2

M_DQS4

M_DQM4

M_DQS#4M_DQS#5

M_DQM5

M_DQS5

M_CKE1M_CLK#1

M_RAS#1

VRAM_ODT1

M_CAS#1M_WE#1

M_CLK1

M_CS#1

VREFD_Q3VREFC_A3

DRAM_RST# DRAM_RST#

M_DQS#7

M_DQS7

M_DQM6

M_DQS6

M_DQS#6

M_DQM7

VRAM_ODT1

M_CAS#1

M_CLK#1

M_RAS#1

M_CKE1

M_CS#1

M_WE#1

M_CLK1

M_DQS#2

M_DQM2

M_DQS#0

M_DQS2M_DQS0

M_BA1M_BA0

M_CLK#0M_CKE0

VRAM_ODT0

M_RAS#0M_CS#0

M_CAS#0

VREFD_Q4VREFC_A4

M_BA2

M_MA1

VREFC_A1

M_MA4

M_MA7

VREFD_Q1

M_MA0

M_MA10

M_MA3

M_MA5

M_MA2

M_MA9

M_MA6

M_MA11

M_DQM0

M_MA12

M_WE#0

M_CLK0

M_MA8

VREFC_A1

M_CLK#0

M_CLK0

M_CLK#1

M_CLK1

VREFD_Q1

M_BA0M_BA1M_BA2

M_BA0M_BA1M_BA2

M_CLK#0M_CLK0

M_DA[63..0]

M_DQM[7..0]

M_DQS[7..0]

M_MA[13..0]

M_DQS#[7..0]

M_MA13

M_MA1

M_MA4

M_MA7

M_MA0

M_MA10

M_MA3

M_MA5

M_MA2

M_MA9

M_MA6

M_MA11M_MA12

M_MA8

M_MA13

M_MA1

M_MA4

M_MA7

M_MA0

M_MA10

M_MA3

M_MA5

M_MA2

M_MA9

M_MA6

M_MA11M_MA12

M_MA8

M_MA13

M_MA1

M_MA4

M_MA7

M_MA0

M_MA10

M_MA3

M_MA5

M_MA2

M_MA9

M_MA6

M_MA11M_MA12

M_MA8

M_MA13M_DA7

M_DA5

M_DA1M_DA0

M_DA6

M_DA2

M_DA3

M_DA4

M_DA18

M_DA16

M_DA21

M_DA20

M_DA17M_DA23

M_DA19

M_DA22M_DA28

M_DA26

M_DA31M_DA24

M_DA25

M_DA27

M_DA30

M_DA29

M_DA12

M_DA10

M_DA13M_DA8

M_DA14

M_DA15M_DA11

M_DA9

M_DA53

M_DA52

M_DA49

M_DA60

M_DA57

M_DA63

M_DA56M_DA58

M_DA61

M_DA54M_DA50

M_DA59

M_DA48

M_DA55M_DA51

M_DA62

M_DA32

M_DA36

M_DA39

M_DA35

M_DA45

M_DA44

M_DA42M_DA47

M_DA41

M_DA46M_DA40M_DA43

M_DA37

M_DA33

M_DA34

M_DA38

M_CLK0<29>

M_CAS#0<29>

M_CKE1<29>

M_RAS#1<29>

M_BA2<29>

VRAM_ODT0<29>

M_RAS#0<29>

M_CLK#1<29>M_CKE0<29>

M_CS#0<29>

M_CLK1<29>

M_WE#1<29>

M_BA1<29>

M_CS#1<29>

DRAM_RST#<29>

M_CLK#0<29>

M_WE#0<29>

VRAM_ODT1<29>

M_CAS#1<29>

M_BA0<29>

M_DQS#[7..0]<29>

M_DQS[7..0]<29>

M_DQM[7..0]<29>

M_MA[13..0]<29>

M_DA[63..0]<29>

+1.5VGS

+1.5VGS

+1.5VGS

+1.5VGS

+1.5VGS

+1.5VGS

+1.5VGS

+1.5VGS

+1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS

+1.5VGS+1.5VGS

+1.5VGS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

RobsonXT-S3 VRAMC

30 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

RobsonXT-S3 VRAMC

30 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

RobsonXT-S3 VRAMC

30 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

Samsung : SA000041T10 (S IC D3 64MX16 K4W1G1646E-HC11 FBGA C38! )

ref 139-02 recommand

0619 update

add off page

Park SCL recommand pu 60.4 ohm to1.5VGS

Hynix : SA000041S10 (S IC D3 64MX16 H5TQ1G63BFR-11C FBGA C38! )

VRAM P/N :

update VRAM PN 0619 update

0706 update

update X76 PN

R383

4.99K_0402_1%

R383

4.99K_0402_1%

12

C47

5 0.1U_0402_10V

6K

C47

5 0.1U_0402_10V

6K

1

2

100-BALLSDRAM DDR3

U20

64MX16 H5TQ1G63BFR-12C FBGAX76@

100-BALLSDRAM DDR3

U20

64MX16 H5TQ1G63BFR-12C FBGAX76@

WEL4

RASJ4

CASK4

CSL3

CKE/CKE0K10

CKJ8

CKK8

DQSUB8

BA0M3

BA1N9

A2P4

A3N3

A4P9

A5P3

A6R9

A7R3

A8T9

A9R4

A10/APL8

A11R8

DQL0 E4

DQL1 F8

DQL2 F3

DQL3 F9

DQL4 H4

DQL5 H9

DQL6 G3

DQL7 H8

VSSQ D2

VSS A10

VSS E2VSS B4

NC/ODT1J2

VDD B3

VDD D10

VDDQ A2

VDDQ A9

VDDQ C2

VDDQ C10

NC/CS1L2

NC/CE1J10

VDDQ E10

ZQ/ZQ0L9

RESETT3

DQSLF4

DMUD4DMLE8

VSSQ B2

VSSQ B10

VSSQ D9

VSSQ E3

DQSUC8

VSSQ E9

DQSLG4

VDDQ F2

VSSQ F10

VSSQ G2

VDDQ H3

VDDQ H10

VSSQ G10

VREFCAM9

VSS G9

VDD G8

ODT/ODT0K2

A0N4

A1P8

VDD K3

A12N8

VSS J3

VDD K9

DQU1 C4

DQU2 C9

DQU3 C3

DQU4 A8

DQU5 A3

DQU6 B9

DQU7 A4

DQU0 D8

A13T4

A14T8

A15/BA3M8

BA2M4

VREFDQH2

NCZQ1L10

VDD N2

VDD N10

VDD R2

VDD R10

VSS J9

VSS M2

VSS M10

VSS P2

VSS P10

VSS T2

VSS T10

VDDQ D3

NCA1

NCA11

NCT1

NCT11

R393

4.99K_0402_1%

R393

4.99K_0402_1%

12

C503

1U_0402_6.3V4Z

C503

1U_0402_6.3V4Z

1

2

C47

7

0.1U_0402_10V

6K

C47

7

0.1U_0402_10V

6K

1

2

R3784.99K_0402_1%

R3784.99K_0402_1%

12

C480

10U_0603_6.3V6M

C480

10U_0603_6.3V6M

1

2

C493

1U_0402_6.3V4Z

C493

1U_0402_6.3V4Z

1

2

C492

1U_0402_6.3V4Z

C492

1U_0402_6.3V4Z

1

2

R374243_0402_1%

R374243_0402_1%

12

C47

8

0.1U_0402_10V

6K

C47

8

0.1U_0402_10V

6K

1

2

C497

1U_0402_6.3V4Z

C497

1U_0402_6.3V4Z

1

2

R3794.99K_0402_1%

R3794.99K_0402_1%

12

R397 56_0402_1%R397 56_0402_1%1 2

C494

1U_0402_6.3V4Z

C494

1U_0402_6.3V4Z

1

2

ZZZ

HynixH1G@

X7624938L01

ZZZ

HynixH1G@

X7624938L01

C496

1U_0402_6.3V4Z

@

C496

1U_0402_6.3V4Z

@

1

2

C505

1U_0402_6.3V4Z

C505

1U_0402_6.3V4Z

1

2

R3894.99K_0402_1%

R3894.99K_0402_1%

12

C5060.01U_0402_16V7KC5060.01U_0402_16V7K

1

2

R391

4.99K_0402_1%

R391

4.99K_0402_1%

12

C482

1U_0402_6.3V4Z

C482

1U_0402_6.3V4Z

1

2

R3864.99K_0402_1%

R3864.99K_0402_1%

12

C481

10U_0603_6.3V6M

C481

10U_0603_6.3V6M

1

2

R3814.99K_0402_1%

R3814.99K_0402_1%

12

ZZZ

HynixH512@

X7624938L03

ZZZ

HynixH512@

X7624938L03

C47

2 0.1U_0402_10V

6K

C47

2 0.1U_0402_10V

6K

1

2

C499

1U_0402_6.3V4Z

C499

1U_0402_6.3V4Z

1

2

R3824.99K_0402_1%

R3824.99K_0402_1%

12

C488

10U_0603_6.3V6M

C488

10U_0603_6.3V6M

1

2

C5070.01U_0402_16V7KC5070.01U_0402_16V7K

1

2

ZZZ

SamsungS512@X7624938L04

ZZZ

SamsungS512@X7624938L04

R375243_0402_1%

R375243_0402_1%

12

100-BALLSDRAM DDR3

U18

64MX16 H5TQ1G63BFR-12C FBGAX76@

100-BALLSDRAM DDR3

U18

64MX16 H5TQ1G63BFR-12C FBGAX76@

WEL4

RASJ4

CASK4

CSL3

CKE/CKE0K10

CKJ8

CKK8

DQSUB8

BA0M3

BA1N9

A2P4

A3N3

A4P9

A5P3

A6R9

A7R3

A8T9

A9R4

A10/APL8

A11R8

DQL0 E4

DQL1 F8

DQL2 F3

DQL3 F9

DQL4 H4

DQL5 H9

DQL6 G3

DQL7 H8

VSSQ D2

VSS A10

VSS E2VSS B4

NC/ODT1J2

VDD B3

VDD D10

VDDQ A2

VDDQ A9

VDDQ C2

VDDQ C10

NC/CS1L2

NC/CE1J10

VDDQ E10

ZQ/ZQ0L9

RESETT3

DQSLF4

DMUD4DMLE8

VSSQ B2

VSSQ B10

VSSQ D9

VSSQ E3

DQSUC8

VSSQ E9

DQSLG4

VDDQ F2

VSSQ F10

VSSQ G2

VDDQ H3

VDDQ H10

VSSQ G10

VREFCAM9

VSS G9

VDD G8

ODT/ODT0K2

A0N4

A1P8

VDD K3

A12N8

VSS J3

VDD K9

DQU1 C4

DQU2 C9

DQU3 C3

DQU4 A8

DQU5 A3

DQU6 B9

DQU7 A4

DQU0 D8

A13T4

A14T8

A15/BA3M8

BA2M4

VREFDQH2

NCZQ1L10

VDD N2

VDD N10

VDD R2

VDD R10

VSS J9

VSS M2

VSS M10

VSS P2

VSS P10

VSS T2

VSS T10

VDDQ D3

NCA1

NCA11

NCT1

NCT11

R384

4.99K_0402_1%

R384

4.99K_0402_1%

12

C47

3 0.1U_0402_10V

6K

C47

3 0.1U_0402_10V

6K

1

2

C498

1U_0402_6.3V4Z

C498

1U_0402_6.3V4Z

1

2

C483

1U_0402_6.3V4Z

C483

1U_0402_6.3V4Z

1

2

R395 56_0402_1%R395 56_0402_1%1 2

C487

1U_0402_6.3V4Z

@

C487

1U_0402_6.3V4Z

@

1

2

C47

9

0.1U_0402_10V

6K

C47

9

0.1U_0402_10V

6K

1

2

R385

4.99K_0402_1%

R385

4.99K_0402_1%

12

R392

4.99K_0402_1%

R392

4.99K_0402_1%

12

C485

1U_0402_6.3V4Z

C485

1U_0402_6.3V4Z

1

2

R376243_0402_1%

R376243_0402_1%

12

R3904.99K_0402_1%

R3904.99K_0402_1%

12

C502

1U_0402_6.3V4Z

C502

1U_0402_6.3V4Z

1

2

100-BALLSDRAM DDR3

U21

64MX16 H5TQ1G63BFR-12C FBGAX76@

100-BALLSDRAM DDR3

U21

64MX16 H5TQ1G63BFR-12C FBGAX76@

WEL4

RASJ4

CASK4

CSL3

CKE/CKE0K10

CKJ8

CKK8

DQSUB8

BA0M3

BA1N9

A2P4

A3N3

A4P9

A5P3

A6R9

A7R3

A8T9

A9R4

A10/APL8

A11R8

DQL0 E4

DQL1 F8

DQL2 F3

DQL3 F9

DQL4 H4

DQL5 H9

DQL6 G3

DQL7 H8

VSSQ D2

VSS A10

VSS E2VSS B4

NC/ODT1J2

VDD B3

VDD D10

VDDQ A2

VDDQ A9

VDDQ C2

VDDQ C10

NC/CS1L2

NC/CE1J10

VDDQ E10

ZQ/ZQ0L9

RESETT3

DQSLF4

DMUD4DMLE8

VSSQ B2

VSSQ B10

VSSQ D9

VSSQ E3

DQSUC8

VSSQ E9

DQSLG4

VDDQ F2

VSSQ F10

VSSQ G2

VDDQ H3

VDDQ H10

VSSQ G10

VREFCAM9

VSS G9

VDD G8

ODT/ODT0K2

A0N4

A1P8

VDD K3

A12N8

VSS J3

VDD K9

DQU1 C4

DQU2 C9

DQU3 C3

DQU4 A8

DQU5 A3

DQU6 B9

DQU7 A4

DQU0 D8

A13T4

A14T8

A15/BA3M8

BA2M4

VREFDQH2

NCZQ1L10

VDD N2

VDD N10

VDD R2

VDD R10

VSS J9

VSS M2

VSS M10

VSS P2

VSS P10

VSS T2

VSS T10

VDDQ D3

NCA1

NCA11

NCT1

NCT11

C47

4 0.1U_0402_10V

6K

C47

4 0.1U_0402_10V

6K

1

2

ZZZ

SamsungS1G@X7624938L02

ZZZ

SamsungS1G@X7624938L02

R394 56_0402_1%R394 56_0402_1%1 2

C490

10U_0603_6.3V6M

C490

10U_0603_6.3V6M

1

2

C47

6 0.1U_0402_10V

6K

C47

6 0.1U_0402_10V

6K

1

2

C484

1U_0402_6.3V4Z

C484

1U_0402_6.3V4Z

1

2

R3874.99K_0402_1%

R3874.99K_0402_1%

12

100-BALLSDRAM DDR3

U19

64MX16 H5TQ1G63BFR-12C FBGAX76@

100-BALLSDRAM DDR3

U19

64MX16 H5TQ1G63BFR-12C FBGAX76@

WEL4

RASJ4

CASK4

CSL3

CKE/CKE0K10

CKJ8

CKK8

DQSUB8

BA0M3

BA1N9

A2P4

A3N3

A4P9

A5P3

A6R9

A7R3

A8T9

A9R4

A10/APL8

A11R8

DQL0 E4

DQL1 F8

DQL2 F3

DQL3 F9

DQL4 H4

DQL5 H9

DQL6 G3

DQL7 H8

VSSQ D2

VSS A10

VSS E2VSS B4

NC/ODT1J2

VDD B3

VDD D10

VDDQ A2

VDDQ A9

VDDQ C2

VDDQ C10

NC/CS1L2

NC/CE1J10

VDDQ E10

ZQ/ZQ0L9

RESETT3

DQSLF4

DMUD4DMLE8

VSSQ B2

VSSQ B10

VSSQ D9

VSSQ E3

DQSUC8

VSSQ E9

DQSLG4

VDDQ F2

VSSQ F10

VSSQ G2

VDDQ H3

VDDQ H10

VSSQ G10

VREFCAM9

VSS G9

VDD G8

ODT/ODT0K2

A0N4

A1P8

VDD K3

A12N8

VSS J3

VDD K9

DQU1 C4

DQU2 C9

DQU3 C3

DQU4 A8

DQU5 A3

DQU6 B9

DQU7 A4

DQU0 D8

A13T4

A14T8

A15/BA3M8

BA2M4

VREFDQH2

NCZQ1L10

VDD N2

VDD N10

VDD R2

VDD R10

VSS J9

VSS M2

VSS M10

VSS P2

VSS P10

VSS T2

VSS T10

VDDQ D3

NCA1

NCA11

NCT1

NCT11

C489

10U_0603_6.3V6M

C489

10U_0603_6.3V6M

1

2

C486

1U_0402_6.3V4Z

C486

1U_0402_6.3V4Z

1

2

R377243_0402_1%

R377243_0402_1%

12

C495

1U_0402_6.3V4Z

C495

1U_0402_6.3V4Z

1

2

C491

10U_0603_6.3V6M

C491

10U_0603_6.3V6M

1

2

C501

1U_0402_6.3V4Z

C501

1U_0402_6.3V4Z

1

2

R3804.99K_0402_1%

R3804.99K_0402_1%

12

C504

1U_0402_6.3V4Z

@

C504

1U_0402_6.3V4Z

@

1

2

R396 56_0402_1%R396 56_0402_1%1 2

C500

1U_0402_6.3V4Z

C500

1U_0402_6.3V4Z

1

2

R3884.99K_0402_1%

R3884.99K_0402_1%

12

Page 31: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DISPOFF#

INVPWM

INVPWM

INVPWM

DISPOFF#

CONN_LVDS_SCLCONN_LVDS_SDA

USB20_N5USB20_P5

DISPOFF#INVPWM

LCD_ENVDD

CONN_LVDS_SDACONN_LVDS_SCL

VGA_LVDS_SDAVGA_LVDS_SCL

VGA_LVDS_A1VGA_LVDS_A1#

VGA_LVDS_ACLK#VGA_LVDS_ACLK

VGA_LVDS_A0VGA_LVDS_A0#

VGA_LVDS_A2#VGA_LVDS_A2

CONN_LVDS_A1CONN_LVDS_A1#

CONN_LVDS_ACLK#CONN_LVDS_ACLK

CONN_LVDS_A0CONN_LVDS_A0#

CONN_LVDS_A2#CONN_LVDS_A2

EDID_CLKEDID_DATA CONN_LVDS_SDA

CONN_LVDS_SCL

CONN_LVDS_A1CONN_LVDS_A1#

CONN_LVDS_ACLK#CONN_LVDS_ACLK

CONN_LVDS_A0CONN_LVDS_A0#

CONN_LVDS_A2#CONN_LVDS_A2

LVDS_A2#LVDS_A2

LVDS_A1#LVDS_A1

LVDS_A0LVDS_A0#

LVDS_ACLKLVDS_ACLK#

CONN_LVDS_A1CONN_LVDS_A1#

CONN_LVDS_ACLK#CONN_LVDS_ACLK

CONN_LVDS_A0CONN_LVDS_A0#

CONN_LVDS_A2#CONN_LVDS_A2

LCD_ENVDD

BKOFF#BKOFF#<40>

PCH_PWM<17>

USB20_N5 <18>USB20_P5 <18>

INVT_PWM<40>

PCH_ENBKL<17>

VGA_ENBKL<24> ENBKL <40>

PCH_ENVDD<17>

VGA_LVDS_SCL<24>VGA_LVDS_SDA<24>

EDID_CLK<17>EDID_DATA<17>

VGA_LVDS_A0<23>VGA_LVDS_A0#<23>

VGA_LVDS_A1<23>VGA_LVDS_A1#<23>

VGA_LVDS_A2<23>VGA_LVDS_A2#<23>

VGA_LVDS_ACLK<23>VGA_LVDS_ACLK#<23>

LVDS_A2<17>LVDS_A2#<17>

LVDS_A1<17>LVDS_A1#<17>

LVDS_A0<17>LVDS_A0#<17>

LVDS_ACLK#<17>LVDS_ACLK<17>

VGA_ENVDD<23>

CMOS_OFF#<40>

CE_EN<40>

+3VS

+3VS

+LCDVDD +5VALW

+LCDVDD_CONN+LCDVDD

+3VS

+LEDVDD B+

+3VS

+3VS

+3VS

+5VALW

+3VS_CMOS

+3VS_CMOS

+LCDVDD_CONN

+5VS

+3VS

+CMOS_PW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

LVDS/CAMERAB

31 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

LVDS/CAMERAB

31 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

LVDS/CAMERAB

31 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

LCD POWER CIRCUIT

DTC124EK

W=60mils

W=60mils

For EMI

For GMCH DPST

CMOS(60 MIL)

CMOS Camera Conn

4.7V

(20 MIL) (20 MIL)

Pull high at chipset/VGA side

Change footprint20100814

Change footprint20100814

Change footprint20100814

Change footprint20100814

Change footprint20100814

Change footprint20100814

C514680P_0402_50V7K

@

C514680P_0402_50V7K

@ 1

2

R433

4.7K_0402_5%

@R433

4.7K_0402_5%

@

12

R4210_0402_5% PX@ R4210_0402_5% PX@ 12

R4270_0402_5% PX@ R4270_0402_5% PX@ 12

R71610K_0402_5%R71610K_0402_5%

12

C51910U_0805_10V4Z

CMOS@C519

10U_0805_10V4Z

CMOS@1

2

C516

4.7U_0603_6.3V6K

C516

4.7U_0603_6.3V6K

1

2

R406 0_0402_5%PX@

R406 0_0402_5%PX@

12

R403 220K_0402_5%R403 220K_0402_5%1 2

R408100K_0402_5%

@R408100K_0402_5%

@

12

R435150K_0402_5%

CMOS@

R435150K_0402_5%

CMOS@

C511

470P

_040

2_50

V7K

C511

470P

_040

2_50

V7K

1

2

R436 0_0402_5%DIS@R436 0_0402_5%DIS@1 2

C509

470P

_040

2_50

V7K

C509

470P

_040

2_50

V7K

1

2

D4

CH751H-40PT_SOD323-2@

D4

CH751H-40PT_SOD323-2@

21

R4250_0402_5% PX@ R4250_0402_5% PX@ 12

R401100K_0402_5%R401100K_0402_5%

12

C508680P_0402_50V7K

@

C508680P_0402_50V7K

@

1

2

R4090_0402_5% DIS@ R4090_0402_5% DIS@ 12

R5430_0402_5%@

R5430_0402_5%@

12

C5180.1U_0402_16V4Z

[email protected]_0402_16V4Z

CMOS@1

2

R4110_0402_5% DIS@ R4110_0402_5% DIS@ 12

R43110K_0402_5% @

R43110K_0402_5% @

12

R4280_0402_5% PX@ R4280_0402_5% PX@ 12

R4020_0402_5% DIS@

R4020_0402_5% DIS@

1 2

G

DS

Q822N7002H_SOT23-3

@

G

DS

Q822N7002H_SOT23-3

@

2

13

R400150_0603_1%R400150_0603_1%

R717 0_0402_5%R717 0_0402_5%1 2

R4190_0402_5% PX@ R4190_0402_5% PX@ 12

R404 2.2K_0402_5%@

R404 2.2K_0402_5%@

R4160_0402_5% DIS@ R4160_0402_5% DIS@ 12

U22

TC7SZ14FU_SSOP5@

U22

TC7SZ14FU_SSOP5@

Y 4

P5

G3

A2NC1

C5134.7U_0603_6.3V6K

C5134.7U_0603_6.3V6K

1

2

R4290_0402_5% PX@ R4290_0402_5% PX@ 12

R4130_0402_5% DIS@ R4130_0402_5% DIS@ 12

C515

0.1U_0402_16V4Z

C515

0.1U_0402_16V4Z

1

2

R4240_0402_5% PX@ R4240_0402_5% PX@ 12

R4100_0402_5% DIS@ R4100_0402_5% DIS@ 12

R5390_0603_5%

@

R5390_0603_5%

@ 1 2

R438100K_0402_1%

R438100K_0402_1%

12

R5960_0603_5%

CMOS@

R5960_0603_5%

CMOS@

1 2

Q80

AP2301GN-HF_SOT23-3

Q80

AP2301GN-HF_SOT23-3

2

31

R4300_0402_5%

PX@R4300_0402_5%

PX@1 2

R4220_0402_5% PX@ R4220_0402_5% PX@ 12

R4180_0402_5% DIS@ R4180_0402_5% DIS@ 12

G

D

S

Q792N7002H_SOT23-3

G

D

S

Q792N7002H_SOT23-3

2

13

C517

0.1U_0402_16V4Z

C517

0.1U_0402_16V4Z

1

2

R4170_0402_5% DIS@ R4170_0402_5% DIS@ 12

R4200_0402_5% PX@ R4200_0402_5% PX@ 12

JLVDS1

ACES_87142-3041-BSME@

JLVDS1

ACES_87142-3041-BSME@

GND 31GND32

1 122

3 344

5 566

7 788

9 91010

11 111212

13 131414

15 151616

17 171818

19 192020

21 212222

23 232424

25 252626

27 272828

29 293030

R398 0_0805_5%R398 0_0805_5%1 2

R4230_0402_5% PX@ R4230_0402_5% PX@ 12

R4150_0402_5% DIS@ R4150_0402_5% DIS@ 12

R434 100K_0402_5%

CMOS@

R434 100K_0402_5%

CMOS@

Q81DTC124EKAT146_SC59-3

Q81DTC124EKAT146_SC59-3

IN2

OU

T1

GN

D3

Q83

AP2301GN-HF_SOT23-3

Q83

AP2301GN-HF_SOT23-32

3 1

R4140_0402_5% DIS@ R4140_0402_5% DIS@ 12

R4120_0402_5% DIS@ R4120_0402_5% DIS@ 12

R407 0_0402_5%DIS@

R407 0_0402_5%DIS@

12

C5200.1U_0402_16V4Z

[email protected]_0402_16V4Z

CMOS@1

2

C5124.7U_0805_25V6-KC5124.7U_0805_25V6-K

1

2

Q84DTC124EKAT146_SC59-3CMOS@

Q84DTC124EKAT146_SC59-3CMOS@

IN2

OU

T1

GN

D3

R437 0_0402_5%PX@

R437 0_0402_5%PX@

1 2

L29

FBMA-L11-201209-221LMA30T_0805

L29

FBMA-L11-201209-221LMA30T_0805

1 2

R405 2.2K_0402_5%@

R405 2.2K_0402_5%@

Page 32: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

CRT_R

CRT_G

CRT_B

REDGREENBLUE

CRT_DDC_DAT_CONN

CRT_DDC_DAT_CONN

CRT_DDC_CLK_CONN

RED

GREEN

BLUE

JVGA_VSJVGA_HS

CRT_DDC_CLK_CONN

RED

GREEN

JVGA_HS

JVGA_VS

BLUE

JVGA_VS

JVGA_HS

CRT_VSYNC_1

CRT_HSYNC_1

CRT_R

CRT_G

CRT_B

CRT_R

CRT_G

CRT_BVGA_CRT_B

VGA_CRT_R

VGA_CRT_G

DAC_BLU

DAC_RED

DAC_GRN

HSYNC_G

VSYNC_G

VGA_DDCDATA

VGA_DDCCLK

CRT_DDC_DATA

CRT_DDC_CLK

CRT_DDC_DATA_R

CRT_DDC_CLK_R

DAC_RED<17>

DAC_GRN<17>

DAC_BLU<17>

VGA_CRT_R<24>

VGA_CRT_G<24>

VGA_CRT_B<24>

VGA_HSYNC<24>

CRT_HSYNC<17>

VGA_VSYNC<24>

CRT_VSYNC<17>

CRT_DDC_DATA<17>

CRT_DDC_CLK<17>

VGA_DDCDATA<24>

VGA_DDCCLK<24>

+5VS +5VS +5VS +5VS +5VS

+5VS

+CRT_VCC

+CRT_VCC

+3VS

+CRT_VCC

+CRT_VCC

+3VS

+3VGS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

CRT ConnectorCustom

32 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

CRT ConnectorCustom

32 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

CRT ConnectorCustom

32 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

CLOSE TO CONN

CRT Connector

W=40mils

UMA only

DIS only

Pull high at chipset/VGA side

Check CRT footprint 7/20_OTIS

7/21 modify

8/14 change P/N toDMN66D0LDW-7_SOT363-6(SB00000DH00)

F1

1.1A_6V_SMD1812P110TF

F1

1.1A_6V_SMD1812P110TF

21

R461 0_0402_5%DIS@

R461 0_0402_5%DIS@ 12

C528

100P_0402_50V8J

C528

100P_0402_50V8J

1

2

R453 0_0402_5%DIS@

R453 0_0402_5%DIS@

1 2

C522

10P_0402_50V8J

C522

10P_0402_50V8J

1

2

C5310.1U_0402_16V4Z

C5310.1U_0402_16V4Z

1

2

C53010P_0402_50V8J

@C53010P_0402_50V8J

@1

2

L34

FCM1608CF-121T03 0603

L34

FCM1608CF-121T03 06031 2

C53210P_0402_50V8J@ C53210P_0402_50V8J@

1

2

R7360_0402_5%

PX@

R7360_0402_5%

PX@

12

C523

10P_0402_50V8J

C523

10P_0402_50V8J

1

2

R446150_0402_1%R446150_0402_1%

12

L33

FCM1608CF-121T03 0603

L33

FCM1608CF-121T03 06031 2

D8BAT54S-7-F_SOT23-3

@D8BAT54S-7-F_SOT23-3

@2

3

1

D6BAT54S-7-F_SOT23-3

@D6BAT54S-7-F_SOT23-3

@2

3

1

D9BAT54S-7-F_SOT23-3

@D9BAT54S-7-F_SOT23-3

@2

3

1

Q62A2N7002DW-T/R7_SOT363-6

Q62A2N7002DW-T/R7_SOT363-6

61

2

R452 0_0402_5%PX@

R452 0_0402_5%PX@

1 2

G

G

JCRT1

CONTE_80431-5K1-152

ME@

G

G

JCRT1

CONTE_80431-5K1-152

ME@

61117

1228

1339

144

10155

1617

L30

FCM1608CF-121T03 0603

L30

FCM1608CF-121T03 06031 2

R440 0_0402_5%PX@R440 0_0402_5%PX@1 2

R439 0_0402_5%PX@R439 0_0402_5%PX@1 2

D10

RB491D_SC59-3

D10

RB491D_SC59-3

2 1

R449 0_0402_5%PX@

R449 0_0402_5%PX@

1 2

C5290.1U_0402_16V4Z

C5290.1U_0402_16V4Z

1

2

R459 0_0402_5%DIS@

R459 0_0402_5%DIS@ 12

R4542.2K_0402_5%

@R454

2.2K_0402_5%

@ 12

L32

FCM1608CF-121T03 0603

L32

FCM1608CF-121T03 06031 2

R443150_0402_1%R443150_0402_1%

12

R448

1K_0402_5%

R448

1K_0402_5%

1 2

R7350_0402_5%DIS@

R7350_0402_5%DIS@

12

R4572.2K_0402_5%R4572.2K_0402_5%

12

R447 0_0402_5%DIS@R447 0_0402_5%DIS@1 2

C52410P_0402_50V8JC52410P_0402_50V8J

1

2

D7

BAT54S-7-F_SOT23-3@D7

BAT54S-7-F_SOT23-3@

2

3

1

C53468P_0402_50V8K

@C53468P_0402_50V8K

@1

2

Q62B2N7002DW-T/R7_SOT363-6

Q62B2N7002DW-T/R7_SOT363-6

3

5

4

C5210.1U_0402_16V4ZC5210.1U_0402_16V4Z

1

2

R4562.2K_0402_5%

R4562.2K_0402_5%

12

U23SN74AHCT1G125DCKR_SC70-5U23SN74AHCT1G125DCKR_SC70-5

A2 Y 4OE

#1

G3

P5

C525

10P_0402_50V8J

C525

10P_0402_50V8J

1

2

L31

FCM1608CF-121T03 0603

L31

FCM1608CF-121T03 06031 2

R451

1K_0402_5%

R451

1K_0402_5%

1 2

R445150_0402_1%R445150_0402_1%

12

C533100P_0402_50V8J

C533100P_0402_50V8J

1

2

R4552.2K_0402_5%

@R4552.2K_0402_5%

@12

C52710P_0402_50V8JC52710P_0402_50V8J

1

2

R450 0_0402_5%DIS@

R450 0_0402_5%DIS@

1 2

D5BAT54S-7-F_SOT23-3

@D5BAT54S-7-F_SOT23-3

@2

3

1

R444 0_0402_5%DIS@R444 0_0402_5%DIS@1 2

R442 0_0402_5%DIS@R442 0_0402_5%DIS@1 2

R441 0_0402_5%PX@R441 0_0402_5%PX@1 2

U24SN74AHCT1G125DCKR_SC70-5U24SN74AHCT1G125DCKR_SC70-5

A2 Y 4OE

#1

G3

P5

R458 0_0402_5%PX@

R458 0_0402_5%PX@ 12

C526

10P_0402_50V8J

C526

10P_0402_50V8J

1

2

T67 PAD@

T67 PAD@

R460 0_0402_5%PX@

R460 0_0402_5%PX@ 12

Page 33: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+5VS_HDMI

HDMI_TX1-_CONNHDMI_TX2+_CONN

HDMI_TX0+_CONNHDMI_TX0-_CONN

HDMI_CLK+_CONN

HDMI_TX1+_CONN

HDMI_TX2-_CONN

HDMI_CLK-_CONN

HDMICLK_R

HDMIDAT_R

HDMIDAT_R

HDMICLK_R

HDMI_CLK-_CONN

HDMI_CLK+_CONNHDMI_TX0-_CONN

HDMI_TX0+_CONNHDMI_TX1-_CONN

HDMI_TX1+_CONNHDMI_TX2-_CONN

HDMI_TX2+_CONN

HDMI_TX0+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX1+_CONN

HDMI_CLK-_CONN

HDMI_CLK+_CONN

HDMI_TX2-_CONN

HDMI_TX0-_CONN HDMI_TX1+_CK

HDMI_TX2-_CK

HDMI_TX1-_CK

HDMI_CLK-_CK

HDMI_TX2+_CK

HDMI_TX0+_CKHDMI_TX0-_CK

HDMI_CLK+_CK

HDMI_DET

HDMI_TX1+_CK

HDMI_TX2-_CK

HDMI_TX1-_CK

HDMI_CLK-_CK

HDMI_TX2+_CK

HDMI_TX0+_CKHDMI_TX0-_CK

HDMI_CLK+_CK

HDMI_TX1-_CONN

HDMI_TX1+_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_CLK+_CONN

HDMI_TX2-_CONN

HDMI_CLK-_CONN

HDMI_TX2+_CONN

HDMI_TX1+_CK

HDMI_TX2-_CK

HDMI_TX1-_CK

HDMI_CLK-_CK

HDMI_TX2+_CK

HDMI_TX0+_CK

HDMI_TX0-_CK

HDMI_CLK+_CK

HDMIDAT_R

HDMI_TX0+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX1+_CONN

HDMI_CLK-_CONN

HDMI_CLK+_CONN

HDMI_TX2-_CONN

HDMI_TX0-_CONN

TMDS_B_HPD#

HDMICLK_R

+5VS_HDMI_F

HDMI_TX1+_CK<17>HDMI_TX1-_CK<17>HDMI_TX2+_CK<17>HDMI_TX2-_CK<17>

HDMI_CLK+_CK<17>HDMI_CLK-_CK<17>HDMI_TX0+_CK<17>HDMI_TX0-_CK<17>

VGA_HDMI_TX0-<24>VGA_HDMI_TX0+<24>

VGA_HDMI_TX1-<24>

VGA_HDMI_CLK-<24>

VGA_HDMI_TX1+<24>

VGA_HDMI_TX2-<24>VGA_HDMI_TX2+<24>

VGA_HDMI_CLK+<24>

HDMIDAT_NB<17>

HDMICLK_NB<17>

VGA_HDMI_SCL<24>

VGA_HDMI_SDA<24>

TMDS_B_HPD#<17>

HDMI_DETECT_VGA<24>

+5VS

+5VS +5VS

+3VS

+3VS

+5VS

+3VS

+3VGS

+3VS

+5VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

HDMI CONNCustom

33 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics,Ltd.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

HDMI CONNCustom

33 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics,Ltd.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

HDMI CONNCustom

33 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics,Ltd.

LA-6751P

Pull up R for PCH OR VGA SIDE

NEAR CONNECT

8/6 Modify

Change footprint20100814

Change footprint20100814

Change footprint20100814

8/14 change P/N toDMN66D0LDW-7_SOT363-6(SB00000DH00)

9/27 add F2 for safty

R474 680_0402_1%UMA_HDMI@R474 680_0402_1%UMA_HDMI@1 2 R471 0_0402_5%HDMI@ R471 0_0402_5%HDMI@ 1 2

C536 0.1U_0402_16V7KDIS_HDMI@C536 0.1U_0402_16V7KDIS_HDMI@1 2

R472 680_0402_1%UMA_HDMI@R472 680_0402_1%UMA_HDMI@1 2

R478 0_0402_5%UMA_HDMI@

R478 0_0402_5%UMA_HDMI@

1 2

C5430.1U_0402_16V4Z

HDMI@

C5430.1U_0402_16V4Z

HDMI@

1

2

R874100K_0402_5%DIS_HDMI@

R874100K_0402_5%DIS_HDMI@

12

C541 0.1U_0402_16V7KDIS_HDMI@C541 0.1U_0402_16V7KDIS_HDMI@1 2

G

D

SQ95

2N7002H_SOT23-3UMA_HDMI@

G

D

SQ95

2N7002H_SOT23-3UMA_HDMI@

2

13

JHDMI1

SUYIN_100042GR019M23DZL

JHDMI1

SUYIN_100042GR019M23DZL

D2+1D2_shield2D2-3D1+4D1_shield5D1-6D0+7D0_shield8D0-9CK+10CK_shield11CK-12CEC13Reserved14SCL15SDA16DDC/CEC_GND17+5V18HP_DET19

G1 20

G2 21

G3 22

G4 23

C538 0.1U_0402_16V7KDIS_HDMI@C538 0.1U_0402_16V7KDIS_HDMI@1 2

R486 0_0402_5%UMA_HDMI@

R486 0_0402_5%UMA_HDMI@

1 2

G

D

S

Q942N7002H_SOT23-3DIS_HDMI@

G

D

S

Q942N7002H_SOT23-3DIS_HDMI@2

13

R69810K_0402_5%

DIS_HDMI@R69810K_0402_5%

DIS_HDMI@

12

Q63A2N7002DW-T/R7_SOT363-6

HDMI@

Q63A2N7002DW-T/R7_SOT363-6

HDMI@

61

2

G

DS

Q932N7002H_SOT23-3

UMA_HDMI@

G

DS

Q932N7002H_SOT23-3

UMA_HDMI@

2

13

R4851M_0402_5%

UMA_HDMI@

R4851M_0402_5%

UMA_HDMI@

12

R493 499_0402_1%DIS_HDMI@R493 499_0402_1%DIS_HDMI@1 2

C542 0.1U_0402_16V7KDIS_HDMI@C542 0.1U_0402_16V7KDIS_HDMI@1 2

R470 0_0402_5%HDMI@ R470 0_0402_5%HDMI@ 1 2

R464 0_0402_5%HDMI@ R464 0_0402_5%HDMI@ 1 2

L38

WCM-2012-900T_4P

@ L38

WCM-2012-900T_4P

@

11

44 3 3

2 2

R479 0_0402_5%DIS_HDMI@

R479 0_0402_5%DIS_HDMI@

1 2

R475 680_0402_1%UMA_HDMI@R475 680_0402_1%UMA_HDMI@1 2

C535 0.1U_0402_16V7KDIS_HDMI@C535 0.1U_0402_16V7KDIS_HDMI@1 2

R476 680_0402_1%UMA_HDMI@R476 680_0402_1%UMA_HDMI@1 2

R466 0_0402_5%HDMI@ R466 0_0402_5%HDMI@ 1 2

L36

WCM-2012-900T_4P

@ L36

WCM-2012-900T_4P

@

11

44 3 3

2 2

D14BAT54S-7-F_SOT23-3

@D14BAT54S-7-F_SOT23-3

@

23

1

R7380_0402_5%

UMA_HDMI@

R7380_0402_5%

UMA_HDMI@

12

R496 499_0402_1%DIS_HDMI@R496 499_0402_1%DIS_HDMI@1 2

R465 0_0402_5%HDMI@ R465 0_0402_5%HDMI@ 1 2

R4842.2K_0402_5%HDMI@

R4842.2K_0402_5%HDMI@1

2

D12BAT54S-7-F_SOT23-3

@D12BAT54S-7-F_SOT23-3

@2

3

1

R7390_0402_5%DIS_HDMI@

R7390_0402_5%DIS_HDMI@

12

R492 499_0402_1%DIS_HDMI@R492 499_0402_1%DIS_HDMI@1 2

R480 0_0402_5%UMA_HDMI@

R480 0_0402_5%UMA_HDMI@

1 2

R488100K_0402_5%

HDMI@

R488100K_0402_5%

HDMI@1

2

R481 0_0402_5%DIS_HDMI@

R481 0_0402_5%DIS_HDMI@

1 2

L37

WCM-2012-900T_4P

@ L37

WCM-2012-900T_4P

@

11

44 3 3

2 2

F2

1.1A_6V_SMD1812P110TFHDMI@

F2

1.1A_6V_SMD1812P110TFHDMI@

21

R467 0_0402_5%HDMI@ R467 0_0402_5%HDMI@ 1 2

C537 0.1U_0402_16V7KDIS_HDMI@C537 0.1U_0402_16V7KDIS_HDMI@1 2

R4832.2K_0402_5%

HDMI@

R4832.2K_0402_5%

HDMI@ 12

R494 499_0402_1%DIS_HDMI@R494 499_0402_1%DIS_HDMI@1 2

EB

CQ28

MMBT3904_G_SOT23-3DIS_HDMI@

EB

CQ28

MMBT3904_G_SOT23-3DIS_HDMI@ 2

31

R463 680_0402_1%UMA_HDMI@R463 680_0402_1%UMA_HDMI@1 2

D11BAT54S-7-F_SOT23-3

@D11BAT54S-7-F_SOT23-3

@2

3

1

L35

WCM-2012-900T_4P

@ L35

WCM-2012-900T_4P

@

11

44 3 3

2 2

C539 0.1U_0402_16V7KDIS_HDMI@C539 0.1U_0402_16V7KDIS_HDMI@1 2

D13RB491D_SC59-3

HDMI@

D13RB491D_SC59-3

HDMI@

2 1

R491 499_0402_1%DIS_HDMI@R491 499_0402_1%DIS_HDMI@1 2

R477 680_0402_1%UMA_HDMI@R477 680_0402_1%UMA_HDMI@1 2

R6960_0402_5%@

R6960_0402_5%@

12

C540 0.1U_0402_16V7KDIS_HDMI@C540 0.1U_0402_16V7KDIS_HDMI@1 2

R495 499_0402_1%DIS_HDMI@R495 499_0402_1%DIS_HDMI@1 2

R482

0_0805_5%@

R482

0_0805_5%@

R469 0_0402_5%HDMI@ R469 0_0402_5%HDMI@ 1 2R473 680_0402_1%UMA_HDMI@R473 680_0402_1%UMA_HDMI@1 2

R489 499_0402_1%DIS_HDMI@R489 499_0402_1%DIS_HDMI@1 2

Q63B 2N7002DW-T/R7_SOT363-6

HDMI@

Q63B 2N7002DW-T/R7_SOT363-6

HDMI@

3

5

4

R462 680_0402_1%UMA_HDMI@R462 680_0402_1%UMA_HDMI@1 2

R468 0_0402_5%HDMI@ R468 0_0402_5%HDMI@ 1 2

R697150K_0402_5%

DIS_HDMI@R697150K_0402_5%

DIS_HDMI@

1 2

R490 499_0402_1%DIS_HDMI@R490 499_0402_1%DIS_HDMI@1 2

Page 34: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

LPC_FRAME#_RLPC_AD3_RLPC_AD2_RLPC_AD1_RLPC_AD0_R

EC_TX_P80_DATA

PCI_RST#_RCLK_PCI_DB

WLAN_CLKREQ1#

BT_ACTIVEPCIE_WAKE#

WLAN_LED#

+1.5VS_CONN

EC_RX_P80_CLK

LPC_FRAME#LPC_AD3LPC_AD2LPC_AD1LPC_AD0

BUF_PLT_RST#CLK_PCI_DB

LPC_FRAME#_RLPC_AD3_RLPC_AD2_RLPC_AD1_RLPC_AD0_RPCI_RST#_R

PCIE_WAKE#<16,35>

WLAN_CLKREQ1#<15>

USB20_N9 <18>USB20_P9 <18>

BUF_PLT_RST# <18,35,40>WL_OFF# <18>

EC_TX_P80_DATA<40,41>EC_RX_P80_CLK<40,41>

WLAN_LED# <56,57>

BT_ACTIVE<42>

SMB_CLK_S3 <12,13,15>SMB_DATA_S3 <12,13,15>PCIE_PTX_C_DRX_N2<15>

PCIE_PTX_C_DRX_P2<15>

PCIE_PRX_DTX_N2<15>PCIE_PRX_DTX_P2<15>

LPC_AD2 <14,40>LPC_AD1 <14,40>

LPC_AD3 <14,40>

LPC_AD0 <14,40>

LPC_FRAME# <14,40>

CLK_PCI_DB <15>

CLK_PCIE_WLAN1#<15>CLK_PCIE_WLAN1<15>

+3VS_WLAN

+3VS+3VALW

+3VALW+1.5VS

+3VS_WLAN+3VS+1.5VS_CONN

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

Mini-Card/NEW Card/SIM

34 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

Mini-Card/NEW Card/SIM

34 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

Mini-Card/NEW Card/SIM

34 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Mini-Express Card for WLAN/WiMAX(Half)

Reserve for SW mini-pcie debug card.Series resistors closed to KBC side.

For EC to detect debug card insert.

Mini-Express Card(WLAN/WiMAX) C5460.1U_0402_16V4Z

@C5460.1U_0402_16V4Z

@1

2

R505100_0402_1%

R505100_0402_1%

1 2

R509 0_0402_5%@R509 0_0402_5%@1 2

R514 0_0402_5%R514 0_0402_5%1 2

R512 0_0402_5%@R512 0_0402_5%@1 2

J6

JUMP_43X79

@

J6

JUMP_43X79

@

11 2 2

R499 0_0402_5%@R499 0_0402_5%@1 2

JWLN1

TAITW_PFPET0-AFGLBG1ZZ4N0ME@

JWLN1

TAITW_PFPET0-AFGLBG1ZZ4N0ME@

WAKE#1

NC3

NC5

CLKREQ#7

GND9

REFCLK-11

REFCLK+13

GND15

NC17

NC19

GND21

PERn023

PERp025

GND27

GND29

PETn031

PETp033

GND35

NC37

NC39

NC41

NC43

NC45

NC47

NC49

NC51

GND53

3.3V 2

GND 4

1.5V 6

NC 8

NC 10

NC 12

NC 14

NC 16

GND 18

NC 20

PERST# 22

+3.3Vaux 24

GND 26

+1.5V 28

SMB_CLK 30

SMB_DATA 32

GND 34

USB_D- 36

USB_D+ 38

GND 40

LED_WWAN# 42

LED_WLAN# 44

LED_WPAN# 46

+1.5V 48

GND 50

+3.3V 52

GND 54R506

100_0402_1%R506

100_0402_1%

1 2

R502 0_0402_5%@R502 0_0402_5%@1 2

J7JUMP_43X79

@

J7JUMP_43X79

@

11

22

C5440.1U_0402_16V4Z

@ C5440.1U_0402_16V4Z

@

1

2

R513 0_0402_5%@R513 0_0402_5%@1 2

R507100K_0402_5%R507100K_0402_5%

12

R498 0_0402_5%R498 0_0402_5%1 2

R5040_0402_5%@

R5040_0402_5%@

12

R510 0_0402_5%@R510 0_0402_5%@1 2

R508 0_0402_5%@R508 0_0402_5%@1 2

R5030_0402_5% @ R5030_0402_5% @ 12

R497 0_0402_5%@R497 0_0402_5%@1 2

C5450.1U_0402_16V4Z

@C5450.1U_0402_16V4Z

@1

2

R511 0_0402_5%@R511 0_0402_5%@1 2

R500 0_0402_5%R500 0_0402_5%1 2

R501 0_0402_5%@R501 0_0402_5%@1 2

Page 35: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCIE_PRX_C_DTX_N1

PCIE_PRX_C_DTX_P1

LAN_XTALO

LAN_XTALI

+1.1_DVDDL

+1.7_VDDCT +1.7_LX

CLKREQ_LAN#

CLKREQ_LAN#

PCIE_WAKE#_R

MDI1+

MDI0+MDI0-

MDI3+MDI3-MDI2+

MDI1-

MDI2-

LAN_XTALILAN_XTALO

BUF_PLT_RST#

LAN_LINK#

+2.7_AVDDH

CLK_PCIE_LAN_CCLK_PCIE_LAN#_C

+1.7_LX

ACTIVITY

+3V_LAN

LAN_RBIAS

MDI0-

MDI0+

MDI2-

MDI3+

MDI3-

MDI1+

MDI2+

MDI1-

+1.1_AVDDL+1.1_AVDDL

+1.1_AVDDL+1.1_AVDDL+1.1_AVDDL

+2.7_AVDDH+2.7_AVDDH

+1.1_DVDDL

+1.7_VDDCT

CLKREQ_LAN#_R

CLK_PCIE_LAN<15>CLK_PCIE_LAN#<15>

PCIE_WAKE#<16,34>LAN_WAKE#<40>

BUF_PLT_RST#<18,34,40>

PCIE_PTX_C_DRX_P1<15>

PCIE_PTX_C_DRX_N1<15>

MDI1+ <36>MDI2- <36>MDI2+ <36>

MDI0- <36>MDI0+ <36>MDI1- <36>

MDI3+ <36>MDI3- <36>

ACTIVITY <36>PCIE_PRX_DTX_N1<15>

PCIE_PRX_DTX_P1<15>LAN_LINK# <36>

CLKREQ_LAN#<15>

+1.7_LX+1.7_VDDCT

+1.7_VDDCT

+1.7_LX

+3V_LAN+3VALW

+3V_LAN

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

LAN-AR8151/8152Custom

35 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

LAN-AR8151/8152Custom

35 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

LAN-AR8151/8152Custom

35 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Atheros request can't disable LAN power

Place Close to Chip

Note 1 : 8152 no mount MDI3+, MDI3-, MDI2-, MDI2+resister and cap

Power On strappingPin Description Chip Default

H

--AR8151 Pin23=LED2.

LED0

AR8152, Pin23 is CLKREQ

L:Over Clock Disable

H:Over Clock Enable

H:SWR Switch mode regulator Select

no overclockingPD 5.1K

Place Close to LAN chipLED0,1,2 intel Pull UP

**

Layout Notice : Place as closechip as possible.

NearPin13

NearPin19

NearPin31

NearPin34

NearPin6

NearPin9

NearPin22

NearPin16

NearPin37

NearPin24

C554 & C555 Close pin1 < 200milC557 & C558 Close pin < 400mil

Note 2 : C574, C576, C580, C582, reserved for EMI.

LED2

Close toPin40

Note: Place Close to LAN chipL39 DCR< 0.15 ohm Rate current > 1A

R516

Configure

**AR8152

Pin4

VDDCT_REG CLKREQn

Pin23

AR8151 CLKREQn LED[2]

Configure

R525

*

C559

Close Pin 10

Close together

C56

70.

1U_0

402_

16V

4ZC

567

0.1U

_040

2_16

V4Z1

2

C56

00.

1U_0

402_

16V

4ZC

560

0.1U

_040

2_16

V4Z

1

2

R52649.9_0402_1%

R52649.9_0402_1%

1 2

C56

81U

_040

2_6.

3V4Z

C56

81U

_040

2_6.

3V4Z1

2

U26

S IC AR8152-AL1E QFN 40P E-LAN CTRL

8152@U26

S IC AR8152-AL1E QFN 40P E-LAN CTRL

8152@

L39

4.7UH_SIA4012-4R7M_20%

L39

4.7UH_SIA4012-4R7M_20%1 2

C559 0.1U_0402_16V4Z8152@

C559 0.1U_0402_16V4Z8152@1 2

R52849.9_0402_1%

R52849.9_0402_1%

1 2

C54

910

00P

_040

2_50

V7K

@C

549

1000

P_0

402_

50V

7K@

C57

20.

1U_0

402_

16V

4ZC

572

0.1U

_040

2_16

V4Z

1

2

C583 0.1U_0402_16V4ZGIGA@

C583 0.1U_0402_16V4ZGIGA@

1 2

C552 0.1U_0402_16V7KC552 0.1U_0402_16V7K1 2

C57

8

27P

_040

2_50

V8J

C57

8

27P

_040

2_50

V8J

1

2

C576 1000P_0402_50V7K@ C576 1000P_0402_50V7K@1 2

R52749.9_0402_1%

R52749.9_0402_1%

1 2

C57

10.

1U_0

402_

16V

4ZC

571

0.1U

_040

2_16

V4Z

1

2

C54

710

U_0

805_

10V

4ZC

547

10U

_080

5_10

V4Z

1

2

J8

JUMP_43X79@

J8

JUMP_43X79@

11 2 2

C55

710

U_0

805_

10V

4ZC

557

10U

_080

5_10

V4Z1

2

C56

50.

1U_0

402_

16V

4ZG

IGA

@C

565

0.1U

_040

2_16

V4Z

GIG

A@

1

2

C57

30.

1U_0

402_

16V

4ZG

IGA

@C

573

0.1U

_040

2_16

V4Z

GIG

A@

1

2

R518 0_0402_5%R518 0_0402_5%12

C5610.1U_0402_16V4Z

C5610.1U_0402_16V4Z

1 2R525

0_0402_5%

GIGA@R525

0_0402_5%

GIGA@1 2

C54

80.

1U_0

402_

16V

4ZC

548

0.1U

_040

2_16

V4Z

1

2

R53349.9_0402_1%

GIGA@R533

49.9_0402_1%

GIGA@1 2

C55

810

U_0

805_

10V

4Z@

C55

810

U_0

805_

10V

4Z@

1

2

C56

40.

1U_0

402_

16V

4ZG

IGA

@C

564

0.1U

_040

2_16

V4Z

GIG

A@

1

2

R53249.9_0402_1%

GIGA@R532

49.9_0402_1%

GIGA@1 2

R52949.9_0402_1%

R52949.9_0402_1%

1 2

Y4

25MHZ_20PF_7A25000012

Y4

25MHZ_20PF_7A25000012

1 2

C55

51U

_040

2_6.

3V4Z

C55

51U

_040

2_6.

3V4Z1

2

C580 1000P_0402_50V7K@ C580 1000P_0402_50V7K@1 2

C55

40.

1U_0

402_

16V

4ZC

554

0.1U

_040

2_16

V4Z1

2

C56

30.

1U_0

402_

16V

4ZC

563

0.1U

_040

2_16

V4Z1

2

C57

9

27P

_040

2_50

V8J

C57

9

27P

_040

2_50

V8J1

2

C575 0.1U_0402_16V4ZC575 0.1U_0402_16V4Z1 2

R521 0_0402_5%R521 0_0402_5%1 2

Atheros8151-AL1A

U26

AR8151-AL1A_QFN40_5X5GIGA@

Atheros8151-AL1A

U26

AR8151-AL1A_QFN40_5X5GIGA@

RX_P35

VDD33 1

TX_P30

TX_N29

RX_N36

TRXP0 11TRXN0 12

TRXP1 14TRXN1 15

RBIAS 10

LX 40

LED_0 38

LED_1 39

TEST_RST28

TESTMODE27

SMCLK25

SMDATA26

WAKE#3

PERST#2

LED_2 23

REFCLK_P33REFCLK_N32

AVDDL31

AVDDL34

AVDDL_REG6AVDDH 22

AVDDH_REG 9

DVDDL 24

DVDDL_REG 37

VDDCT 5

CLKREQ#4

GND41

XTLO7

XTLI8

AVDDH 16

TRXP2 17TRXN2 18

AVDDL19

TRXP3 20TRXN3 21

AVDDL13

C581 0.1U_0402_16V4ZGIGA@

C581 0.1U_0402_16V4ZGIGA@

1 2R519 0_0402_5%@R519 0_0402_5%@1 2

R53049.9_0402_1%

GIGA@R530

49.9_0402_1%

GIGA@1 2

C56

21U

_040

2_6.

3V4Z

C56

21U

_040

2_6.

3V4Z1

2

C582 1000P_0402_50V7K@ C582 1000P_0402_50V7K@1 2

R516 0_0402_5%8152@

R516 0_0402_5%8152@1 2

R522 2.37K_0402_1%R522 2.37K_0402_1%1 2

C577 0.1U_0402_16V4ZC577 0.1U_0402_16V4Z1 2

C553 0.1U_0402_16V7KC553 0.1U_0402_16V7K1 2R515 5.1K_0402_5%R515 5.1K_0402_5%1 2

C56

90.

1U_0

402_

16V

4ZC

569

0.1U

_040

2_16

V4Z1

2

R53149.9_0402_1%

GIGA@R531

49.9_0402_1%

GIGA@1 2

C56

60.

1U_0

402_

16V

4ZC

566

0.1U

_040

2_16

V4Z1

2

C574 1000P_0402_50V7K@ C574 1000P_0402_50V7K@1 2

R517 0_0402_5%R517 0_0402_5%12

C57

01U

_040

2_6.

3V4Z

C57

01U

_040

2_6.

3V4Z

1

2

Page 36: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MDO2+

MDO0-

MDO1+

MDO1-

MDO2-

MDO3+

MDO3-

MDO0+

MDI3+MDI3-

MDI2+MDI2-

MCT3

MCT2

MDO3+MDO3-

MDO2+MDO2-

MDI0+MDI0-

MDI1-MDI1+

MDO1-MDO1+

MDO0+MDO0-

LAN_LINK#

ACTIVITY

MDI1-

MDI1+

MCT1

MCT0

MDI0-

MDI0+

MDI3+<35>MDI3-<35>

MDI2+<35>MDI2-<35>

MDI0+<35>MDI0-<35>

MDI1+<35>MDI1-<35>

LAN_LINK#<35>

ACTIVITY<35>

+1.7_VDDCT

+3V_LAN

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

LAN_Transformer

B

36 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

LAN_Transformer

B

36 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

LAN_Transformer

B

36 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

6/23 update

8/23 Change T1,T2 P/N to SP050006E00

R02

Place Close to T2

Reserve D1 for EMI go rural solution20101006

Reserve gas tube for EMI go rural solution20101006

R699

220_0402_5%

R699

220_0402_5%12

T1

BOTHHAND_NS0013LFGIGA@

T1

BOTHHAND_NS0013LFGIGA@

TD+1

TD-2

CT3

CT6

RD+7

RD-8 RX- 9RX+ 10

CT 11

CT 14TX- 15TX+ 16

NC4

NC5NC 13

NC 12

C379470P_0402_50V7K

@C379

470P_0402_50V7K

@1

2

C5851000P_1206_2KV7K

C5851000P_1206_2KV7K

1 2

R304

0_0603_5%

R304

0_0603_5%12

R538 220_0402_5%R538 220_0402_5%12

JRJ2

LIYO_101007-08203-033

ME@

JRJ2

LIYO_101007-08203-033

ME@

PR1-2

PR1+1

PR2+3

PR3+4

PR3-5

PR2-6

PR4+7

PR4-8

Yellow LED+9

Yellow LED-10

Green LED+11

Green LED-12

SHLD1 13

SHLD2 14

SHLD2 16

SHLD1 15

C64422U_1206_10V7K

@

C64422U_1206_10V7K

@

1

2

C427

1U_0402_6.3V4Z

@C427

1U_0402_6.3V4Z

@1

2

C64322U_1206_10V7K

@

C64322U_1206_10V7K

@

1

2

R53675_0402_5%

R53675_0402_5%

12

R53775_0402_5%

R53775_0402_5%

12

D31

TCLAMP3302N.TCT_SLP2626P10-10

@

D31

TCLAMP3302N.TCT_SLP2626P10-10

@

11

22

33

44

55

66

77

88

99

1010

GND11

C4350.1U_0402_16V4Z

[email protected]_0402_16V4Z

GIGA@

1

2

C4380.1U_0402_16V4ZC4380.1U_0402_16V4Z

1

2

C4360.1U_0402_16V4Z

[email protected]_0402_16V4Z

GIGA@

1

2

R53575_0402_5%

GIGA@R53575_0402_5%

GIGA@12

R53475_0402_5%

GIGA@R53475_0402_5%

GIGA@12

C4400.1U_0402_16V4ZC4400.1U_0402_16V4Z

1

2

C378470P_0402_50V7K

@C378

470P_0402_50V7K

@1

2

T2

BOTHHAND_NS0013LF

T2

BOTHHAND_NS0013LF

TD+1

TD-2

CT3

CT6

RD+7

RD-8 RX- 9RX+ 10

CT 11

CT 14TX- 15TX+ 16

NC4

NC5NC 13

NC 12

Page 37: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

REMOTE1+

REMOTE2-

REMOTE2+REMOTE1-

REMOTE1+

REMOTE2-

REMOTE2+

EC_SMB_DA2

EC_SMB_CK2

REMOTE2-

REMOTE2+

REMOTE1-

REMOTE1+

REMOTE1-

EC_TACH<40>EC_FAN_PWM<40>

EC_SMB_CK2 <15,24,40>

EC_SMB_DA2 <15,24,40>

+3VS

+5VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

EMC1403_Thermal sensor/FANCustom

37 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics,Ltd.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

EMC1403_Thermal sensor/FANCustom

37 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics,Ltd.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

EMC1403_Thermal sensor/FANCustom

37 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics,Ltd.

LA-6751P

Close to DDR

Under WWAN

FAN1 Conn

REMOTE1,2+/-:Trace width/space:10/10 milTrace length:<8"

Address 1001_101xb

Close U20 SMSC thermal sensorplaced near by VRAM

10/5 change P/N to SA000046C00

JFAN1

ACES_85205-04001ME@

JFAN1

ACES_85205-04001ME@

11

22

33

G55

G66

44

U27

EMC1403-2-AIZL-TR_MSOP10

U27

EMC1403-2-AIZL-TR_MSOP10

DN13

DP12

VDD1

GND 6

ALERT# 8

DP24

DN25

THERM# 7

SMDATA 9

SMCLK 10

C5882200P_0402_50V7K

@C5882200P_0402_50V7K

@

1

2

EB

CQ97MMST3904-7-F_SOT323-3

EB

CQ97MMST3904-7-F_SOT323-3

2

31

C59110U_0805_10V4ZC59110U_0805_10V4Z1

2

C5872200P_0402_50V7K

C5872200P_0402_50V7K

1

2

EB

CQ98MMST3904-7-F_SOT323-3

@

EB

CQ98MMST3904-7-F_SOT323-3

@2

31

R54010K_0402_5%@

R54010K_0402_5%@

12

C589100P_0402_50V8J

@C589

100P_0402_50V8J

@1

2

C5900.1U_0402_16V4Z

C5900.1U_0402_16V4Z

1

2

C586100P_0402_50V8J

@C586

100P_0402_50V8J

@1

2

Page 38: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

A

A

B

B

C

C

D

D

E

E

F

F

G

G

H

H

1 1

2 2

3 3

4 4

SATA_DTX_C_IRX_P0

SATA_ITX_DRX_N0

SATA_DTX_IRX_N0SATA_DTX_C_IRX_N0SATA_DTX_IRX_P0

SATA_ITX_DRX_P0

USB20_P1_CUSB20_N1_C

USB_OC0#USB_ON#

USB20_P1USB20_N1

USB20_N1

USB20_P1

USB20_N1_C

USB20_P1_C

SATA_ITX_DRX_P0<14>

SATA_DTX_C_IRX_N0<14>SATA_DTX_C_IRX_P0<14>

SATA_ITX_DRX_N0<14>

ODD_EN<19>

USB_ON#<40,42,56,57> USB_OC0# <18,56,57>

USB20_P1<18>USB20_N1<18>

+5VS +3VS

+5VS +5V_ODD

+3VS

+5VS

+USB_VCCB

+USB_VCCB+5VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

HDD/ODD ConnectorB

38 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

HDD/ODD ConnectorB

38 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

HDD/ODD ConnectorB

38 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

SATA HDD Conn.

ODD Power Control

W=80mils

Left USB Conn.

Low Active

E-SATA COMBORIGHT USB PORT

Change footprint20100814

8/27 change to stuff

8/27 change to @

9/27 change C592 to4.2H SF000002Y00

C60810U_0805_10V4ZC60810U_0805_10V4Z

1

2

JHDD1

SUYIN_127043FB022G278ZR

JHDD1

SUYIN_127043FB022G278ZR

GND1

RX+2

RX-3

GND4

TX-5

TX+6

GND7

3.3V8

3.3V9

3.3V10

GND11

GND12

GND13

5V14

5V15

5V16

GND17

Reserved18

GND19

12V20

12V21

12V22

GND 23

GND 24

C60110U_0805_10V4Z

@

C60110U_0805_10V4Z

@

1

2

C607 0.01U_0402_16V7KC607 0.01U_0402_16V7K1 2

C596 0.01U_0402_16V7KC596 0.01U_0402_16V7K1 2

C5990.1U_0402_16V4ZC5990.1U_0402_16V4Z

1

2

R675100K_0402_5%

R675100K_0402_5%

1 2

R55210K_0402_5%R55210K_0402_5%

12

+C592220U_6.3V_M

+C592220U_6.3V_M

1

2

JUSB1

SUYIN_020173GR004M58BZL

ME@

JUSB1

SUYIN_020173GR004M58BZL

ME@

VCC1

D-2

D+3

GND4

GND15

GND26

GND37

GND48

Q100DTC124EKAT146_SC59-3Q100DTC124EKAT146_SC59-3

IN2

OU

T1

GN

D3

C6001U_0603_10V4Z

@

C6001U_0603_10V4Z

@

1

2

L65

WCM-2012-900T_4P

L65

WCM-2012-900T_4P

11

44 3 3

2 2

C597 0.01U_0402_16V7KC597 0.01U_0402_16V7K1 2

R661 0_0402_5%@

R661 0_0402_5%@1 2

C6030.1U_0402_16V4Z

@C6030.1U_0402_16V4Z

@1

2

C5951000P_0402_50V7K@

C5951000P_0402_50V7K@

1

2

Q99

AP2301GN-HF_SOT23-3

Q99

AP2301GN-HF_SOT23-32

3 1

R660 0_0402_5%@

R660 0_0402_5%@1 2

D16

PJD

LC05

_SO

T23

-3

@D16

PJD

LC05

_SO

T23

-3

@

2 31

U29

APL3510BKI_SO8

U29

APL3510BKI_SO8

GND1

IN2

OC# 5OUT 6

OUT 8

IN3

EN4

OUT 7

C5981000P_0402_50V7KC5981000P_0402_50V7K

1

2

C593470P_0402_50V7KC593470P_0402_50V7K

1

2

C594 0.1U_0402_16V4ZC594 0.1U_0402_16V4Z12

J9

JUMP_43X79

@ J9

JUMP_43X79

@

11 2 2

C6040.1U_0402_16V4ZC6040.1U_0402_16V4Z

1

2

C60210U_0805_10V4ZC60210U_0805_10V4Z

1

2

Page 39: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MIC_INL

SPK_L2+_CONNSPK_L1-_CONNSPK_R2+_CONNSPK_R1-_CONN

HDA_BITCLK_AUDIO

HDA_SYNC_AUDIO

HDA_RST_AUDIO#

HDA_SDOUT_AUDIO_R

SPK_L2+

SPK_R1-SPK_R2+SPK_L1-

MIC_INR

MIC_INL

MIC_INR

SPK_L2+

SPK_R1-

SPK_L1-

SPK_R2+

GNDA

PC_BEEP

HDA_RST_AUDIO#

+VAUX_3.3

EC_MUTE#

HP_OUTL_RHP_OUTR_R

HDA_SDOUT_AUDIO_RHDA_SDOUT_AUDIO

HDA_SYNC_AUDIO

HDA_RST_AUDIO#

PC_BEEP1 PC_BEEP

HDA_BITCLK_AUDIO_R

HDA_BITCLK_AUDIO

HDA_RST_AUDIO#<14>

HDA_SDIN0<14>

EAPD<40>

MIC_JD <43>PLUG_IN <43>

EC_MUTE#<40>

EXT_MIC_R <43>EXT_MIC_L <43>

HP_OUTL <43>HP_OUTR <43>

HDA_SYNC_AUDIO<14>

HDA_SDOUT_AUDIO<14>

BEEP#<40>

HDA_SPKR<14>

HDA_BITCLK_AUDIO<14>

+3VS

+LDO_OUT_3.3V

+3VS

+5VS

+5VS

+VAUX_3.3

+MICBIASC

+MICBIASC

+3VALW

+3VALW

+3VS

+MICBIASB

+MICBIASB

+3VS

+3VS

+CLASSD_5VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

CX20671 Codec

C

39 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics,Ltd.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

CX20671 Codec

C

39 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics,Ltd.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

CX20671 Codec

C

39 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics,Ltd.

LA-6751P

Internal MIC

EMI

External MIC

An integrated 3.3 V to 1.8V Low-dropoutvoltage regulator (LDO).

GND GNDA

EAPD active low0=power down ex AMP1=power up ex AMP

Sense resistors must beconnected same powerthat is used for VAUX_3.3

CX20671High Definition Audio Codec SoCWith Integrated Class-D StereoAmplifier.An integrated 5 V to 3.3 V Low-dropoutvoltage regulator (LDO).

AVDD_3.3 pinis output ofinternal LDO. NOT connectto external supply.

To support Wake-on-Jack or Wake-on-Ring, the CODECVAUX_3.3 & VDD_IO pins must be powerd by a rail that is not removed unless AC power is removed.*DSH page42 has more detail.

Layout Note:Path from +5VS to LPWR_5.0 RPWR_5.0 must be very low resistance (<0.01 ohms)

Internal SPEAKER

Port C

Please bypass caps very close to device.

Port A

Changed from 5.1ohm to 15ohmfor "zi zi"noise.

10K only needed if supply to VAUX_3.3 is removed during system re-start.

wide 20MIL

Headphone

6/24 change +3VS

PC Beep

ICH Beep

EC Beep

8/10 update

10/08 update

8/24 update

8/10 update for vendor suggestion

8/10 update

Change footprint20100814

9/27 Update U30 P/N to SA00003K410

9/28 Change to R879 for 21Z

C637

0.1U_0402_16V4Z

@C637

0.1U_0402_16V4Z

@1 2

R5610_0402_5%@

R5610_0402_5%@ 12

C62

7

0.1U

_040

2_16

V4Z

C62

7

0.1U

_040

2_16

V4Z1

2

R55633_0402_5%

@

R55633_0402_5%

@

1 2

C584

100P_0402_50V8J@

C584

100P_0402_50V8J@

1

2

D17 RB751V_SOD323D17 RB751V_SOD323

2 1

C61

6

10U

_080

5_10

V4Z

C61

6

10U

_080

5_10

V4Z1

2

C61

022

P_0

402_

50V

8J

@

C61

022

P_0

402_

50V

8J

@

1

2

C63

0

10U

_080

5_10

V4Z

C63

0

10U

_080

5_10

V4Z

1

2

R5980_0402_5%

@R598

0_0402_5%

@12

R564 5.11K_0402_1%R564 5.11K_0402_1%1 2

C638 1U_0603_10V4ZC638 1U_0603_10V4Z1 2

R582

33_0402_5%

R582

33_0402_5%1 2

R576

0_0402_5%

@R576

0_0402_5%

@1 2

C62

5

0.1U

_040

2_16

V4Z

C62

5

0.1U

_040

2_16

V4Z1

2

C61

7

0.1U

_040

2_16

V4Z

C61

7

0.1U

_040

2_16

V4Z1

2

R3514.7K_0402_5%@R3514.7K_0402_5%@

12

C6422.2U_0603_6.3V4Z

C6422.2U_0603_6.3V4Z1 2

C61

8

1U_0

603_

10V

4Z

C61

8

1U_0

603_

10V

4Z

1

2

MIC1

WM-64PCY_2P45@

MIC1

WM-64PCY_2P45@

12

R569 2.2K_0402_5%R569 2.2K_0402_5%

R5730_0402_5% R5730_0402_5%12

C63

9

0.1U

_040

2_16

V4Z

C63

9

0.1U

_040

2_16

V4Z1

2

U30

CX20671-21Z_QFN40_6X6

U30

CX20671-21Z_QFN40_6X6

VD

D_I

O7

VA

UX

_3.3

2

SDATA_OUT4

BIT_CLK5

SDATA_IN6

DV

DD

_3.3

18

SYNC8

RESET#9

PORTA_L 22PORTA_R 23

AV

DD

_3.3

27

PORTC_L 30

RPWR_5.0 15LPWR_5.0 12

FLY_P 19

FLY_N 20

RIGHT-14RIGHT+16

PORTB_L 34

B_BIAS 33

PORTB_R 35

DMIC_CLK40

AVEE 21

C_BIAS 32

PORTC_R 31

FIL

T_1

.65

29

LEFT-13

GPIO1/SPK_MUTE#37

DMIC_1/21

AV

DD

_5V

28

GPIO0/EAPD#38

LEFT+11

SENSE_A 36

CLASS-D_REF 17AV

DD

_HP

26

FIL

T_1

.83

PC_BEEP10

GN

D41

NC 24

NC 25

NC 39

C62

3

0.1U

_040

2_16

V4Z

C62

3

0.1U

_040

2_16

V4Z1

2

C633 2.2U_0603_6.3V4ZC633 2.2U_0603_6.3V4Z1 2

R574 15_0402_5%

R574 15_0402_5%

1 2

R722 0_0603_5%@R722 0_0603_5%@ 12R721 0_0603_5%@R721 0_0603_5%@ 12

C61

122

P_0

402_

50V

8J

@

C61

122

P_0

402_

50V

8J

@

1

2 C61

222

P_0

402_

50V

8J

@

C61

222

P_0

402_

50V

8J

@

1

2

R720 0_0603_5%@R720 0_0603_5%@ 12

R58510K_0402_5%R58510K_0402_5%

12

R5600_0402_5% R5600_0402_5%12

R723 0_0603_5%@R723 0_0603_5%@ 12

C61

4

0.1U

_040

2_16

V4Z

C61

4

0.1U

_040

2_16

V4Z1

2

R577

0_0402_5%

@R577

0_0402_5%

@1 2

C64

9

1000

P_0

402_

50V

7K

C64

9

1000

P_0

402_

50V

7K1

2

R563

10K

_040

2_5%

R563

10K

_040

2_5%

12

C62

4

10U

_080

5_10

V4Z

C62

4

10U

_080

5_10

V4Z1

2

G

D S

Q92N7002H_SOT23-3

G

D S

Q92N7002H_SOT23-3

2

1 3

R579

0_0402_5%

@R579

0_0402_5%

@1 2

C640

0.1U_0402_16V4Z

@C640

0.1U_0402_16V4Z

@1 2

R5780_0402_5% R5780_0402_5% 12

R723

FBMA-L11-160808-121LMA30T

R723

FBMA-L11-160808-121LMA30T

R571 100_0402_1%R571 100_0402_1%

R575 15_0402_5%

R575 15_0402_5%

1 2

C62

1

0.1U

_040

2_16

V4Z

C62

1

0.1U

_040

2_16

V4Z1

2

R568 2.2K_0402_5%R568 2.2K_0402_5%

R5720_0402_5% R5720_0402_5% 1 2

R565 10K_0402_1%R565 10K_0402_1%1 2

C62

9

10U

_080

5_10

V4Z

C62

9

10U

_080

5_10

V4Z

1

2

R722

FBMA-L11-160808-121LMA30T

R722

FBMA-L11-160808-121LMA30T

R5580_0402_5%@

R5580_0402_5%@ 12

C645 0.1U_0402_16V4ZC645 0.1U_0402_16V4Z1 2

C61

5

0.1U

_040

2_16

V4Z

@

C61

5

0.1U

_040

2_16

V4Z

@

1

2

C62

2

1U_0

603_

10V

4Z

C62

2

1U_0

603_

10V

4Z

1

2

R566 33_0402_5%R566 33_0402_5%1 2

C65

0

1000

P_0

402_

50V

7K

C65

0

1000

P_0

402_

50V

7K1

2

R721

FBMA-L11-160808-121LMA30T

R721

FBMA-L11-160808-121LMA30T

C61

9

0.1U

_040

2_16

V4Z

C61

9

0.1U

_040

2_16

V4Z1

2

R570 100_0402_1%R570 100_0402_1%

R5570_0402_5% R5570_0402_5%12

C62

8

10U

_080

5_10

V4Z

C62

8

10U

_080

5_10

V4Z

1

2

C64

7

1000

P_0

402_

50V

7K

C64

7

1000

P_0

402_

50V

7K1

2

C61

3

10U

_080

5_10

V4Z

C61

3

10U

_080

5_10

V4Z1

2

R720

FBMA-L11-160808-121LMA30T

R720

FBMA-L11-160808-121LMA30T

C63

2

0.1U

_040

2_16

V4Z

C63

2

0.1U

_040

2_16

V4Z1

2

R5804.7K_0402_5%

R5804.7K_0402_5%

12

R8790_0805_5%

R8790_0805_5%1 2

C634 2.2U_0603_6.3V4ZC634 2.2U_0603_6.3V4Z1 2

C62

0

10U

_080

5_10

V4Z

C62

0

10U

_080

5_10

V4Z1

2

R567 39.2K_0402_1%R567 39.2K_0402_1%1 2

C62

6

0.1U

_040

2_16

V4Z

C62

6

0.1U

_040

2_16

V4Z1

2

JSPK1

ACES_88231-04001ME@

JSPK1

ACES_88231-04001ME@

11

22

33

44

GND15

GND26

C60

922

P_0

402_

50V

8J

@

C60

922

P_0

402_

50V

8J

@

1

2

C65

1

1000

P_0

402_

50V

7K

C65

1

1000

P_0

402_

50V

7K1

2

R669

0_0402_5%

@R669

0_0402_5%

@1 2

R562

0.1_1206_1%

@R562

0.1_1206_1%

@1 2

C64

1

10U

_080

5_10

V4Z

C64

1

10U

_080

5_10

V4Z

1

2

D30 RB751V_SOD323D30 RB751V_SOD323

2 1

C63

1

0.1U

_040

2_16

V4Z

C63

1

0.1U

_040

2_16

V4Z1

2

Page 40: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

KSO[0..15]

KSI[0..7]

KSO9

SPI_CLK

KSI0

KSO10

KSO2

EC_RST#

CAPS_LED#

KSI2

KSO14

KSO4KSO3

KSI6

ECAGND

EC_SMB_CK1

KSO8

ACOFF

EC_SCI#

ACIN

BKOFF#

CHARGE_LED0#

KSO1

EC_SMI#

LPC_AD0

KSO13

LPC_AD3

KSI5

EC_SMB_DA2

KSO7

FWR#SPI_SI

EC_ONEC_LID_OUT#

TP_CLKKSO0

LPC_AD1 BATT_TEMP

KSO12

EC_SMB_CK2

IREF

EC

AG

ND

KSI4

KSI1

KSO6

FRD#SPI_SO

LPC_AD2

KSO11

SYSON

TP_DATA

KSI3

EC_SMB_DA1

KSI7

KSO15

KSO5

EC_MUTE#

PCH_POK_EC PCH_POK

BEEP#

USB_ON#

KB_RST#

SUSP#PBTN_OUT#

FSEL#SPICS#

KSO1

KSO2

USB_ON#

TP_DATA

TP_CLK

ACIN

BATT_TEMP

EC_SMB_CK2EC_SMB_DA2

FRD#SPI_SO

FSEL#SPICS#

EC_SMB_DA1

EC_SMB_CK1

H_PECI_R

EC_TACH

EC_TX_P80_DATAEC_RX_P80_CLK

EC_TACH

EC_PME#

H_PROCHOT#_EC

EC_FAN_PWM

SUSWARN#

LID_SW#

EC_RTCX1

SUSCLK_R

EC_RTCX1

INVT_PWM

EC_FAN_PWM

PCH_DPWROK

NOVO#

ODD_DA#

BRDID BRDID

CHG_ON#

RF_LED#

CPU1.5V_S3_GATE

CHARGE_LED1#

VR_HOT#KSO16KSO17

SUSCLK_RSUSCLK_R

CE_EN_EC

H_PROCHOT#_EC

BATT_LEN#

CLK_PCI_LPC<18>

KSO[0..15]<56,57>

KSI[0..7]<56,57>

EC_SMB_CK1<46>

EC_SMB_DA2<15,24,37>

EC_SMB_DA1<46>EC_SMB_CK2<15,24,37>

NUM_LED#<43>

SLP_S3#<16>SLP_S5#<16>EC_SMI#<19>

GATEA20<19>

LPC_FRAME#<14,34>

LPC_AD2<14,34>LPC_AD1<14,34>

LPC_AD3<14,34>

LPC_AD0<14,34>

BUF_PLT_RST#<18,34,35>

EC_SCI#<19>

EC_RX_P80_CLK<34,41>EC_TX_P80_DATA<34,41>

BATT_TEMP <46>

IREF <47>

TP_DATA <56,57>TP_CLK <56,57>

CAPS_LED# <43>CHARGE_LED0# <56,57>

SYSON <44,49>

EC_RSMRST# <16>

EC_ON <43,48>

ACIN <16,24,47>VR_ON <53>

FSTCHG <47>

ON/OFF#<43>

BKOFF# <31>

ACOFF <45,47>

EC_LID_OUT# <15>

USB_ON# <38,42,56,57>

ENBKL <31>

EC_MUTE# <39>

ADP_I <46,47>

SERIRQ<14>

PCH_POK <6,16>

SLP_S4# <16>

BEEP# <39>

FRD#SPI_SO <41>

SPI_CLK <41>FWR#SPI_SI <41>

SUSP# <10,26,44,49,51,52>PBTN_OUT# <16>

CE_EN <31>

KB_RST#<19>

CHGVADJ <47>

EAPD <39>

FSEL#SPICS# <41>

KSI3<56,57>KSI4<56,57>

EC_TACH<37>

LAN_WAKE# <35>

PCI_PME# <18>

SUSCLK<16>

SUSWARN#<16>

LID_SW# <56,57>

H_PECI <6,19>

INVT_PWM<31>

EC_FAN_PWM<37>

PCH_DPWROK <16>

NOVO# <43>

PCH_APWROK <16>SA_PGOOD <50>

ODD_DA#<18,56,57>

CHG_ON#

RF_LED# <56,57>

CPU1.5V_S3_GATE <10>

ME_FLASH <14>

CMOS_OFF# <31>

CHARGE_LED1# <56,57>PWR_LED# <43,56,57>

PCH_RTCX2_OUT <14>

PCH_RTCX1_OUT <14>

H_PROCHOT# <6>VR_HOT#<46,53>KSO16<57>KSO17<57>

SYS_PWROK_EC <16>

BATT_SEL_EC <47>

IMVP_IMON <53>

BATT_LEN#<46>

+3VALW+EC_AVCC

+3VALW +EC_AVCC

+3VALW

+3VALW

+3VS

+3VALW

+5VS

+3VALW

+3VS +3VALW

+5VALW

+3VALW

+3VALW

+3VS

+3VS+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

BIOS & EC I/O PortCustom

40 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

BIOS & EC I/O PortCustom

40 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

BIOS & EC I/O PortCustom

40 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

ENE UPDATE 08/10/21

8/23 change to reserved

6/19 Add BRDID

6/24 Update R708,R709 must be close Y5

7/28 Modify

DVTEVT

MPPVT

100K +/- 5%

3.3V +/- 5%Vcc

minVR695Board ID

R694

0

3210

0.436 V0.289 V0.250 V0.216 V

0 V8.2K +/- 5%

0.875 V0.538 V

0.819 V0.503 V

0.712 V

VAD_BID typVAD_BID

33K +/- 5%

18K +/- 5%

maxAD_BID

0 V0 V

8/23 modify

7/23 Modify

7/23 Modify

Change footprint20100814

Change footprint20100814

10/6 Modify

Change to 0 ohm P/N

11/16 Modify

R608 10K_0402_5%

@

R608 10K_0402_5%

@

1 2

R7370_0402_5%

R7370_0402_5%

12

LPC & MISC

Int. K/B Matrix

SM Bus

GPIO

GPIO

AD Input

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPO

GPI

U31

KB930QF A0 LQFP 128P

LPC & MISC

Int. K/B Matrix

SM Bus

GPIO

GPIO

AD Input

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPO

GPI

U31

KB930QF A0 LQFP 128P

GA20/GPIO001

KBRST#/GPIO012

SERIRQ#3

LFRAME#4

LAD35

PM_SLP_S3#/GPIO046

LAD27

LAD18

VC

C9

LAD010

GN

D11

PCICLK12

PCIRST#/GPIO0513

PM_SLP_S5#/GPIO0714

EC_SMI#/GPIO0815

LID_SW#/GPIO0A16

SUSP#/GPIO0B17

PBTN_OUT#/GPIO0C18

EC_PME#/GPIO0D19

SCI#/GPIO0E20

INVT_PWM/PWM1/GPIO0F 21

VC

C22

BEEP#/PWM2/GPIO10 23

GN

D24

EC_THERM#/GPIO1125

FANPWM1/GPIO12 26

ACOFF/FANPWM2/GPIO13 27

FAN_SPEED1/FANFB1/GPIO1428

FANFB2/GPIO1529

EC_TX/GPIO1630

EC_RX/GPIO1731

ON_OFF/GPIO1832

VC

C33

PWR_LED#/GPIO1934

GN

D35

NUMLED#/GPIO1A36

ECRST#37

CLKRUN#/GPIO1D38

KSO0/GPIO2039

KSO1/GPIO2140

KSO2/GPIO2241

KSO3/GPIO2342

KSO4/GPIO2443

KSO5/GPIO2544

KSO6/GPIO2645

KSO7/GPIO2746

KSO8/GPIO2847

KSO9/GPIO2948

KSO10/GPIO2A49

KSO11/GPIO2B50

KSO12/GPIO2C51

KSO13/GPIO2D52

KSO14/GPIO2E53

KSO15/GPIO2F54

KSI0/GPIO3055

KSI1/GPIO3156

KSI2/GPIO3257

KSI3/GPIO3358

KSI4/GPIO3459

KSI5/GPIO3560

KSI6/GPIO3661

KSI7/GPIO3762

BATT_TEMP/AD0/GPIO38 63

BATT_OVP/AD1/GPIO39 64

ADP_I/AD2/GPIO3A 65

AD3/GPIO3B 66

AV

CC

67

DAC_BRIG/DA0/GPIO3C 68

AG

ND

69

EN_DFAN1/DA1/GPIO3D 70

IREF/DA2/GPIO3E 71

DA3/GPIO3F 72

CIR_RX/GPIO40 73

CIR_RLC_TX/GPIO41 74

AD4/GPIO42 75

SELIO2#/AD5/GPIO43 76

SCL1/GPIO4477

SDA1/GPIO4578

SCL2/GPIO4679

SDA2/GPIO4780

KSO16/GPIO4881

KSO17/GPIO4982

PSCLK1/GPIO4A 83

PSDAT1/GPIO4B 84

PSCLK2/GPIO4C 85

PSDAT2/GPIO4D 86

TP_CLK/PSCLK3/GPIO4E 87

TP_DATA/PSDAT3/GPIO4F 88

FSTCHG/SELIO#/GPIO50 89

BATT_CHGI_LED#/GPIO52 90

CAPS_LED#/GPIO53 91

BATT_LOW_LED#/GPIO54 92

SUSP_LED#/GPIO55 93

GN

D94

SYSON/GPIO56 95

VC

C96

SDICS#/GPXOA00 97

SDICLK/GPXOA01 98

SDIDO/GPXOA02 99

EC_RSMRST#/GPXO03 100

EC_LID_OUT#/GPXO04 101

EC_ON/GPXO05 102

EC_SWI#/GPXO06 103

ICH_PWROK/GPXO06 104

BKOFF#/GPXO08 105

WL_OFF#/GPXO09 106

GPXO10 107

GPXO11 108

SDIDI/GPXID0 109

PM_SLP_S4#/GPXID1 110

VC

C11

1

ENBKL/GPXID2 112

GN

D11

3

GPXID3 114

GPXID4 115

GPXID5 116

GPXID6 117

GPXID7 118

SPIDI/RD# 119

SPIDO/WR# 120

VR_ON/XCLK32K/GPIO57 121

XCLK1122

XCLK0123 V18R 124

VC

C12

5

SPICLK/GPIO58 126

AC_IN/GPIO59 127

SPICS# 128

C666100P_0402_50V8J

@C666100P_0402_50V8J

@1

2

R6012.2K_0402_5%R6012.2K_0402_5%

R595 47K_0402_5%R595 47K_0402_5%1 2

R6100_0402_5%@ R6100_0402_5%@12

G

D

S

Q372N7002H_SOT23-3G

D

S

Q372N7002H_SOT23-3

2

13

R6090_0402_5% R6090_0402_5%12

C662

0.1U_0402_16V

4ZC

6620.1U

_0402_16V4Z

1

2

R592 4.7K_0402_5%R592 4.7K_0402_5%1 2

C654

0.1U_0402_16V

4ZC

6540.1U

_0402_16V4Z

1

2C6591000P_0402_50V7K

C6591000P_0402_50V7K

1

2

R60510K_0402_5%

R60510K_0402_5%

12

C6674.7U_0603_6.3V6K

C6674.7U_0603_6.3V6K

1

2

Y5

32.7

68K

HZ

_12.

5PF

_9H

0320

0413

@

Y5

32.7

68K

HZ

_12.

5PF

_9H

0320

0413

@

OS

C4

OS

C1

NC

3

NC

2

R740100K_0402_5%

R740100K_0402_5%

12

C665100P_0402_50V8J

@C665100P_0402_50V8J

@1

2

R589 10_0402_5%@R589 10_0402_5%@12 R588

10K_0402_5%@

R58810K_0402_5%@

12

C660 22P_0402_50V8J@C660 22P_0402_50V8J@12

C347

18P_0402_50V

8J

@

C347

18P_0402_50V

8J

@

1

2

C664 100P_0402_50V8JC664 100P_0402_50V8J1 2

R7460_0402_5%@

R7460_0402_5%@12

C657

1000P_0402_50V

7KC

6571000P

_0402_50V7K

1

2

R607 0_0402_5%R607 0_0402_5%1 2

R694100K_0402_1%@R694100K_0402_1%@

12

R120 10M_0402_5%

@

R120 10M_0402_5%

@

1 2

R7470_0402_5%

@

R7470_0402_5%

@12

R708 0_0402_5%@ R708 0_0402_5%@1 2

R593 10K_0402_5%R593 10K_0402_5%1 2

C36718P_0402_50V8J

@

C36718P_0402_50V8J

@

1

2

L44FBM-11-160808-601-T_0603

L44FBM-11-160808-601-T_0603

1 2

L45 FBM-11-160808-601-T_0603L45 FBM-11-160808-601-T_06031 2

C653

0.1U_0402_16V

4ZC

6530.1U

_0402_16V4Z

1

2

R665 43_0402_1%R665 43_0402_1%1 2

R709 0_0402_5%@ R709 0_0402_5%@1 2

C655

0.1U_0402_16V

4ZC

6550.1U

_0402_16V4Z

1

2

R6958.2K_0402_5%R6958.2K_0402_5%

12

R590 47K_0402_5%R590 47K_0402_5%1 2

R599100K_0402_1%@ R599100K_0402_1%@12

R597 47K_0402_5%R597 47K_0402_5%1 2

C663 100P_0402_50V8JC663 100P_0402_50V8J1 2

R591 4.7K_0402_5%R591 4.7K_0402_5%1 2

R6022.2K_0402_5%R6022.2K_0402_5%

R6110_0402_5% R6110_0402_5%12

C9320P_0402_50V8C9320P_0402_50V8

12

C6610.1U_0402_16V4Z

C6610.1U_0402_16V4Z

1

2

R6002.2K_0402_5%

R6002.2K_0402_5%

D18 RB751V_SOD323@

D18 RB751V_SOD323@

21

C658

1000P_0402_50V

7KC

6581000P

_0402_50V7K

1

2

R594 10K_0402_5%R594 10K_0402_5%1 2

R603100K_0402_1%@ R603100K_0402_1%@12

R60610K_0402_5%

R60610K_0402_5%

12

R6042.2K_0402_5%

R6042.2K_0402_5%

C6560.1U_0402_16V4Z

C6560.1U_0402_16V4Z

1

2

G

D S

Q102

2N7002H_SOT23-3 @

G

D S

Q102

2N7002H_SOT23-3 @

2

1 3

Page 41: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

FWR#SPI_SI

SPI_CLKSPI_CLK_RHOLD#FRD#SPI_SO SPI_SO

SPI_CLK_R

FSEL#SPICS#

SPI_SI_EC

EC_TX_P80_DATAEC_RX_P80_CLK

FWR#SPI_SI <40>

SPI_CLK <40>FRD#SPI_SO<40>

FSEL#SPICS#<40>

EC_RX_P80_CLK<34,40>EC_TX_P80_DATA<34,40>

+3VALW

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

LED/EC SPI ROMB

41 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

LED/EC SPI ROMB

41 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

LED/EC SPI ROMB

41 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

20mils

EMI

H_3P8

H_3P3

Colse to EC

H_3P0NH_3P0x4P5N H_6P0

H_2P8 H_5P5N

EC DEBUG PORT

FOR EC 128KB SPI ROM(150mil PACKAGE) SA00003FL10SA00003JD00

8/27 R619 change to Bead

H3HOLEAH3HOLEA

1

FD1FD11

H6HOLEAH6HOLEA

1

R618 15_0402_5%R618 15_0402_5%1 2

H17HOLEAH17HOLEA

1

H8HOLEAH8HOLEA

1

H15HOLEAH15HOLEA

1

R619 0_0402_5%@R619 0_0402_5%@1 2

H12HOLEAH12HOLEA

1

R619

S SUPPRE_ KC FBMA-10-100505-101T 0402

R619

S SUPPRE_ KC FBMA-10-100505-101T 0402

H2HOLEAH2HOLEA

1

C70010P_0402_50V8J

@C700

10P_0402_50V8J

@1

2

H7HOLEAH7HOLEA

1

FD3FD31

FD4FD41

H11HOLEAH11HOLEA

1

C6990.1U_0402_16V4ZC6990.1U_0402_16V4Z

1

2

H4HOLEAH4HOLEA

1

R62015_0402_5%

R62015_0402_5%1 2

H5HOLEAH5HOLEA

1

R61710K_0402_5%R61710K_0402_5%

12

H10HOLEAH10HOLEA

1

H1HOLEAH1HOLEA

1

H13HOLEAH13HOLEA

1

JP3

ACES_85205-0400ME@

JP3

ACES_85205-0400ME@

11

22

33

44

FD2FD21

H16HOLEAH16HOLEA

1

H14HOLEAH14HOLEA

1

H9HOLEAH9HOLEA

1

U33

MX25L2005CMI-12G SOP

U33

MX25L2005CMI-12G SOP

VCC 8

HOLD# 7

CLK 6

DIO 5GND4WP#3DO2CS#1

Page 42: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

BTON_LED

USB20_N3USB20_P3

+USB_VCCC

USB20_N3_C

USB20_P3_C

USB20_P13USB20_N13

BT_ACTIVE

SATA_DTX_C_IRX_N4SATA_DTX_C_IRX_P4

SATA_DTX_IRX_N4SATA_DTX_IRX_P4

SATA_ITX_DRX_N4SATA_ITX_DRX_P4

SATA_DTX_IRX_N4_RSATA_DTX_IRX_P4_R

SATA_ITX_DRX_N4_RSATA_ITX_DRX_P4_R

SATA_ITX_DRX_N4_RSATA_ITX_DRX_P4_R

SATA_ITX_DRX_N4SATA_ITX_DRX_P4

SATA_DTX_IRX_P4SATA_DTX_IRX_N4

SATA_DTX_IRX_P4_RSATA_DTX_IRX_N4_R

USB_ON#

USB20_N2USB20_P2

USB20_N2

USB20_P2

USB20_N2_C

USB20_P2_C

USB20_N2_CUSB20_P2_C

USB20_N3_CUSB20_P3_CUSB20_N3

USB20_P3

USB20_N3_C

USB20_P3_C

ESATA_DET#_CONN

ESATA_DET#_CONN

BT_LED#<56,57>

BT_OFF#<19>

USB20_N3<18>USB20_P3<18>

USB20_P13<18>USB20_N13<18>

BT_ACTIVE<34>

SATA_DTX_C_IRX_N4<14>SATA_DTX_C_IRX_P4<14>

SATA_ITX_DRX_P4<14>SATA_ITX_DRX_N4<14>

USB_ON#<38,40,56,57> USB_OC1# <18>

USB20_P2<18>USB20_N2<18>

ESATA_DET#<19>

+3VS

+5VALW

+3VS_BT

+USB_VCCC

+3VS+3VS

+USB_VCCC

+5VALW

+USB_VCCC

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

USB ports/BT/E-SATACustom

42 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

USB ports/BT/E-SATACustom

42 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

USB ports/BT/E-SATACustom

42 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

BT MODULE CONN

30mils

ESATA and USB Conn.

W=80mils

A+ = RXPA- = RXN

B+ = TXPB- = TXN

USB

Low Active

E-SATA COMBORIGHT USB PORT

W=80mils

Left USB Conn. (220uF_6.3V_5.9L_ESR17m)*2=(SF000001500)

7/31 Add

Change footprint20100814

8/27 change to @

8/27 change to stuff

8/27 change to @8/27 change to stuffC705470P_0402_50V7KC705470P_0402_50V7K

1

2

C7041000P_0402_50V7K@

C7041000P_0402_50V7K@

1

2

C7080.01U_0402_16V7K ESATA@

C7080.01U_0402_16V7K ESATA@

12

U34

APL3510BKI_SO8

U34

APL3510BKI_SO8

GND1

IN2

OC# 5OUT 6

OUT 8

IN3

EN4

OUT 7

R630 0_0402_5%ESATA@

R630 0_0402_5%ESATA@

1 2

+ C706220U_6.3V_M

+ C706220U_6.3V_M

1

2

Q104

AP2301GN-HF_SOT23-3

BT@

Q104

AP2301GN-HF_SOT23-3

BT@

2

3 1

D22

PJD

LC05

_SO

T23

-3

@D22

PJD

LC05

_SO

T23

-3

@

231

C703 0.1U_0402_16V4ZC703 0.1U_0402_16V4Z12

R6354.7K_0402_5%

@

R6354.7K_0402_5%

@

12

USB

ESATA

JESAT1

FOX_3Q38111-RB1C3-7HC

USB

ESATA

JESAT1

FOX_3Q38111-RB1C3-7HC

VBUS1

D-2

D+3

GND4

GND5

A+6

A-7

GND8

B-9

B+10

GND11

SHIELD 12

SHIELD 13

SHIELD 14

SHIELD 15

R877

0_0402_5%

@ R877

0_0402_5%

@

12

R8660_0402_5%ESATA@

R8660_0402_5%ESATA@

12

R631100K_0402_5%

BT@ R631100K_0402_5%

BT@

12

JBT1

ACES_87213-0600GME@

JBT1

ACES_87213-0600GME@

11

22

33

44

55

66G1 7

G2 8

R6370_0402_5%@

R6370_0402_5%@

12

R632100K_0402_5%

BT@

R632100K_0402_5%

BT@

1 2

C709 0.1U_0402_16V4Z

BT@

C709 0.1U_0402_16V4Z

BT@

1 2

JUSB2

SUYIN_020173GR004M58BZL

ME@

JUSB2

SUYIN_020173GR004M58BZL

ME@

VCC1

D-2

D+3

GND4

GND15

GND26

GND37

GND48

C7350.1U_0402_16V4Z@

C7350.1U_0402_16V4Z@

1

2

R628 0_0402_5%ESATA@

R628 0_0402_5%ESATA@

1 2L64

WCM-2012-900T_4P

L64

WCM-2012-900T_4P

11

44 3 3

2 2

C702470P_0402_50V7KC702470P_0402_50V7K

1

2

Q103DTC124EKAT146_SC59-3BT@

Q103DTC124EKAT146_SC59-3BT@

IN2

OU

T1

GN

D3

U35

SN75LVCP412RTJR_QFN20_4X4@

U35

SN75LVCP412RTJR_QFN20_4X4@

RX_0P1

RX_0N2 VCC 20

GND19

TX_1P5

VCC 6EN7

D1 8D0 9

VCC 10

GND17

GND18

RX_1P 11RX_1N 12

GND13 TX_0N 14TX_0P 15

VCC 16

GND3

TX_1N4

PAD21

R6334.7K_0402_5%@R6334.7K_0402_5%@

12

R867

0_0402_5%@

R867

0_0402_5%@

12

L63

WCM-2012-900T_4P

L63

WCM-2012-900T_4P

11

44 3 3

2 2

R863 0_0402_5%@R863 0_0402_5%@12

C7070.01U_0402_16V7KESATA@

C7070.01U_0402_16V7KESATA@

12 R629 0_0402_5%ESATA@R629 0_0402_5%ESATA@1 2

R8640_0402_5%

@

R8640_0402_5%

@

12

R6360_0402_5%@

R6360_0402_5%@

12

C7110.01U_0402_16V7K

@

C7110.01U_0402_16V7K

@1

2

R865

0_0402_5%

@R865

0_0402_5%

@12

C7120.1U_0402_16V4Z

[email protected]_0402_16V4Z

BT@

1

2

R862 0_0402_5%@R862 0_0402_5%@12

C7100.1U_0402_16V4Z@

C7100.1U_0402_16V4Z@

1

2

Q105DTC124EKAT146_SC59-3@

Q105DTC124EKAT146_SC59-3@

IN 2

OU

T1

GN

D3

D21

PJD

LC05

_SO

T23

-3

@D21

PJD

LC05

_SO

T23

-3

@

2 31

R627 0_0402_5%ESATA@R627 0_0402_5%ESATA@1 2

R6344.7K_0402_5%

@

R6344.7K_0402_5%

@

12

Page 43: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

ON/OFF#

51_ON#

EC_ON

NOVO_BTN# ON/OFFBTN#

51_ON#NOVO_BTN#

NOVO#

ON/OFFBTN#

NOVO_BTN#ON/OFFBTN#

USB20_N11

USB20_P11

USB20_N11_C

USB20_P11_C

USB20_P11USB20_N11

USB20_P11_CUSB20_N11_C

EXT_MIC_LEXT_MIC_R

MIC_JD

PLUG_INHP_OUTRHP_OUTL

EC_ON<40,48>

ON/OFF# <40>

51_ON# <45>

NOVO#<40>

CAPS_LED#<40>NUM_LED#<40>

PWR_LED#<40,56,57>

USB20_P11<18>USB20_N11<18>

EXT_MIC_L<39>EXT_MIC_R<39>MIC_JD<39>

PLUG_IN<39>HP_OUTR<39>HP_OUTL<39>

+3VALW

+3VALW

+5VALW

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

other IO connectorCustom

43 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics,Ltd.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

other IO connectorCustom

43 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics,Ltd.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

other IO connectorCustom

43 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics,Ltd.

LA-6751P

TOP Side

Bottom Side

ON/OFF switch

Power Button

EMI REQUEST 1ST = SCA00000E002ST = SCA00000R00

Power Bottom Board Conn. 8pin

Card Reader/Audio Jack SB CONN8/5 modify

Change footprint20100814R639

10K_0402_5%R63910K_0402_5%

12

SW3

SMT1-05_4P

@SW3

SMT1-05_4P

@3

2

1

4

56

JPWRB1

ACES_88058-080N

ME@

JPWRB1

ACES_88058-080N

ME@

11

22

33

44

55

66

GND9

GND10

77

88

C63

510

00P

_060

3_50

V7K

C63

510

00P

_060

3_50

V7K

12

L67

WCM-2012-900T_4P

@L67

WCM-2012-900T_4P

@11

44 3 3

2 2

J11

SHORT PADS

J11

SHORT PADS

1 2

R8700_0402_5%

R8700_0402_5%

12

R642100K_0402_5%R642100K_0402_5%

12

R8710_0402_5%

R8710_0402_5%

12

R638100K_0402_5%R638100K_0402_5%

12

JCR1

ACES_88058-120N

JCR1

ACES_88058-120N

11

22

33

44

55

66

GND13

GND14

77

88

99

1010

1111

1212

D23

DAN202UT106_SC70-3

D23

DAN202UT106_SC70-3

2

31

D24PJSOT24C 3P C/A SOT-23@

D24PJSOT24C 3P C/A SOT-23@

231

G

D

SQ106

2N7002H_SOT23-3

G

D

SQ106

2N7002H_SOT23-32

13

D26

DAN202UT106_SC70-3

D26

DAN202UT106_SC70-3

2

31

Page 44: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

SUSPSUSP

SUSP

SUSP#SUSP

SYSON# SUSPSUSP

SUSP

1.5VS_GATE5VS_GATE

SUSP

SUSPSYSON#

SYSON

5VS_GATE_R

SUSP<6,10,51>

SUSP#<10,26,40,49,51,52> SYSON<40,49>

+5VALW +3VALW

+1.5V

+3VS

+1.5VS

+5VS

+1.5V+1.8VS +0.75VS +1.05VS

+5VALW+RTCVCC+5VALW

+VSB +VSB+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

DC InterfaceCustom

44 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

DC InterfaceCustom

44 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

DC InterfaceCustom

44 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

+3VALW TO +3VS+5VALW TO +5VS+1.5V to +1.5VS

For Intel S3 Power Reduction.

Change footprint20100814

Change footprint20100814

Change footprint20100814

Change footprint20100814

Change footprint20100814

Change footprint20100814

Change footprint20100814

Change footprint20100814

Change footprint20100814 Change footprint

20100814

Change footprint20100814

Change footprint20100814

Change footprint20100814

C72110U_0805_10V4ZC72110U_0805_10V4Z

1

2

Q119DTC124EKAT146_SC59-3

@

Q119DTC124EKAT146_SC59-3

@

IN2

OU

T1

GN

D3

R654100K_0402_5%

@R654

100K_0402_5%

@

12

R649

10K_0402_5%

R649

10K_0402_5%

12

G

D

S

Q1092N7002H_SOT23-3

@G

D

S

Q1092N7002H_SOT23-3

@

2

13

R653100K_0402_5%

@R653100K_0402_5%

@

12

C72010U_0805_10V4ZC72010U_0805_10V4Z

1

2

C71710U_0805_10V4ZC71710U_0805_10V4Z

1

2

C7260.1U_0603_25V7KC7260.1U_0603_25V7K

1

2

C7270.1U_0603_25V7KC7270.1U_0603_25V7K

1

2G

D

SQ1122N7002H_SOT23-3

G

D

SQ1122N7002H_SOT23-3

2

13

R64747K_0402_5%R64747K_0402_5%

12

R656470_0603_5%@

R656470_0603_5%@

12

G

D

S

Q114

2N7002H_SOT23-3

@G

D

S

Q114

2N7002H_SOT23-3

@

2

13

G

D

S

Q113

2N7002H_SOT23-3

@G

D

S

Q113

2N7002H_SOT23-3

@

2

13

R655470_0603_5%@

R655470_0603_5%@

12

R6500_0402_5%

@

R6500_0402_5%

@12

R648100K_0402_5%R648100K_0402_5%

12

R64620K_0402_5%R64620K_0402_5%

G

D

SQ1102N7002H_SOT23-3

G

D

SQ1102N7002H_SOT23-3

2

13

C71810U_0805_10V4ZC71810U_0805_10V4Z

1

2

G

D

S

Q1162N7002H_SOT23-3@

G

D

S

Q1162N7002H_SOT23-3@

2

13

R65822_0603_5%R65822_0603_5%

12

C7191U_0603_10V4ZC7191U_0603_10V4Z

1

2

G

D

S

Q1072N7002H_SOT23-3

@G

D

S

Q1072N7002H_SOT23-3

@

2

13

U38

DMN3030LSS-13_SOP8L-8

U38

DMN3030LSS-13_SOP8L-8

365

78

2

4

1

C7290.1U_0603_25V7KC7290.1U_0603_25V7K

1

2

R659470_0603_5%@

R659470_0603_5%@

12

Q8

AP2301GN-HF_SOT23-3

Q8

AP2301GN-HF_SOT23-32

3 1

Q117DTC124EKAT146_SC59-3

Q117DTC124EKAT146_SC59-3

IN2

OU

T1

GN

D3

R652100K_0402_5%R652100K_0402_5%

12

G

D

SQ1112N7002H_SOT23-3

G

D

SQ1112N7002H_SOT23-3

2

13

R651

0_0402_5%

R651

0_0402_5%

12

R644470_0603_5%@

R644470_0603_5%@

12

R645470_0603_5%@

R645470_0603_5%@

12

U39DMN3030LSS-13_SOP8L-8

U39DMN3030LSS-13_SOP8L-8

365

78

2

4

1

C728

0.1U_0603_25V7K

C728

0.1U_0603_25V7K

1

2

C7251U_0603_10V4ZC7251U_0603_10V4Z

1

2

G

D

S

Q1082N7002H_SOT23-3

@G

D

S

Q1082N7002H_SOT23-3

@

2

13

C72410U_0805_10V4ZC72410U_0805_10V4Z

1

2

G

D

S

Q1152N7002H_SOT23-3

G

D

S

Q1152N7002H_SOT23-3

2

13

C7221U_0603_10V4ZC7221U_0603_10V4Z

1

2

C72310U_0805_10V4ZC72310U_0805_10V4Z

1

2

R643470_0603_5%@

R643470_0603_5%@

12

Page 45: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

N1

PR

G+

+

APDIN1APDIN

+RTCBATT

51_ON#<43>

PACIN<47>

ACOFF<40,47>

+5VALWP<48>

MAINPWON<46,48>

ACON<47>

VIN

VS

BATT+

VL

+5VALWP

+RTCBATT

VS

B+

VIN

VIN

PreCHG

+CHGRTC

+3VLP

6251VREF

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR DCIN / Vin Detector /Pre-charge

Custom

45 54Friday, November 26, 2010

2010/01/25 2010/12/31 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR DCIN / Vin Detector /Pre-charge

Custom

45 54Friday, November 26, 2010

2010/01/25 2010/12/31 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR DCIN / Vin Detector /Pre-charge

Custom

45 54Friday, November 26, 2010

2010/01/25 2010/12/31Compal Electronics, Inc.

- +

DC030006J00

BATT ONLY

L-->H 7.196V 7.349V 7.505V

Precharge detector Min. typ. Max.

H-->L 6.138V 6.214V 6.056V

Precharge detector Min. typ. Max.

H-->L 13.860V 14.247V 14.621V L-->H 14.991V 15.381V 15.782V

ACIN

Precharge detector15.97V/14.84V FORADAPTOR

PIWG1/G2(LA-6751P/LA-6753P)

PC

109

1000

P_0

402_

50V

7K@

PC

109

1000

P_0

402_

50V

7K@

12

G

D

SPQ

105

2N70

02W

-T/R

7_S

OT

323-

3@

G

D

SPQ

105

2N70

02W

-T/R

7_S

OT

323-

3@

2

13

PD104

RB715F_SOT323-3@

PD104

RB715F_SOT323-3@

2

31

PQ101TP0610K-T1-E3_SOT23-3

PQ101TP0610K-T1-E3_SOT23-3

2

13

PC

101

1000

P_0

402_

50V

7KP

C10

110

00P

_040

2_50

V7K

12

PQ

106

DT

C11

5EU

A_S

C70

-3@

PQ

106

DT

C11

5EU

A_S

C70

-3@

2

13

PR1071K_1206_5%@PR1071K_1206_5%@1 2

PR

105

100K

_040

2_1%

@P

R10

510

0K_0

402_

1%@

12

PC

105

0.22

U_0

603_

25V

7KP

C10

50.

22U

_060

3_25

V7K

12

PR117560_0603_5%

PR117560_0603_5%

1 2

PR1031K_1206_5%@PR1031K_1206_5%@1 2

JRTC1

ML1220T13RE45@

JRTC1

ML1220T13RE45@

12

PR118560_0603_5%

PR118560_0603_5%1 2

PQ103DDTC115EUA-7-F_SOT323-3@PQ103DDTC115EUA-7-F_SOT323-3@

2

13

PL101SMB3025500YA_2P

PL101SMB3025500YA_2P

1 2

PC

104

1000

P_0

402_

50V

7KP

C10

410

00P

_040

2_50

V7K

12

PD106RB751V-40_SOD323-2

PD106RB751V-40_SOD323-2

1 2

PC

102

100P

_040

2_50

V8J

PC

102

100P

_040

2_50

V8J

12

PR11122K_0402_5%

PR11122K_0402_5%

1 2

PR101100K_0402_5%

PR101100K_0402_5%

12

PR

113

499K

_040

2_1%

@P

R11

349

9K_0

402_

1%@

12

PD103LL4148_LL34-2PD103LL4148_LL34-2

12

PQ102TP0610K-T1-E3_SOT23-3@

PQ102TP0610K-T1-E3_SOT23-3@

2

13

PR11934K_0402_1%@

PR11934K_0402_1%@

12

PR

115

205K

_040

2_1%

@P

R11

520

5K_0

402_

1%@

12

PR12047K_0402_5%@

PR12047K_0402_5%@

12

PR1122.2M_0402_5%@PR1122.2M_0402_5%@

12

PR

121

66.5

K_0

402_

1%@

PR

121

66.5

K_0

402_

1%@

12

PD102

LL4148_LL34-2@

PD102

LL4148_LL34-2@

12

PR

114

100K

_040

2_1%

@P

R11

410

0K_0

402_

1%@

12

PR

106

100K

_040

2_1%

@P

R10

610

0K_0

402_

1%@

12

PC1060.1U_0603_25V7K

PC1060.1U_0603_25V7K

12

PR11068_1206_5%PR11068_1206_5%

12

JDCIN14602-Q04C-09R 4P P2.5@JDCIN14602-Q04C-09R 4P P2.5@

1 1

3 3

4 4

2 2

PD105

RB715F_SOT323-3@

PD105

RB715F_SOT323-3@2

31

PD101LL4148_LL34-2

PD101LL4148_LL34-2

12

PC

103

100P

_040

2_50

V8J

PC

103

100P

_040

2_50

V8J

12

PR

108

100K

_040

2_1%

@P

R10

810

0K_0

402_

1%@

12

PQ

104

DD

TC

115E

UA

-7-F

_SO

T32

3-3

@P

Q10

4D

DT

C11

5EU

A-7

-F_S

OT

323-

3@

2

13

PR10968_1206_5%PR10968_1206_5%

12

PR1041K_1206_5%@PR1041K_1206_5%@1 2

PR1021K_1206_5%@PR1021K_1206_5%@1 2

PC

108

0.1U

_060

3_25

V7K

@P

C10

80.

1U_0

603_

25V

7K@

12

PU101ALM393DG_SO8

PU101ALM393DG_SO8

+ 3

- 2O1

P8

G4

PR

116

499K

_040

2_1%

@P

R11

649

9K_0

402_

1%@

12

PF1017A_24VDC_429007.WRML

PF1017A_24VDC_429007.WRML

21

PC

107

0.01

U_0

402_

25V

7K@

PC

107

0.01

U_0

402_

25V

7K@

12

PC

110

0.01

U_0

402_

25V

7K@

PC

110

0.01

U_0

402_

25V

7K@

12

Page 46: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

EC_SMDAEC_SMCA

BATT_OUT <47>

BATT_TEMP <40>

EC_SMB_DA1 <40>

EC_SMB_CK1 <40>

SPOK<48>

VR_HOT#<40,53>

ADP_I <40,47>

BATT_LEN#<40>

VMB2

+3VS

6251VREF

+3VALW

VS

BATT+

VMB

+3VALW

VMB2

VL

VL

+VSBPB+

VL

+VSBP +VSB

VL

MAINPWON <45,48>

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR-BATTERY CONN/OTPCustom

46 54Friday, November 26, 2010

2010/01/25 2010/12/31 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR-BATTERY CONN/OTPCustom

46 54Friday, November 26, 2010

2010/01/25 2010/12/31 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR-BATTERY CONN/OTPCustom

46 54Friday, November 26, 2010

2010/01/25 2010/12/31Compal Electronics, Inc.

A/D

Recovery at 56 degree CCPU thermal protection at 92 degree CPH201 under CPU botten side :

PIWG1/G2(LA-6751P/LA-6753P)

PR210100K_0402_1%

PR210100K_0402_1%

12

PF20112A_65V_451012MRLPF20112A_65V_451012MRL

21

PC2020.01U_0402_25V7KPC2020.01U_0402_25V7K

12

PR

216

100K

_040

2_1%

PR

216

100K

_040

2_1%1

2

PR

208

43.2

K_0

402_

1%P

R20

843

.2K

_040

2_1%

12

PR2230_0402_5%@PR2230_0402_5%@

12

G

D

S

PQ2032N7002W-T/R7_SOT323-3G

D

S

PQ2032N7002W-T/R7_SOT323-3

2

13

G

D

S PQ

205

2N70

02K

W_S

OT

323-

3

G

D

S PQ

205

2N70

02K

W_S

OT

323-

3

2

13

PH202100K_0402_1%

PH202100K_0402_1%

12

PR

202

100_

0402

_1%

PR

202

100_

0402

_1%

12

PR21710K_0402_1%

PR21710K_0402_1%

12

G

D

S

PQ

204

2N70

02K

W_S

OT

323-

3

G

D

S

PQ

204

2N70

02K

W_S

OT

323-

3

2

13

PU201

G718TM1U_SOT23-8

PU201

G718TM1U_SOT23-8

RHYST2 5

OT13

OT24

GND2

VCC1

TMSNS2 6

RHYST1 7

TMSNS1 8

PR215

232K_0402_1%

PR215

232K_0402_1%

12

PR21822K_0402_1%

PR21822K_0402_1%

1 2

PR21410K_0402_1%

PR21410K_0402_1%1 2

PC2011000P_0402_50V7KPC2011000P_0402_50V7K

12

PR

222

3.48

K_0

402_

1%

PR

222

3.48

K_0

402_

1%

12

PC2030.1U_0603_25V7K

PC2030.1U_0603_25V7K

12

PJ201JUMP_43X39@PJ201JUMP_43X39@

11 2 2

G

D

S

PQ

201

2N70

02K

W_S

OT

323-

3

G

D

S

PQ

201

2N70

02K

W_S

OT

323-

3

2

13

PR20310K_0402_1%@

PR20310K_0402_1%@

12

PR219100K_0402_1%

PR219100K_0402_1%

12

PR212649K_0402_1%PR212649K_0402_1%

12

PC

207

1U_0

402_

6.3V

6KP

C20

71U

_040

2_6.

3V6K1

2

PR20421.5K_0402_1%

PR20421.5K_0402_1%

12

PR2069.76K_0402_1%

PR2069.76K_0402_1%

12

PL201SMB3025500YA_2P

PL201SMB3025500YA_2P

1 2

PH201100K_0402_1%_TSM0B104F4251RZPH201100K_0402_1%_TSM0B104F4251RZ

12

PR21110K_0402_1%

PR21110K_0402_1%

12

PR

221

100K

_040

2_1%

PR

221

100K

_040

2_1%1

2

PC

204

0.01

U_0

402_

25V

7KP

C20

40.

01U

_040

2_25

V7K

12

JBATT1

TYCO_1775789-1@

JBATT1

TYCO_1775789-1@

1 1

3 3

4 4

5 5

6 6

GND 8

GND 9

2 2

7 7

PR20910K_0402_5%

PR20910K_0402_5%

1 2

PR2201K_0402_5%PR2201K_0402_5%

1 2

PR205100K_0402_1%@PR205100K_0402_1%@

12

PR

201

100_

0402

_1%

PR

201

100_

0402

_1%

12

PC

205

0.22

U_0

603_

25V

7KP

C20

50.

22U

_060

3_25

V7K

12

PR2135.1M_0402_5%

PR2135.1M_0402_5%

1 2

PC2060.1U_0603_25V7K

PC2060.1U_0603_25V7K

12

PR2076.49K_0402_1%

PR2076.49K_0402_1%

1 2

PQ202TP0610K-T1-E3_SOT23-3

PQ202TP0610K-T1-E3_SOT23-3

2

13

PU101BLM393DG_SO8

PU101BLM393DG_SO8

+5

-6O 7

P8

G4

Page 47: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

6251

_SN

CELLS

DH_CHG

P2-1

CHGCHG

6251_VCOMP

6251_ICOMP

6251_EN CSON

6251_VCOMP-1

6251_ICM

DIS

CH

G_G

-1

6251_CSON

6251_CSIN

6251_CSOP

6251_CSIP

CSOP

PACIN

BST_CHG

6251_ACLIM

CSIP

DL_CHG

DISCHG_GCSIN

6251_CHLIM

LX_CHG

6251_VDDP

BST_CHGA

CELLS

P2-

2

6251_VADJ

FSTCHG

6251_DCIN

ACSETIN

PACIN

BATT_ONACSETIN

ACPRN

AC

OF

F-1

PACINB

AT

T_O

N

ACOFF-1

IREF<40>

FSTCHG<40>

ADP_I<40,46>

PACIN<45>

ACOFF<40,45>

CHGVADJ<40>

BATT_SEL_EC<40>

ACIN <16,24,40>

BATT_OUT <46>

BATT_OUT<46>

BATT_OUT <46>

ACPRN<48>

ACPRN <48>

ACON<45>

VIN

P2P3

VIN

BATT+

B+

CHG_B+

6251_VDD 6251_VDD

VIN

6251_VDD

VIN

PreCHG

6251VREF

6251VREF

6251_VDD

6251_VDD

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

47 54Friday, November 26, 2010

Compal Electronics, Inc.2011/01/132010/01/13 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

47 54Friday, November 26, 2010

Compal Electronics, Inc.2011/01/132010/01/13 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

47 54Friday, November 26, 2010

Compal Electronics, Inc.2011/01/132010/01/13

CHARGER

Connect to EC A/D Pin.

3cell : GND4cell : VDDVcell

CHGVADJ=(Vcell-4)/0.10627

4V

4.2V

CHGVADJ

4.35V

0V

1.882V

3.2935V

CC=0.25A~3A

IREF=0.254V~3.048V

IREF=1.016*Icharge

VCHLIM need over 95mV

CP mode for 90W adapterVaclim=2.39*(3.9K/(3.9K+25.5K))=0.0.3544VIinput=(1/0.015)((0.05*Vaclim)/2.39+0.05)where Vaclim=0.3544V, Iinput=3.827A

CP mode for 65W adapterVaclim=2.39*(2.2K/(2.2K+21K))=0.2515VIinput=(1/0.02)((0.05*Vaclim)/2.39+0.05)where Vaclim=0.2515V, Iinput=2.76A

65W:0.02090W:0.015

PIWG1/G2(LA-6751P/LA-6753P)

PR327154K_0402_1%

PR327154K_0402_1% 12

PR

306

191K

_040

2_1%

PR

306

191K

_040

2_1%

12

PC

319

0.01

U_0

402_

25V

7KP

C31

90.

01U

_040

2_25

V7K

12

G

D

S

PQ309

2N7002W-T/R7_SOT323-3

G

D

S

PQ309

2N7002W-T/R7_SOT323-32

13

PR

326

4.7_

1206

_5%

PR

326

4.7_

1206

_5%

12

PQ303AO4407A_SO8

PQ303AO4407A_SO8

3 65

78

2

4

1

PC3150.1U_0402_16V7KPC3150.1U_0402_16V7K

1 2

PC325

5600P_0402_50V7K

PC325

5600P_0402_50V7K

1 2

PR336100K_0402_1%@PR336100K_0402_1%@

12

PC3214.7U_0805_6.3V6KPC3214.7U_0805_6.3V6K

12

G

D

S

PQ314

2N70

02K

W_S

OT

323-

3

G

D

S

PQ314

2N70

02K

W_S

OT

323-

3

2

13

PC

306

2200

P_0

402_

50V

7KP

C30

622

00P

_040

2_50

V7K

12

PR3400_0402_5%PR3400_0402_5%

12

PR30547K_0402_1%

PR30547K_0402_1%

1 2

PQ315A2N7002KDW-2N_SOT363-6@

PQ315A2N7002KDW-2N_SOT363-6@

61

2

G

D

SPQ308

2N7002KW_SOT323-3

G

D

SPQ308

2N7002KW_SOT323-3

2

13

PR31214.3K_0402_1%

PR31214.3K_0402_1%

12

PR31947K_0402_1%

PR31947K_0402_1%1 2

PD3021SS355_SOD323-2

PD3021SS355_SOD323-2

12

PQ316

DTC115EUA_SC70-3

PQ316

DTC115EUA_SC70-3

2

13

PC3160.1U_0603_25V7K

PC3160.1U_0603_25V7K

12

PC

305

4.7U

_080

5_25

V6-

KP

C30

54.

7U_0

805_

25V

6-K

12

PR342

14.3K_0402_1%

PR342

14.3K_0402_1%

12

PR330100K_0402_1%

PR330100K_0402_1%

12

PQ

313

AO

4466

L_S

O8

PQ

313

AO

4466

L_S

O8

4

6

1235 7 8

PC

303

4.7U

_080

5_25

V6-

KP

C30

34.

7U_0

805_

25V

6-K

12

PC

304

4.7U

_080

5_25

V6-

KP

C30

44.

7U_0

805_

25V

6-K

12

PR3222_0402_5%

PR3222_0402_5%

1 2

PQ302SI4459_SO8

PQ302SI4459_SO8

3 65

78

2

4

1

PC

318

10U

_080

5_25

V6K

PC

318

10U

_080

5_25

V6K

12

PR

316

100K

_040

2_5%

@P

R31

610

0K_0

402_

5%@

12

PQ317A2N7002KDW-2N_SOT363-6@PQ317A2N7002KDW-2N_SOT363-6@

61

2

PQ317B2N7002KDW-2N_SOT363-6@

PQ317B2N7002KDW-2N_SOT363-6@3

4

5

PR323100_0402_1%PR323100_0402_1%

1 2PR325

10K_0402_5%

PR325

10K_0402_5%1 2

PQ306DTC115EUA_SC70-3

PQ306DTC115EUA_SC70-3

2

13

PC314

0.01U_0402_25V7K

PC314

0.01U_0402_25V7K

1 2

PQ304

DTA144EUA_SC70-3

PQ304

DTA144EUA_SC70-3

21

3

PQ307A2N7002KDW-2N_SOT363-6

PQ307A2N7002KDW-2N_SOT363-6

61

2

PR3410_0402_5%@PR3410_0402_5%@

12

PR3280_0603_5%

PR3280_0603_5%

1 2

PR3314.7_0402_5%PR3314.7_0402_5%

1 2

PR3430_0402_5%PR3430_0402_5%

12

PR30347K_0402_1%@PR30347K_0402_1%@

12

PR33810K_0402_1%PR33810K_0402_1%

12

PC

324

10U

_080

5_25

V6K

@P

C32

410

U_0

805_

25V

6K@

12

PR32921K_0402_1%PR32921K_0402_1%1 2

PR32020_0402_5%PR32020_0402_5%

12

PC3071000P_0402_25V8JPC3071000P_0402_25V8J

12

PR

315

100K

_040

2_1%

PR

315

100K

_040

2_1%

12

PC

301

0.1U

_060

3_25

V7K

PC

301

0.1U

_060

3_25

V7K

12

PQ301AO4407A_SO8PQ301AO4407A_SO8

365

78

2

4

1

PC

323

10U

_080

5_25

V6K

PC

323

10U

_080

5_25

V6K

12

PR31110_1206_5%

PR31110_1206_5%

12

PC312 6800P_0402_25V7KPC312 6800P_0402_25V7K1 2

PQ307B2N7002KDW-2N_SOT363-6PQ307B2N7002KDW-2N_SOT363-6

34

5

PC

308

2.2U

_060

3_6.

3V6K

PC

308

2.2U

_060

3_6.

3V6K

12

PR

301

47K

_040

2_1%

PR

301

47K

_040

2_1%1

2

PQ305

DTC115EUA_SC70-3

PQ305

DTC115EUA_SC70-3

2

13

G

D

S PQ

311

2N70

02W

-T/R

7_S

OT

323-

3@

G

D

S PQ

311

2N70

02W

-T/R

7_S

OT

323-

3@

2

13

PQ

310

AO

4466

L_S

O8

PQ

310

AO

4466

L_S

O8

4

6

1235 7 8

PR3100_0402_5%

PR3100_0402_5%

12

PC

322

2200

P_0

402_

50V

7K

PC

322

2200

P_0

402_

50V

7K

12

PC

310

0.1U

_060

3_25

V7K

PC

310

0.1U

_060

3_25

V7K

12

PR33431.6K_0402_1%

PR33431.6K_0402_1%

12

PR31720_0402_5%

PR31720_0402_5%

1 2

PC3090.1U_0603_25V7K

PC3090.1U_0603_25V7K

12

PR33315.4K_0402_1%

PR33315.4K_0402_1%

1 2

PR335100K_0402_1%@

PR335100K_0402_1%@

12

PD3031SS355_SOD323-2PD3031SS355_SOD323-2

1 2

PR3020.020_1206_1%

PR3020.020_1206_1%

1

3

4

2

PC

320

680P

_060

3_50

V7K

PC

320

680P

_060

3_50

V7K

12

PR321 10K_0402_1%PR321 10K_0402_1%1 2 PR324

0.02_1206_1%PR324

0.02_1206_1%

1

3

4

2

PR

314

150K

_040

2_1%

PR

314

150K

_040

2_1%

12

PR33747K_0402_1%

PR33747K_0402_1%

12

PC3130.1U_0402_16V7KPC3130.1U_0402_16V7K

12

PL3021.2UH_1231AS-H-1R2N=P3_2.9A_30%

PL3021.2UH_1231AS-H-1R2N=P3_2.9A_30%

1 2

PC

302

0.1U

_060

3_25

V7K

@P

C30

20.

1U_0

603_

25V

7K@

12

PL30110U_LF919AS-100M-P3_4.5A_20%

PL30110U_LF919AS-100M-P3_4.5A_20%

1 2

PR309200K_0402_1%PR309200K_0402_1%

12

PR33910K_0402_1%

PR33910K_0402_1%1 2

PR30810K_0402_1%PR30810K_0402_1%

12

PQ312DTC115EUA_SC70-3

PQ312DTC115EUA_SC70-3

2

13

PD301RB751V-40_SOD323-2

PD301RB751V-40_SOD323-2

12

PR31310K_0402_1%PR31310K_0402_1%

12

PQ315B2N7002KDW-2N_SOT363-6@

PQ315B2N7002KDW-2N_SOT363-6@

34

5

PR

307

191K

_040

2_1%

@P

R30

719

1K_0

402_

1%@

12

PC3110.047U_0402_16V7KPC3110.047U_0402_16V7K

12

PR31820_0402_5%

PR31820_0402_5%

1 2

PD304RB751V-40_SOD323-2PD304RB751V-40_SOD323-2

12

PC

317

10U

_080

5_25

V6K

PC

317

10U

_080

5_25

V6K

12

PR3322.2K_0402_1%

PR3322.2K_0402_1%

12

PU301

ISL6251AHAZ-T_QSOP24

PU301

ISL6251AHAZ-T_QSOP24

EN3

CELLS4

VDD1

ACSET2

ICOMP5

VCOMP6

CHLIM9

ACPRN 23

CSIP 19

UGATE 17

PHASE 18

BOOT 16

PGND 13GND12

ICM7

VREF8

VADJ11

DCIN 24

CSIN 20

ACLIM10

LGATE 14

VDDP 15

CSOP 21

CSON 22

PR

304

200K

_040

2_1%

PR

304

200K

_040

2_1%1

2

Page 48: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

BST_5V

LX_5V

RT8205_B+

UG_5V

BST_3V

EN

TR

IP2

LG_5V

EN

TR

IP1

LX_3V

UG_3V

LG_3V

RT8205_B+

MAINPWON

ENTRIP2ENTRIP1

SPOK <46>

MAINPWON<45,46>

ACPRN

EC_ON<40,43>

+5VALWP+3VALWP

B+ +3VLP

2VREF_8205

VL

VL

VS

B+

RT8205_B+

2VREF_8205

+3VALWP +3VALW

+5VALWP +5VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

3VALWP/5VALWPCustom

48 54Friday, November 26, 2010

2010/01/25 2010/12/31 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

3VALWP/5VALWPCustom

48 54Friday, November 26, 2010

2010/01/25 2010/12/31 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

3VALWP/5VALWPCustom

48 54Friday, November 26, 2010

2010/01/25 2010/12/31

VFB=2.0V

Compal Electronics, Inc.

Typ: 175mA

Typ: 175mA

Note:Use TPS51125 IC can remove RTC refernece LDOUse TPS51427 IC must keep RTC refernece LDO

+3.3VALWP OCP(min)=5.81A+5VALWP OCP(min)=8.44A

PIWG1/G2(LA-6751P/LA-6753P)

PJ403

JUMP_43X118@

PJ403

JUMP_43X118@

1 122

PR

410

4.7_

1206

_5%

PR

410

4.7_

1206

_5%

12

PC

415

680P

_060

3_50

V7K

PC

415

680P

_060

3_50

V7K

12

PC

410

2200

P_0

402_

50V

7KP

C41

022

00P

_040

2_50

V7K

12PU401

RT8205EGQW_WQFN24_4X4

PU401

RT8205EGQW_WQFN24_4X4

FB

12

RE

F3

VO1 24

EN

TR

IP1

1

TO

NS

EL

4

FB

25

SK

IPS

EL

14

NC

18

VR

EG

517

VO27

VREG38

VIN

16

GN

D15

UGATE1 21

BOOT1 22

EN

TR

IP2

6

PGOOD 23

PHASE1 20

LGATE1 19

EN

13

BOOT29

UGATE210

PHASE211

LGATE212

P PAD25

PC

404

4.7U

_080

5_25

V6-

KP

C40

44.

7U_0

805_

25V

6-K

12

PR4140_0402_5%PR4140_0402_5%

12

PQ405A2N7002KDW-2N_SOT363-6

PQ405A2N7002KDW-2N_SOT363-6

61

2

+PC416

150U_B2_6.3VM_R45M

+PC416

150U_B2_6.3VM_R45M

1

2

PC

408

4.7U

_080

5_25

V6-

KP

C40

84.

7U_0

805_

25V

6-K

12

PR

417

40.2

K_0

402_

1%P

R41

740

.2K

_040

2_1%1

2

PQ402AO4466L_SO8

PQ402AO4466L_SO8

4

6

1235 7 8

PC

402

1U_0

603_

10V

6KP

C40

21U

_060

3_10

V6K

12

PQ404AO4712_SO8

PQ404AO4712_SO8

365 7 8

2

4

1

PC

417

680P

_060

3_50

V7K

PC

417

680P

_060

3_50

V7K

12

PC

401

0.1U

_060

3_25

V7K

PC

401

0.1U

_060

3_25

V7K

12

PC

411

0.1U

_060

3_25

V7K

PC

411

0.1U

_060

3_25

V7K

12

PQ408DTC115EUA_SC70-3

PQ408DTC115EUA_SC70-3

2

13

PQ401

AO4466L_SO8

PQ401

AO4466L_SO84

6

1 2 3578

PC4120.1U_0603_25V7K

PC4120.1U_0603_25V7K

1 2

PC

406

2200

P_0

402_

50V

7KP

C40

622

00P

_040

2_50

V7K

12

PR407

0_0603_5%

PR407

0_0603_5%1 2

PR40420K_0402_1%

PR40420K_0402_1%1 2

PJ402

JUMP_43X118@

PJ402

JUMP_43X118@

1 122

PC

403

0.1U

_060

3_25

V7K

PC

403

0.1U

_060

3_25

V7K

12

PC

420

0.1U

_060

3_25

V7K

PC

420

0.1U

_060

3_25

V7K

12

PQ407DTC115EUA_SC70-3PQ407DTC115EUA_SC70-3

2

13

PR40113K_0402_1%

PR40113K_0402_1%1 2

PL4024.7UH +-20% PCMC063T-4R7MN 5.5A

PL4024.7UH +-20% PCMC063T-4R7MN 5.5A

1 2

PC

418

1U_0

603_

10V

6KP

C41

81U

_060

3_10

V6K 1

2

PR40230K_0402_1%

PR40230K_0402_1%1 2

PL4014.7UH +-20% PCMC063T-4R7MN 5.5A

PL4014.7UH +-20% PCMC063T-4R7MN 5.5A

1 2

PC

407

4.7U

_080

5_10

V6K

PC

407

4.7U

_080

5_10

V6K

12

G

D

S PQ

406

2N70

02W

-T/R

7_S

OT

323-

3

G

D

S PQ

406

2N70

02W

-T/R

7_S

OT

323-

3

2

13

PR412499K_0402_1%

PR412499K_0402_1%1 2

PR406154K_0402_1%

PR406154K_0402_1%

1 2

PQ405B2N7002KDW-2N_SOT363-6PQ405B2N7002KDW-2N_SOT363-6

34

5

PR40320K_0402_1%

PR40320K_0402_1%1 2

PR4110_0402_5%

@PR4110_0402_5%

@

12

PQ403AO4712_SO8PQ403AO4712_SO8

36 578

2

4

1

PR418200K_0402_1%

PR418200K_0402_1%

12

PC

405

4.7U

_080

5_25

V6-

KP

C40

54.

7U_0

805_

25V

6-K

12

+PC414

150U_B2_6.3VM_R45M

+PC414

150U_B2_6.3VM_R45M

1

2

PC

409

4.7U

_080

5_25

V6-

KP

C40

94.

7U_0

805_

25V

6-K

12

PC

421

2.2U

_060

3_10

V7K

PC

421

2.2U

_060

3_10

V7K

12

PJ401

JUMP_43X118@

PJ401

JUMP_43X118@

1 122

PC4130.1U_0603_25V7KPC4130.1U_0603_25V7K1 2

PR415100K_0402_1%

PR415100K_0402_1%

12

PR4080_0603_5%

PR4080_0603_5%1 2

PR416100K_0402_1%

PR416100K_0402_1%

1 2

PR405110K_0402_1%

PR405110K_0402_1%

1 2

PC

419

4.7U

_080

5_10

V6K

PC

419

4.7U

_080

5_10

V6K

12P

R41

310

0K_0

402_

1%P

R41

310

0K_0

402_

1%

12

PR

409

4.7_

1206

_5%

PR

409

4.7_

1206

_5%

12

Page 49: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

BST_1.5V-1

LX_1.5V

DH_1.5V

DL_1.5V

BST_1.5V

FB_1.8V

LX_1.8V

EN_1.8V

1.5_51117_B+

SYSON<40,44>

SUSP#<10,26,40,44,51,52>

+5VALW

B+

+5VALW

+1.5VP

+1.8VSP+5VALW

+1.5V+1.5VP

+1.8VS+1.8VSP

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR-+1.5VP/+1.8VSPCustom

49 54Friday, November 26, 2010

2010/01/25 2010/12/31 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR-+1.5VP/+1.8VSPCustom

49 54Friday, November 26, 2010

2010/01/25 2010/12/31 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR-+1.5VP/+1.8VSPCustom

49 54Friday, November 26, 2010

2010/01/25 2010/12/31

VFB=0.75V

Compal Electronics, Inc.

1.8VSP max current=4A

FB=0.6Volt

PIWG1/G2(LA-6751P/LA-6753P)

+1.5VP OCP(min)=15.6A

PU502

SY8033BDBC_DFN10_3X3

PU502

SY8033BDBC_DFN10_3X3

EN5

PG

4

LX 3

FB 6

SVIN8

TP

11

LX 2PVIN10

NC

7

PVIN9

NC

1

+ PC506220U_6.3V_M

+ PC506220U_6.3V_M

1

2

PJ501

JUMP_43X118@

PJ501

JUMP_43X118@

1 122

PR5010_0402_5%

PR5010_0402_5%1 2

PR507100_0603_5%

PR507100_0603_5%1 2

PJ505

JUMP_43X118@

PJ505

JUMP_43X118@

1 122

PL5031UH_PCMC063T-1R0MN_11A_20%

PL5031UH_PCMC063T-1R0MN_11A_20%

1 2

PC504680P_0402_50V7K@PC504680P_0402_50V7K@1

2

PR5064.7_1206_5%

PR5064.7_1206_5%

12

PC

512

68P

_040

2_50

V8J

PC

512

68P

_040

2_50

V8J

12

PR

508

9.76

K_0

402_

1%P

R50

89.

76K

_040

2_1%

12

PR5040_0603_5%

PR5040_0603_5%1 2

PQ502AO4456_SO8

PQ502AO4456_SO8

365 7 8

2

4

1

PJ502

JUMP_43X118@

PJ502

JUMP_43X118@

1 122

PC5074.7U_0805_10V6KPC5074.7U_0805_10V6K

12

PC

503

4.7U

_080

5_25

V6-

KP

C50

34.

7U_0

805_

25V

6-K 1

2

PC50947P_0402_50V8J

@PC50947P_0402_50V8J

@

1 2

PC

514

22U

_080

5_6.

3VA

MP

C51

422

U_0

805_

6.3V

AM1

2

PC5104.7U_0603_6.3V6K

PC5104.7U_0603_6.3V6K

12

PC5050.1U_0603_25V7K

PC5050.1U_0603_25V7K

1 2

PJ503

JUMP_43X118@

PJ503

JUMP_43X118@

1 122

PR

511

4.7_

1206

_5%

PR

511

4.7_

1206

_5%

12

PJ504

JUMP_43X118@

PJ504

JUMP_43X118@

1 122

PR5141M_0402_5%

PR5141M_0402_5%

12

PC

516

0.1U

_040

2_10

V7K

PC

516

0.1U

_040

2_10

V7K

12

PC

515

22U

_080

5_6.

3VA

MP

C51

522

U_0

805_

6.3V

AM1

2

PU501

RT8209BGQW_WQFN14_3P5X3P5

PU501

RT8209BGQW_WQFN14_3P5X3P5

VOUT3

VDD4

EN

/DE

M1

TON2

FB5

PGOOD6 LGATE 9

UGATE 13

PHASE 12

GN

D7

PG

ND

8

CS 11

VDDP 10

BO

OT

14

NC

15

PC

502

4.7U

_080

5_25

V6-

KP

C50

24.

7U_0

805_

25V

6-K 1

2

PL5021UH_PCMC063T-1R0MN_11A_20%

PL5021UH_PCMC063T-1R0MN_11A_20%

1 2

PC

508

1000

P_0

603_

50V

7KP

C50

810

00P

_060

3_50

V7K

12

PC501.1U_0402_16V7K

@PC501.1U_0402_16V7K

@

12

PQ501AO4406AL 1N SO8

PQ501AO4406AL 1N SO8

4

6

1235 7 8

PR51230K_0402_1%

PR51230K_0402_1%

12

PR51010K_0402_1%PR51010K_0402_1%

12

PR513 100K_0402_1%PR513 100K_0402_1%

1 2

PC51122U_0805_6.3VAMPC51122U_0805_6.3VAM

12

PR51514.7K_0402_1%

PR51514.7K_0402_1%

12

PR509

10K_0402_1%

PR509

10K_0402_1%

1 2

PR

505

47K

_040

2_5%

PR

505

47K

_040

2_5%

12

PR503267K_0402_1%

PR503267K_0402_1%1 2

PC

513

680P

_060

3_50

V7K

PC

513

680P

_060

3_50

V7K

12

Page 50: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

BST_VCCSAP-1

LG_VCCSAP

LX_VCCSAP

UG_VCCSAP

51117_VCCSAP_B+

BST_VCCSAPEN_VCCSAP

VCCPPWRGOOD<51>

VSSSA_SENSE <10>

VCCSA_SENSE <10>

SA_PGOOD <40>

VCCSA_SEL <10>

+VCCSAP

+5VALW

+5VALW

B+

+3VS +VCCSA+VCCSAP

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR +VCCSAPC

50 54Friday, November 26, 2010

2010/01/25 2010/12/31 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR +VCCSAPC

50 54Friday, November 26, 2010

2010/01/25 2010/12/31 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR +VCCSAPC

50 54Friday, November 26, 2010

2010/01/25 2010/12/31Compal Electronics, Inc.

VFB=0.75V

PIWG1/G2(LA-6751P/LA-6753P)

+VCCSAP OCP(min)=6.28A

VID[0] VID[1] VCCSA Vout Require on 2011/ 2012 Required 0 0 0.9 V Yes/Yes 0 1 0.8 V Yes/Yes 1 1 0.725V No/Yes 1 1 0.675V No/Yes

Note:Use VCCSA_SEL to switch High & Low Level for VID[1](ie. VCCSA_SEL) due to the VID[0] is don't care for this setting.

PR6122K_0402_1%

PR6122K_0402_1%

1 2

PR6110_0402_5%

PR6110_0402_5%

12

PC6074.7U_0805_10V6K

PC6074.7U_0805_10V6K

12

PJ602

JUMP_43X118@

PJ602

JUMP_43X118@

1 122

PR6190_0402_5%

PR6190_0402_5%

12

PR

610

13K

_040

2_1%

PR

610

13K

_040

2_1%1

2

PR613

10_0402_5%

PR613

10_0402_5%

1 2

PR62010K_0402_5%@

PR62010K_0402_5%@

12

PR60447K_0402_5%@ PR60447K_0402_5%@

12

PR61515K_0402_1%PR61515K_0402_1%

12

PC

602

4.7U

_080

5_25

V6-

KP

C60

24.

7U_0

805_

25V

6-K

12

PR6030_0603_5%

PR6030_0603_5%1 2

PC6010.1U_0402_16V7K@

PC6010.1U_0402_16V7K@

12

PR61430K_0402_1%

PR61430K_0402_1%

12

PQ602AO4712_SO8

PQ602AO4712_SO8

365 7 8

2

4

1

PL6012.2UH_PCMC063T-2R2MN_8A_20%

PL6012.2UH_PCMC063T-2R2MN_8A_20%

1 2

PR6010_0402_5%

PR6010_0402_5%1 2

PR6070_0402_5%PR6070_0402_5%

12

PR618100K_0402_5%

@PR618100K_0402_5%

@

12

PC606470P_0603_50V8J

PC606470P_0603_50V8J

12

+ PC605220U_6.3V_M

+ PC605220U_6.3V_M

1

2

PR6054.7_1206_5%

PR6054.7_1206_5%

12

PR61710K_0402_5%

PR61710K_0402_5%

12

PR61610K_0402_5%

PR61610K_0402_5%

12

PR602280K_0402_1%

PR602280K_0402_1%1 2

PC6040.1U_0603_25V7K

PC6040.1U_0603_25V7K

1 2

PQ601AO4466L_SO8

PQ601AO4466L_SO8

4

6

1235 7 8

PC

603

4.7U

_080

5_25

V6-

KP

C60

34.

7U_0

805_

25V

6-K

12

PJ601

JUMP_43X118

@ PJ601

JUMP_43X118

@

1 122

PQ604

PMBT2222A_SOT23-3

PQ604

PMBT2222A_SOT23-3

1

2

3

G

D

S

PQ6032N7002W-T/R7_SOT323-3

G

D

S

PQ6032N7002W-T/R7_SOT323-3

2

13

PR

609

10K

_040

2_5%

PR

609

10K

_040

2_5%

12

PC6094700P_0402_25V7K@

PC6094700P_0402_25V7K@

12

PR606100_0603_1%PR606100_0603_1%1 2

PC6084.7U_0603_6.3V6K

PC6084.7U_0603_6.3V6K

12

PU601

RT8209BGQW_WQFN14_3P5X3P5

PU601

RT8209BGQW_WQFN14_3P5X3P5

VOUT3

VDD4

EN

/DE

M1

TON2

FB5

PGOOD6 LGATE 9

UGATE 13

PHASE 12

GN

D7

PG

ND

8

CS 11

VDDP 10

BO

OT

14

NC

15

PR608

0_0402_5%

PR608

0_0402_5%1 2

Page 51: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LX_1.05VS_VCCP

DH_1.05VS_VCCP

DL_1.05VS_VCCP

BST_1.05VS_VCCP

1.05VS_B+

VCCIO_SENSE <9>VCCPPWRGOOD<50>

SUSP<6,10,44>

SUSP#6,40,44,49,52>

+5VALW

+5VALW

+1.05VS_VCCPP

B+

+3VS

+1.5V

+3VALW

+0.75VSP

+0.75VS+0.75VSP

+1.05VS+1.05VS_VCCPP

B+

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR +1.05VS_VCCPP/+0.75VSPCustom

51 54Friday, November 26, 2010

2010/01/25 2010/12/31 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR +1.05VS_VCCPP/+0.75VSPCustom

51 54Friday, November 26, 2010

2010/01/25 2010/12/31 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR +1.05VS_VCCPP/+0.75VSPCustom

51 54Friday, November 26, 2010

2010/01/25 2010/12/31

VFB=0.75V

Compal Electronics, Inc.

PIWG1/G2(LA-6751P/LA-6753P)

+1.05VS_VCCPP OCP(min)=20.75A

PC7144.7U_0805_10V6KPC7144.7U_0805_10V6K

12

PR7060_0603_5%

PR7060_0603_5%1 2

PR713

10K_0402_1%

PR713

10K_0402_1%

1 2

G

D

S

PQ7012N7002W-T/R7_SOT323-3

G

D

S

PQ7012N7002W-T/R7_SOT323-3

2

13

PR7114.02K_0402_1%

PR7114.02K_0402_1%

1 2

PR

710

13.7

K_0

402_

1%P

R71

013

.7K

_040

2_1%

12

PR704267K_0402_1%

PR704267K_0402_1%1 2

PR7074.7_1206_5%

PR7074.7_1206_5%

12

PJ705

JUMP_43X118@

PJ705

JUMP_43X118@

1 122

PC7014.7U_0805_6.3V6K

PC7014.7U_0805_6.3V6K

12

PC7134.7U_0603_6.3V6K

PC7134.7U_0603_6.3V6K

12

PC

716

10U

_060

3_6.

3V6M

PC

716

10U

_060

3_6.

3V6M1

2

PL7021.0UH +-20% PCMC104T-1R0MN 20A

PL7021.0UH +-20% PCMC104T-1R0MN 20A

12

PC

705

10U

_060

3_6.

3V6M

PC

705

10U

_060

3_6.

3V6M

12

PR70220K_0402_1%

PR70220K_0402_1%1 2

PR7080_0603_5%

PR7080_0603_5%

12

PU701

G2992F1U_SO8

PU701

G2992F1U_SO8

VOUT4

NC 5GND2

VREF3

VIN1 VCNTL 6

NC 7

NC 8

TP 9

PC709.1U_0402_16V7KPC709.1U_0402_16V7K

12

PR

716

10K

_040

2_1%

@

PR

716

10K

_040

2_1%

@

12

PR703

1K_0

402_

1%

PR703

1K_0

402_

1%

12

PR71510K_0402_1%

@PR71510K_0402_1%

@

12

PU702

RT8209BGQW_WQFN14_3P5X3P5

PU702

RT8209BGQW_WQFN14_3P5X3P5

VOUT3

VDD4

EN

/DE

M1

TON2

FB5

PGOOD6 LGATE 9

UGATE 13

PHASE 12

GN

D7

PG

ND

8

CS 11

VDDP 10

BO

OT

14

NC

15

+

PC

711

330U

_X_2

VM

_R6M +

PC

711

330U

_X_2

VM

_R6M

1

2

PJ704

JUMP_43X118@

PJ704

JUMP_43X118@

1 122

PC

707

4.7U

_080

5_25

V6-

KP

C70

74.

7U_0

805_

25V

6-K

12

PR7011K_0402_1%

PR7011K_0402_1%

12

PR709100_0603_5%

PR709100_0603_5%1 2

PQ702AO4406AL 1N SO8

PQ702AO4406AL 1N SO8

4

6

1235 7 8 PC708

680P_0402_50V7K@ PC708680P_0402_50V7K@1

2

PR71410_0402_5%

PR71410_0402_5%

12

10K_0402_1%PR712

10K_0402_1%PR712

12

PC

703

0.1U

_040

2_16

V7K

PC

703

0.1U

_040

2_16

V7K 1

2

+

PC

717

100U

_25V

_M

+

PC

717

100U

_25V

_M1

2

PC

712

1000

P_0

603_

50V

7KP

C71

210

00P

_060

3_50

V7K

12

PQ703AO4456_SO8

PQ703AO4456_SO8

365 7 8

2

4

1

PC7040.1U_0402_16V7K

PC7040.1U_0402_16V7K

12

PC702

1U_0603_10V6K

PC702

1U_0603_10V6K

12

PC71547P_0402_50V8J

@ PC71547P_0402_50V8J

@

1 2

PC

706

4.7U

_080

5_25

V6-

KP

C70

64.

7U_0

805_

25V

6-K

12

PC7100.1U_0603_25V7K

PC7100.1U_0603_25V7K

1 2

PJ701JUMP_43X118@

PJ701JUMP_43X118@

11

22

PJ702

JUMP_43X118@

PJ702

JUMP_43X118@

1 122

PJ703

JUMP_43X118@

PJ703

JUMP_43X118@

1 122

PR705120K_0402_1%

PR705120K_0402_1%1 2

Page 52: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LG_VGA

BST_VGA-1

VGA_IN

VGA_FB

VGA_TON

SW_VGA

VGA_V5FILT

UG_VGA

VGA_EN

BST_VGA

VGA_TRIP

VG

A_S

NB

GVID1-1

GVID1-2

GVID0-1

GVID0-2

SUSP#

PE_GPIO1

PE_GPIO1<15,18,25,26>

PX_MODE<25,26>

GPU_VID1<24>

GPU_VID0<24>

SUSP#<10,26,40,44,49,51>

VGA_CORE_PG<25>

SUSP#<10,26,40,44,49,51>

PE_GPIO1<15,18,25,26>

+5VALW

+VGA_CORE

+5VALW

B+

+5VALW

+3VS

+3VALW

+3VALW

+5VALW

+VGA_PCIEP

+1.5V

+5VALW

+VGA_PCIE+VGA_PCIEP

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR +VGA_CORE/PCIE

52 54Friday, November 26, 2010

Compal Electronics, Inc.2010/01/062009/01/06 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR +VGA_CORE/PCIE

52 54Friday, November 26, 2010

Compal Electronics, Inc.2010/01/062009/01/06 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR +VGA_CORE/PCIE

52 54Friday, November 26, 2010

Compal Electronics, Inc.2010/01/062009/01/06

VGA_PWRSEL0 VGA_PWRSEL1

0 0

Core Voltage Level

1 1

GPU_VID0 GPU_VID1

Robson XT

1 0

0.9V

0.95V

1.12 V

1.1 V

PR828 4.53K 3K

1.0VVGA_PCIE

PIWG1/G2(LA-6751P/LA-6753P)

PX4.0PR801 120KPR804 @

PR8173K_0402_5%

PR8173K_0402_5%

12

PR8092K_0402_1%

PR8092K_0402_1%

1 2

PC8170.01U_0402_25V7K

PC8170.01U_0402_25V7K

12

PC

808

10U

_080

5_6.

3V6M

PC

808

10U

_080

5_6.

3V6M

12

PQ804A2N7002KDW-2N_SOT363-6PQ804A2N7002KDW-2N_SOT363-6

61

2

PR8230_0402_5%@

PR8230_0402_5%@

12

PR82447K_0402_5%

PR82447K_0402_5%1 2

PR82010K_0402_5%@

PR82010K_0402_5%@

12

PR81310K_0402_1%PR81310K_0402_1%

12PQ803B

2N7002KDW-2N_SOT363-6PQ803B

2N7002KDW-2N_SOT363-6 34

5

PR834

10K_0402_1%

PR834

10K_0402_1%12

PR81910K_0402_1%PR81910K_0402_1%

12

PR

832

10K

_040

2_1%

@

PR

832

10K

_040

2_1%

@

12

PC

811

680P

_060

3_50

V7K

@

PC

811

680P

_060

3_50

V7K

@

12

PJ805JUMP_43X79@

PJ805JUMP_43X79@

11

22

PR81610K_0402_1%PR81610K_0402_1%

12

PR83010K_0402_1%@PR83010K_0402_1%@

12

PR831120K_0402_1%@

PR831120K_0402_1%@

12

PC8151U_0402_6.3V6KPC8151U_0402_6.3V6K

12

PR8290_0402_5%

PR8290_0402_5%

12

PR804

120K_0402_1%

PR804

120K_0402_1%

1 2

PC8130.022U_0402_16V7K

PC8130.022U_0402_16V7K

12

PQ803A2N7002KDW-2N_SOT363-6PQ803A2N7002KDW-2N_SOT363-6

61

2

PR82110K_0402_1%PR82110K_0402_1%

12

PJ801

JUMP_43X118@

PJ801

JUMP_43X118@

1 122

PC81247P_0402_50V8J@

PC81247P_0402_50V8J@

1 2

PC

818

22U

_080

5_6.

3V6M

PC

818

22U

_080

5_6.

3V6M

12

PR81130K_0402_1%PR81130K_0402_1%

1 2

PR8010_0402_5%@PR8010_0402_5%@

12

PU802

APL5912-KAC-TRL_SO8

PU802

APL5912-KAC-TRL_SO8

GN

D1

VOUT 4POK7

EN8V

CN

TL

6

VIN 5

VOUT 3

FB 2

VIN 9

PC

803

4.7U

_080

5_25

V6-

KP

C80

34.

7U_0

805_

25V

6-K

12

PC

809

10U

_080

5_6.

3V6M

PC

809

10U

_080

5_6.

3V6M

12

PR80210K_0402_5%@

PR80210K_0402_5%@

12

PD803

RB751V-40_SOD323-2@

PD803

RB751V-40_SOD323-2@

1 2

PR8261.15K_0402_1%

PR8261.15K_0402_1%

12

PR

812

10K

_040

2_1%

PR

812

10K

_040

2_1%

12

PC

802

4.7U

_080

5_25

V6-

KP

C80

24.

7U_0

805_

25V

6-K

12

PR81410K_0402_5%@PR81410K_0402_5%@

12

PR803205K_0402_1%

PR803205K_0402_1%

1 2

PD802

RB751V-40_SOD323-2

PD802

RB751V-40_SOD323-21 2

PR

806

4.7_

1206

_5%

@P

R80

64.

7_12

06_5

%@

12

PQ804B2N7002KDW-2N_SOT363-6

PQ804B2N7002KDW-2N_SOT363-6

34

5

PR807100_0603_1%

PR807100_0603_1%1 2

+

PC

806

330U

_D2_

2.5V

Y_R

15M

+

PC

806

330U

_D2_

2.5V

Y_R

15M1

2

PL8010.88UH +-20% PCMC104T-R88MN 20A

PL8010.88UH +-20% PCMC104T-R88MN 20A

1 2

PD805RB751V-40_SOD323-2

PD805RB751V-40_SOD323-2

1 2

PC8054.7U_0603_6.3V6K

PC8054.7U_0603_6.3V6K

1 2

PC8010.1U_0402_16V7KPC8010.1U_0402_16V7K

12

PD8011SS355_SOD323-2PD8011SS355_SOD323-2

1 2

PC804

0.1U_0603_25V7K

PC804

0.1U_0603_25V7K

1 2

PC8164.7U_0805_6.3V6K

PC8164.7U_0805_6.3V6K

12

PR8250_0402_5%@

PR8250_0402_5%@1 2

PR8158.66K_0402_1%

PR8158.66K_0402_1%

12

PR82747K_0402_5%@PR82747K_0402_5%@

12

PR8284.53K_0402_1%

PR8284.53K_0402_1%

12

PU801

RT8209BGQW_WQFN14_3P5X3P5

PU801

RT8209BGQW_WQFN14_3P5X3P5

VOUT3

VDD4

EN

/DE

M1

TON2

FB5

PGOOD6 LGATE 9

UGATE 13

PHASE 12

GN

D7

PG

ND

8

CS 11

VDDP 10

BO

OT

14

NC

15

PC

807

10U

_080

5_6.

3V6M

PC

807

10U

_080

5_6.

3V6M

12

PC8140.022U_0402_16V7KPC8140.022U_0402_16V7K1

2

PQ

802

TP

CA

8059

-H 1

N P

PA

K56

-8P

Q80

2T

PC

A80

59-H

1N

PP

AK

56-8

5

4

2 13

PR8050_0603_5%

PR8050_0603_5% 1 2

PC8104.7U_0805_6.3V6K

PC8104.7U_0805_6.3V6K

12

PD804RB751V-40_SOD323-2

PD804RB751V-40_SOD323-2

1 2

PR81010K_0402_1%PR81010K_0402_1%

1 2

PJ804

JUMP_43X118@

PJ804

JUMP_43X118@

1 122

PC

819

0.1U

_060

3_25

V7K

PC

819

0.1U

_060

3_25

V7K 1

2PR822

3K_0402_5%PR822

3K_0402_5%

12

PR

818

10K

_040

2_1%

PR

818

10K

_040

2_1%

12

PQ

801

TP

CA

8065

-H 1

N P

PA

K56

PQ

801

TP

CA

8065

-H 1

N P

PA

K56

4

5

123

PR8089.1K_0402_1%

PR8089.1K_0402_1%

1 2

Page 53: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CPU_B+

PHASE1

BOOT1

VSUM+

ISEN1

VSUM-

PHASE2

BOOT2

VSUM+

ISEN2

VSUM-

BOOT1

UGATE1

LGATE1

UGATE2

BOOT2

LGATE2

VSUM-

VSUM+

ISEN1

ISEN2

PHASE2

LGATE1

LGATE2

PHASE1

SVID_SCLK

SVID_ALERT#

LG

AT

EG

ISP

G

ISN

G

VSUM-

NTCG

PHASEG

BOOTG

ISP

G

CPU_B+

UGATE2

UGATE1

UGATEG

LGATEG

PH

AS

EG

UG

AT

EG

BO

OT

G

NT

CG

CPU_B+

SVID_SDA

ISE

N2

ISE

N1

PWM3

ISE

N3

ISNG

VSSSENSE<9>

VR_ON<40>

VR_SVID_CLK<9>

VR_SVID_ALRT#<9>

VR_SVID_DAT<9>

VSS_AXG_SENSE<10>

VSS_AXG_SENSE <10>

VCC_AXG_SENSE <10>

VGATE <16>

GFX_CORE_PWRGD

IMVP_IMON

VR_HOT#<40,46>

VSSSENSE<9>

VCCSENSE<9>

GFXVR_IMON

+CPU_CORE

+CPU_CORE

+5VS

+CPU_CORE

CPU_B+

+5VS

+3VS

+1.05VS_VCCPP

+3VS

+VGFX_CORE

+1.05VS_VCCPP

+VGFX_CORE

B+

B+

+5VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR +CPU_CORE/+VGFX_CORE

Custom

53 54Friday, November 26, 2010

2010/01/25 2010/12/31 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR +CPU_CORE/+VGFX_CORE

Custom

53 54Friday, November 26, 2010

2010/01/25 2010/12/31 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PWR +CPU_CORE/+VGFX_CORE

Custom

53 54Friday, November 26, 2010

2010/01/25 2010/12/31Compal Electronics, Inc.

Alert# PU resister need close CPU, so the PU resister in HW schematic.but DAT and CLK need close PWM-IC, so the PU resister in POWER schematic.

+CPU_CORE

Icc-max=53ARdson=3.6~4.5m ohmDCR=1.1m ohmHW output cap:(1)10U_0805_4V *10(2)22U_0805_6.3V *15(3)470U_D2_2V *4(ESR=4.5m ohm)

+VGFX_COREP

Ipeak=26A , Imax=18.2A , 1.2Ipeak=31.2ARdson=3.6~4.5m ohmDCR=1.1m ohmHW output cap:(1)22U_0805_6.3V *12(2)470U_D2_2V *2(ESR=4.5m ohm)

Parallel and tune length

change from 43P to 47P for shortage problem2010-03-15

(Ipeak=54A)

*Iccmax in Turbo Mode for SV (35W) is 53A

*OCP setting value=71.5A *OCP setting value=37A

For shortage changed

For shortage changed

PIWG1/G2(LA-6751P/LA-6753P)

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Page 54: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PIR (PWR)Custom

54 54Friday, November 26, 2010

2009/01/06 2009/01/06Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PIR (PWR)Custom

54 54Friday, November 26, 2010

2009/01/06 2009/01/06Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.1

PIR (PWR)Custom

54 54Friday, November 26, 2010

2009/01/06 2009/01/06Compal Electronics, Inc.

PIWG1/G2

To reduce charger ripple 47 Add PC323 DVT2010.08.15

HW request for power sequence

Change +VGA_PCIE enable signal from PX_MODE to PE_GPIO1PR804:120KPR831,PR801,PR825 UN-POPPR824:47KPC819:0.2uF

Change Vboot setting Change PR942 as 4.32K

Change OCP setting

Add PC955 for loadline adjust

Change PR958 as 1.47K

Add PC955

2010.08.15DVT

DVT2010.08.15

DVT2010.08.15

PVT

2010.08.15

52

51

52

52

Reserve pull low resistor

Remove jump

51

51

Add PR718,PR832

Remove PJ802,PJ803

2010.09.29

DVT

2010.09.29 PVT

Adapter protect circuit 46Pop PR222,PR208,PH202,PR221,PQ204Un-Pop PR223,PR203

PVT2010.09.29

EMI Request47

Remove PJ301Add PL302 and reserve PC324 2010.09.29 PVT

Page 55: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

Power sequenceCustom

55 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

Power sequenceCustom

55 59Friday, November 26, 2010

2010/07/12 2012/07/11 Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-6751P 0.2

Power sequenceCustom

55 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

PU7+VCCSA

PU9+1.05VS_VCCP

V

A1

B1

A3

B4

A5

PCH

U14,+3VALW_PCHQH4,+5VALW_PCH

B3

51ON#

ON/OFF

+3VALW

B+

EC_ON

VIN

BATT

PM_SLP_S3#PM_SLP_S4#PM_SLP_S5#PM_SLP_A#PM_SLP_SUS#

6

PBTN_OUT#

4

V

VV

V

V

V V

VV

V

V

V

PCH_PWR_EN#

+3VALW_PCH+5VALW_PCH

3V

A5 B7

SYSON +1.5VPU5

A4 B6

SUSP#,SUSP 8

VV U49

+5VS

U20+3VS

U13+1.5VS

PU8+0.75V

VV

VV

VR_ON

11

VGATE

PM_DRAM_PWRGD

H_CPUPWRGD

PLT_RST#

B5

SYS_PWROK

B7 2

2VV

V

PCH_RSMRST#

5

7 SYSON#

9

V

PU1000+CPU_CORE 10

U47CK505

14

13

CPU15

V

2

VGAV

VGA_PWROK 8b

VV

V

PU3

EC

AC MODE

BATT MODE

PU2A2

(DIS)

B+

B2

PQ2

8a (DIS)VGA_ON

V +3VSDGPUQ6

V

DGPU_PWR_EN

+1.5VSDGPUU40

V +1.8VSDGPUU37

V +1.0VSDGPUPU28

V +VGA_COREPU998

VV

VV

V

V

VCCPPWRGOOD

Page 56: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

KSO[0..15]

KSI[0..7]

KSO2

KSO15

KSO6

KSO8

KSO13

KSO12

KSO11

KSO10

KSO3

KSO4

KSI0

KSO0

KSO1

KSO7

KSI2

KSO5

KSI3

KSO14

KSI7

KSI6

KSI5

KSI4

KSO9

KSI1

+VCC_LID

TP_CLK

KSO6KSO8KSO7KSO4KSO2KSI0KSO1KSO5KSI3KSI2KSO0KSI5KSI4KSO9KSI6KSI7KSI1

KSO15KSO10KSO11KSO14KSO13KSO12KSO3

SW/R

TP_CLKTP_DATA

SW/R

SW/L

SW/LTP_DATA

ODD_DETECT#

ODD_DA#

SATA_DTX_C_IRX_N2SATA_DTX_C_IRX_P2 SATA_DTX_IRX_P2

SATA_DTX_IRX_N2

SATA_ITX_DRX_N2_CONNSATA_ITX_DRX_P2_CONN

USB20_N0USB20_P0

+USB_VCCA

USB20_P0_C

USB20_N0_C

USB20_P0_CUSB20_N0_C

USB20_P0_C

USB20_N0_C

USB20_P0

USB20_N0

USB_ON#

KSO[0..15] <40,57>

KSI[0..7] <40,57>

LID_SW# <40,57>

KILL_SW#<14,57>

TP_CLK<40,57>TP_DATA<40,57>

SATA_DTX_C_IRX_P2<14,57>SATA_DTX_C_IRX_N2<14,57>

SATA_ITX_DRX_P2_CONN<14,57>SATA_ITX_DRX_N2_CONN<14,57>

ODD_DA#<18,40,57>

RF_LED#<40,57>

HDD_LED#<14,57>

BT_LED#<42,57>

WLAN_LED#<34,57>

PWR_LED#<40,43,57>

USB20_P0<18,57>USB20_N0<18,57>

USB_ON#<38,40,42,57> USB_OC0# <18,38,57>

CHARGE_LED1#<40,57>

CHARGE_LED0#<40,57>

+3VALW

+3VALW

+5VS

+5V_ODD

+3VS

+5VS

+5VS

+5VALW

+USB_VCCA

+5VALW

+USB_VCCA

+3VALW

+5VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

KB /SW /LPC Debug Conn.B

56 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

KB /SW /LPC Debug Conn.B

56 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

KB /SW /LPC Debug Conn.B

56 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

INT_KBD Conn.

To TP/B Conn.

CONN PIN define need double check

CONN PIN define need double check

Lid Switch

KILL_SW#

Kill Switch

1,2(LOW)STATUS

OFF2,3(HI) ON

Kill

Reserve for ESD.

SATA ODD Conn.

LEDWhite

White

White

8/13 update JODD1 symbol

Right USB Conn. W=80mils

RIGHT USB PORT X1

8/23 Change LED1/LED3/LED4 P/N to SC50000A300

8/23 change C714 P/N to SGA00002N80

8/27 change to @

8/27 change to stuff

Change design to two LED20101005

Left --> WhiteRight --> Orange

White

OrangeBATT_LOW_LED#

BATT_CHG_LED#

C690 100P_0402_50V8J@C690 100P_0402_50V8J@1 2

C676 100P_0402_50V8J@C676 100P_0402_50V8J@1 2

L66

WCM-2012-900T_4P

L66

WCM-2012-900T_4P

11

44 3 3

2 2

R679 0_0402_5%R679 0_0402_5%1 2

SW4

SMT1-05_4P

SW4

SMT1-05_4P

3

2

1

4

56

ZZZ

DAZ0GL00100

ZZZ

DAZ0GL00100

R554 0_0402_5%R554 0_0402_5%1 2

LED4

19-213A-T1D-CP2Q2HY-3T_WHITE

LED4

19-213A-T1D-CP2Q2HY-3T_WHITE

21

JTP1

ACES_88058-060N

JTP1

ACES_88058-060N

112233445566

GND7GND8

R764470_0402_5% R764470_0402_5%12

C668 100P_0402_50V8J@C668 100P_0402_50V8J@1 2

C683 100P_0402_50V8J@C683 100P_0402_50V8J@1 2

C674 100P_0402_50V8J@C674 100P_0402_50V8J@1 2

R626300_0402_5% R626300_0402_5%12

C713 0.1U_0402_16V4ZC713 0.1U_0402_16V4Z12

D25

PJD

LC05

_SO

T23

-3

@D25

PJD

LC05

_SO

T23

-3

@

231

LED2

HT-191UD5_AMBER

LED2

HT-191UD5_AMBER

21

SW2

LSSM12-P-V-T-R_3P

SW2

LSSM12-P-V-T-R_3P

11

22

33

JKB1

ACES_88514-2401

ME@

JKB1

ACES_88514-2401

ME@

112233445566778899101011111212131314141515161617171818191920202121222223232424

GND125GND226

R710 0_0402_5%R710 0_0402_5%1 2

C669 100P_0402_50V8J@C669 100P_0402_50V8J@1 2

C696

0.1U_0402_16V4Z

C696

0.1U_0402_16V4Z

C715470P_0402_50V7KC715470P_0402_50V7K

1

2

+C714

150U_B2_6.3VM_R35M

+C714

150U_B2_6.3VM_R35M

1

2

C681 100P_0402_50V8J@C681 100P_0402_50V8J@1 2

D20

RB751V_SOD323

@ D20

RB751V_SOD323

@21

D15PSOT24C_SOT23-3@

D15PSOT24C_SOT23-3@

231

LED5

19-213A-T1D-CP2Q2HY-3T_WHITE

LED5

19-213A-T1D-CP2Q2HY-3T_WHITE

21

C691 100P_0402_50V8J@C691 100P_0402_50V8J@1 2

C672 100P_0402_50V8J@C672 100P_0402_50V8J@1 2 C673 100P_0402_50V8J@C673 100P_0402_50V8J@1 2

ZZZ2

PCB

DA4@

DA40000VV10

ZZZ2

PCB

DA4@

DA40000VV10

R869 0_0402_5%@R869 0_0402_5%@12

C671 100P_0402_50V8J@C671 100P_0402_50V8J@1 2

C689 100P_0402_50V8J@C689 100P_0402_50V8J@1 2

D19

RB751V_SOD323

@ D19

RB751V_SOD323

@21

R616100K_0402_5%

R616100K_0402_5%

12

R868 0_0402_5%@R868 0_0402_5%@12

C678 100P_0402_50V8J@C678 100P_0402_50V8J@1 2

R625300_0402_5% R625300_0402_5%12

C670 100P_0402_50V8J@C670 100P_0402_50V8J@1 2

ZZZ1

PCB

DA8@

DA80000KF10

ZZZ1

PCB

DA8@

DA80000KF10

C682 100P_0402_50V8J@C682 100P_0402_50V8J@1 2

R765300_0402_5% R765300_0402_5%12

LED3

19-213A-T1D-CP2Q2HY-3T_WHITE

LED3

19-213A-T1D-CP2Q2HY-3T_WHITE

21

C687 100P_0402_50V8J@C687 100P_0402_50V8J@1 2

C697100P_0402_50V8J

@C697100P_0402_50V8J

@1

2

U36

APL3510BKI_SO8

U36

APL3510BKI_SO8

GND1

IN2

OC# 5OUT 6

OUT 8

IN3

EN4

OUT 7

C686 100P_0402_50V8J@C686 100P_0402_50V8J@1 2

C7161000P_0402_50V7K@

C7161000P_0402_50V7K@

1

2

C69510P_0402_50V8J

C69510P_0402_50V8J

1

2

C605 0.01U_0402_16V7KC605 0.01U_0402_16V7K1 2

C680 100P_0402_50V8J@C680 100P_0402_50V8J@1 2

R615 100K_0402_5%R615 100K_0402_5%1 2

C606 0.01U_0402_16V7KC606 0.01U_0402_16V7K1 2

C677 100P_0402_50V8J@C677 100P_0402_50V8J@1 2

JUSB3

ACES_85205-04001ME@

JUSB3

ACES_85205-04001ME@

11

22

33

G55

G66

44

C6940.1U_0402_16V4Z

C6940.1U_0402_16V4Z

1

2

R622300_0402_5% R622300_0402_5%12

C684 100P_0402_50V8J@C684 100P_0402_50V8J@1 2

SW5

SMT1-05_4P

SW5

SMT1-05_4P

3

2

1

4

56

ZZZ3

PCB

DA4@

DA40000VS10

ZZZ3

PCB

DA4@

DA40000VS10

LED1

19-213A-T1D-CP2Q2HY-3T_WHITE

LED1

19-213A-T1D-CP2Q2HY-3T_WHITE

21

C685 100P_0402_50V8J@C685 100P_0402_50V8J@1 2

C679 100P_0402_50V8J@C679 100P_0402_50V8J@1 2

U32

S-5711ACDL-M3T1S_SOT23-3

U32

S-5711ACDL-M3T1S_SOT23-3

GN

D1

OUTPUT 3

VD

D2

C688 100P_0402_50V8J@C688 100P_0402_50V8J@1 2

C675 100P_0402_50V8J@C675 100P_0402_50V8J@1 2

C698100P_0402_50V8J

@C698100P_0402_50V8J

@1

2

R555

10K_0402_5%

R555

10K_0402_5%1 2

R614 0_0402_5%R614 0_0402_5%1 2

JODD1

ALLTO_C18518-11305-LME@

JODD1

ALLTO_C18518-11305-LME@

GND1

A+2

A-3

GND4

B-5

B+6

GND7

DP8

+5V9

+5V10

MD11

GND12

GND13 GND 14GND 15

Page 57: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

KSO[0..17]

KSI[0..7]

KSO2

KSO15

KSO6

KSO8

KSO13

KSO12

KSO11

KSO10

KSO3

KSO4

KSI0

KSO0

KSO1

KSO7

KSI2

KSO5

KSI3

KSO14

KSI7

KSI6

KSI5

KSI4

KSO9

KSI1

KSO6KSO8KSO7KSO4KSO2

KSO1KSO5KSI3KSI2KSO0KSI5KSI4KSO9KSI6KSI7KSI1

KSO15KSO10KSO11KSO14KSO13KSO12KSO3

SW/R

SW/L

SW/LTP_DATA

TP_CLKTP_DATA

TP_CLK

SW/R

KSI0

KSO16KSO17

KSO16

KSO17

ODD_DETECT#

ODD_DA#

SATA_DTX_C_IRX_N2SATA_DTX_C_IRX_P2 SATA_DTX_IRX_P2

SATA_DTX_IRX_N2

SATA_ITX_DRX_N2_CONNSATA_ITX_DRX_P2_CONN

RF_LED#_R

RF_LED#_R

LID_SW#

USB20_N0USB20_P0

+USB_VCCA

USB20_P0_C

USB20_N0_C

USB20_P0_CUSB20_N0_C

USB20_P0_C

USB20_N0_C

USB20_P0

USB20_N0

USB_ON#

KILL_SW#

KSO[0..17] <40,56>

KSI[0..7] <40,56>

TP_CLK<40,56>TP_DATA<40,56>

KSO16<40>KSO17<40>

SATA_DTX_C_IRX_P2<14,56>SATA_DTX_C_IRX_N2<14,56>

SATA_ITX_DRX_P2_CONN<14,56>SATA_ITX_DRX_N2_CONN<14,56>

ODD_DA#<18,40,56>

RF_LED#<40,56>

LID_SW#<40,56>

BT_LED#<42,56>

WLAN_LED#<34,56>

PWR_LED#<40,43,56>CHARGE_LED1#<40,56>CHARGE_LED0#<40,56>

HDD_LED#<14,56>

USB20_P0<18,56>USB20_N0<18,56>

USB_ON#<38,40,42,56> USB_OC0# <18,38,56>

KILL_SW#<14,56>

+5VS

+5V_ODD

+3VS

+5VALW+3VALW

+5VS

+3VALW

+USB_VCCA

+5VALW

+USB_VCCA

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

KB /SW /LPC Debug Conn.B

57 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

KB /SW /LPC Debug Conn.B

57 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

KB /SW /LPC Debug Conn.B

57 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

INT_KBD Conn.

To TP/B Conn.

CONN PIN define need double check

CONN PIN define need double check Reserve for ESD.

SATA ODD FFC Conn.

For 15" M/B to LED/B

White

7/22 modify

Right USB Conn. W=80mils

8/14 change to OSCAN 220U

(220uF_6.3V_4.2L_ESR17m)*1=(SF000002Y00)

RIGHT USB PORT X1

8/27 change to @

8/27 change to stuff

11/16modify

C678 100P_0402_50V8J@C678 100P_0402_50V8J@1 2

C685 100P_0402_50V8J@C685 100P_0402_50V8J@1 2

D25

PJD

LC05

_SO

T23

-3

@D25

PJD

LC05

_SO

T23

-3

@

231

ZZZ3

PCB

DA4@

DA40000VS10

ZZZ3

PCB

DA4@

DA40000VS10

C675 100P_0402_50V8J@C675 100P_0402_50V8J@1 2

C7161000P_0402_50V7K@

C7161000P_0402_50V7K@

1

2

R884 100K_0402_5%@R884 100K_0402_5%@1 2

R868 0_0402_5%@R868 0_0402_5%@12

C668 100P_0402_50V8J@C668 100P_0402_50V8J@1 2

JP2

ACES_87056-01001-001

ME@

JP2

ACES_87056-01001-001

ME@

11

22

33

44

55

66

99

1010

77

88

GND11

GND12

JKB1

ACES_88514-3001

ME@

JKB1

ACES_88514-3001

ME@

GND 31

GND 32

11

22

33

44

55

66

77

88

99

1010

1111

1212

1313

1414

1515

1616

1717

1818

1919

2020

2121

2222

2323

2424

2525

2626

2727

2828

2929

3030

C713 0.1U_0402_16V4ZC713 0.1U_0402_16V4Z12

ZZZ4

PCB

DA4@

DA40000VT10

ZZZ4

PCB

DA4@

DA40000VT10

JUSB3

ACES_85205-04001ME@

JUSB3

ACES_85205-04001ME@

11

22

33

G55

G66

44

C676 100P_0402_50V8J@C676 100P_0402_50V8J@1 2

C693 100P_0402_50V8J@C693 100P_0402_50V8J@1 2

C687 100P_0402_50V8J@C687 100P_0402_50V8J@1 2

R555

10K_0402_5%

R555

10K_0402_5%1 2

C677 100P_0402_50V8J@C677 100P_0402_50V8J@1 2

C670 100P_0402_50V8J@C670 100P_0402_50V8J@1 2

JP13

ACES_88514-01201-071

ME@

JP13

ACES_88514-01201-071

ME@

11

22

33

44

55

66

77

88

99

1010

1111

1212

GND113

GND214R554 0_0402_5%R554 0_0402_5%

1 2

C680 100P_0402_50V8J@C680 100P_0402_50V8J@1 2

D20

RB751V_SOD323

@ D20

RB751V_SOD323

@21

D15PSOT24C_SOT23-3@

D15PSOT24C_SOT23-3@

231

C696

0.1U_0402_16V4Z

C696

0.1U_0402_16V4Z

C688 100P_0402_50V8J@C688 100P_0402_50V8J@1 2

C683 100P_0402_50V8J@C683 100P_0402_50V8J@1 2

C691 100P_0402_50V8J@C691 100P_0402_50V8J@1 2

C689 100P_0402_50V8J@C689 100P_0402_50V8J@1 2

+C714

220U_6.3V_M

+C714

220U_6.3V_M

1

2

C681 100P_0402_50V8J@C681 100P_0402_50V8J@1 2

JTP1

ACES_88058-060N

ME@

JTP1

ACES_88058-060N

ME@

11

22

33

44

55

66

GND7

GND8

C672 100P_0402_50V8J@C672 100P_0402_50V8J@1 2

U36

APL3510BKI_SO8

U36

APL3510BKI_SO8

GND1

IN2

OC# 5OUT 6

OUT 8

IN3

EN4

OUT 7

C606 0.01U_0402_16V7KC606 0.01U_0402_16V7K1 2

C684 100P_0402_50V8J@C684 100P_0402_50V8J@1 2

ZZZ2

PCB

DA4@

DA40000VV10

ZZZ2

PCB

DA4@

DA40000VV10

C671 100P_0402_50V8J@C671 100P_0402_50V8J@1 2

L66

WCM-2012-900T_4P

L66

WCM-2012-900T_4P

11

44 3 3

2 2

C690 100P_0402_50V8J@C690 100P_0402_50V8J@1 2

C692 100P_0402_50V8J@C692 100P_0402_50V8J@1 2

R710 0_0402_5%R710 0_0402_5%1 2

R869 0_0402_5%@R869 0_0402_5%@12

C697100P_0402_50V8J

@C697100P_0402_50V8J

@1

2

C674 100P_0402_50V8J@C674 100P_0402_50V8J@1 2

C669 100P_0402_50V8J@C669 100P_0402_50V8J@1 2

ZZZ5

PCB

DA4@

DA40000VU10

ZZZ5

PCB

DA4@

DA40000VU10

SW4

SMT1-05_4P

SW4

SMT1-05_4P

3

2

1

4

56

C679 100P_0402_50V8J@C679 100P_0402_50V8J@1 2

R679 0_0402_5%R679 0_0402_5%1 2

SW5

SMT1-05_4P

SW5

SMT1-05_4P

3

2

1

4

56

ZZZ1

PCB

DA8@

DA80000KG10

ZZZ1

PCB

DA8@

DA80000KG10

C715470P_0402_50V7KC715470P_0402_50V7K

1

2

C605 0.01U_0402_16V7KC605 0.01U_0402_16V7K1 2

C686 100P_0402_50V8J@C686 100P_0402_50V8J@1 2

C682 100P_0402_50V8J@C682 100P_0402_50V8J@1 2

R615 100K_0402_5%R615 100K_0402_5%1 2

ZZZ

DAZ0GM00100

ZZZ

DAZ0GM00100

C698100P_0402_50V8J

@C698100P_0402_50V8J

@1

2

D19

RB751V_SOD323

@ D19

RB751V_SOD323

@21

C673 100P_0402_50V8J@C673 100P_0402_50V8J@1 2

Page 58: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

KB /SW /LPC Debug Conn.B

58 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

KB /SW /LPC Debug Conn.B

58 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

KB /SW /LPC Debug Conn.B

58 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

0.2 P39 change C610 pin 1 net name

0.2 P18

0.2 P40 Add R740, C93

0.2 P32 Add R735,R736 For DIS only SMBus pull high

0.2 Add R741

Modification list PURPOSEPHASE PAGE

0.2 P31 Del C510 For Non-used part

0.2 P35 U25 change to U26

P31 Change CRT Symbol0.2 For CRT footprint issue

0.2

0.2

change C610 pin 1 net name to correct

For co-lay 10/100 and GIGA

P33 Add R738,R739 For DIS only SMBus pull high

P33 Change Q63 BOM structure to HDMI@ For DIS HDMI function

For EC request

Change R215 pin1 net name Change R215 pin1 net name to correct

P18 Add R741 for Reserved PE_GPIO0

0.2 P38 Del U28, R542~R551 , J12

0.2 P39

0.2 P39 Change J10 footprint and Add J13

0.2 P24 Change R662 pin 2 net name Change R662 pin 2 net name to correct

0.2 Add R161, R182, R192 BOM structure hange to @

0.2 P16 Add R742, R743 For PCH power sequence

0.2 P40 Add EC pin 97,98,103

0.2

0.2

P26 Add R744 Add R744 for control PE_GPIO1 from SUSP#

Change J10 footprint by DFx request and Add J13 by vendor suggestion

Change PC_Beep circuit Change PC_Beep circuit

Del USB charger circuit

Add EC pin 97 for SYS_PWROK_EC , pin 98 for CE_EN , pin 103 for BATT_SEL_EC

Del C421,C422,C431,C432,C433, L27, Add R745, U8 pin N11,N12 change to NC For AMD new document suggestion

P6 Follow ORB circuit

P28

0.2 Add R615 in 15" and 17" page

0.2 P42

0.2 P34

0.2 P56/57/58 Change JP21 to JKB1 Change connector to standard name

0.2

P58/59

Add Q83 pin 1 power net name +CMOS_PW

0.2

0.2

P43/60

Pull high LID_SW# at M/B side

For power trace netP31

P56/57/58 Change JP4 to JTP1 Change connector to standard name

Change JP6 to JPWRB1

Change JP1 to JWLN1

Change JP5 to JBT1

Change connector to standard name

Change connector to standard name

Change connector to standard name

0.2

0.2 P42

P19 Add R542

Add R886, R887 , C735

For ESATA detect function

For ESATA detect function

0.2 P43/60 Change JP7 to JCR1

0.2 P24 For AMD update

0.2 P42

0.2 P42

0.2

0.2

P39

P31 Add R543 For reserve EC control directly

Change J10 footprint, Del C635, C636

Add R877

SW3 BOM structure change to @

Change J10 for DFx and Del component for layout

For ME ASSY concern

0.2

0.2 P42

P25 Change Q69,Q70,Q71,Q72 to BSS138, change Q66,Q67 pin 1 net name, D28 change to @

Change ESATA from port 5 to port 4

For Change BACO part follow AMD reference DATA ,D28 change to @ for leakage

For intel risk

For reserve EC control directly

Change connector to standard name

R324 BOM structure change, del @

0.2

0.2 P12/13

P15 Add R544,R545

Del R74~R80,R82 R88~R94,R96

For Pull high SMBus

For DDR3 DM Bus to GND

0.2

0.2 P20

P16 Add R182,R546

Del Add J12, R257 change to @

Add 186 for reserve sequence, Add R546 for follow CRB & ORB

For voltage drop

P6 R161 change to 100K Follow CRB

P19 Add R547 , R250 change to @ Follow Module and CRB

P18 WLAN USB port for port8 to port9 For debug port

P25 AND Gate power change to +3VGS For VGA circuit

P24 Add R548, R549 For DIS HDMI audio strap

P39 Del J13 For layout space

P20,39,42 Add C395 , R581 , R583 , R584 , R586 , R587 For customer request reserved

P20 Add C129, C396 , Del R264 For reserved

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

P40 Add PIN 66 , R740,C93 change to @ Add IMVP_IMON0.2

P26 R161 Change Q6 to U14 Change SI2301 to SI4800 for loading current0.2

P9 Add R74 For VCCIO_SENSE / VSSIO_SENSE differential routing0.2

Page 59: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

HW-PIRB

59 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

HW-PIRB

59 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

HW-PIRB

59 59Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Modification list PURPOSEPHASE PAGEP33 Del RQ51 ~ Q54 Add Q95 For DIS HDMI0.2

P39 Del J10, C637,C640,R576,R577,R579 change to @ , L40~L43 change to R720~R723 For Vendor suggestion and EMI0.2

Del C643, R578 , MIC_INR connect MIC_INL , Add R578 Del C653, R578 connect MIC_INR/L for vendor suggestion , Add R578 for EMI

P20 Add L75 , R264 , C917, R259 C226 change to @ For intel PDDG update0.2

P20 Change JCR1 pin define , MIC change with HP For correct ID0.2

P9 Add C394, C397 ,C400 ,Add R75 For CPU_CORE power reserved at Bottom side, Add R75 for reserved at cpu side and pwr side0.2

P26 Add R688 change to 20k, R345 change to 200k , R350 change to 330k , Q65 stuff For VGA power sequence0.2

P42 Change C706 P/N to SF000001500 Change to H=6 OSCAN0.2

P10 Change C128 to @ For Reserved0.2

P26 Change D3 change to @ For VGA leakage0.2

P25 Change BIF_VDDC control pin net name For correct behavior0.2

P56 Update JODD1 symbol For ME update drawing0.2

P16 D29 change to @ For AC detect issue0.2

P24 R548,R549 change to DIS@ For AC detect issue0.2

P10 C128 change to stuff For test on DVT0.2

P44 Del Q118, R657 For not need0.2

P57 Change 15" C714 to OSCAN For ME Space ok0.2

Change R513, R516 ,R667 P/N and from 0805 to 0603 For common part0.2

Change C633, C634 , C642 For common part0.2

Change D3, D29 P/N and symbol For common part0.2

Change U3,U11,U13,U14,U38,U39 P/N and symbol For common part0.2

Change U3,U11,U13,U14,U38,U39 P/N and symbol For common part0.2

Change Q8,Q65,Q80,Q83,Q99,Q104 P/N and symbol For common part0.2

Change Q1,Q37,Q93 P/N and symbol For common part0.2

Change Q94, Q95 P/N and symbol For common part0.2

Change Q3,Q4,Q7,Q9,Q66,Q67,Q68,Q73,Q74,Q75,Q76,Q77,Q78, For common part0.2

Q79,Q82,Q85,Q86,Q87,Q102,Q106,Q107,Q108,Q109,Q110,Q111,Q112,Q113,Q114,Q115,Q116 P/N and symbol

Change C635 part and change to @ For EMI0.2 P43

P18 Reserved R551 Reserved0.2

P9 Change C53,C85,C86,C87 ,C394,C397,C400 to stuff and change C48,C80,C81,C82,C89,C90,C91 to @

For CPU_CORE0.2

P56 Change LED1/LED3/LED4 P/N to SC50000A3000.2 Change P/N

P40 Change R611,R740,C93 to stuff and change Y5,C347,C367 to @0.2 For SUS_CLK

P36 Change T1,T2 P/N to SP050003N00 For test pass part0.2

Change R695 to 18K, Q37 change to @, R747 change to stuff, R695 for Board ID, Q37, R747 for VR_HOT

P10 Change C110,C111,C112,C113 to stuff0.2 For VGFX_CORE

P410.2 Change U33 P/N to SA00003FL10 For BIOS ROM

0.2 Change C509,C511,C635 to stuff

0.2 Change 14" C714 P/N to SGA00002N80 For Sourcer requestP56

0.2 Change R720,R721,R722,R723 P/N to SM01000BZ00(Bead), andChange C647,C649,C650,C651 to Stuff

P39 For EMI request

For EMI request

0.2 For BIOS ESATA detect functionChange R303 to Stuff, and change R542 to @P19

0.2 For common part Change U32 P/N to SA000031C00P56

0.2 For correct part Change T1,T2 P/N to SP050006E00P36

0.2 For S3 power reduction R688 change to stuff , R687 ,Q7 change to @P10

0.2 For EMIChange R660,R661,R862,R863,R864,R865,R868,R869 to @ , changeL63,L64,L65,L66 to stuff , change R619 to Bead (SM01000DI00)

0.2 P20 Change L75 symbol For common part

Page 60: Compal PIWG1 / PIWG2 (LA-6751P / LA-6753P) rev.1.0 · PDF file · 2016-04-24ENE KB9012 W P ñ r í ... Power-Up/Down Sequence 1. All the ASIC supplies must fully r each their respective

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

HW-PIRB

60 60Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

HW-PIRB

60 60Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

0.2

HW-PIRB

60 60Friday, November 26, 2010

2010/07/12 2012/07/11Compal Electronics, Inc.

LA-6751P

Modification list PURPOSEPHASE PAGE

P10 Update Q5 symbol For update symbol0.3

P33 Add F2 For safty request 0.3

P39 Update U30 P/N to SA00003K410 and Add R879 For Audio update to 21Z0.3

P10 Change C128 to D2 size and @ Change size for M/E issue0.3

P14 Add reserve R878 For Intel DG 1.50.3

P37 C592 change P/N to SF000001500 (H=6) For ME Z high ok0.3

P25 Update Q69~Q72 to AO3414 ,D28 R873 change to BACO@ , U40 change to @ For PX4.00.3

P28 Add reserve C94 For reserve VGA_CORE0.3

P29 R369 P/N change to SD034100A80 For GP part0.3

P18 R553,R691,R684,R682,U12 change to PX@ For PX 4.00.3

P6 Reserved R880 to SYS_PWROK Follow ORB0.3

P10 R62,R63 change to 1K Follow CRB0.3

P19 R303 change to @, Change M/B ID to PX4.0 For ESATA and PX4.00.3

P25 Q69~Q72 change to BACO @ For PX4.00.3

P26 R719 change to stuff, R744 change to @ , R677 change to BACO@ For PX4.00.3

P33 R483,R484 change connect to +5V_HDMI_F For Add F20.3

P37 Change U27 P/N to SA000046C00 For Fintek0.3

P40 Change R594 pull high to +5VALW For leakage issue0.3

P19 R881 change to Dtuff, R244 change to @ For intel MRC Rev0.90.3

P14 R878 change to stuff For intel DG 1.50.3

P31 Del R432 For non-used part0.3

P36 Reserved D31 , C643 , C644 For reserved EMI parts0.3

P37 Del R5810.3 For non-used part

P38 Del R5500.3 For non-used part

P38 Change C592 P/N to SF000002Y000.3 For M/E Z high limlt

P39 Del R584, R586 , R5870.3 For non-used part

P40 Change R600, R604 to 2.2K Change R695 to 8.2k0.3 Change R600, R604 for Battery SMBus, R695 for Board ID

P42 Del R5830.3 For non-used part

P6 Reserved R882 connect to PCH_PWROK0.3 Reserved for intel

P56 R765 change to 300 ohm0.3 For LED

P25 R324, R744 , R674 change [email protected] For DIS only sku