CMP Modeling as Part of Design for...

CMP Modeling as Part of Design for Manufacturing

David Dornfeld

Will C. Hall Professor of EngineeringLaboratory for Manufacturing and SustainabilityDepartment of Mechanical EngineeringUniversity of California Berkeley CA 94720-1740

http://lmas.berkeley.edu

University of California at Berkeley

© Laboratory for Manufacturing and Sustainability, 2007

Outline

• Modeling objectives and perspective

• CMP process model development

• Short review

• Towards design for manufacturing (DFM)



Levels of Flexibility ‐ Design to Manufacturing

Level IFeature prediction, control, andoptimization in an iterative designand process planning environment

Design: HighManufacturing: HighFinishing: High

Level IIFeature prediction, control, andoptimization through the selection ofa manufacturing plan in an "over-the-wall" design-to-manufacturingenvironment

Design: LowManufacturing: HighFinishing: High -> low

Level IIIFeature prediction and controlthrough limited adjustments to apre-established manufacturingprocess

Design: LowManufacturing: LimitedFinishing: High -> low

Level IVFeature prediction for finishingprocess planning, finishing tooltrajectories and sensor-feedbackstrategies

Design: LowManufacturing: LowFinishing: High

So f

twar

e d r

i ven

Har

dwa r

e d r

i ven



Modeling Roadmap for maximum impact

Minimum cost/CoOMaximum productionMaximum flexibilityMaximum qualityMinimum environmental

& social impactBroadest integration

***

Through software

FunctionalModel

Feedback(validation)

Integrationwith CAD



Include “islands of automation” andexisting models)

Include supply chain with

constraints (e.g.“quality gates” )

Prototype based

on model


Extend to “socialimpact” constraints

(green, sustainability,health, safety, etc.)





Is there need for this?

Design Manf’g

Design Manf’g



What you see depends on where you are standing!

+DesignManf’g

+ Manf’gDesign

Source: Y. Granik, Mentor Graphics



What’s your world view?

Design

Process

Process

Process

Design

Design



Components of Chemical Mechanical Planarization

Mechanical Phenomena

Chemical Phenomena

Interfacial and Colloid

Phenomena



Scale Issues in CMP

Scale/sizenm µm mm

Material Removal

Mechanical particle forcesParticle enhanced chemistry

ChemicalReactions

ActiveAbrasives

Pores,Walls Grooves

Tool mechanics,Load, Speed

critical features dies

Pad

Mechanism

Layoutwafer

From E. Hwang, 2004



Bulk Cu CMP Barrier polishing W CMP Oxide CMP Poly-Si CMP

Physical models of material removal mechanism in abrasive scale

Chemical reactions

Bulk Cu slurry Barrier slurry W slurry Oxide slurry Poly-Si slurry

Mechanical material removal mechanism in abrasive scale

Abrasive type, size and concentration

[oxidizer], [complexing agent], [corrosion inhibitor],

pH …

Pad asperity density/shape

Pad mechanical propertiesin abrasive scale

Pad properties in die scale

Slurry supply/ flow patternin wafer scale

Wafer scale pressure NU Models of WIWNU

Models ofWIDNU

Topography

Wafer scale velocity profile

Wafer bending with zone pressures

Better control of WIWNU

Reducing ‘Fang’

Small dishing & erosion

Ultra low-k integration

Smaller WIDNU

Reducing slurry usageUniform pad performance

thru it’s lifetimeLonger pad life time

Reducing scratch defects

Better planarization efficiency

E-CMPPad groove

Pad design

Fabrication

Test

Fabrication technique

Slurry supply/ flow pattern in die scale

Cu CMP

modeldesign goalPad development

PatternMIT model

DornfeldDoyle

An overview of CMP research in Berkeley

Talbot



CMP Modeling History in SFR/FLCC*Preston’s E

qn.

MRR = CPV

Com

bined eqn.

R=τC

M/( C

+M)

before SFR/FLCC

Luo(SFR

)MRR

= N ×Vo l

Cho

i (FL

CC) MRR =

Trip

athi

(FLC

C)

Trib

o-el

ectro

-che

mic

al m

odel

Interfacial/colloidal effects

DfM/MfD

Computational efficiencyFlexible in scaleProcess links

now

* According to Dornfeld



Interactions between Input VariablesFour Interactions:Wafer‐Pad Interaction; Pad‐Abrasive Interaction; Wafer‐Slurry Chemical Interaction; Wafer‐Abrasive Interaction

Polishing pad

Abrasive particles in Fluid (All inactive) Pad asperity

Active abrasiveson Contact area

VolChemically Influenced Wafer Surface

Wafer

Abrasive particles on Contact area with number N

Velocity V

Source: J. Luo and D. Dornfeld, IEEE Trans: Semiconductor Manufacturing, 2001



Pad Materials/Shape Effects

Dishing d

3Erosion e

21

Df

S1=Df1

S=S0

H=Hcu0+Hox0 H= Hstage1

Hcu0

Hox0

Pad/wafer contact modes in damascene polishing

Linear Viscoelastic Pad0 20 40 60 80 100 120 140 160 180 200

0

50

100

150

200

250

300

350

400

450

500

Polishing Time t (second)

Ste

p H

eigh

t S (n

m)

PDi= 0.1PDi= 0.2PDi= 0.3PDi= 0.4PDi= 0.5PDi= 0.6PDi= 0.7PDi= 0.8PDi= 0.9

Stage 1

Stage 2

Stage 3

Dishing and erosion



Effect of Pattern Density - Planarization Length (PL)

ILD

Metal linesPlanarization Length

High-density region

Low-density region

Global step



Effective pattern density

a=320um

a=640um

a=1280um

< Effective density map >

< Test pattern >

< Post CMP film thickness prediction at

die-scale >

Modeling of pattern density effects in CMP

Planarization length (window size) effect on “Up area”



PAD

Z(x,y)

Reference height (z=0)

Z_pad

Z(x,y)

Z_pad

dz

∫−

−×−+××=padZyxZ

zyxZzPDFdzzPDFdensityasperityKpyxF_),(

0

)),(())()(()_(),(

Feature level interaction between pad asperities and pattern topography

∫=die

dxdyyxFtentF ),(_

F_tent > F_die ? F_tent < F_die ?

++Z_pad --Z_pad

No

Yes

No

Yes

Z_pad

z



Asperity Height (µm)

Probability Density (µm-1)

pD

ab

active asperities

Characterization of Pad Surface

(source : A.Scott Lawing, NCCAVS, CMPUG 5/5/2004)



Model for the simulation

asperities# ),(),(),( ×∝−= yxRdt

yxdzyxMRR a

),( yxzfitting parameter accounting for chemical reactions, abrasive size distribution etc.

New model

pattern density effect

asperity radius

abrasive particle size

polishing speed

pad/film properties

pad asperity height distribution

∫==),( 4/7

2/3

2/3*4/12** )(),,(

),(),(

yxz

zpw

pa

pad

dAHDyxyxPDDH

VERRCyxMRR δδδε

Mean distance between asperities

hardness of material polished



Pattern density Line widthLine space

Chip Layout

HDP-CVD Deposition Model

CMP model

CMP Input Thickness

Evolution Nitride thinning

Modeling Overview



Removal Rate (RR)

Adding the electro-chemical effects

Slurry chemistry(pH, conc. of oxidizer, inhibitor & complexing agent)

Pad propertieslayers’ hardness, structureAbrasiveType, size & conc. Polishing conditions(pressure P, velocity V)

• Develop a transient tribo-electro-chemical model for material removal during copper CMP– Experimentally investigate different components of the model

• Using above model develop a framework for pattern dependency effects.

Polished material

Planarization, Uniformity, Defects

Incoming topography

CMPModel

1. Passivation Kinetics2. Mechanical Properties

of Passive Film3. Abrasive-copper Interaction

Frequency & Force



Application: Polishing induced stress

Pressure concentrated locally (about 300 psi)

Risk of cracking in the sub layers



FEM Analysis: Model

LOW-K LayerE = 5 – 20 GPa ; α = 0.25

TANTALUM LayerE = 185.7 GPa ; α = 0.34

COPPER LayerE = 129.8 GPa ; α = 0.34

LOADS:- Downward Constant Pressure – 2psi- Horizontal Shear (friction) stress – 0.7psi

BOUNDARY CONDITIONS:- Fixed at the bottom- Periodic Boundary Conditions (symmetry)



FEM Analysis in CMPVon Mises stresses

Low-k: E = 5GPa

Step1

Step2

Step3

Step3

Low-k: E = 20GPa



Modeling Challenges• Present methods treat CMP process as a black box; are blind to process &

consumable parameters• Need detailed process understanding

– For modeling pattern evolution accurately• Present methods do not predict small feature CMP well

– For process design (not based on just trail and error)• Multiscale analysis needed to capture different phenomena:

– At sufficient resolution & speed • CMP process less rigid than other processes: possibility of optimizing

consumable & process parameters based on chip design– MfD & DfM

• Source of pattern dependence is twofold: – Asperity contact area (not addressed yet)– Pad hard layer flexion due to soft layer compression (addressed by

previous models)



Source: Praesegus Inc.

Extensive test/measurements required

Specific to particular processing conditions

• captures only 1 source of pattern dependency• coarse (resolution ~10µm)

Present Approach (Praesegus/Cadence, Synopsys)

• Helps in dummy fill-- Design improvement but no process optimization

• Optimization should be across process & design: - Need to be able to tune all the available control knobs

Model:



Pattern Related DefectsLow pattern

densityHigh pattern

density

erosion & dishing

residue film

Initial topography

Non-uniform removal

Local planarization

End point

Over polishing

Nominal Pattern density = Area(high features) / (Total Area)

• ρ(x,y) calculated as a convolution of a weighted function (elliptic) over evaluation window.

• Evaluation window size (R) determined empirically.

),(),(

yxKyxMRR

ρ=

R

Time stepevolution

• MRR(x,y) = material removal rate at (x,y)• K = Blanket MRR• ρ(x,y) = effective pattern density at (x,y)

Present Approach



Need a “GoogleEarth” view of modeling

We are here



Head

Platen

Pad

dow

n-

forc

e

slurry supply

rotation of wafer

head

Wafer 4-12”

Copper

Feature

pad asperity

abrasive particles

100nm-10µm

~1µm

1-10µmPad asperity

Abrasive

Pad/Wafer

Die

Feature/Asperity

Abrasive Contact

CMP phenomena at different scales



Pattern Evolution Framework

),(),(

yxKyxMRR

ρ=

R

Time stepevolution Asperity contact area (µm)

Empirically fit, based onpad flexion (scale=mm)

Space Discretization: Data Structure

STI oxide evolution* 0.112µm/0.1681µm

before 40sec CMP

*Choi, Tripathi, Dornfeld & Hansen, “Chip Scale Prediction of Nitride Erosionin High Selectivity STI CMP,” Invited Paper, Proceedings of 11th CMP-MIC, 2006

• Consumables• Polishing Conditions

Material Removal Model

∫ +=τ

τρ 00 )( dttti

nFMRR Cu

Small feature prediction problems



Effects to Capture

• Multiscale Behavior– Material removal operates on different scales and contributes to the

net material removed in the CMP process– Material removal at any location is affected by its position in

different scales– Different models need to be used to capture behavior at different

scales

• Far-field Effects– Most IC manufacturing processes are only dependant on local

features– CMP performance depends on both local as well as far-field

features



CMP Model Tree• Tree based data structure will encapsulate both wafer features

and pattern evolution at various scales

Pad/Wafer (~m)

Die (~cm)

Asperity (~µm)

Feature (45nm-10µm)

Abrasive contact (10nm)



Data Structure• Efficient surface representation is

required– Mesh-based representations allow for fast

processing, and have been widely used

• Need to capture repeating features– Use tiles/modular units– For “similar” features, use property

inheritance from modular features

• Multiscale analysis– Use multiresolution meshes – allow for

querying in mm/um/nm scales– Also support querying of far-field features

along with local features

nm

mcm

mm

µm

Multiresolution meshes will allow for querying in different scales -resolution will be determined by feature scales; tiling will be used

for repeating features.



Data Structure

accu

racy

analysis time

Leve

l of D

etail

Tradeoffs between LOD, analysis time, and accuracy

Resolve intosmaller features

Resolve intolarger features

• Model precision vs. Level of Detail– Identify tradeoffs between speed

of analysis and the accuracy of the models used

• Data Structure design motivated by physical considerations– Tree levels ≡ phenomenon scale– object properties ≡ physical

phenomena.

• Inheritance:– Inherit properties from parents at

higher levels of tree and from generic object at that level Example of property inheritance from parent features

and base features applied in CMP process model

Asperity(feature)

CMP Process Model on

Asperity Scale

Pad(parent)

Properties inherited from pad

Specific asperity

properties

Generic Asperity

Properties inherited from generic feature



Multiscale Optimization Example

• Address WIDNU at different levels depending on available flexibility:– Change pad hardness (tree level 1)

• Inflexibility: scratch defects, pad supplier

– Dummy fill (chip, array level)• Inflexibility: design restrictions

– Change incoming topography (feature level)

• Inflexibility: deposition process limitation

– Change chemical reactions, abrasive concentration (abrasive level)

Within die non-uniformityNitride Thinning in STI



Thank you for your attention!

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