Class D Amplifier Design

3
16 C IN C OUT  V CC Technical View Class D Amplifer Design By: Hugo Letourneau, Manager, System Design Center, Future Electronics True audiophile electronic designers have always dreamed o designing the perect amplifer perectly reproducing the recorded soundstage. They may have started to dream about it when they learned in their frst electronic classes, that the class-A topology gives exceptional results in terms o linearity. There is sometimes a passionate student who will try to reinvent the wheel despite the warning o his teachers and commit himsel to design a 150W/channel Class A amplifer to impress the whole class with powerul and perect sound. And every time the design reaches the fnal stage, it is a renewed un to see that the amp is mostly a powerul heater or the cinema room, the casing o the amp being a big hot heat sink or the output stage transistors! This kind o passionate student will usually pur- sue another lowest power design, potentially using class B or AB, or i the student is patient enough to do research on the various topologies, class D. For the neophyte to amplier design: in class A systems the output stage transistors are working on 360 degrees o the signal where in class B, 180 degrees only. For class AB, the transistors will work on 180 to 270 degrees approximately, all depending on the quiescent current o the output stage. Class D ampliers are oten reerred to as being “digital” ampliers because the output stage is working with only xed high and low volt- age values, generating a square wave to eed the speakers through lters. The main advantage o Class D topology is its e ciency that can get in the high nineties o percents due to its digital nature. Figure 1 shows typical circuits or each output stage topology. Figure 1: Typical basic circuits or Class A, B or A/B and ull bridge Class D ampliers respectively Class D audio ampliers have been around since more than 25 years, but only gained popularit y over the past 10-1 5 years or so. They were mainly used in low requency application and high energy de- mands o subwooers due to their high eciency, but very rarely or medium or high requencies, due to the high distortion caused by a lack o perormance o the technology that was just not made or this kind o precision switching activity at that time. Many parameters have to be taken into consider- ation beore getting to a decently audible class D amplier. Each element o the signal chain must be adequately controlled, to achieve a good audio signal through the whole audible requency range. Figure 2 shows a simple typical signal chain block diagram or digital ampliers. Every single detail will have to be adjusted to reach a certain balance that satises the ear. Figure 2: Class D signal path block diagram Analog PWM Conversion Stage The PWM signal can be generated by an analog or a digital circuit, just like the audio source can be analog or digital. PWM is easily achieved in analog by comparing a triangular waveorm to the audio signal. PCM can be converted into PWM using a DSP processor. In any case, the jitter and stability o any oscillator used or the PWM is o primar y im- portance, as a ew pico seconds RMS o jitter will make the dream o getting 100dB+ o SNR out o reach. In digital PWM systems, quantization er ror is added on top due to the nite amount o PWM steps. Several digital noise shaping techniques have been developed over time, such as pulse density and delta sigma modulation, which theoretically allows the noise power to be pushed higher in requencies outside the requency band o interest where the lter will attenuate it better. I a comparator will be used, a totem pole output with high slew rate is preerred, such as the LMV7239 which has a 45ns propagation delay, 1.2ns rise/all times. The quality o the lay- out will be critical to avoid any ringing, and the power distribution and decoupling have to be taken care o meticulously to avoid urther jitter in the output waveorm. Excessive capacitance has also to be avoided along the output signal path leading to the MOSFET driver. Output MOSFET Stage and Driver While all the stages along the signal path are important, the 2 parts that are the most intimately tied to the signal output quality is the MOSFET  Audio in  Audio to PWM conversion Output stage driver Low pass filter Half/Full Bridge Speaker  V cc  V ee Rload cc Click here to buy these products LMV7239 Series 1.800.675.1619 • www.FutureElectronics.com

Transcript of Class D Amplifier Design

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CIN

COUT

VCC

Technical View

Class D Amplifer DesignBy: Hugo Letourneau, Manager, System Design Center, Future Electronics

True audiophile electronic designers have always

dreamed o designing the perect amplifer

perectly reproducing the recorded soundstage.

They may have started to dream about it when

they learned in their frst electronic classes,that the class-A topology gives exceptional

results in terms o linearity. There is sometimes

a passionate student who will try to reinvent

the wheel despite the warning o his teachers

and commit himsel to design a 150W/channel

Class A amplifer to impress the whole class with

powerul and perect sound. And every time the

design reaches the fnal stage, it is a renewed

un to see that the amp is mostly a powerul

heater or the cinema room, the casing o the

amp being a big hot heat sink or the output

stage transistors!

This kind o passionate student will usually pur-

sue another lowest power design, potentially using

class B or AB, or i the student is patient enough

to do research on the various topologies, class D.

For the neophyte to amplier design: in class A

systems the output stage transistors are working

on 360 degrees o the signal where in class B, 180

degrees only. For class AB, the transistors will

work on 180 to 270 degrees approximately, all

depending on the quiescent current o the output

stage. Class D ampliers are oten reerred to

as being “digital” ampliers because the output

stage is working with only xed high and low volt-

age values, generating a square wave to eed the

speakers through lters. The main advantage o

Class D topology is its eciency that can get in the

high nineties o percents due to its digital nature.

Figure 1 shows typical circuits or each output

stage topology.

Figure 1: Typical basic circuits or Class A, B or A/B and ull

bridge Class D ampliers respectively

Class D audio ampliers have been around since

more than 25 years, but only gained popularit y over

the past 10-15 years or so. They were mainly used

in low requency application and high energy de-

mands o subwooers due to their high eciency,but very rarely or medium or high requencies,

due to the high distortion caused by a lack o

perormance o the technology that was just not

made or this kind o precision switching activity

at that time.

Many parameters have to be taken into consider-

ation beore getting to a decently audible class D

amplier. Each element o the signal chain must

be adequately controlled, to achieve a good audio

signal through the whole audible requency range.

Figure 2 shows a simple typical signal chain block

diagram or digital ampliers. Every single detailwill have to be adjusted to reach a certain balance

that satises the ear.

Figure 2: Class D signal path block diagram

Analog PWM Conversion Stage

The PWM signal can be generated by an analog or

a digital circuit, just like the audio source can be

analog or digital. PWM is easily achieved in analog

by comparing a triangular waveorm to the audio

signal. PCM can be converted into PWM using a

DSP processor. In any case, the jitter and stability

o any oscillator used or the PWM is o primary im

portance, as a ew pico seconds RMS o jitter wi

make the dream o getting 100dB+ o SNR out o

reach. In digital PWM systems, quantization error i

added on top due to the nite amount o PWM stepsSeveral digital noise shaping techniques have been

developed over time, such as pulse density and

delta sigma modulation, which theoretically allow

the noise power to be pushed higher in requencie

outside the requency band o interest where th

lter will attenuate it better.

I a comparator will be used, a totem pol

output with high slew rate is preerred, such

as the LMV7239 which has a 45ns propagatio

delay, 1.2ns rise/all times. The quality o the lay

out will be critical to avoid any ringing, and the

power distribution and decoupling have to be takecare o meticulously to avoid urther jitter in the

output waveorm. Excessive capacitance has also

to be avoided along the output signal path leading

to the MOSFET driver.

Output MOSFET Stage and Driver

While all the stages along the signal path are

important, the 2 parts that are the most intimately

tied to the signal output quality is the MOSFET

Audio in Audio to

PWMconversion

Outputstagedriver

Low pass filter

Half/Full Bridge

Speake

Vcc

Vee

Rload

cc

Click here to buy these products

LMV7239 Series

1.800.675.1619 • www.FutureElectronics.com

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output and their driver. The quality o the sound

will greatly depend on the quality o the pulse train

and mostly each dierence rom an ideal PWM

signal will urther degrade its quality.

Figure 2: Simple signal-to-PWM conversion

For this stage many characteristics are important

and must be considered: drive current and MOSFET

input capacitance, dead time to avoid conduction

overlap, on resistance but also turn on/o time oMOSFET. All o these parameters might also im-

pact the power dissipation o the output MOSFETs.

The dead time is the delay between the turn o o

one MOSFET and the turn on o the other MOSFET,

time,duringwhichbothMOSFETs are off(or in

progress to the o state). I no dead time is insert-

ed, as a MOSFET is turning on, the other MOSFET

will most likely still be conducting and a current will

fow rom the positive supply rail to the negative

supply rail, directly through the two output stage

MOSFETs. This current is called the shoot-through

current and must be minimized by adding a proper

dead time. It is considered as being the main

cause or non-linearity in class D audio systems.

A small dead time in the order o a ew tens o

nanoseconds may degrade the THD to above a

percent. The MOSFET selection o and the sym-

metry o each push pull branch is a critical actor

to a decent amplier.

A proper MOSFET drive current must be selected

with respect to the MOSFET stage input capaci-

tance in order to generate sharp rising and all-

ing edges on the gate which will in return provide

sharp edges on the main output signal, also solic-

iting the main supply rails with a wideband pulse

train.

Power dissipation and choosing the right

MOSFET

A class D switching stage will ideally spend the

vast majority o its time either high or low in ull

conduction mode. The transistors being saturated,

the power dissipation is kept to a minimum. As

seen in Figure 1, the typical class D system uses

a push-pull switching stage, either in a hal or ull

bridge conguration, where the output signal is a

square wave, where the conduction time is split

between the upper rail MOSFET and the lower

rail MOSFET which could theoretically be N and

P channel but dual N channel is preerred or

increased symmetry and better dead times. When

turned on, the MOSFETs are ideally exhibiting low

voltage drops as a unction o their respective

RDS(ON)

and will only dissipate a minimum o power.

This advantage is enormous not only because it

could save power but especially or the enormous

size savings. By comparison, a 100W class A out-

put stage would generate an enormous 300W o

heat dissipation, requiring very bulky transistors

and heat sinks, class AB could go well by using

TO3 transistors with conveniently sized heat sinks,

while the class D amplier show a denite advan-

taged by perhaps getting away with an SOT223

or TO89 sized casing or its output transistors. A

good power amplier can thereore be packaged ina relatively small size. With the ever evolving tech-

nology, there is virtually no limit to the eciencies

and sizes reached with class D systems.

One common pitall is to take or granted the high

eciency since circuit designers will naturally tend

to select the lowest RDS(ON)

MOSFET and expect it

to run perectly cool. The reality can be quite

dierent.

Choosing the lowest RDS(ON)

comes with some

drawback, as the input parasitic capacitance

will be high. An increased input capacitance alsomeans it is much harder to drive, thus will limit the

switching requency, aecting the rise and all

times. One should try to limit the input capaci-

tance or a better control o the MOSFET. Gen-

erally, among MOSFETs with low RDS(ON)

, as the

input capacitance is decreasing the drain-source

breakdown voltage decreases as well. The op-

timal MOSFET would then be the one which has

approximately the right drain source breakdow

voltage(VDSS

, with an acceptable RDS(ON)

or accept

able power losses but also to minimize the inpu

capacitance in order to achieve a tight switching

while relaxing the output drive constraint on th

MOSFET driver.

A designer should not neglect the dissipation in

curred by switching losses which are caused by

the capacitances o the discrete device. The tota

power dissipated in each MOSFET can be ex

pressed as ollows:

PD=P

RESISTIVE+ P

SWITCHINGR

DSON* I2

LOAD+(C

RSS* V2

=FSW

*ILOAD

) / IGATE

For example or 100W output stage MOSFET

let’s assume we chose the FDP047N10, a grea

MOSFET rom Fairchild Semiconductor with an

RDS(ON)

o 3.9mΩ and a CRSS o 455pF, driven by

a 1A MOSFET driver stage and driving an 8Ω loa

with a swing voltage o 50V peak at 100kHz, wi

exhibit a power dissipation not exceeding:

Pd=0.0039*5A+(455x10-12*502*100x103*5A)/

1A=0.0195+0.568=0.588W

By selecting the FDP3651U rom Fairchild, with an

RDS(ON)

o 0.018Ω max and a CRSS o 89pF, the

power dissipation then becomes:

Pd=0.018*5A+(89x10-12*502*100x103*5A)/1A

=0.09+0.111=0.201W

We can conclude that the choice o a MOSFETshould not only be based on on-resistance but als

based on an optimization o an ensemble o char

acteristics.

A good complement to the FDPU3651U, the MOSFET

driver LM27222 rom National Semiconductor wit

its adaptive shoot-through protection which coul

potentially help to reduce the dead time down to an

interesting 10ns with an appropriate choice o MOS

FETs, allowing down to 30ns minimum pulse width.

Output Filter

Once the designer has gone through the out

put bridge design, the hard work is not over yet

Another critical stage requiring design eorts

the flter stage. This stage’s purpose consists o

eliminating the switching and reducing the band

width down to the useul part o it, mainly letting

Technical View

Click here to buy these produ

LM27222 Se

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Technical View

through the audible part o the signal up to 20kHz.

Some designers will rely on the speaker’s natural

ability to flter the high requency content, but the

resulting transer unction is then greatly speaker

dependent. A serious designer will most likely use a

passive flter or which the components will be care-

ully selected. Generally a 2 poles low pass trans-

er unction is desired, such as Butterworth, Bessel

or Gaussian. The ideal audio flter transer unction

will avoid non-linear phase shits and have a con-

stant group delay in the requency band o interest

while having sufcient attenuation at the switching

requency.

Since the flter will carry high current and high

dI/dt, the coil will be selected in order to mini-

mize the audible distortion caused by non-linear

eects when its core is getting closer to satura-tion, while having a sel resonant requency that is

higher than the switching requency and a ew o its

harmonics to avoid parasitic sel resonance and

maximize attenuation o the high switching activity.

PCB

One must take care in ensuring a proper layout as

parasitic inductance o the signal traces, especially

the ones carrying the output current, can generate

ringing, which is greatly unwanted. The switching na-ture o class D amplifers will produce high dI/dt that

will result in voltage drops in parasitic elements and

perhaps ringing as well. To help controlling this phe-

nomenon, snubber circuits can be added at the out-

put and the rise time can be adjusted to the requency

content to avoid exciting the resonating circuit. These

solutions are mostly considered as patches to over-

come the ringing problem and will most likely urther

degrade the audio signal and will never be as good

as proper layout that is minimizing signal path char-

acteristic impedance variations, controlling parasitic

elements and component selection taking this

potential problem into account.

Next, the power distribution, fltering and

decoupling are critical to maintain low noise stable

voltage rails at all time especially in a single ended

hal bridge confguration where all the variations

below the cuto requency will be passed along to

the speaker.

Many other parameters should be taken into

account but this article should nonetheles

provide a good base or a strong design

A good audio system design is the ruit

several months o work and to which the path

is ull o compromises and hurdles, but suc

ceeding is certainly among the most rewardin

experiences, involving your senses and emotions o

an unorgettable moment.

Technical View