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SamplingCircuits

UniversityofTexasatAustin

nansun@mail.utexas.edu

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IdealDiracsamplingisimpractical

Buildatrackandholdcircuit

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InfinitelyfastandaccuratetrackingofVin

Noerrorinthehold hase

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Trackingerror

Pedestalerror

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Switc resistance

Finiteacquisitiontime

Nonlinearresistance

Switchcapacitance

Samplingclockjitter Othernonidealities

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Case1:Inputisasamp e ata

signal,e.g.theoutputofa

switchedcapacitorcircuit

Case2:Inputisavarying

continuoustimesignal

Track Hold

t t

in Vin

0t

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Forsimplicity,letusignorethefiniterisetimeofVin

Considertheworstcase:Vout settlesfrom0toVFS

1storderMOSswitchmodel

)e(1V(t)Vt/

FSout

/2Ts

7

souterr

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Wewantt esett ingerror Verr 7.6

14 >10.4

2

18 >13.2

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Considerasinusoidalinputwithzerooffset

tAcos(t)Vin Delay

22

t/

out

tcosAAe(t)V

Initial

discontinuity

settling Steadystate

Amplitude

attenuationRCfilterresponse

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T eerroratt=Ts 2consistso twoparts:

Errorduetotheexponentialdecayoftheinitialdiscontinuity

,

Errorinthesteadystateterm

ResultofRCLPF

Magnitudeattenuationandphaseshift ItdependsonRC(filterresponse)andtheinputfrequency

Willthiserrorcausedistortion?

Howlargeistheamplitudeattenuation?

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Letuscalculatethepercentamplitudeerror2

s

in

2

in

2err

fN

2

1

f

11

1

11A

Amplitudeerrorincreaseswithfin,butdecreaseswithN.

sfN

B N Aerr (f=fs/10) Aerr (fin =fs/2)

. .

10 7.6 0.08% 2%

. .

18 13.2 0.03% 0.7%

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Forsampleddatainput,wecanachieveaccuratetrackinggivena

sufficientamountoftime.

Forcontinuous

input,

we

need

to

consider

the

errors

due

to

both

the

.

Inapplicationswhereattenuationisintolerable,wemayneedto

furtherreducetheRCtimeconstant.

Inapplicationswhereattenuationistolerable,theRCtimeconstantisusuallysetbythedistortionspecs.

,

voltagedropacrossthenonlinearMOSFET undesired

harmonics. Whataboutthephasedelay?

Thesampledinputisalwaysadelayed()version.

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Transistort erma noise ominates

1/fnoisecanbeignored(why?)

22

1

14

sRCkTR

vout

kTdfkTRnvout

2 14][

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Equipartitiontheoreminstatisticalphysicsstatesthatinthermal

equ r umeac egreeo ree om o sonaveraget erma energy

ofkT/2.

Inanelectroniccircuit,eachindependentcapacitorholdsanelectric

energyofkT/2andeachindependentinductorholdsamagnetic

energyofkT/2.

.

Usethistheoremcautiously!

kTvC out 2

2

1

2

1

Cvout 2

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AssumingthatwemakethekT/Cnoiseequaltothequantization

no seo a t

212

22

B

kTCkT

Forexample:

FS

B C [pF]8 0.003

.

12 0.834

14 13.3

16 21318 3,416

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LTC2242

12bitADC

Why2pF?

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on

DSDS

thGSoxD VVVCI

2

11

0VDS

DON WV

IR

tGSox

L1

R )( thINox VV

LC

RON isdependentonVin

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[Razavi,Data ConversionSystemDesign,p.16]

Vout tracksVin wellforsmallVin

LargeVin largeRon distortion

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2K2

DSDSthGSD

2out KdV

WecansolvetheaboveequationuseVolterraSeriesanalysis

2outinoutinthoutD

dt

Generalmethodthatallowsustocalculatethefrequencydomainresponseofnonlinearcircuitswithmemory

ee u, ,

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)V(V

A

4

1

lfundamentatheofAmplitude

armon ct rt eoAmp tu eHD

2

thGS

3

VGS isthevalueofthegatesourcevoltage whenACinputiszero.

Forlowdistortion

MakeamplitudeAsmallerthan(VGS

Vth

)

Lowswing SNRdecreases

Lowfrequency speeddecreases

Make

smaller

Bigswitch parasiticcapsincreasesanddrivingpowergoesup

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VDD =VCLK =1.8V

Vin iscenteredatVDD/2=0.9V VGSVth =1.8V 0.9V 0.45V=0.45V

A=0.4V

= . s =

fin =fs/2

dB3020

1

)45.0(

4.0

4 23

HD

Thenonlinearityishuge!Howcanwereduceit?

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AddingaPMOScanreducetheresistancevariation

As VINincreases,NMOSresistancegoesup,butPMOSresistance

goesdown

11)()( thpGSp

p

oxpthnGSn

n

oxn VVL

WCVV

L

WC

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1

VWCVWCWCVVWC

R

1

ppnn LLL

WW

)( thpthnDDnoxn VVVLC np

n

n

LL

if

R isindependentfromVin;however,thismodelisoversimplified.

Missingfactors

Shortchanneleffects

Backgateeffect

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80

100

NMOS

PMOS

40

60

R[

]

0 0.5 1 1.50

20

Vin

[V]FromB.Murmann,EE315,Ch.5

T erearesti argeresistancevariations.T e ene itis imite .

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Holdphase Trackphase

+ +DD

DD

Vin

GS= DD=cons .Cboot Cboot

Holdphase

A.Abo,"DesignforReliabilityofLowvoltage, SwitchedcapacitorCircuits," PhDThesis,UCBerkeley,1999.

Samplingswitchisoff

Cboot isprechargedtoVDD

SamplingswitchisonwithVGS=VDD=const

Thus,Ron issignalindependent

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A.Abo,"DesignforReliabilityofLowvoltage, SwitchedcapacitorCircuits," PhDThesis,UCBerkeley,1999.

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oxideswitch

oxideswitch

ayexcee

VDD

VGS orVGD mayexceedVDD,causingtransistorbreakdown. Thickoxidedevicescanbeusedtoensurereliability,leadingto

increasedcost,largerparasiticcapacitance,andlargerresistance.

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Siragusa andGalton,Adigitallyenhanced1.8V15bit40Msample/sCMOS

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p pe ne ADC, JSSC,Dec.2004.

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DessoukyandKaiser,"Inputswitchconfigurationsuitableforrailtorailoperationofswitched

o am circuits "ElectronicsLetters Jan.1999.

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A.Aboetal.,A1.5V,10bit,14.3MS/sCMOSPipelineAnalogto

DigitalConverter,IEEEJ.SolidStateCircuits,pp.599,May1999

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Parasiticcapacitanceatt egateo t esamp ingswitc

Capacitivedivider VGS notaconstant

However,limitedbytheintrinsicparasiticcapassociatedwiththe

bootstrapcap

Backgateeffect

Canbealleviatedbyusingtriplewellprocess

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PerformanceofBootstrappedSamplers

Bootstrappedsamplingtendstoworkverywellupto60dBlinearity

Nowthelinearitybottleneckisrelatedtotheswitchcapacitance.

Example

Louwsma JSSC4 2008

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Switc resistance

Switchcapacitance

Channelchargeinjection

Samplingclockjitter

Othernonidealities

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ChargeInjection&ClockFeedthrough

Track Hold

ColClock

feedthrou hTf

Vin VoutVin

-

tVout ideal

injectionC

Analyzetwoextremecasesactual

Pedestalerror

SlowgatingwithalargeTf

FastgatingwithasmallTf

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Allchannelchargeshave

off .

absorbedbytheinputsource,

andthus,donotintroduceerror.

Pedestalerrorisonlyduetoclock

feedthrough.

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o

Vin+Vth0 ol VVC

VVVV Col

Clockfeedthrough switchopen

osin

ol

V)(1V

CC

Vout

C CC

C

ol

ol

th

ol

olOS V

CC

CV

GainError OffsetError

Example:C=1pF,Col=2fF,andVth=0.45V

Doesthiscausenonlinearity?

. OS

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ChannelchargeQch hastoflowtotheinputandtheoutputnodes

Underfastgating,weassumea50/50split

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o

Vin Vout

ColClock

feedthroughTf osinch

DD

ol

olinout V)(1V

2CV

CCVV

e-Chargeinjection

C )VVWL(VCQwhere thinDDoxch

C

WLC

2

1 ox )V(V

CWLC

21V

CCCV thDD

oxDD

ol

olOS

Example:C=1pF,VDD=1.8V,Vth=0.45V,W=20m,LCox=2fF/m,andCol=2fF

Doesthiscausenonlinearit ?

2% 31mVVOS

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LargerC2

SmallerC2

2

f

on

T

R C[G.Wegmannetal.,IEEEJSSC,1987]

Inpractice,RonC2 andTf areusuallycomparable

Chargesplitdependsontheimpedancesonbothsides

39

orec argew go o es ew ower mpe ance

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Inpractice,t esituationisin etweens owgatingan astgating.

Slowgatingshowslessgainandoffseterror

Morelater

Arethegainerrorandtheoffseterrorreallyconstant?

No,ourfirstordermodelisnotaccurateenough.

Wehaveignoredbackgateeffectandshortchanneleffect

npract ce,a out or o w atweca cu ate arenon near

errors

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C

Q

2

1V ch

2L1R 2C

LRV

2

chthGSox

L

ForthesameR(speed),channelchargeinducederrorVdecreasesastechnologyadvances

Sma erLan arger ForthesameV,Rissmaller,leadingtofasterspeed.

,

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ov1ch11 QQ2

Q

ov2ch22

1212 LL/2,WW

Perfectcancellationrelieson

,

Exact y50%c anne c argesp itting

Limitedimprovement

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OSin1out1 V)V(1V

OSin2out2 V)V(1V

inout V1V

Offsetwillbecancelled,butthegainerrorremainsthesame.

Differentialcircuitonlycancelsoutthecommonmode.

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)VV(VCLWQ thninDDoxnnchn

)V(VCLWQ thpinoxppchp

2CQQV chpchn0

Un ortunate y,t esigna epen entparts onotcance , uta !

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Keyidea:sampleVin atthe"grounded"sideofthecapacitorto

achievesignalindependentsampling

Thistechniqueallowsustoachievehighlinearityincombinationwith

bootstra techni ue

Originalpapers:

D.J.AllstotandW.C.Black,TechnologicalDesignConsiderations

forMonolithicMOSSwitchedCapacitorFilteringSystems,Proc.

IEEE,pp.967986,Aug.1983.

K.L.LeeandR.G.Me er LowDistortionSwitchedCa acitor

FilterDesignTechniques,IEEEJ.SolidStateCircuits,pp.1103

1113,Dec.1985.

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TurnM2 o s ig t y e oreM1

Typically100ps difference

2 ,

thDDox2 VVWLCQ

To1storder,thechargeinjectedby

M2 issignalindependent

1

VoltageacrossC(50%split)

CVV inC

2

2

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T ec anne c argeo M1 issigna

dependent:

However,whenM1 isoff,it

)(1 thinox VVWLCQ

cannotinjectc argetoC ecause

itsbottomsideisopen.

Waitaminute,thismodelistoo

ideal

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T ereareparasiticcaps.

M1willinjectsignaldependent

char eontotheseriescombinationofCandthe

parasiticcapacitanceatits

par

Thisseemsthattheimprovementwillbequitelimited,asVout will

not ea ecte .

Nevertheless,ifweconsiderthe

sampledchargeinsteadofthevoltage

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EventhoughM1 injects

chargetoC,thetotalchargeatnodeXcannotchange!

Letusprocesstotalcharge at

voltageacross

C.

Q CV Q

Thechargecanbeprocessedin

Openloop

Closedloop

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During1,Vin issampledatX.Qx islinearityproportionaltoVin.

Duetochargeconservation,Qx

3

xparinx VCCQCVQ )(2/2

parin

parxout CCVCCVV

2

Signalflow:Vin Qx Vx

Remainingdrawback

par cap.Itisnonlinearandwill

introducedistortion.

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MeansthatchargeatnodeXmustredistributeontofeedback

capacitorCF

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argea no e ur ng 1:

ChargeatnodeXduring2:

21 inx

outFVCQ 2

ChargeConservation: xx QQ 21

F

in

F

outC

QVC

CV 2

2

CF canbemadehighlylinear(morelater)

Gaincanalsobeprovided.

Offsettermcanbeeasilyremovedbyusingadifferentialarchitecture.

Linearitymaybelimitedbyopampnonidealities(offset,insufficient

,

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[A.Abo,"DesignforReliabilityofLowvoltage, SwitchedcapacitorCircuits,"PhDThesis,UCBerkeley,1999]

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During1 During2

CV

QCVQ inpm

1

(2))(

(1))(

12

12

omxF

mopxmFxmm

QVVCCVQ

QVVCCVQ

xpxm VV

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Subtracting1)and2),weobtain:

in

F

inminp

F

omopout VC

CVV

C

CVVV )(

ng an ,weo a n:

omopfxmxpFinminp VVCVVCCQVVC )())((2)(

cmoFcmxFcmi VCVCCQCV )(

FCQC

cmo

FF

cmi

F

cmxCCCCCC

Opampmusthavewideinputcommonmoderange

OpampmusthavegoodCMRR

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Shortingswitchallowstoredistributeonlydifferentialcharge

CommonmodeatopampinputbecomesindependentofVcmi

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Fxmfloatxpfloatimip CVVCVVCVV )()()(

xcfloatic

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Commonmodechargeconservationattheopampinputnode:

FcmxcmocmxfloatFcmocmi CVVCVVCVCV )()(

cmx

Fcmxcmxcmxcmicmi

V

0

Thus,opampinputcommonmodeVcmx isindependentof

InputcommonmodeVcmi

u pu commonmo e cmo

Usuallysetbycommonmodefeedbackcircuit

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Thesamecapusedforbothsamplingandopampfeedback

Largerfeedbackfactor(lowernoise,higherspeed)

OTAissubjectedtoinputcommonmodevariations

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M1 ismoreeffectiveinsamplingthedifferentialcommonmode

IdeallyturnoffM2 andM3 beforeM1

Usuallyturnoffsimultaneouslyforsimplicity

61

M4 an M5 s ou e argert anM1 ast eirresistancesaresigna epen ent

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y

M1 isusuallyimplementedusingantiparalleldevicestoensure

. , , .

symmetry

Drainandsourcearenotnecessarilysymmetricincircuitmodels

Drainandsourcearenots mmetricdueto rocessartifacts

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nonlinearityproblems.Wecanachieve80~100dBlinearityuptoafew

hundredsofMHz.

m a o no c oc oo s rapp ng: top,SW var esw in ue o ac ga e

effectsandparasiticcapacitances (especiallyathighfrequency)

Inthetrackphase,itcausesnonlinearfilterresponse

Bottomplatesamplingdoesnothelp.

Intheholdphase,itcausesinputdependentchargeinjection because

ec argesp ng epen son e mpe ance

WecanmitigatethisissuebyreducingRtop,SW

Limitation of bottom

late sam lin

Openloopchargetransfer:nonlinearparasiticcap

Closeloopchargetransfer:opampnonlinearity

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MetalInsulatorMetal(MIM) MetalOxideMetal(MOM)

BothMIMandMOMcapacitorshavegoodelectricalproperties

[Ng,Trans.ElectronDev.,7/2005] [Aparicio,JSSC3/2002]

Seriesandparallelresistancesareusuallynotaconcern

Mostlyworryaboutparasiticcaps

. Thedensityincreasesasprocessscales.

MIMcapdensityisusually12fF/m2

For1fF/m2,a10pFcapacitoroccupies100mx100m64EE382V

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Thetwoplatesofarealcapacitorareusuallyunsymmetrical

parasiticcapacitance.

ForaMIMcapacitor,theplatethatisawayfromthesubstratehas

sma erparas ccapac ance yp ca va ue:= , = . ForaMOMcapacitor,andcanvary.

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Themoreidealplateshouldfacethevirtualgroundnodes

Avoidreductionoffeedbackfactor

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Switc resistance

Switchcapacitance

Othernonidealities

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C oc jitterintro ucessamp ingerrors.

ItsmagnitudeisproportionaltothevariationofVin.

tdt

dV

Vin

in

Letusconsiderasinewaveinputsignalandassumet followsnormaldistributionwithzeromeanandstandarddeviationt

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2 2dV dV

in

2

dt dt

2 2in t in tE A cos 2 f t 2 A f dt 2

2

aperture2

in t

1A

12SNR [dB] 10 log 20 log1 2 f

n2

aboveresultimprovesby4.8dB

Seee.g.[DaDalt,TCAS1,9/2002]

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2

2

2

2

2 inin dVdV

2

indtdt

)2(2

inn Af

dtE

in

jitterf

A

SNR2

1log201

2log1022

2

NotethatthisjitterlimitedSNRdoesnotdependonsignalamplitude!

in2

Thejitterinducederrorincreasesassignalamplitudeincreases.

Intesting,ifSNRremainsconstantforvarioussignalamplitudes,itishi hl ossiblethattheSNRislimitedb clock itter.

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FromB.Murmann,EE315,Ch.5

1.E+10

. +ISSCC 2010

VLSI 2010

ISSCC 1997-2009

1.E+08

1.E+09

z]

-

Jitter=1psrms

Jitter=0.1psrms

1.E+06

1.E+07

BW

[

1.E+04

1.E+05

1.E+03

10 20 30 40 50 60 70 80 90 100 110 120

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Switc resistance

Switchcapacitance

Othernonidealities

Signaldependentsamplinginstants

Holdmodefeedthrough

Holdmodeleakage

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[Razavi,Data ConversionSystemDesign,p.17]

Tf

MustmakeTf muchsmallerthanmaximumdVin/dt

Thismeansthatweareinthefastgatingscenario.

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Distortionanalysisresult(seeYu,TCASII,2/1999]2

38

3

F

CLK

TV

AHD

Example#1:VCLK=1.8V,A=0.5V,Tf=100ps,=2100MHz2

dB7912100e100e62

8.1

.

8

3

-HD

CLK . , . , f ,

dB3912100e1e925.03

2

3

-HD

ShortTf isamustforsamplinghighfrequencysignal

.

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[Razavi,Data ConversionSystemDesign,p.17]

CDS

Toattenuateholdmodefeedthrou h

ReduceRout

Useaswitcharray(pathresistanceincreases)

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A.Annema,etal.,AnalogcircuitsinultradeepsubmicronCMOS,IEEEJ.SolidStateCircuits, pp.132143,Jan.2005.

fgate indicateshowfastchargeleaks

Gateleakagedependsondielectricthicknessandgatevoltage

TheuseofhighKdielectric(Hf)reducesgateleakage

Gateleakageismoretroublesomeforlowspeedoperation!

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