Characterization and modeling of the supply network from an integrated circuit up to 12 GHz
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Characterization and modeling of the supply network from an integrated circuit up to 12 GHz
C. Labussière(1), G. Bouisse(1), J. W. Tao(2), E. Sicard(3), C. Lochot(1)
(1) Freescale Semiconductors, Toulouse, France
(2) N7, Toulouse, France
(3) INSA Toulouse, France
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Summary
• Context
• Objectives
• This work
• Measurement approach
• Experiments
• Model validation
• Conclusion
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1. Context
• Equipment designers want to ensure EMC before fabrication
Courtesy C. Marot Siemens Automotive Toulouse
Main source : micro-controller
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1. Context
16-bit micro-controller radiation in TEM cell, various programsdBµV
1 MHz 10 MHz 100 MHz 1 GHz
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1. Context• New concerns from 1 to 10 GHz
0
20
40
60
80
100
10MHz 100MHz 1GHz
Parasitic Emission (dBµV)
10GHz 100 GHz
HC12 16 bit
PowerPC 32 bits
New bands of interest
Frequency
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1. Context• Pressure on IC vendors to provide parasitic
emission models up to 5 GHz
• Existing standards to modelize IC core, internal supply network, I/O interface and package
• Models mostly valid up to 1 GHz
IbisICEM
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2. This work• Strategy to validate emission models for
micro-controllers
Simulations
Core Model
Package Model
Probe Model
Test board Model
Analog Time Domain Simulation
Fourier Transform
Compare dBµV vs. frequency
Measurements
Fourier Transform
Time-domain measure
Frequency measurements
This work
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2. This work
• Characterize the Passive Distribution Network (PDN) of a 16-bit µc Freescale (S12X family, QFP 144 pins)
• Build a specific board for high-precision measurements
• Investigate the impedance behavior up to 12 GHz
• Build a model based on R,L,C elements
• Promote this approach as part of the eXtended-ICEM model initiative
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3. Measurement approach
Vector Network Analyzer
Supply1 supply2S
ground
Dut
Base on [s] parameter characterization (s11, s12)
RLC values tuned to fit with measurements
Requi/2Lequi/2Requi/2Lequi/2
Cequi
ground
Supply1 Supply2
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[s] parameters of the DUT alone can be found by de-embedding using Thru-Reflect-Line (TRL method)
measurement plane (short-open –load
calibration)
measurement plane DUT
planeDUT plane
to network analyzer port 1
to network analyzer port 2
a1
b1
a2
b2
a’1
b’1
a’2
b’2
DUT transition line
Non-coaxial Measurements Issue
3. Measurement approach
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1. Measurement of 3 calibration features with known [S] matrix
[S]lineA
meas. plane
DUT plane
meas. plane
DUT plane
[S]DUT [S]lineB
Thru
Reflect
Line
[S]lineA [ ] [S]lineB0 11 0
[S]lineA [ ] [S]lineB±1 0 0 ±1
[S]lineA [ ] [S]lineB0 e-γl
e-γl 0
3. Measurement approachMethod (1/3)
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1. Measurement of 3 calibration features with known [S] matrix
2. Characterization of the transition lines [S] matrices
[S]lineA
meas. plane
DUT plane
meas. plane
DUT plane
[S]DUT [S]lineB
[S]lineA [S]lineB
3. Measurement approachMethod (2/3)
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1. Measurement of 3 calibration features with known [S] matrix
2. Characterization of the transition lines [S] matrices
3. Determination of the DUT [S] matrix by automatic de-embedding
[S]DUT
[S]lineA
meas. plane
DUT plane
meas. plane
DUT plane
[S]DUT [S]lineB[S]-1lineA [S]-1
lineB
3. Measurement approachMethod (3/3)
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Lines type 2
Lines type 1
S12X SMA connectors
“Reflect” type 2
“Reflect” type 1
“Thru” type 2
“Thru” type 1
High-frequency “Delay” type 1 High-frequency
“Delay” type 2
Test boards
Access+DUT Calibration boards
4. Experiments
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SS2
VDD1
VDD2
VSS1
VSSPLL VDDPLL
VDDR1
VDDR2
VSSR2
VDDR1
VSSX2
VDDX2
VDDX1 VSSX1
VSSA
VDDA
S12X 144 LQFP
8 pairs of VDD/VSS power and ground pins
Nearly 120 possible measurements
Select the key measurements to build the passive distribution
network model
4. Experiments
Test specification (1/2)
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4. Experiments
Test specification (2/2)
Port 1 Port 2
VDD1 VSS1
VDDA VSSA
VDDX2 VSSX2
VDDR1 VSSR1
.. ..
VDD1 VDDR1
.. ..
VSS1 VSSR1
Logic core decoupling
IO supply
Substrate coupling
Analog supply
Other IO supply
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4. ExperimentsMeasurement (1/2)
0.05 Ω0.05 ΩVSSX1 VSSX2
VDDX2VDDX10.05 Ω 0.05 Ω
0.05 Ω0.05 ΩVSSR1 VSSR2
VDDR2VDDR10.1 Ω 0.1 Ω
0.55 Ω0.75 ΩVSS1 VSS2
VDD2VDD11 Ω 0.9 Ω
0.05 Ω VSSA
VDDA0.05 Ω
12 ΩVSSPLL
VDDPLL
25.9 Ω
0.2 Ω0.15 Ω
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4. ExperimentsMeasurement (2/2) VSS1-VSS2 [s12] up to 12 GHz
Substrate coupling
(RDC=1.8 ohm)
Low impedance 1.8 GHz
High impedance 900 MHz
5 GHz
Inductive
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5. Model Validation
Manual fitting of magnitude and phase by iteration
Simulation
Measure
Simulation
Measure
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5. Model Validation
Partial model of the passive supply network including the inductive path and resistive coupling
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5. Model ValidationVSS1-VSS2 [s12] up to 12 GHz
Possible susceptibility
issues
5 GHz1 GHz
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Complete S12X supply network construction from 2-port [s] models
Td1 Td2
Ts1 Ts2
Tc
VDD1 VDD2
VSS1 VSS2
[SVDD1-VDD2] [TVDD1-VDD2] = [Td1]*[Td2]
[SVSS1-VSS2] [TVSS1-VSS2] = [Ts1]*[Ts2]
[SVDD1-VSS1] [TVDD1-VSS1] = [Td1]*[Tc]*[Ts1]
[SVDD2-VSS2] [TVDD2-VSS2] = [Td2]*[Tc]*[Ts2]
[SVDD1-VSS2] [TVDD1-VSS2] = [Td1]*[Tc]*[Ts2]
[Td1], [Td2], [Tc], [Ts1], [Ts2]
[Sd1], [Sd2], [Sc], [Ss1], [Ss2]
spice-compatible behavioral model
5. Model Validation
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• A technique for integrate circuit supply network characterization has been presented
• A specific board is required to characterize the impedance up to 12 GHz
• The technique is adaptable to BGA packages
• An impedance model has been derived, valid up to 12 GHz
• Resonance effects (0.9, 5 GHz) may generate susceptibility issues
Conclusion