Chapter4: Combinational Logic Part 4 Originally By Reham S. Al-Majed Imam Muhammad Bin Saud...

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Chapter4: Combinational Logic Part 4 Originally By Reham S. Al-Majed Imam Muhammad Bin Saud University

description

Definition 3  It is a cc that select binary information from one of many input lines to single output line.  The selection of input line depends on selection lines.  Its ab consists of:  Inputs lines = 2 n  Output line = 1  Selectors (depends on number of inputs) = n  An active high or active low enable input (not all multiplexers have it) I 2 n -1 I0I0 MUX S0S0 S n-1 2 n Inputs lines n selection lines

Transcript of Chapter4: Combinational Logic Part 4 Originally By Reham S. Al-Majed Imam Muhammad Bin Saud...

Page 1: Chapter4: Combinational Logic Part 4 Originally By Reham S. Al-Majed Imam Muhammad Bin Saud University.

Chapter4: Combinational LogicPart 4

Originally By Reham S. Al-Majed

Imam Muhammad Bin Saud University

Page 2: Chapter4: Combinational Logic Part 4 Originally By Reham S. Al-Majed Imam Muhammad Bin Saud University.

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Outline

Multiplexer Definition Examples MUX and Decoder. MUX Expansion. Circuit Implementation with MUX

DeMultiplexer

Page 3: Chapter4: Combinational Logic Part 4 Originally By Reham S. Al-Majed Imam Muhammad Bin Saud University.

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Definition It is a cc that select binary information from one of many input

lines to single output line.

The selection of input line depends on selection lines.

Its ab consists of: Inputs lines = 2n

Output line = 1 Selectors (depends on number of inputs) = n An active high or active low enable input (not all multiplexers have it)

I2n

-1

I0

MUX.

.

.

.

.

.

.

.

S0

Sn-1

2n Inputs lines

n selection lines

Page 4: Chapter4: Combinational Logic Part 4 Originally By Reham S. Al-Majed Imam Muhammad Bin Saud University.

Definition

4

I0

I1

I2

I3

00

MUX Y=I0

I0

I1

I2

I3

10

MUX Y=I1

I0

I1

I2

I3

01

MUX Y= I2

I0

I1

I2

I3

11

MUX Y=I3

Page 5: Chapter4: Combinational Logic Part 4 Originally By Reham S. Al-Majed Imam Muhammad Bin Saud University.

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Example 1 Design a 2-to-1 multiplexer:

1. 2 data inputs (I0,I1), 1 select input S , and 1 output (Y)

2. Truth table:

S I1 I0 Y

0 0 0 I0=0

0 0 1 I0=1

0 1 0 I0=0

0 1 1 I0=1

1 0 0 I1=0

1 0 1 I1=0

1 1 0 I1=1

1 1 1 I1=1

S Y0 I0

1 I1

Page 6: Chapter4: Combinational Logic Part 4 Originally By Reham S. Al-Majed Imam Muhammad Bin Saud University.

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Example 1 (cont.)3. Simplification:

Y = S’ I0 + S I1

4. Diagram:

1 1

1 1S

I0

I1

Page 7: Chapter4: Combinational Logic Part 4 Originally By Reham S. Al-Majed Imam Muhammad Bin Saud University.

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Example 2 Design 4-to1 MUX:

There are four data inputs two selection inputs S1,S0. The input selected to be passed to the output depends on the minterm of

the input.

Y = S1’S0’I0 + S1’S0 I1 + S1 S0’I2 + S1 S0 I3

minterm S1 S0 Y

m0 0 0 I0

m1 0 1 I1

m2 1 0 I2

m3 1 1 I3

m1 m2 m3m0

Page 8: Chapter4: Combinational Logic Part 4 Originally By Reham S. Al-Majed Imam Muhammad Bin Saud University.

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Multiplexer and Decoder The AND gates and inverters in the MUX resemble a decoder

circuit. They decode selection input lines.

2n-to-1 line multiplexer is constructed from n-to-2n decoder.

Example: 4-to-1 MUX constructed from 2-to-4 decoder

Page 9: Chapter4: Combinational Logic Part 4 Originally By Reham S. Al-Majed Imam Muhammad Bin Saud University.

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Multiplexer Expansion Design a 4-to-1 MUX with 2-to-1 MUXes only.

4-to-1 has 4 data input, 2 selection input, and 1 output. 2-to-1 has 2 data input, 1 selection input, and 1 output.

S1 S0 Y

0 0 D0

0 1 D1

1 0 D2

1 1 D3

D0

D1

MUX

MUXD2

D3

MUX

Y

S0S1

I0

I1

I0

I1

I0

I1

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CC Implementation with MUX

Given a function of n-variables MUXex can be used to implement this

function.

This can be accomplished in one of 2 ways: Using a Mux with n-select inputs

n variables need to be connected to n select inputs. Minterms of a function are generated according to select inputs. Individual minterm can be selected by the data inputs proper assignment of the data inputs

(D i {0 , 1}).∈ Using a Mux with n-1 select inputs (more efficient)

Find truth table. The first n-1 variables in table are connected to selection inputs of MUX (which order ?). For each combination of selection variables, evaluate output as function of the remaining

variable (d) This remaining variable (d) is then used for data inputs which can be 0,1,d,d’.

Page 11: Chapter4: Combinational Logic Part 4 Originally By Reham S. Al-Majed Imam Muhammad Bin Saud University.

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Example 1 Implement the function F(x,y,z) = ∑(1,2,6,7) using a Mux with

n-select inputs. The function has 3 variables using 3-select inputs, we need a 8-to-1 MUX.

8-to-1MUX

x yz

F

1

0

1

11

0

0

0

1

0

23

4

5

67

Page 12: Chapter4: Combinational Logic Part 4 Originally By Reham S. Al-Majed Imam Muhammad Bin Saud University.

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Example 2 Implement the function F(x,y,z) = ∑(1,2,6,7) using a Mux

with n-1 -select inputs. The function has 3 variables using 2-select inputs, we need a 4-to-1

MUX.

4-to-1MUX

x y

F

z

z’

0

1

0

1

3

2

Page 13: Chapter4: Combinational Logic Part 4 Originally By Reham S. Al-Majed Imam Muhammad Bin Saud University.

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De-Multiplexer It is a CC that performs the inverse operation of MUX.

It has: 1 input 2n outputs. n selection inputs to select outputs.

Example: design 1-to-4 DeMUX

1-to-4DeMUX

A1

E

A0

D0

D1

D2

D3

A1 A0 D0 D1 D2 D3

0 0 E 0 0 0

0 1 0 E 0 0

1 0 0 0 E 0

1 1 0 0 0 E

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Reading 4.1

4.2

4.3

4.4

4.5 EXCEPT: Carry propagation.

4.6 Reading Assignment.

4.7 Reading Assignment.

4.9

4.10

4.11