CHAPTER 6 Instruction Set Architecture 12/7/2015 1.

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CHAPTER 6 Instruction Set Architecture 06/20/22 1

Transcript of CHAPTER 6 Instruction Set Architecture 12/7/2015 1.

Page 1: CHAPTER 6 Instruction Set Architecture 12/7/2015 1.

CHAPTER 6

Instruction Set Architecture

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Topics for Discussion

Instruction set architecture Stored program computer Interface between software and hardware Instructions Design principles Instructions, registers, and memory Simple instructions types and formats

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Where do you go from here (CSE241): Computer Organization

Is the study of major components of a modern digital computer, their organization and assembly, and the architecture and inner workings of these components.

It also deals with design principles for a good performance.

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Mother Board

Contains packages of integrated circuit chips (IC chips) including a processor, cache (several), memory (DRAM), connections for IO devices (networks, disks)

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Central Processing Unit (CPU)

Example: Intel 80386 80486PentiumMain components of a CPU are datapath and

control unitDatapath is the component of the processor that

performs (arithmetic) operationsControl is the component of the processor that

commands the datapath, memory , IO device according to instruction of the program

Cache provides but fast memory that acts as a buffer for slower /larger memory outside the chip.

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Instruction set Architecture

An important abstraction between hardware and software.

Lets discuss this concept.Computer operation is historically called an

instruction.Instructions stored similar to data in a

memory give rise to an important foundational concept called the stored program computer.

Lets look at MIPS: Microprocessor without Interlocked Pipelined Stages

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C to MIPS instruction

Design principle 1: simplicity favors regularityIn the above example: all instructions have 3 operands

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Register set

Where do the data get stored in the CPU?Named locations called registers? How

many? Typical small compared to memory sizes.

Registers: MIPS-32 has 32 register Denoted by s0, s1, etc. $s0, $s5Temporary registers are denoted by $t0, $t1

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C to MIPS instruction (Take 2 with registers)

Design principle 2: Smaller is fasterMemory available as registers is 32 in number

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Memory Operations

Data and instructions are stored in memory outside the CPU.

Data is loaded from memory and stored in memory.

Load word (lw)Store word (sw)32 resgiters230 words or 232 addressable locations or

bytes

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C language to Memory instructions

Base register concept: base register is $s3 and Offset of 32 for 8 words and offset of 48 for 12 words

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Instruction Types

add and sublw and swNow lets see how we can deal with a constant value

data.Consider C language statement: x = x +4Too complex:lw $t0, AddrConst($s1)add $s3,$s3,$t0Instead how about: addi $s3,$s3,4

Design principle 3: Make the common case fast. Example “addi” instead of add an constant from memory.

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Instruction format –R type

Can we use the same format for addi and add? Then we will Have only 11 bit constant

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Instruction format – I type

Design principle 4: good design demands good compromise;Keep instruction length same needing different formats ; I and R type areexamples

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Logical operations

Shift left Example: sll $t2,$so,4 Reg t2 = $so << 4

Shift right Example: srl $t2,$so,4 Reg t2 = $so >> 4

Bit-wise AND Example: and $t0,$t1, $t2 Reg t0 = reg t1 & reg t2

Bit-wise OR Example: or $t0,$t1,$t2 Reg $t0 = $t1 | $t2

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Instructions for Selection (if..else)

If (i == j) then f = g + h; else f = g – h; bne $s3,$s4, else add $s0,$s1,$s2 j doneelse: sub $s0,$s1,$s2done:

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Instructions for Iteration (while)

while (save[i] == k) i = i + 1;Let i be in reg $s3Let k be in reg $s5Let $t1 have the address of Save array elementLoop: sll $t1,$s3,2 add $t1,$t1$s6 lw $t0,0($t1) bne $t0,$s5,Exit addi $s3,$s3,1 j Loop

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Compiling C procedures

int leaf_example (int g, int h, int i, int j){ int f; f = (g + h) – (i + j); return f;}

How do you pass the parameters? How does compiler transport the parameters?

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Passing Parameters/arguments

Special registers for arguments: a0, a1, a2, a3Save temp register on the stackPerform operations And return valueRestore values stored on the stackJump back to return address

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Summary

MIPS operandsMIPS memoryMIPS Assembly languageMIPS instructions type and formatsAnd of course, the four design principles.

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