Chapter 5 MOSFET 3 - College of · PDF filePerforming the analysis directly on the circuit...
Transcript of Chapter 5 MOSFET 3 - College of · PDF filePerforming the analysis directly on the circuit...
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
C H A P T E R 5
Amplifier Design
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
The Common-Source
Amplifier
)||)(( 00 rRvgv Dgsm−=
)||( 00 rRgA Dmv −=
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Performing the analysis directly on the circuit diagram with the
MOSFET model used implicitly.
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
The CS amplifier with a source resistance Rs: (a) Circuit without
bias details; (b) Equivalent circuit with the MOSFET
represented by its T model.
sm
Dm
vRg
RgA
+
−=
10
Sm
LDm
s
m
LD
vRg
RRg
Rg
RRA
+
−=
+
−=
1
)||(
1
||0
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Figure 5.48 (a) Common-gate (CG) amplifier with bias arrangement omitted. (b)
Equivalent circuit of the CG amplifier with the MOSFET replaced with its T model.
The Common-Gate (CG) Amplifier
Dm
i
v Rgv
vA ==
00
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Figure 5.49 Illustrating the need for a unity-gain buffer amplifier.
The Common-Drain Amplifier or Source Follower
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L
L
i
v
gR
R
v
vA
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1, 0 =∞= vL AR
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10 =
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Summary and Comparison
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Biasing in MOS Amplifier
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Figure 5.51 The use of fixed bias (constant VGS) can result in a large
variability in the value of ID. Devices 1 and 2 represent extremes among units
of the same type.
Biasing by Fixing VGS
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Figure 5.52 Biasing using a fixed voltage at the gate, VG, and a
resistance in the source lead, RS: (a) basic arrangement; (b) reduced
variability in ID
Biasing by Fixing VG and Connecting of Resistance in the Source
DSGSG IRVV −=
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Figure 5.52 Biasing using a fixed voltage at the gate, VG, and a resistance in the
source lead, RS: (c) practical implementation using a single supply; (d) coupling of a signal source to the gate using a capacitor CC1; (e) practical implementation
using two supplies.
Biasing by Fixing VG and Connecting of Resistance in the Source
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Example 5.12.
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Biasing the MOSFET using a large drain-to-gate feedback
resistance, RG.
DDGSDD
DDDDDSGS
IRVV
IRVVV
+=
−==
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Figure 5.55 (a) Biasing the MOSFET using a constant-current source I. (b) Implementation of the constant-current source I using a current mirror.
Biasing Using a Constant-Current Source
2
1
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1 )()(2
1tGSnD VV
L
WkI −=
2
2
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2 )()(2
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VVL
WkII −==
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)/(
LW
LWII REF=
Current Mirror
Circuit
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Figure E5.37
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Figure 5.56 Basic structure of the circuit used to realize single-stage,
discrete-circuit MOS amplifier configurations.
Basic Structure
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Figure 5.57 (a) Common-source amplifier based on the circuit of Fig. 5.56. (b)
Equivalent circuit of the amplifier for small-signal analysis.
Common Source (CS) Amplifier
Gin RR =
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RG LDm
sigG
G
v+
−=
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Figure 5.58 (a) Common-source amplifier with a resistance RS in the
source lead
Common Gate (CG) Amplifier
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.Figure 5.58 (b) Small-signal equivalent circuit with ro neglected.
Common Gate (CG) Amplifier
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Figure 5.60 (a) A source-follower amplifier.
(b) Small-signal, equivalent-circuit model.
The Source Follower
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L
L
sigG
G
v
grR
rR
RR
RG
1)||(
||
0
0
++
=
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Figure 5.61 A sketch of the frequency response of a CS amplifier
delineating the three frequency bands of interest.
BW=fH-fL
GB=|AM|BW
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Figure 5.62 Small-signal, equivalent-circuit model of a MOSFET in
which the source is not connected to the body.
The role of the Substrate – The Body Effect
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Figure 13.17 The CMOS inverter.
The Inverter
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Input = Vdd
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Input = GND
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Figure 13.20 The voltage-transfer characteristic of the CMOS
inverter when QN and QP are matched.
Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.
Figure 13.22 Dynamic operation of a capacitively loaded CMOS inverter: (a) circuit;
(b) input and output waveforms; (c) equivalent circuit during the capacitor discharge;
(d) trajectory of the operating point as the input goes high and C discharges through
QN.