CHAPTER 4: P-N JUNCTION Part I.

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SUB-TOPICS IN CHAPTER 4: Basic Fabrication Steps Thermal Equilibrium Condition Depletion Region Depletion Capacitance I-V Characteristics Charge Storage & Transient Behavior Junction Breakdown Heterojunction

Transcript of CHAPTER 4: P-N JUNCTION Part I.

CHAPTER 4: P-N JUNCTION Part I SUB-TOPICS IN CHAPTER 4:
Basic Fabrication Steps Thermal Equilibrium Condition Depletion Region Depletion Capacitance I-V Characteristics Charge Storage & Transient Behavior Junction Breakdown Heterojunction CHAPTER 4: Part 1 Basic Fabrication Steps (EMT 261)
Thermal Equilibrium Condition Depletion Region (recall your EMT 111) I V Characteristics (recall your EMT 111) BASIC FABRICATION STEPS
Oxidation Lithography Diffusion & Ion Implantation Metallization THERMAL EQUILIBRIUM Most important characteristic of p n junction: it allows current to flow easily in ONE direction. FORWARD BIAS +V at p-side, current I increase rapidly (mA). REVERSE BIAS no I flows initially, I small (A) at critical point, I suddenly increases junction breakdown. Refer to Fig. 4.3. Figure 4.3 I - V characteristics of a typical Si p-n junction.
FORWARD BIAS REVERSE BIAS I(A) Figure I - V characteristics of a typical Si p-n junction. BAND DIAGRAM Fig. 4.4(a) and 4.4(b) p and n-type of s/c materials before and after junction is formed, respectively. Fermi level, EF, in p and n-type is near valance band and conduction band respectively. When they are joined together, large carrier concentration gradients at the junction cause carrier diffusion. (recall your basic knowledge in EMT 111). The combination valence & cond. band of p and n-type (Fig. 4.4 b) lower side shows that the hole diffusion current flows from left to right, and hole drift current is in opposite direction. Note: electron diffuse from RIGHT to LEFT, while DIRECTION OF ELECTRON CURRENT IS OPPOSITE. BAND DIAGRAM Depletion region Fermi level position
Figure (a) Uniformly doped p-type and n-type semiconductors before the junction is formed. (b) The electric field in the depletion region and the energy band diagram of a p-n junction in thermal equilibrium. EQUILIBRIUM FERMI LEVELS
The unique space charge distribution and the electric potential is given by Poissons equation: (1) All donors and acceptors are ionized. In regions far away from the metallurgical junction, charge neutrally is maintained and space charge density is zero, where (d2/dx2) = 0, and ND NA + p n = 0. The total electrostatic potential different between the p-side and the n-side neutral regions at thermal equilibrium is called the built-in potential Vbi: (2) EQUILIBRIUM FERMI LEVELS (cont.)
Fig. 4.5(c), we have a narrow transition region space charge of impurity ions is partially compensated by the mobile carriers. Depletion region / space charge region depleted region where the mobile carrier densities are zero. For typical p-n junction of Si & GaAs width of each transition region > of the other side the junction is called one-side abrupt junction (Fig. 9(a)). Fig. 4.9(b) space charge distribution of one sided abrupt p+-n junction with NA >> ND. The depletion layer width of p-side ND) in thermal equilibrium.(b) Space charge distribution.(c) Electric-field distribution.(d) Potential distribution with distance, where Vbi is the built-in potential. ABRUPT JUNCTION (cont.)
Fig depletion layer width & energy band diagram of p-n junction under various biasing conditions. Fig. 4.10(a) the total electrostatic potential across the junction = Vbi. The different potential energy from p-side to the n-side = qVbi. Apply +ve voltage VF to the p-side forward biased (Fig. 4.10(b)). The total electrostatic across the junction decrease by VF, and replaced with Vbi VF. Thus forward bias REDUCED the depletion layer width. Fig. 4.10(c), by applying VR at n-side reverse-biased. The total electrostatic across the junction increases by VR with Vbi + VR. Thus, reverse bias INCREASES the depletion width layer. The depletion layer width: Where NB lightly doped bulk concentration, and V = +ve (forward bias) and V = -ve (reverse bias). W varies as the square root of the total electrostatic potential difference across the junction. (12) Figure Schematic representation of depletion layer width and energy band diagrams of ap-n junction under various biasing conditions.(a) Thermal-equilbrium condition. (b) Forward-bias condition.(c) Reverse-bias condition. LINEARLY GRADED JUNCTION
For Fig. 4.11(a), it shows the impurity distribution for linearly graded function for thermal equilibrium, then the Poissons equation is where a impurity gradient (cm-4). The electric-field distribution in Fig. 4.11(b) represents by The built-in potential: Depletion layer: at (13) (14) (15) (16) LINEARLY GRADED JUNCTION
Since the values of the impurities concentrations at edge of depletion region (-W/2 and W/2) are the same and equal to aW/2, thus the built-in potential for linearly graded junction may be expressed as (17) Figure 4-11. Linearly graded junction in thermal equilibrium
Figure Linearly graded junction in thermal equilibrium. (a) Impurity distribution. (b) Electric-field distribution. (c) Potential distribution with distance. (d) Energy band diagram. Figure Built-in potential for a linearly graded junction in Si and GaAs as a function of impurity gradient. EXERCISE 1 For a Si linearly graded junction at room temperature with an impurity gradient of 1020cm-4, calculate the built in potential. Where , and DEPLETION CAPACITANCE
Basically, the junction depletion layer capacitance/area is defined as Cj = dQ/dV, where dQ incremental change in depletion layer/unit area for an incremental change in the applied voltage dV. From Fig. 4.13, the depletion capacitance/area is given by (18) with unitF/cm2. Figure (a) p-n junction with an arbitrary impurity profile under reverse bias. (b) Change in space charge distribution due to change in applied bias.(c) Corresponding change in electric-field distribution. Notice Test 1 will be on Wednesday 13/8/2008 in K. Perlis (DKP1) at 8.30pm-9.30pm