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![Page 1: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/1.jpg)
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Chapter 1 <1>
Digital Design and Computer Architecture, 2nd Edition
Chapter 1
David Money Harris and Sarah L. Harris
![Page 2: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/2.jpg)
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Chapter 1 <2>
• Background• The Game Plan• The Art of Managing Complexity• The Digital Abstraction• Number Systems• Logic Gates• Logic Levels• CMOS Transistors• Power Consumption
Chapter 1 :: Topics
![Page 3: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/3.jpg)
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Chapter 1 <3>
• Microprocessors have revolutionized our world– Cell phones, Internet, rapid advances in medicine, etc.
• The semiconductor industry has grown from $21 billion in 1985 to $300 billion in 2011
Background
![Page 4: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/4.jpg)
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Chapter 1 <4>
• Purpose of course:– Understand what’s under the hood of a computer– Learn the principles of digital design– Learn to systematically debug increasingly
complex designs – Design and build a microprocessor
The Game Plan
![Page 5: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/5.jpg)
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Chapter 1 <5>
• Abstraction• Discipline• The Three –Y’s
– Hierarchy– Modularity– Regularity
The Art of Managing Complexity
![Page 6: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/6.jpg)
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Chapter 1 <6>
• Hiding details when they aren’t important
Abstraction
![Page 7: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/7.jpg)
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Chapter 1 <7>
• Intentionally restrict design choices • Example: Digital discipline
– Discrete voltages instead of continuous– Simpler to design than analog circuits – can build more sophisticated
systems– Digital systems replacing analog predecessors:
• i.e., digital cameras, digital television, cell phones, CDs
Discipline
![Page 8: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/8.jpg)
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Chapter 1 <8>
• Hierarchy– A system divided into modules and submodules
• Modularity– Having well-defined functions and interfaces
• Regularity– Encouraging uniformity, so modules can be easily reused
The Three -Y’s
![Page 9: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/9.jpg)
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Chapter 1 <9>
• Hierarchy– Three main modules:
lock, stock, and barrel– Submodules of lock:
hammer, flint, frizzen, etc.
Example: The Flintlock Rifle
![Page 10: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/10.jpg)
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Chapter 1 <10>
• Modularity– Function of stock: mount
barrel and lock– Interface of stock: length
and location of mounting pins
• Regularity– Interchangeable parts
Example: The Flintlock Rifle
![Page 11: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/11.jpg)
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Chapter 1 <11>
• Most physical variables are continuous– Voltage on a wire– Frequency of an oscillation– Position of a mass
• Digital abstraction considers discrete subset of values
The Digital Abstraction
![Page 12: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/12.jpg)
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Chapter 1 <12>
• Designed by Charles Babbage from 1834 – 1871
• Considered to be the first digital computer
• Built from mechanical gears, where each gear represented a discrete value (0-9)
• Babbage died before it was finished
The Analytical Engine
![Page 13: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/13.jpg)
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Chapter 1 <13>
• Two discrete values:– 1’s and 0’s– 1, TRUE, HIGH– 0, FALSE, LOW
• 1 and 0: voltage levels, rotating gears, fluid levels, etc.
• Digital circuits use voltage levels to represent 1 and 0
• Bit: Binary digit
Digital Discipline: Binary Values
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Chapter 1 <14>
• Born to working class parents• Taught himself mathematics and
joined the faculty of Queen’s College in Ireland.
• Wrote An Investigation of the Laws of Thought (1854)
• Introduced binary variables• Introduced the three fundamental
logic operations: AND, OR, and NOT.
George Boole, 1815-1864
![Page 15: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/15.jpg)
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Chapter 1 <15>
537410 =
10
's colu
mn
10
0's co
lum
n
10
00
's colu
mn
1's co
lum
n
11012 =
2's co
lum
n4
's colu
mn
8's co
lum
n
1's co
lum
n
• Decimal numbers
• Binary numbers
Number Systems
![Page 16: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/16.jpg)
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Chapter 1 <16>
537410 = 5 × 103 + 3 × 102 + 7 × 101 + 4 × 100
fivethousands
10
's colu
mn
10
0's co
lum
n
10
00
's colu
mn
threehundreds
seventens
fourones
1's co
lum
n
11012 = 1 × 23 + 1 × 22 + 0 × 21 + 1 × 20 = 1310oneeight
2's co
lum
n4's co
lum
n
8's co
lum
n
onefour
notwo
oneone
1's co
lum
n
• Decimal numbers
• Binary numbers
Number Systems
![Page 17: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/17.jpg)
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Chapter 1 <17>
• 20 =• 21 = • 22 =• 23 =• 24 = • 25 = • 26 =• 27 =
• 28 =• 29 = • 210 =• 211 =• 212 = • 213 = • 214 =• 215 =
Powers of Two
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Chapter 1 <18>
• 20 = 1• 21 = 2• 22 = 4• 23 = 8• 24 = 16• 25 = 32• 26 = 64• 27 = 128• Handy to memorize up to 29
• 28 = 256• 29 = 512• 210 = 1024• 211 = 2048• 212 = 4096• 213 = 8192• 214 = 16384• 215 = 32768
Powers of Two
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Chapter 1 <19>
• Decimal to binary conversion:– Convert 100112 to decimal
• Decimal to binary conversion:– Convert 4710 to binary
Number Conversion
![Page 20: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/20.jpg)
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Chapter 1 <20>
• Decimal to binary conversion:– Convert 100112 to decimal
– 16×1 + 8×0 + 4×0 + 2×1 + 1×1 = 1910
• Decimal to binary conversion:– Convert 4710 to binary
– 32×1 + 16×0 + 8×1 + 4×1 + 2×1 + 1×1 = 1011112
Number Conversion
![Page 21: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/21.jpg)
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Chapter 1 <21>
• N-digit decimal number – How many values? – Range? – Example: 3-digit decimal number:
• N-bit binary number– How many values? – Range:– Example: 3-digit binary number:
Binary Values and Range
![Page 22: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/22.jpg)
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Chapter 1 <22>
• N-digit decimal number – How many values? 10N
– Range? [0, 10N - 1]– Example: 3-digit decimal number:
• 103 = 1000 possible values• Range: [0, 999]
• N-bit binary number– How many values? 2N
– Range: [0, 2N - 1]– Example: 3-digit binary number:
• 23 = 8 possible values• Range: [0, 7] = [0002 to 1112]
Binary Values and Range
![Page 23: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/23.jpg)
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Chapter 1 <23>
Hex Digit Decimal Equivalent Binary Equivalent
0 0
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
A 10
B 11
C 12
D 13
E 14
F 15
Hexadecimal Numbers
![Page 24: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/24.jpg)
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Chapter 1 <24>
Hex Digit Decimal Equivalent Binary Equivalent
0 0 0000
1 1 0001
2 2 0010
3 3 0011
4 4 0100
5 5 0101
6 6 0110
7 7 0111
8 8 1000
9 9 1001
A 10 1010
B 11 1011
C 12 1100
D 13 1101
E 14 1110
F 15 1111
Hexadecimal Numbers
![Page 25: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/25.jpg)
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Chapter 1 <25>
• Base 16• Shorthand for binary
Hexadecimal Numbers
![Page 26: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/26.jpg)
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Chapter 1 <26>
• Hexadecimal to binary conversion:– Convert 4AF16 (also written 0x4AF) to binary
• Hexadecimal to decimal conversion:– Convert 0x4AF to decimal
Hexadecimal to Binary Conversion
![Page 27: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/27.jpg)
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Chapter 1 <27>
• Hexadecimal to binary conversion:– Convert 4AF16 (also written 0x4AF) to binary
– 0100 1010 11112
• Hexadecimal to decimal conversion:– Convert 4AF16 to decimal
– 162×4 + 161×10 + 160×15 = 119910
Hexadecimal to Binary Conversion
![Page 28: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/28.jpg)
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Chapter 1 <28>
• Bits
• Bytes & Nibbles
• Bytes
10010110nibble
byte
CEBF9AD7least
significantbyte
mostsignificant
byte
10010110least
significantbit
mostsignificant
bit
Bits, Bytes, Nibbles…
![Page 29: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/29.jpg)
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Chapter 1 <29>
• 210 = 1 kilo ≈ 1000 (1024)• 220 = 1 mega ≈ 1 million (1,048,576)• 230 = 1 giga ≈ 1 billion (1,073,741,824)
Large Powers of Two
![Page 30: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/30.jpg)
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Chapter 1 <30>
• What is the value of 224?
• How many values can a 32-bit variable represent?
Estimating Powers of Two
![Page 31: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/31.jpg)
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Chapter 1 <31>
• What is the value of 224? 24 × 220 ≈ 16 million
• How many values can a 32-bit variable represent? 22 × 230 ≈ 4 billion
Estimating Powers of Two
![Page 32: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/32.jpg)
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Chapter 1 <32>
37345168+8902
carries 11
10110011+1110
11 carries
• Decimal
• Binary
Addition
![Page 33: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/33.jpg)
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Chapter 1 <33>
10010101+
10110110+
• Add the following 4-bit binary numbers
• Add the following 4-bit binary numbers
Binary Addition Examples
![Page 34: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/34.jpg)
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Chapter 1 <34>
10010101+1110
1
10110110+
10001
111
• Add the following 4-bit binary numbers
• Add the following 4-bit binary numbers
Overflow!
Binary Addition Examples
![Page 35: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/35.jpg)
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Chapter 1 <35>
• Digital systems operate on a fixed number of bits
• Overflow: when result is too big to fit in the available number of bits
• See previous example of 11 + 6
Overflow
![Page 36: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/36.jpg)
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Chapter 1 <36>
• Sign/Magnitude Numbers• Two’s Complement Numbers
Signed Binary Numbers
![Page 37: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/37.jpg)
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Chapter 1 <37>
• 1 sign bit, N-1 magnitude bits• Sign bit is the most significant (left-most) bit
– Positive number: sign bit = 0– Negative number: sign bit = 1
• Example, 4-bit sign/mag representations of ± 6: +6 =
- 6 =
• Range of an N-bit sign/magnitude number:
1
1 2 2 1 0
2
0
: , , , ,
( 1) 2n
N N
na i
ii
A a a a a a
A a
Sign/Magnitude Numbers
![Page 38: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/38.jpg)
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Chapter 1 <38>
• 1 sign bit, N-1 magnitude bits• Sign bit is the most significant (left-most) bit
– Positive number: sign bit = 0– Negative number: sign bit = 1
• Example, 4-bit sign/mag representations of ± 6: +6 = 0110
- 6 = 1110
• Range of an N-bit sign/magnitude number:[-(2N-1-1), 2N-1-1]
1
1 2 2 1 0
2
0
: , , , ,
( 1) 2n
N N
na i
ii
A a a a a a
A a
Sign/Magnitude Numbers
![Page 39: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/39.jpg)
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Chapter 1 <39>
• Problems:– Addition doesn’t work, for example -6 + 6:
1110
+ 0110
10100 (wrong!)
– Two representations of 0 (± 0):
1000
0000
Sign/Magnitude Numbers
![Page 40: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/40.jpg)
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Chapter 1 <40>
• Don’t have same problems as sign/magnitude numbers:– Addition works– Single representation for 0
Two’s Complement Numbers
![Page 41: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/41.jpg)
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Chapter 1 <41>
2
11
0
2 2n
n in i
i
A a a
• Msb has value of -2N-1
• Most positive 4-bit number:• Most negative 4-bit number:• The most significant bit still indicates the sign
(1 = negative, 0 = positive)• Range of an N-bit two’s comp number:
Two’s Complement Numbers
![Page 42: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/42.jpg)
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Chapter 1 <42>
2
11
0
2 2n
n in i
i
A a a
• Msb has value of -2N-1
• Most positive 4-bit number: 0111• Most negative 4-bit number: 1000• The most significant bit still indicates the sign
(1 = negative, 0 = positive)• Range of an N-bit two’s comp number:
[-(2N-1), 2N-1-1]
Two’s Complement Numbers
![Page 43: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/43.jpg)
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Chapter 1 <43>
• Flip the sign of a two’s complement number• Method:
1. Invert the bits
2. Add 1
• Example: Flip the sign of 310 = 00112
“Taking the Two’s Complement”
![Page 44: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/44.jpg)
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Chapter 1 <44>
• Flip the sign of a two’s complement number• Method:
1. Invert the bits
2. Add 1
• Example: Flip the sign of 310 = 00112
1. 1100
2. + 1
1101 = -310
“Taking the Two’s Complement”
![Page 45: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/45.jpg)
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Chapter 1 <45>
• Take the two’s complement of 610 = 01102
• What is the decimal value of 10012?
Two’s Complement Examples
![Page 46: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/46.jpg)
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Chapter 1 <46>
• Take the two’s complement of 610 = 01102
1. 1001
2. + 1
10102 = -610
• What is the decimal value of the two’s complement number 10012?
1. 0110
2. + 1
01112 = 710, so 10012 = -710
Two’s Complement Examples
![Page 47: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/47.jpg)
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Chapter 1 <47>
+01101010
+11100011
• Add 6 + (-6) using two’s complement numbers
• Add -2 + 3 using two’s complement numbers
Two’s Complement Addition
![Page 48: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/48.jpg)
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Chapter 1 <48>
+01101010
10000
111
+11100011
10001
111
• Add 6 + (-6) using two’s complement numbers
• Add -2 + 3 using two’s complement numbers
Two’s Complement Addition
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Chapter 1 <49> Copyright © 2012 Elsevier
• Extend number from N to M bits (M > N) :– Sign-extension– Zero-extension
Increasing Bit Width
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Chapter 1 <50>
• Sign bit copied to msb’s• Number value is same
• Example 1:– 4-bit representation of 3 = 0011– 8-bit sign-extended value: 00000011
• Example 2:– 4-bit representation of -5 = 1011– 8-bit sign-extended value: 11111011
Sign-Extension
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Chapter 1 <51>
• Zeros copied to msb’s• Value changes for negative numbers
• Example 1:– 4-bit value = 00112 = 310
– 8-bit zero-extended value: 00000011 = 310
• Example 2:– 4-bit value = 1011 = -510
– 8-bit zero-extended value: 00001011 = 1110
Zero-Extension
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Chapter 1 <52>
-8
1000 1001
-7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
1010 1011 1100 1101 1110 1111 0000 0001 0010 0011 0100 0101 0110 0111 Two's Complement
10001001101010111100110111101111
00000001 0010 0011 0100 0101 0110 0111
1000 1001 1010 1011 1100 1101 1110 11110000 0001 0010 0011 0100 0101 0110 0111
Sign/Magnitude
Unsigned
Number System RangeUnsigned [0, 2N-1]
Sign/Magnitude [-(2N-1-1), 2N-1-1]
Two’s Complement [-2N-1, 2N-1-1]
For example, 4-bit representation:
Number System Comparison
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Chapter 1 <53>
• Perform logic functions: – inversion (NOT), AND, OR, NAND, NOR, etc.
• Single-input: – NOT gate, buffer
• Two-input: – AND, OR, XOR, NAND, NOR, XNOR
• Multiple-input
Logic Gates
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Chapter 1 <54>
NOT
Y = A
A Y01
A Y
BUF
Y = A
A Y01
A Y
Single-Input Logic Gates
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Chapter 1 <55>
NOT
Y = A
A Y0 11 0
A Y
BUF
Y = A
A Y0 01 1
A Y
Single-Input Logic Gates
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Chapter 1 <56>
AND
Y = AB
A B Y0 00 11 01 1
AB
Y
OR
Y = A + B
A B Y0 00 11 01 1
AB
Y
Two-Input Logic Gates
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Chapter 1 <57>
AND
Y = AB
A B Y0 0 00 1 01 0 01 1 1
AB
Y
OR
Y = A + B
A B Y0 0 00 1 11 0 11 1 1
AB
Y
Two-Input Logic Gates
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Chapter 1 <58>
XNOR
Y = A + B
A B Y0 00 11 01 1
AB
Y
XOR NAND NOR
Y = A + B Y = AB Y = A + B
A B Y0 00 11 01 1
A B Y0 00 11 01 1
A B Y0 00 11 01 1
AB
Y AB
Y AB
Y
More Two-Input Logic Gates
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Chapter 1 <59>
XNOR
Y = A + B
A B Y0 00 11 01 1
AB
Y
XOR NAND NOR
Y = A + B Y = AB Y = A + B
A B Y0 0 00 1 11 0 11 1 0
A B Y0 0 10 1 11 0 11 1 0
A B Y0 0 10 1 01 0 01 1 0
AB
Y AB
Y AB
Y
1001
More Two-Input Logic Gates
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Chapter 1 <60>
NOR3
Y = A+B+C
B C Y0 00 11 01 1
AB YC
A0000
0 00 11 01 1
1111
AND4
Y = ABCD
AB YCD
B C Y0 00 11 01 1
A0000
0 00 11 01 1
1111
Multiple-Input Logic Gates
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Chapter 1 <61>
NOR3
Y = A+B+C
B C Y0 00 11 01 1
AB YC
A0000
0 00 11 01 1
1111
10000000
AND4
Y = ABCD
AB YCD
B C Y0 00 11 01 1
A0000
0 00 11 01 1
1111
00000001
• Multi-input XOR: Odd parity
Multiple-Input Logic Gates
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Chapter 1 <62>
• Discrete voltages represent 1 and 0• For example:
– 0 = ground (GND) or 0 volts– 1 = VDD or 5 volts
• What about 4.99 volts? Is that a 0 or a 1?• What about 3.2 volts?
Logic Levels
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Chapter 1 <63>
• Range of voltages for 1 and 0• Different ranges for inputs and outputs to
allow for noise
Logic Levels
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Chapter 1 <64>
What is Noise?
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Chapter 1 <65>
• Anything that degrades the signal– E.g., resistance, power supply noise, coupling
to neighboring wires, etc.• Example: a gate (driver) outputs 5 V but,
because of resistance in a long wire, receiver gets 4.5 V
Driver ReceiverNoise
5 V 4.5 V
What is Noise?
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Chapter 1 <66>
• With logically valid inputs, every circuit element must produce logically valid outputs
• Use limited ranges of voltages to represent discrete values
The Static Discipline
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Chapter 1 <67>
Driver Receiver
ForbiddenZone
NML
NMH
Input CharacteristicsOutput Characteristics
VO H
VDD
VO L
GND
VIH
VIL
Logic HighInput Range
Logic LowInput Range
Logic HighOutput Range
Logic LowOutput Range
Logic Levels
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Chapter 1 <68>
Driver Receiver
ForbiddenZone
NML
NMH
Input CharacteristicsOutput Characteristics
VO H
VDD
VO L
GND
VIH
VIL
Logic HighInput Range
Logic LowInput Range
Logic HighOutput Range
Logic LowOutput Range
NMH = VOH – VIH
NML = VIL – VOL
Noise Margins
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Chapter 1 <69>
VDD
V(A)
V(Y)
VOH VDD
VOL
VIL, VIH
0
A Y
VDD
V(A)
V(Y)
VOH
VDD
VOL
VIL VIH
Unity GainPoints
Slope = 1
0VDD / 2
Ideal Buffer: Real Buffer:
NMH = NML = VDD/2 NMH , NML < VDD/2
DC Transfer Characteristics
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Chapter 1 <70>
ForbiddenZone
NML
NMH
Input CharacteristicsOutput CharacteristicsVDD
VO L
GND
VIHVIL
VO H
A Y
VDD
V(A)
V(Y)
VOH
VDD
VOL
VIL VIH
Unity GainPoints
Slope = 1
0
DC Transfer Characteristics
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Chapter 1 <71>
• In 1970’s and 1980’s, VDD = 5 V• VDD has dropped
– Avoid frying tiny transistors– Save power
• 3.3 V, 2.5 V, 1.8 V, 1.5 V, 1.2 V, 1.0 V, …• Be careful connecting chips with different
supply voltages
Chips operate because they contain magic smoke
Proof: – if the magic smoke is let out, the chip stops
working
VDD Scaling
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Chapter 1 <72>
Logic Family VDD VIL VIH VOL VOH
TTL 5 (4.75 - 5.25) 0.8 2.0 0.4 2.4
CMOS 5 (4.5 - 6) 1.35 3.15 0.33 3.84
LVTTL 3.3 (3 - 3.6) 0.8 2.0 0.4 2.4
LVCMOS 3.3 (3 - 3.6) 0.9 1.8 0.36 2.7
Logic Family Examples
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Chapter 1 <73>
g
s
d
g = 0
s
d
g = 1
s
d
OFF ON
• Logic gates built from transistors• 3-ported voltage-controlled switch
– 2 ports connected depending on voltage of 3rd– d and s are connected (ON) when g is 1
Transistors
![Page 74: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/74.jpg)
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Chapter 1 <74>
• Nicknamed “Mayor of Silicon Valley”
• Cofounded Fairchild Semiconductor in 1957
• Cofounded Intel in 1968• Co-invented the integrated
circuit
Robert Noyce, 1927-1990
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Chapter 1 <75>
Silicon Lattice
Si SiSi
Si SiSi
Si SiSi
As SiSi
Si SiSi
Si SiSi
B SiSi
Si SiSi
Si SiSi
-
+
+
-
Free electron Free hole
n-Type p-Type
• Transistors built from silicon, a semiconductor• Pure silicon is a poor conductor (no free charges)• Doped silicon is a good conductor (free charges)
– n-type (free negative charges, electrons)– p-type (free positive charges, holes)
Silicon
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Chapter 1 <76>
n
p
gatesource drain
substrate
SiO2
nMOS
Polysilicon
n
gate
source drain
• Metal oxide silicon (MOS) transistors: – Polysilicon (used to be metal) gate– Oxide (silicon dioxide) insulator– Doped silicon
MOS Transistors
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Chapter 1 <77>
n
p
gatesource drain
substrate
n n
p
gatesource drain
substrate
n
GND
GND
VDD
GND
+++++++- - - - - - -
channel
Gate = 0
OFF (no connection between source and drain)
Gate = 1
ON (channel between source and drain)
Transistors: nMOS
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Chapter 1 <78>
• pMOS transistor is opposite– ON when Gate = 0– OFF when Gate = 1
SiO2
n
gatesource drainPolysilicon
p p
gate
source drain
substrate
Transistors: pMOS
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Chapter 1 <79>
g
s
d
g = 0
s
d
g = 1
s
d
g
d
s
d
s
d
s
nMOS
pMOS
OFF ON
ON OFF
Transistor Function
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Chapter 1 <80>
• nMOS: pass good 0’s, so connect source to GND
• pMOS: pass good 1’s, so connect source to VDD
pMOSpull-upnetwork
outputinputs
nMOSpull-downnetwork
Transistor Function
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Chapter 1 <81>
VDD
A Y
GND
N1
P1
NOT
Y = A
A Y0 11 0
A Y
A P1 N1 Y
0
1
CMOS Gates: NOT Gate
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Chapter 1 <82>
VDD
A Y
GND
N1
P1
NOT
Y = A
A Y0 11 0
A Y
A P1 N1 Y
0 ON OFF 1
1 OFF ON 0
CMOS Gates: NOT Gate
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Chapter 1 <83>
A
B
Y
N2
N1
P2 P1
NAND
Y = AB
A B Y0 0 10 1 11 0 11 1 0
AB
Y
A B P1 P2 N1 N2 Y
0 0
0 1
1 0
1 1
CMOS Gates: NAND Gate
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Chapter 1 <84>
A
B
Y
N2
N1
P2 P1
NAND
Y = AB
A B Y0 0 10 1 11 0 11 1 0
AB
Y
A B P1 P2 N1 N2 Y
0 0 ON ON OFF OFF 1
0 1 ON OFF OFF ON 1
1 0 OFF ON ON OFF 1
1 1 OFF OFF ON ON 0
CMOS Gates: NAND Gate
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Chapter 1 <85>
pMOSpull-upnetwork
outputinputs
nMOSpull-downnetwork
CMOS Gate Structure
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Chapter 1 <86>
How do you build a three-input NOR gate?
NOR Gate
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Chapter 1 <87>
B
CY
A
NOR3 Gate
![Page 88: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/88.jpg)
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Chapter 1 <88>
How do you build a two-input AND gate?
Other CMOS Gates
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Chapter 1 <89>
AB
Y
AND2 Gate
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Chapter 1 <90>
• nMOS pass 1’s poorly• pMOS pass 0’s poorly• Transmission gate is a better switch
– passes both 0 and 1 well• When EN = 1, the switch is ON:
– EN = 0 and A is connected to B• When EN = 0, the switch is OFF:
– A is not connected to B
A B
EN
EN
Transmission Gates
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Chapter 1 <91>
• Replace pull-up network with weak pMOS transistor that is always on
• pMOS transistor: pulls output HIGH only when nMOS network not pulling it LOW
Y
inputs nMOSpull-downnetwork
weak
Pseudo-nMOS Gates
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Chapter 1 <92>
Pseudo-nMOS NOR4
A BY
weak
C D
Pseudo-nMOS Example
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Chapter 1 <93>
• Cofounded Intel in 1968 with Robert Noyce.
• Moore’s Law: number of transistors on a computer chip doubles every year (observed in 1965)
• Since 1975, transistor counts have doubled every two years.
Gordon Moore, 1929-
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Chapter 1 <94>
• “If the automobile had followed the same development cycle as the computer, a Rolls-Royce would today cost $100, get one million miles to the gallon, and explode once a year . . .”
– Robert Cringley
Moore’s Law
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Chapter 1 <95>
• Power = Energy consumed per unit time– Dynamic power consumption– Static power consumption
Power Consumption
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• Power to charge transistor gate capacitances– Energy required to charge a capacitance, C, to VDD
is CVDD2
– Circuit running at frequency f: transistors switch (from 1 to 0 or vice versa) at that frequency
– Capacitor is charged f/2 times per second (discharging from 1 to 0 is free)
• Dynamic power consumption:
Pdynamic = ½CVDD2f
Dynamic Power Consumption
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• Power consumed when no gates are switching
• Caused by the quiescent supply current, IDD (also called the leakage current)
• Static power consumption:
Pstatic = IDDVDD
Static Power Consumption
![Page 98: Chapter 1 Digital Design and Computer Architecture, 2 nd Edition Chapter 1 David Money Harris and Sarah L. Harris.](https://reader033.fdocuments.net/reader033/viewer/2022061522/5697bfc71a28abf838ca799f/html5/thumbnails/98.jpg)
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• Estimate the power consumption of a wireless handheld computer– VDD = 1.2 V– C = 20 nF– f = 1 GHz– IDD = 20 mA
Power Consumption Example
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• Estimate the power consumption of a wireless handheld computer– VDD = 1.2 V– C = 20 nF– f = 1 GHz– IDD = 20 mA
P = ½CVDD2f + IDDVDD
= ½(20 nF)(1.2 V)2(1 GHz) + (20 mA)(1.2 V) = 14.4 W
Power Consumption Example