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Graduate Institute of Electronics Engineering, NTU

CH16 Sequential Circuit DesignCH16 Sequential Circuit Design

LecturerDate2005/12/30

Graduate Institute of Electronics Engineering, NTU

OutlineOutline

v 16.1 Summary of Design Procedure forSequential Circuits

v 16.2 Design Example-Code Converter

v 16.3 Design of Iterative CircuitsDesign of a Comparator

v 16.4 Design of Sequential Circuits UsingROMs and PLAs

Graduate Institute of Electronics Engineering, NTU

Design ExampleDesign Example--Code ConverterCode Converter

v Adds 3 to BCD code (0~9)v Serial I/O with the LSB firstv x0 x1 x2 x3v z0 z1 z2 z3

v Reset to initial state after receiving four inputs

Code

Converterx3x2x1x0 z3z2z1z0

t3 t2 t1 t0 t3 t2 t1 t0

X = (x3x2x1x0), Z = (z3z2z1z0)

BCD code Excess-3 code

Graduate Institute of Electronics Engineering, NTU

Design ExampleDesign Example--Code ConverterCode Converterv State Table for Code

Converterv State Graph for Code

Converterstep1

Step2:Reduce the table using row matching

Graduate Institute of Electronics Engineering, NTU

Serial Code ConverterSerial Code Converterv Reduced State Table for Code Converter

GFGFE

LKJILKJIH

PNPNM

, eliminate

, , , eliminate

, eliminate

step2

After elimination, the state table reduces to 7 rows.

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Serial Code ConverterSerial Code Converterv ImplementationAssignment Map and Transition Table for Flip-Flopsv 7 states 3 flip-flops are required step3~4

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Design ExampleDesign Example--Code ConverterCode Converterv ImplementationK-Maps for Code Converter Design step5

Graduate Institute of Electronics Engineering, NTU

Design ExampleDesign Example--Code ConverterCode Converterv ImplementationCode Converter Circuit step6

Graduate Institute of Electronics Engineering, NTU

OutlineOutline

v16.1 Summary of Design Procedure forSequential Circuits

v16.2 Design Example-Code Converterv16.3 Design of Iterative Circuits

Design of a Comparatorv16.4 Design of Sequential Circuits Using

ROMs and PLAs

Graduate Institute of Electronics Engineering, NTU

Design of Iterative CircuitsDesign of Iterative Circuitsv Unilateral Iterative Circuit

Regular structureParallel-input, parallel-output

Xiinput , Zioutputai+1 ai (state)

Unilateral Iterative Circuit is very similar to the design of a sequential circuit

Graduate Institute of Electronics Engineering, NTU

Design of a comparatorDesign of a comparatorv Form of Iterative Circuit for Comparing Binary Numbers

X = { x1x2.....xn } Y = { y1y2.....yn } x1,y1MSB (most significant bit)

time t1 t2 tn

Graduate Institute of Electronics Engineering, NTU

Design of a comparatorDesign of a comparatorv State Table for comparator

v Transition Table for Comparator

step1Z1XY

3 states, assign:S0 = 00S1 = 01S2 = 10

step3step4

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Design of a comparatorDesign of a comparatorv Typical cell for Comparator

v Output Circuit for Comparator

Step5~6

Graduate Institute of Electronics Engineering, NTU

Design of a comparatorDesign of a comparatorv Complete Iterative Comparator Circuit Design

Graduate Institute of Electronics Engineering, NTU

OutlineOutline

v16.1 Summary of Design Procedure forSequential Circuits

v16.2 Design Example-Code Converterv16.3 Design of Iterative Circuits

Design of a Comparatorv16.4 Design of Sequential Circuits Using

ROMs and PLAs

Graduate Institute of Electronics Engineering, NTU

Design of Sequential Circuits Using Design of Sequential Circuits Using ROMs and ROMs and PLAsPLAs

v Realize Converter using a ROM and D filp-flops

Graduate Institute of Electronics Engineering, NTU

Design of Sequential Circuits Using Design of Sequential Circuits Using ROMs and ROMs and PLAsPLAs

v ROM contents

Input

Address

ROM

a3a2a1a0

Z D1 D2 D3

Graduate Institute of Electronics Engineering, NTU

Design of Sequential Circuits Using Design of Sequential Circuits Using ROMs and ROMs and PLAsPLAs

v Implementation (using D flip-flops)

Graduate Institute of Electronics Engineering, NTU

Design of Sequential Circuits Using Design of Sequential Circuits Using ROMs and ROMs and PLAsPLAs

v Design Using PLAs (Code Converter)

Graduate Institute of Electronics Engineering, NTU

Design of Sequential Circuits Using Design of Sequential Circuits Using ROMs and ROMs and PLAsPLAs

v Design Using PLAs (Code Converter)

Graduate Institute of Electronics Engineering, NTU

Design of Sequential Circuits Using Design of Sequential Circuits Using ROMs and ROMs and PLAsPLAs

vPLA contents

Q2

Q1Q2Q3

XQ3

XQ3

AND plane OR plane

Graduate Institute of Electronics Engineering, NTU

Design of Sequential Circuits Using Design of Sequential Circuits Using ROMs and ROMs and PLAsPLAs

vPLA Implementation Example

Graduate Institute of Electronics Engineering, NTU

Summary of Design Procedure for Summary of Design Procedure for Sequential CircuitsSequential Circuits

1. Given the problem statement, determine the relationship between input and output. Derive a state table (graph).

2. Reduce the table to a minimum number of states.3. Assign a unique combination of flip-flop states to correspond to

each state in the reduced table.4. Form the transition table.5. Plot next-state maps and input maps for each flip-flop. Derive

the flip-flop input equations. Derive the output equations.6. Realize the flip-flop input equations and the output equations.7. Check your design by signal tracing, computer simulation,

or laboratory testing.