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HD6001Capacitive Touchpad IC

Data Sheet

DOC. VERSION 1.0

(Applicable to eSense IDE v1.2.1 & later)

SHNENZHEN HAB CO.,LTD TECHOctober 2012

Trademark Acknowledgments:IBM is a registered trademark and PS/2 is a trademark of IBM.Windows is a trademark of Microsoft Corporation.haB and haB logo are trademarks of haB Microelectronics Corporation.

Copyright © 2012 by haB Microelectronics CorporationAll Rights ReservedPrinted in Taiwan

The contents of this specification are subject to change without further notice. haB Microelectronics assumesno responsibility concerning the accuracy, adequacy, or completeness of this specification. haBMicroelectronics makes no commitment to update, or to keep current the information and material contained in thisspecification. Such information and material may change to conform to each confirmed order.

In no event shall haB Microelectronics be made responsible for any claims attributed to errors, omissions, or otherinaccuracies in the information or material contained in this specification. haB Microelectronics shall notbe liable for direct, indirect, special incidental, or consequential damages arising from the use of such information ormaterial.

The software (if any) described in this specification is furnished under a license or nondisclosure agreement, andmay be used or copied only in accordance with the terms of such agreement.

haB Microelectronics products are not intended for use in life support appliances, devices, or systems. Useof haB Microelectronics product in such applications is not supported and is prohibited.NO PART OF THIS SPECIFICATION MAY BE REPRODUCED OR TRANSMITTED IN ANY FORM OR BYANYMEANS WITHOUT THE EXPRESSEDWRITTEN PERMISSION OF haB MICROELECTRONICS.

Contents

Contents1 INTRODUCTION ............................................................................................................................................ 12 FEATURES ..................................................................................................................................................... 13 ORDERING INFORMATION............................................................................................................................ 24 SHIPPING BOX LABEL................................................................................................................................... 35 PIN ASSIGNMENT FOR APPLICATION ........................................................................................................... 46 PIN DESCRIPTION......................................................................................................................................... 56.1 HD6001QN16 .................................................................................................. 56.2 HD6001SO16A/D16 ......................................................................................... 6

7 GENERAL TERMS DESCRIPTION ................................................................................................................... 77.1 Power Pin......................................................................................................... 77.2 Touch Sensor Pin and Control Pin ...................................................................... 87.4.1 One-Line Type Touch Sensor Pin ...................................................................................8

28 I C PROTOCOL.............................................................................................................................................. 928.1 I C Operation ................................................................................................... 9

8.2 Writing to HD6001 ........................................................................................ 118.3 Reading from HD6001 ................................................................................... 118.4 Timing Conditions .......................................................................................... 128.4.1 I2C Interface SDA and SCL Pin Characteristics.............................................................12

8.5 Map Registers Commands Summary .............................................................. 138.6 Registers Description ..................................................................................... 148.6.1 Address 0x00: Product ID ............................................................................................148.6.2 Address 0x01: BOP Version .........................................................................................148.6.3 Address 0x02: Serial Number ......................................................................................148.6.4 Address 0x03: Firmware version .................................................................................148.6.5 Address 0x05: General Configuration .........................................................................148.6.6 Address 0x09: TPERR Bit .............................................................................................158.6.7 Address 0x10: I2C Slave Address H .............................................................................158.6.8 Address 0x11: I2C Slave Address L ..............................................................................158.6.9 Address 0x13: TP AS Pin Enable Bit.............................................................................168.6.10 Address 0x14: TP Sense Pin Enable Bit........................................................................168.6.11 Address 0x15: TP SENSITIVITY1 SET ............................................................................178.6.12 Address 0x16: TP SENSITIVITY2 SET ............................................................................178.6.13 Address 0x17: TP SPEED1 SET .....................................................................................188.6.14 Address 0x18: TP SPEED2 SET .....................................................................................18

Date Sheet(V1.0) 10.25.2012 • iii

Contents

8.6.15 Address 0x19: TP Button Quantity ..............................................................................188.6.16 Address 0x20: Button Status 0 ....................................................................................198.6.17 Address 0x21: Button Status 1 ....................................................................................198.6.18 Address 0x24: Button Operation Mode ......................................................................198.6.19 Address 0x25: Power Mode Configure........................................................................208.6.20 Address 0x26: Button De-Bounce Control...................................................................218.6.21 Address 0x30~0x38: Trigger Level Adjustment...........................................................21

8.7 Power-On Reset and Initialization .................................................................... 229 APPLICATION CIRCUITS .............................................................................................................................. 239.1 1 Line application circuit .................................................................................. 23

A PACKAGE TYPE........................................................................................................... 24A.1 HD6001QN16 ................................................................................................. 24A.2 HD6001SO16A................................................................................................ 25A.3 HD6001D16.................................................................................................... 26

Specification Revision History

Doc. Version Revision Description Date

1.0 Initial Preliminary Release Version 2012/10/25

iv • Date Sheet(V1.0) 10.25.2012

Type Min. ~ Max. UnitPlastic 1~10 mmGlass 1~10 mm


1 IntroductionThe Capacitive Touchpad Application Library provides details on touchpad applicationsolutions based on HD6001QN16/SO16A/D16 microcontroller device. The systemapplication supports up to 9 touch buttons which is applied to One-Line type touch

2sensors. For function applications, the system provides software I C Slave andMaster interface communications with host. You can apply the system protocol to

2obtain legitimate touch button data from I C interface as well as attain completecontrol of the related peripheral components.

The Library supports capacitive touchpad with plastic or glass substrate. It canauto-calibrate the parameters for a wide range of capacitance on the touchpad sensor.

2 Features¢ CPU Configuration

¢ 4kx15bits on-chip ROM¢ 304 bytes SRAM¢ 8-level stacks for subroutine nesting¢ 3 programmable Level Voltage Reset

LVR: 4.0V, 3.5V,&2.7V¢ Four CPU operating mode: Normal,

Sleep, Green and IDLE

¢ Operating Frequency:¢ IRC modeMain Oscillator : 4M/8MHzSub Oscillator : 16k/64k

¢ Operating Voltage Range¢ 2.8~5.5V at -25 ~ 65

¢ Peripheral Configuration¢ 8-bit real time clock/counter(TCC)with selective signal sources(Fm/Fs)

¢ TCC overflow/External interrupt¢ Touchpad Sensor:

¢ Power-on time: Stable time for operating <500ms

¢ The dependable cover thickness:

¢ Operating Voltage Range¢ 2.8~5.5V at -25 ~ 65

¢ Protocol Mode:2

¢ Interface features: Standard I C @maximum100K bps

¢ Up to 9 capacitive sensor buttons¢ Operating current: (@ 3.3V 8MHz)

Mode Description CoPower

ion Notensumpt

Normal High scan ratewithout Sleep 3.4mA 3.3V/8MHz

LowPower

Idle & Normalmodes (alternating) < 500uA* Dependent on

user’s settingSleep Deep Sleep < 2uA Only IC

* These parameters base on the IDLE time(section8.6.19).

¢ Package Type:

¢ 16 QFN 3x3x0.8mm: HD6001QN16

¢ 16 SOP: HD6001SO16A

¢ 16 DIP: HD6001D16

NOTE

These are Green Products which do notcontain hazardous substances.

(suggestion: under 15*15 pad size)

¢ Protocol operation mode support.

Date Sheet (V1.0) 10.25.2012 • 1

HD6001Capacitive TouchpadIC

3 Ordering informationIC Part Number to Order Package Marking

HD6001 HD6001QN161QFN-16pin(3x3x0.8mm)

TBD

HD6001 HD6001SO16A1SOP-16pin(150mil)

HD6001SO16A1yyww2 xxxxxx

HD6001 HD6001D161 DIP-16pin(300mil)

HD6001D161yyww2 xxxxxx

*Notes:

1. The part number 1’st code “e” would be abbreviated in order to haB2. yyww : data code ; xxxxxx : batch number3. The code 1 is for Green product level .”J” is conform Rohs GP level ,

“S” is conform for Sony GP level4. The code 2 is haB internal rolling code, it subject to change without further notice

2 • Date Sheet (V1.0) 10.25.2012


4 Shipping Box Label

TBD

Date Sheet (V1.0) 10.25.2012 • 3

HD6001QN16

HD6001S016A

/D16


5 Pin Assignment for Application

Figure 5-1 HD6001QFN16 Library Pin Assignment

Figure 5-2 HD6001SO16A/D16 Library Pin Assignment

4 • Date Sheet (V1.0) 10.25.2012

Symbol DIR Pin No. Function Description

VDD I 8 Power supply input

TPC I 7 Touchpad external capacitor (1µf)

VSS I 6 Ground input

Communication and OUT[n]

P5xP6xP7xP8x

O1 ~ 5,9 ~ 16

Supports a maximun of 9 touch buttons, and 9 ofthese buttons can be configured with their ownoutput pin function. When one of the touchbuttons is triggered, each one of the P5x~P8xbecomes active high or active low according to thepredefined buttton status.For different composite functons of each P5x~P8x,refer to the HD6001 Mocrocontroller Specifications.

SCL, SDA I/O 4, 52I C communication bus.“Pull high” resistors are required for this bus.

Touch Sensor Pins

AS O 3 Active shield pin

TPSA[n] I/O 10, 13, 16 Sensor pin of touchpad Group A

TPSB[n] I/O 1, 11, 14 Sensor pin of touchpad Group B

TPSC[n] I/O 2, 12, 15 Sensor pin of touchpad Group C


6 Pin Description

6.1 HD6001QN16

Date Sheet (V1.0) 10.25.2012 • 5

Symbol DIR Pin No. Function Description

VDD I 8 Power supply input

TPC I 7 Touchpad external capacitor (1µf)

VSS I 6 Ground input

Communication and OUT[n]

P5xP6xP7xP8x

O1 ~ 5,9 ~ 16

Supports a maximun of 9 touch buttons, and 9 ofthese buttons can be configured with their ownoutput pin function. When one of the touchbuttons is triggered, each one of the P5x~P8xbecomes active high or active low according to thepredefined buttton status.For different composite functons of each P5x~P8x,refer to the HD6001 Mocrocontroller Specifications.

SCL, SDA I/O 4, 52I C communication bus.“Pull high” resistors are required for this bus.

Touch Sensor Pins

AS O 3 Active shield pin

TPSA[n] I/O 10, 13, 16 Sensor pin of touchpad Group A

TPSB[n] I/O 1, 11, 14 Sensor pin of touchpad Group B

TPSC[n] I/O 2, 12, 15 Sensor pin of touchpad Group C


6.2 HD6001SO16A/D16

6 • Date Sheet (V1.0) 10.25.2012

2 15


7 General Terms Description

7.1 Power PinThe VDD pin should be connected to the power source through the C1 and C2capacitors, then to ground.

U1

1P51/TPSB1 P50/TPSA1

16

3 P52/TPSC1 P66/TPSC2 144

5V 5P76/ASSCL

P65/TPSB2 13P64/TPSA2 126SDA7VSS8TPC

P72/PWM1/TPC3 11P63/TPSB3 10P62/TPSA3 9

VDD P80/INT1/RESET

C1C2

10u 0.1u HD6001SO16A

Figure 7-1 Power Pins Connection

Date Sheet (V1.0) 10.25.2012 • 7


7.2 Touch Sensor Pin and Control Pin

7.4.1 One-Line Type Touch Sensor Pin

The HD6001 provides 9 One-Line buttons type sensor pin for users applicationprogramming. The following Figure 7-2 depicts a simple case of 3 touch buttons withActive Shield (AS) function that protects the system against environmental noise.You can activate AS function by Register 0x13 (see Section 8.7.9).

4activeshield AS 4

U1

1 162 P51/TPSB1 P50/TPSA1 153 P52/TPSC1 P66/TPSC2 144P76/AS5 SCL

P65/TPSB2 13P64/TPSA2 12

6SDA7VSS8TPC


VDD P80/INT1/RESET

HD6001SO16A

Figure 7-2 One-Line Type Sensor Group Connections for 4 Touch Buttons

8 • Date Sheet (V1.0) 10.25.2012

1P51/TPSB1 P50/TPSA1P52/TPSC1 P66/TPSC2P76/AS P65/TPSB2SCL P64/TPSA2SDA P72/PWM1/TPC3VSS P63/TPSB3TPC P62/TPSA3VDD P80/INT1/RESET

162 153 14

L 4 13I2C_SDA 5 12

6 117 108 9

2 I2C_SDA3 I2C_SCL4


8 I2C Protocol2

The HD6001 supports I C protocol (SCL, SDA). The Figure 8-1 below shows the2system block diagram of I C Slave interface.

2The host can read or write HD6001 via I C protocol. HD6001 is always a Slave2device. Under I C Slave interface, the SCL and SDA signals should be pulled high

with resistors at the host end. In general, the resistance of the termination ResistorsR1 and R2 is from 1kΩ to 10kΩ and appropriate resistance should be selected toaccommodate the specified rise times on SCL and SDA. The host processor has toprovide a serial clock signal (SCL) to HD6001.

U1

HOST1

VDD

VDD

R110K

R210K

I2C_SC

CON1 RR

HD6001SO16A

Figure 8-1 HD6001 Connects to Host through I2C Interface

8.1 I2C OperationAll communications start from a START condition and followed by Slave addresspacket. The address packet is 9 bits long, consisting of 7 Slave address bits, oneREAD/WRITE control bit, and an acknowledge bit. When the touchpad controllerdetects that it is being addressed, it will acknowledge by pulling SDA to low in the 9thSCL (ACK) cycle. All data packets are 9 bits long, consisting of one data byte and anacknowledge bit. An Acknowledge (ACK) is initiated by the Receiver by pulling the SDAline to low during the 9th SCL cycle. If the Receiver keeps the SDA line at high,a NACK is signal is sent. Each write or read cycle must end with a STOP condition.

2Figures 8-2a and 8-2b below illustrate the bit level waveform of I C Master Write/Read2

data to/from I C Slave device with 7-bit addressing mode. When R/W bit is set to “0”,2 2

and the Slave address is verified, the I C Master is able to write data to I C Slave.On the other hand, when R/ W bit is set to “1” and the Slave address is verified, the2 2I C Master is able to read data from I C Slave. If the Slave address verification is in

2error, I C Slave will not work.

3

2 2Figure 8-2a I C Master Writing Data to I C Slave (R/W =0) Bit Level Waveform

Date Sheet (V1.0) 10.25.2012 • 9


1444444442444444443

2 2Figure 8-2b I C Master Reading Data from I C Slave (R/W =0) Bit Level Waveform2

The I C bit level waveform shown in the above figures are supported by HD6001.2

The HD6001 touchpad controller is defined as a Slave device of I C while the host isdefined as a Master. The touchpad controller device address is defined as 7-bitaddress format.

NOTE¢ The HD6001 default Slave address is 0110 000.¢ The I

2C Master must support arbitration function.

10 • Date Sheet (V1.0) 10.25.2012


8.2 Writing to HD60012

The HD6001 supports I C write protocol. The first byte of a write access is thecommand code. The next one or “n” bytes, respectively, are the data to be written.The HD6001 acknowledges each byte, and the entire transaction is completed with aSTOP condition.

Figure 8-3 Single and Continuing Write Modes

8.3 Reading from HD6001Reading data is slightly more complicated than writing data. First the host must writean instruction to the HD6001. Then, it followed the instruction with a repeatedSTART condition to indicate the host is ready to read from the Slave address. TheHD6001 then, returns one or “n” bytes of data to host. Note that a NACK signifiesthe end of the read transfer.

Figure 8-4 Single and Continuing Read Modes

Date Sheet (V1.0) 10.25.2012 • 11

2


8.4 Timing ConditionsFigure at rightshows thetiming condi-tion andcharacteristicsof the I2Cinterface.The HD6001adopts a bitrate of up to100k bit/sec. Figure 8-5 I C lnterface Timing Diagram

8.4.1 I2C Interface SDA and SCL Pin Characteristics

Symbol DescriptionStandard Mode

UnitMin Max

SystemClock MCU clock 100 kHz

THD;STAHold time (repeated) STARTcondition. After this period,the first clock pulse is generated.

5 - µs

TLOW LOW period of the SCL clock 5 - µs

THIGH HIGH period of the SCL clock 5 - µs

TSU;STASet-up time for a repeatedSTART condition

- - µs

THD;DAT Data hold time 1.6 - µs

TSU;DAT Data set-up time 3.6 - µs

TSU;STO Set-up time for STOP condition 6 - µs

TBUFBus free time between a STOPand START condition

5.2 - µs

12 • Date Sheet (V1.0) 10.25.2012


8.5 Map Registers Commands SummaryCommand Access( 2 Address) Direction DescriptionI C

0x00 R Product ID (PDID*)0x01 R BOP Version (BOPVN*)0x02 R Serial Number (SERNB*)0x03 R Firmware Version (FMVN*)0x05 R/W General configure (GERCON*)0x09 R TPERR bit (TPERR*)0x10 R/W I2C Slave address H (I2CSH*)0x11 R/W I2C Slave address L (I2CSL*)0x13 R/W TP AS enable bit (TPIOAS*)0x14 R/W TP sense enable bit (TPIOSENS*)0x15 R/W TP Sensitivity1 set (TPSIGAIN1*)0x16 R/W TP Sensitivity2 set (TPSIGAIN2*)0x17 R/W TP Speed set (TPSSPEED1*)0x18 R/W TP Speed set (TPSSPEED2*)0x19 R/W TP button quantity (TPKEYQUTY*)0x20 R Button status0 (KEY_MAP0*)0x21 R Button status1 (KEY_MAP1*)0x24 R/W Button operation mode (KEYOPER*)

0x25 R/W System operation mode (SYSOPER*)0x26 R/W Button de-bounce (KEYDEBMS*)

0x30~0x38 R/W Trigger level adjustment (FTN_X*)

* These are mnemonics for mapping to ALLPARS_REDEF.H and TPDEF.H file.

Date Sheet (V1.0) 10.25.2012 • 13


8.6 Registers Description

8.6.1 Address 0x00: Product ID

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0Product ID

R-0 R-1 R-0 R-1 R-0 R-0 R-1 R-0

Bit 7~0 (Product ID_0): Product ID is 0x52

8.6.2 Address 0x01: BOP Version

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0BOP Version

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

Bit 7~0 (Code Version): All 8 bit registers are definable. You can check the BOPversion number.

eSense IDE will load the BOP version into the register. You can check the BOPversion number.

8.6.3 Address 0x02: Serial Number

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0Serial Number

R-0 R-0 R-0 R-1 R-0 R-0 R-0 R-1

Bit 7~0 (Code Version): Serial Number is 0x11

8.6.4 Address 0x03: Firmware version

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0Code Version

R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-1

Bit 7~0 (Code Version): All 8 bit registers are definable. You can check thefirmware version number.

8.6.5 Address 0x05: General Configuration

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0SReset - - ReBuild - - - -R/W-0 R-0 R-0 R/W-0 R-0 R-0 R-0 R-0

Bit 7 (SReset): Software reset. When this bit is set to “1”, Reset function isexecuted immediately and clears the bit to “0” after reset iscompleted.

0: Reset completed

1: Execute reset

14 • Date Sheet (V1.0) 10.25.2012


Bits 6~5, 3 ~ 0: Not used bits. Set to “0” all the time.

Bit 4 (ReBuild): Touchpad pin assignment and function mode configuration.When ReBuild bit is set, the TP runs in pin and functionassignment modes. After the host changes the TPconfiguration content [0x00~0x2A] (by setting ReBuild bit from“0” to “1”), the TP pin assigned structure will rearrangeimmediately. Then the ReBuild bit will return to “0” whenthe change is completed.

NOTERegister 0x00~0x1F must rebuild after change.

0: ReBuildcompleted

1: ExecuteReBuild

8.6.6 Address 0x09: TPERR Bit

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0- - - - - TPTR TPOV -

R-0 R-0 R-0 R-0 R-0 R/W-0 R/W-0 R-0

Bits 7~3, 0: Not used bits. Set to “0” all the time.

Bit 2 (TPTR): TP transfer error. Need to increase Register 0x17, 0x18 TPtransfer time. (see Section 8.7.17/8.7.18).

Bit 1 (TPOV): TP gain overflow. Need to increase fraction factor of Register0x16 TP sensitivity2 (SST2_FC). For example; from 1/4 to 1/8(see Section 8.7.15/8.7.16).

8.6.7 Address 0x10: I2C Slave Address H

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0- - - - - - IA9 IA8R-0 R-0 R-0 R-0 R-0 R-0 WR-0 WR-0

Bit 7 ~ 2: Not used bits. Set to "0" all the time.

Bit 1 ~ 0 (IA9~8): Device address bits. Default is 0x00.

8.6.8 Address 0x11: I2C Slave Address L

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0IA7 IA6 IA5 IA4 IA3 IA2 IA1 IA0WR-0 WR-0 WR-0 WR-0 WR-0 WR-0 WR-0 WR-0

Bit 7 ~ 0 (IA7~0): HD6001 Device Slave address. Default is 0x60

Date Sheet (V1.0) 10.25.2012 • 15


8.6.9 Address 0x13: TP AS Pin Enable Bit

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0- - - - - ASEN - -R-0 R-0 WR-0 WR-0 WR-0 WR-0 R-0 R-0

Bit 7 ~ 3: Not used bits. Set to “0” all the time.

Bit 2 (ASEN): Active shield pin enable bit.

0: P76/AS pin actives as P76.

1: P76/AS pin actives as AS pin.


8.6.10 Address 0x14: TP Sense Pin Enable Bit

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0SEN3EN SEN2EN SEN1EN - - - - -R/W-0 R/W-0 R/W-0 R-0 R-0 R-0 R-0 R-0

Bit 7 (SEN3EN): TPSA3~TPSC3 enable control bits If to disable, the pin can be asGPIO pin

0: Disable

1: Enable TPSA3~TPSC3SEN3EN QN16/SOP16A/D16 pin Description

0Pin10 = P62Pin11 = P63Pin12 = P72

1Pin10 = TPSA3Pin11 = TPSB3Pin12 = TPSC3

Bit 6 (SEN2EN): TPSA2~TPSD2 enable control bits. If to disable, the pin can be asGPIO pin

0: Disable

1: Enable TPSA2~TPSD2SEN2EN QN16/SOP16A/D16 pin Description

0Pin13 = P64Pin14 = P65Pin15 = P66


Bit 5 (SEN1EN): TPSA1~TPSD1 enable control bits. If to disable, the pin can be asGPIO pin

0: Disable

1: Enable TPSA1~TPSD1

16 • Date Sheet (V1.0) 10.25.2012

SST2_MT Description00 101 210

411


SEN1EN QN16/SOP16A/D16 pin Description

0Pin16 = P50Piin1 = P51Pin2 = P52


Bit 4~0: Not used bits. Set to “0” all the time.

8.6.11 Address 0x15: TP SENSITIVITY1 SET

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0SST1


Bit 7 ~ 0 (SST1): TP sensitivity level selection; 0 is lowest, and 255 ishighest. For instance thick cover needs higher sensitivitylevel, while thin cover requires lower level. This settingwill also impact TP execution time, i.e., higher SST1 needslonger TP execution time, hence the button response isslower.

8.6.12 Address 0x16: TP SENSITIVITY2 SET

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0- - SST2_MT - SST2_FC


Bit 5 ~ 4 (SST2_MT): SST2_MT is the magnification of SST1; this is used forrough sensitivity adjustment, Its have three types ofmagnification, as show in the table below.

Bit 3 : Not used bits. Set to “0” all the time.

Bit 2 ~ 0 (SST2_FC): TP sensitivity fraction table select bits with a total of 0~ 7levels available selections. When SST2_FC valueequals to 1/28, it means TP has the lowest sensitivity andhighest stability. The opposite is when SST2_FACvalue is equal to 1/2 (see table below).

SENSITIVITY = (SST1* SST2_MT + 20)* SST2_FC

Date Sheet (V1.0) 10.25.2012 • 17


SST2_FC Description Note0 1/2 Lowest stability1 1/42 1/83 1/164 1/245 1/286 1/327 1/36 Highest stability

8.6.13 Address 0x17: TP SPEED1 SET

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0SPP_SE SPP11 SPP10 SPP9 SPP8

WR-0 WR-0 WR-0 WR-0 WR-0 WR-0 WR-0 WR-0

Bit 7 ~ 4 (SPP_SE): TP transfer setup time set; Each transfer need initial setuptime, and larger trace (route) require longer setup time.Totally 16 level can be set, 0 is shortest and 15 is longest,the longer setup time the TP data can be better.

SPEED_Se tup = (10us + SPP_SE * 0.5us)

Bit 3 ~ 0 (SP11~8): TP transfer time high 11~8bit.

8.6.14 Address 0x18: TP SPEED2 SET

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0SPP7 SPP6 SPP5 SPP4 SPP3 SPP2 SPP1 SPP0WR-0 WR-0 WR-0 WR-0 WR-0 WR-0 WR-0 WR-0

Bit 7 ~ 0 (SP7~0): TP transfer time set; totally 12 bit (SP11~0) range can beset, 0xFFF is longest and 0x000 is shortest. Thisparameter relates to layout size of the physical PCB trace.Therefore, the larger the PCB trace is, the longer transfertime it needs.

SPEED_Transfer = (200us + SPP * 0.5us)

8.6.15 Address 0x19: TP Button Quantity

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0- - - - TPQUTY

WR-0 WR-0 WR-0 WR-0 WR-0 WR-0 WR-0 WR-0

If to update the pin state of address 0x14, it must update the button quantity.


Bit 3 ~ 0 (TPQUTY): Select button quantity.

One-Line mode : Maximum is 9 buttons.

18 • Date Sheet (V1.0) 10.25.2012


8.6.16 Address 0x20: Button Status 0

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0Btn7 Btn6 Btn5 Btn4 Btn3 Btn2 Btn1 Btn0R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0

Bit 7 ~ 0 (Btn7 ~ Btn0): There are 8 bits representing Buttons 0 ~ 7 individual status.From the register, to get whether button is touched or untouched.You can read this register to check the button status

0: Button is untouched

1: Button is touched8.6.17 Address 0x21: Button Status 1

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0- - - - - - - Btn8R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0

Bit 7 ~ 1 : Unused bits. Read 0 only.Bit 0(Btn8): Button 8 status. From the bit to get whether button is touched or

untouched. You can read this register to check the buttonstatus0: Button is untouched

1: Button is touched

8.6.18 Address 0x24: Button Operation Mode

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0BtM1 BtM0 SBO - - - - -R/W-0 R/W-0 R-0 R-0 R-0 R-0 R-0 R-0

Bit 7 ~ 6 (BtM1 ~ 0): Button mode selectionBtM1 BtM0 Description Note

0 0 Multi-buttonmode

With serveral buttons enabled, buttons that exceed the setsenditivity trigger level(0x30~0x38) will have their status bitset to “1”.

0 1 First buttonmode

With several buttons enabled, the first button to surpass theset sensitivity trigger level(0x30~0x38) ; will have its statusbit set to “1”.

1 0 Strong buttonmode

With several buttons enabled and a number of buttonssurpass the set sensitivity trigger level(0x30~0x38) ; thebutton with the highest sensitivity will have its status bit setto “1”.

1 1 X

Bit 5(SBO): Strong button mode Option (Strong1/Strong2)0: Strong1. If key A already has been pressed, then key B pressed, too. If

the total keys (exclude key B) release and key B will behave.

1: Strong2. If key A already has been pressed, then key B pressed, too. If

the sensitivity of key B is large than key A, then key B will behave.Date Sheet (V1.0) 10.25.2012 • 19


Note : the sensitivity of key A/key B must be large than the trigger level. The key A/Brepresent the different key number.

Bit 4 ~ 0: Not used bits. Set to “0” all the time.8.6.19 Address 0x25: Power Mode Configure

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0- - - - - TP_IDLE TP_PWR_M2 TP_PWR_M1R-0 R-0 R-0 R-0 R-0 R/W-0 R/W-0 R/W-0

Bit 7 ~ 3: Not used bits. Set to “0” all the time.Bit 2 ~ 0 (TP_IDLE, TP_PWR_M2~M1): Operation mode selection

TP_IDLE TP_PWR_M2 TP_PWR_M1 Description Note0 0 0 TP runs at Normal mode.

0 0 1Sleep once. After wake-up, TPwill runs at Normal mode (SLEEPMODE1).

Under thismode, TPiswaked-up

2by I Cprotocol

0 1 0

TP will scan all button status. If nobutton is triggered, TP will go to Sleepmode again and wait for next wake-upsignal (SLEEP MODE2).

0 1 1

TP will run at Idle mode for about500ms, and wake-ups to Normal modeto scan all buttons. If no button istriggered, TP will return to Idle modeand wait for the next 500ms time out(IDLE MODE0).

In thismode, TPiswaked-upby Internaltimer timeout.

1 0 0


1 0 1


1 1 0

TP will run at Idle mode for about62.5ms, and wake-ups to Normal modeto scan all buttons. If no button istriggered, TP will return to Idle modeand wait for the next 62.5ms time out(IDLE MODE3).

1 1 1

TP will run at Idle mode about 32ms,and wake-ups to Normal mode to scanall buttons. If no button is triggered,TP will return to Idle mode and wait forthe next 32ms time out (IDLE MODE4).

20 • Date Sheet (V1.0) 10.25.2012

1ST 0x00 ~ 0x80 = FTN _ X *2

2ST 0x81 ~ 0xC0 = (FTN _ X −128)* 4 + 2563ST 0xC1 ~ 0xFF = (FTN _ X −192)*8+ 512


8.6.20 Address 0x26: Button De-Bounce Control

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0- Bounce Set

R-0 R-0 R-0 R-0 R/W-0 R/W-0 R/W-0 R/W-0

Bit 7 ~ 4: Not used bits. Set to “0” all the time..

Bit 3 ~ 0 (Bounce Set): These bits are the bounce time control for buttons. Thebounce time mechanism reduces noise interference on buttonstatus. The touchpad controller provides touch and releasede-bounce time control to resist noise effect. The followingfigure shows an example of detection with bounce Time = 2;meaning 2 consecutive samples are necessary to trigger thekey detection or 2 consecutive samples are necessary to endof detection.

64444444444444444744444444444444448

Fig.8-7 An Example of Bounce Time Operation

8.6.21 Address 0x30~0x38: Trigger Level Adjustment

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0FTN_0~FTN_8


To use the trigger level and get the button status. If the sensitivity is larger than thelevel, the relative bit of the button status will be “1”

Bit 7 ~ 0 (FTN_X): Adjustment of 16 8-bit value provided to the 16 keys, thehighest setting value is 0xFF, but the lowest is 0x00. There arethree stages to adjust the value of corresponding, 0x00~0x80 is

the first stage, 0x81~0xC0 is the second stage, and the restis the third-order. The following formula can be obtainedcorrect value.

Date Sheet (V1.0) 10.25.2012 • 21


8.7 Power-On Reset and InitializationAfter the touchpad is powered on, the HD6001controller will perform initialization.The initialization includes MCU and some parameter initialization. It takes at leastmore than 500ms to complete the initialization after power-up.

HD6001 ready to workHD6001 executepower-on inition

Figure 8-8 Power-on Reset and Initiate Timing Diagram

After HD6001 has completed the power-on initialization, you can start reading or2

writing HD6001 via I C protocol.

22 • Date Sheet (V1.0) 10.25.2012

HOST12 I2C_SDA3 I2C_SCL4

2 15


9 Application Circuits

9.1 1 Line application circuit

Activ e shield(AS) B2 B1 B0 B5 B4 B3 B8 B7 B6

VDD

U1

1 P51/TPSB1 P50/TPSA1 16

3 P52/TPSC1 P66/TPSC2 14CON1 RR R1

10KI2C_SCLI2C SDA

4P76/AS5 SCL

P65/TPSB2 13P64/TPSA2 12VDD

VDD

R210K

6SDA7VSS8TPC


VDD P80/INT1/RESET

Near VDDC3

C2 HD6001SO16A10u 0.1u 1u

Figure 9-1 HD6001 1 Line Application Circuits

Date Sheet (V1.0) 10.25.2012 • 23


APPENDIX

A Package Type

A.1 HD6001QN16

Symbol Min Normal MaxA 0.70 0.75 0.80A1 0.00 0.02 0.05A3 0.20 REFb 0.18 0.25 0.30D 2.90 3.00 3.10D2 1.10 - 1.80E 2.90 3.00 3.10E2 1.10 - 1.80e 0.5BSCL 0.30 0.40 0.40

Figure A-1 HD6001 16-Pin QFN Package Type

24 • Date Sheet (V1.0) 10.25.2012


A.2 HD6001SO16A

Symbal Min Normal MaxA 1.350 1.750A1 0.100 0.250A2 1.300 1.400 1.500b 0.330 0.510c 0.190 0.250E 3.800 4.000H 5.800 6.200D 9.800 10.000L 0.600 1.270e 1.27(TYP)θ 0 8

Figure A-2 HD6001 16-pin SOP Package Type

Date Sheet (V1.0) 10.25.2012 • 25

Symbal Min Normal MaxA 4.318A1 0.381A2 3.175 3.302 3.429c 0.203 0.254 0.356D 19.000 19.050 19.100E 6.174 6.401 6.628E1 7.370 7.620 7.870eB 8.510 9.020 9.530B 0.356 0.457 0.559B1 1.143 1.524 1.778L 3.048 3.302 3.556e 2.540(TYP)θ 0 15


A.3 HD6001D16

eB

TITLE:PDIP-16L 300MIL PACKAGE OUTLINEDIMENSION

File :D16

Edtion: A

Unit : mmScale: Free

Material:

Sheet:1 of 1

Figure A-3 HD6001 16-pin DIP Package Type

26 • Date Sheet (V1.0) 10.25.2012

C:Documents and SettingsAdministrator桌面修改规格书HD6001 ... · HD6001 Capacitive...

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