CC2642R SimpleLink™ Bluetooth 5 low energy Wireless MCU · TION 7 CC2642R SWRS194A –JANUARY...

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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,intellectual property matters and other important disclaimers. ADVANCE INFORMATION for pre-production products; subject tochange without notice.

CC2642RSWRS194A –JANUARY 2018–REVISED JULY 2018

CC2642R SimpleLink™ Bluetooth® 5 low energy Wireless MCU

1 Device Overview

1

1.1 Features1

• Microcontroller– Powerful Arm® Cortex®-M4F Processor– EEMBC CoreMark® Score: 148– Clock Speed Up to 48 MHz– 352KB of In-System Programmable Flash– 256KB of ROM for Protocols and Firmware– 8KB of Cache SRAM (Available as General-

Purpose RAM)– 80KB of Ultra-Low Leakage SRAM– 2-Pin cJTAG and JTAG Debugging– Supports Over-the-Air Upgrade (OTA)

• Ultra-Low Power Sensor Controller With 4KB ofSRAM– Sample, Store, and Process Sensor Data– Operation Independent From System CPU– Fast Wake-Up for Low-Power Operation

• TI-RTOS, Drivers, Bootloader, Bluetooth® 5 lowenergy Controller, and IEEE 802.15.4 MAC inROM for Optimized Application SizeTI-RTOS,Drivers, Bootloader, Bluetooth 5 low energyController in ROM for Optimized Application Size

• RoHS-Compliant Package– 7-mm × 7-mm RGZ VQFN48 (31 GPIOs)

• Peripherals– Digital Peripherals Can be Routed to Any GPIO– 4× 32-Bit or 8× 16-Bit General-Purpose Timers– 12-Bit ADC, 200 kSamples/s, 8 Channels– 2× Comparators With Internal Reference DAC

(1× Continuous Time, 1× Ultra-Low Power)– Programmable Current Source– 2× UART– 2× SSI (SPI, MICROWIRE, TI)– I2C– I2S– Real-Time Clock (RTC)– AES 128- and 256-bit Crypto Accelerator– ECC and RSA Public Key Hardware Accelerator– SHA2 Accelerator (Full Suite Up to SHA-512)– True Random Number Generator (TRNG)– Capacitive Sensing, Up to 8 Channels– Integrated Temperature and Battery Monitor

• External System– On-Chip Buck DC/DC Converter

• Low Power– Wide Supply Voltage Range: 1.8 V to 3.8 V– Active-Mode RX: 6.83 mA– Active-Mode TX: 7.5 mA– Active-Mode MCU 48 MHz (CoreMark):

3.3 mA (69 μA/MHz)– Sensor Controller 16-Hz Flow Metering:

1.7 µA– Sensor Controller 100-Hz Comp A Reading:

1.5 µA– Sensor Controller, 1-Hz ADC Sampling:

1 µA– Standby: 0.92 µA (RTC on, 80KB RAM and

CPU Retention)– Shutdown: 125 nA (Wakeup on External Events)

• Radio Section– 2.4-GHz RF Transceiver Compatible With

Bluetooth 5 low energy– Excellent Receiver Sensitivity:

–103 dBm for Bluetooth 5 low energy Coded,–97 dBm for 1-Mbps PHY

– Programmable Output Power Up to +5 dBm– Suitable for Systems Targeting Compliance With

Worldwide Radio Frequency Regulations– EN 300 328, (Europe)– EN 300 440 Class 2 (Europe)– FCC CFR47 Part 15 (US)– ARIB STD-T66 (Japan)

• Development Tools and Software– LAUNCHXL-CC26X2R1 Development Kit– SimpleLink CC26X2 Software Development Kit– SmartRF™ Software Studio for Simple Radio

Configuration– Sensor Controller Studio for Building Low-Power

Sensing Applications

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CC2642RSWRS194A –JANUARY 2018–REVISED JULY 2018 www.ti.com

Submit Documentation FeedbackProduct Folder Links: CC2642R

Device Overview Copyright © 2018, Texas Instruments Incorporated

1.2 Applications• Consumer Electronics• Mobile Phone Accessories• Sports and Fitness Equipment• HID Applications• Medical• Smart Grid and Automatic Meter Reading• Home and Building Automation• Wireless Alarm and Security Systems

• Industrial Monitoring and Control• Wireless Healthcare Applications• Wireless Sensor Networks• Active RFID• Energy Harvesting Applications• Electronic Shelf Label (ESL)• Long-Range Sensor Applications

(1) For the most current part, package, and ordering information for all available devices, see the Package Option Addendum in Section 9 ,or see the TI website.

1.3 DescriptionThe CC2642R device is a wireless MCU targeting Bluetooth 4 and 5 low energy applications.

The CC2642R device is a member of the CC26xx and CC13xx family of cost-effective, ultra-low power,2.4-GHz and Sub-1 GHz RF devices. Very low active RF and microcontroller (MCU) current, in addition tosub-μA sleep current with up to 80KB of RAM retention, provide excellent battery lifetime and allowoperation on small coin-cell batteries and in energy-harvesting applications.

The CC2642R device combines a flexible, very low-power RF transceiver with a powerful 48-MHz Arm®

Cortex®-M4F CPU in a platform supporting multiple physical layers and RF standards. A dedicated RadioController (Arm® Cortex®-M0) handles low-level RF protocol commands that are stored in ROM or RAM,thus ensuring ultra-low power and great flexibility. The low power consumption of the CC2642R devicedoes not come at the expense of RF performance; the CC2642R device has excellent sensitivity androbustness (selectivity and blocking) performance.

The CC2642R device is a highly integrated, true single-chip solution incorporating a complete RF systemand an on-chip DC/DC converter.

Sensors can be handled in a very low-power manner by a programmable, autonomous ultra-low powerSensor Controller CPU with 4KB of SRAM for program and data. The Sensor Controller, with its fastwake-up and ultra-low-power 2-MHz mode is designed for sampling, buffering, and processing bothanalog and digital sensor data; thus the MCU system can maximize sleep time and reduce active power.

The CC2642R device is part of the SimpleLink™ microcontroller (MCU) platform, which consists of Wi-Fi®,Bluetooth® low energy, Thread, Zigbee, Sub-1 GHz MCUs, and host MCUs, which all share a common,easy-to-use development environment with a single core software development kit (SDK) and rich tool set.A one-time integration of the SimpleLink platform enables you to add any combination of the portfolio’sdevices into your design, allowing 100 percent code reuse when your design requirements change. Formore information, visit ti.com/simplelink.

Device Information (1)

PART NUMBER PACKAGE BODY SIZE (NOM)CC2642R1FRGZ VQFN (48) 7.00 mm × 7.00 mm


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Main CPU

Up to 352KBFlash

with 8KB Cache

Sensor Interface

cJTAG

Up to80KBSRAM

256KBROM

Arm ®

Cortex ®-M4F Processor

LDO, Clocks, and ReferencesOptional DC/DC Converter

RF Core

Arm ®

Cortex ®-M0 Processor

DSP Modem

16KB SRAM

ROM

ULP Sensor Controller

Low-Power Comparator

12-bit ADC, 200 ks/s

Constant Current Source

SPI-I2C Digital Sensor IF

4KB SRAM

Time-to-Digital Converter

General Hardware Peripherals and Modules

4× 32-bit Timers

2× SSI (SPI)

Watchdog Timer

Temperature and Battery Monitor

RTC

I2C and I 2S

2× UART

32 ch. µDMA

31 GPIOs

AES-256, SHA2-512

ECC, RSA

ADC

ADC

Digital PLL

48 MHz69 µA/MHz

2.4 GHz

TRNG

CC26x2R

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3

CC2642Rwww.ti.com SWRS194A –JANUARY 2018–REVISED JULY 2018


Device OverviewCopyright © 2018, Texas Instruments Incorporated

1.4 Functional Block Diagram

Figure 1-1. CC2642R Block Diagram


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Revision History Copyright © 2018, Texas Instruments Incorporated

Table of Contents1 Device Overview ......................................... 1

1.1 Features .............................................. 11.2 Applications........................................... 21.3 Description............................................ 21.4 Functional Block Diagram ............................ 3

2 Revision History ......................................... 43 Device Comparison ..................................... 54 Terminal Configuration and Functions.............. 6

4.1 Pin Diagram – RGZ Package (Top Side View) ...... 64.2 Signal Descriptions – RGZ Package ................. 74.3 Connections for Unused Pins and Modules.......... 8

5 Specifications ............................................ 95.1 Absolute Maximum Ratings .......................... 95.2 ESD Ratings.......................................... 95.3 Recommended Operating Conditions ................ 95.4 Power Consumption - Power Modes ............... 105.5 Power Consumption - Radio Modes ............... 115.6 Nonvolatile (Flash) Memory Characteristics ........ 125.7 Bluetooth low energy — Receive (RX).............. 135.8 Bluetooth low energy — Transmit (TX) ............. 175.9 Thermal Resistance Characteristics ................ 185.10 Timing and Switching Characteristics ............... 195.11 Peripheral Characteristics ........................... 22

6 Detailed Description ................................... 296.1 Overview ............................................ 296.2 Functional Block Diagram........................... 29

6.3 System CPU ........................................ 306.4 Radio (RF Core)..................................... 316.5 Memory.............................................. 326.6 Sensor Controller ................................... 336.7 Cryptography ........................................ 346.8 Timers ............................................... 356.9 Serial Peripherals and I/O........................... 366.10 Battery and Temperature Monitor................... 366.11 µDMA................................................ 366.12 Debug ............................................... 366.13 Power Management................................. 376.14 Clock Systems ...................................... 386.15 Network Processor .................................. 38

7 Application, Implementation, and Layout ........ 397.1 LaunchPad™ Development Kit Reference Design . 39

8 Device and Documentation Support ............... 408.1 Tools and Software ................................. 408.2 Documentation Support ............................. 428.3 Community Resources .............................. 428.4 Trademarks.......................................... 438.5 Electrostatic Discharge Caution..................... 438.6 Glossary ............................................. 43

9 Mechanical, Packaging, and OrderableInformation .............................................. 439.1 Packaging Information .............................. 43

2 Revision HistoryNOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Original (January 2018) to Revision A Page


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Device ComparisonCopyright © 2018, Texas Instruments Incorporated

3 Device Comparison

Table 3-1. Device Family Overview

DEVICE RADIO SUPPORT FLASH(KB)

RAM(KB) GPIO PACKAGE SIZE

CC1312R Sub-1 GHz 352 80 30 RGZ (7-mm × 7-mm VQFN48)

CC1352PDual-band (2.4-GHz and Sub-1 GHz)

Multiprotocol+20-dBm high-power amplifier

352 80 26 RGZ (7-mm × 7-mm VQFN48)

CC1352R Dual-band (2.4-GHz and Sub-1 GHz)Multiprotocol 352 80 28 RGZ (7-mm × 7-mm VQFN48)

CC2642R Bluetooth 5 low energy2.4-GHz proprietary FSK-based formats 352 80 31 RGZ (7-mm × 7-mm VQFN48)

CC2652R

MultiprotocolBluetooth 5 low energy

ZigbeeThread

2.4-GHz proprietary FSK-based formats

352 80 31 RGZ (7-mm × 7-mm VQFN48)

CC1310 Sub-1 GHz 32–128 16–20 10–31RGZ (7-mm × 7-mm VQFN48)RHB (5-mm × 5-mm VQFN32)RSM (4-mm × 4-mm VQFN32)

CC1350 Sub-1 GHzBluetooth 5 low energy 128 20 10–31

RGZ (7-mm × 7-mm VQFN48)RHB (5-mm × 5-mm VQFN32)RSM (4-mm × 4-mm VQFN32)

CC2640R2 Bluetooth 5 low energy2.4-GHz proprietary FSK-based formats 128 20 10–31

RGZ (7-mm × 7-mm VQFN48)RHB (5-mm × 5-mm VQFN32)RSM (4-mm × 4-mm VQFN32)

YFV (2.7-mm × 2.7-mm DSBGA34)


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40 39 38 37

21 22 23 24

DCDC_SW33

DIO_18

34

RESET_N35

DIO_2336

X32K_Q2 4

X32K_Q1 3

RF_N 2

RF_P 1

DIO_2232

DIO_2131

DIO_2030

DIO_1929

DIO_0 5

DIO_1 6

DIO_2 7

8

28

27

26

JTAG_TCKC25

9

10

11

12

41424344

20

DIO

_15

19

DIO

_14

1817

45464748

16151413

DIO_17

DIO_16

VDDS_DCDC

DIO

_12

DIO

_13

VD

DS

2

DIO

_11

DIO

_10

DIO_5

DIO_6

DIO_7

DIO_3

DIO_4

DIO

_8

DIO

_9

VD

DS

3

DC

OU

PL

JTA

G_T

MS

C

DIO

_25

DIO

_24

VD

DR

VD

DR

_RF

DIO

_26

X48

M_P

X48

M_N

DIO

_28

DIO

_29

DIO

_30

DIO

_27

VD

DS

6



Terminal Configuration and Functions Copyright © 2018, Texas Instruments Incorporated

4 Terminal Configuration and Functions

4.1 Pin Diagram – RGZ Package (Top Side View)

Figure 4-1. RGZ (7-mm × 7-mm) Pinout, 0.5-mm Pitch

The following I/O pins marked in Figure 4-1 in bold have high-drive capabilities:• Pin 10, DIO_5• Pin 11, DIO_6• Pin 12, DIO_7• Pin 24, JTAG_TMSC• Pin 26, DIO_16• Pin 27, DIO_17

The following I/O pins marked in Figure 4-1 in italics have analog capabilities:• Pin 36, DIO_23• Pin 37, DIO_24• Pin 38, DIO_25• Pin 39, DIO_26• Pin 40, DIO_27• Pin 41, DIO_28• Pin 42, DIO_29• Pin 43, DIO_30


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Terminal Configuration and FunctionsCopyright © 2018, Texas Instruments Incorporated

(1) For more details, see technical reference manual listed in Section 8.2.(2) Do not supply external circuitry from this pin.(3) If internal DC/DC converter is not used, this pin is supplied internally from the main LDO.

4.2 Signal Descriptions – RGZ Package

Table 4-1. Signal Descriptions – RGZ Package

PINI/O TYPE DESCRIPTION

NAME NO.DCDC_SW 33 — Power Output from internal DC/DC converter (1)

DCOUPL 23 — Power 1.27-V regulated digital-supply (decoupling capacitor) (2)

DIO_0 5 I/O Digital GPIO, Sensor ControllerDIO_1 6 I/O Digital GPIO, Sensor ControllerDIO_2 7 I/O Digital GPIO, Sensor ControllerDIO_3 8 I/O Digital GPIO, Sensor ControllerDIO_4 9 I/O Digital GPIO, Sensor ControllerDIO_5 10 I/O Digital GPIO, Sensor Controller, high-drive capabilityDIO_6 11 I/O Digital GPIO, Sensor Controller, high-drive capabilityDIO_7 12 I/O Digital GPIO, Sensor Controller, high-drive capabilityDIO_8 14 I/O Digital GPIODIO_9 15 I/O Digital GPIODIO_10 16 I/O Digital GPIODIO_11 17 I/O Digital GPIODIO_12 18 I/O Digital GPIODIO_13 19 I/O Digital GPIODIO_14 20 I/O Digital GPIODIO_15 21 I/O Digital GPIODIO_16 26 I/O Digital GPIO, JTAG_TDO, high-drive capabilityDIO_17 27 I/O Digital GPIO, JTAG_TDI, high-drive capabilityDIO_18 28 I/O Digital GPIODIO_19 29 I/O Digital GPIODIO_20 30 I/O Digital GPIODIO_21 31 I/O Digital GPIODIO_22 32 I/O Digital GPIODIO_23 36 I/O Digital or Analog GPIO, Sensor Controller, analogDIO_24 37 I/O Digital or Analog GPIO, Sensor Controller, analogDIO_25 38 I/O Digital or Analog GPIO, Sensor Controller, analogDIO_26 39 I/O Digital or Analog GPIO, Sensor Controller, analogDIO_27 40 I/O Digital or Analog GPIO, Sensor Controller, analogDIO_28 41 I/O Digital or Analog GPIO, Sensor Controller, analogDIO_29 42 I/O Digital or Analog GPIO, Sensor Controller, analogDIO_30 43 I/O Digital or Analog GPIO, Sensor Controller, analogEGP — — GND Ground – exposed ground padJTAG_TMSC 24 I/O Digital JTAG TMSC, high-drive capabilityJTAG_TCKC 25 I Digital JTAG TCKCRESET_N 35 I Digital Reset, active low. No internal pullup resistor

RF_P 1 — RF Positive RF input signal to LNA during RXPositive RF output signal from PA during TX

RF_N 2 — RF Negative RF input signal to LNA during RXNegative RF output signal from PA during TX

VDDR 45 — Power 1.7-V to 1.95-V supply, typically connect to output of internalDC/DC converter (3) (2)


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Terminal Configuration and Functions Copyright © 2018, Texas Instruments Incorporated

Table 4-1. Signal Descriptions – RGZ Package (continued)PIN

I/O TYPE DESCRIPTIONNAME NO.

(4) If internal DC/DC converter is not used, this pin must be connected to VDDR for supply from the main LDO.

VDDR_RF 48 — Power 1.7-V to 1.95-V supply, typically connect to output of internalDC/DC converter (4) (2)

VDDS 44 — Power 1.8-V to 3.8-V main chip supply (1)

VDDS2 13 — Power 1.8-V to 3.8-V DIO supply (1)

VDDS3 22 — Power 1.8-V to 3.8-V DIO supply (1)

VDDS_DCDC 34 — Power 1.8-V to 3.8-V DC/DC converter supplyX48M_N 46 — Analog 48-MHz crystal oscillator pin 1X48M_P 47 — Analog 48-MHz crystal oscillator pin 2X32K_Q1 3 — Analog 32-kHz crystal oscillator pin 1X32K_Q2 4 — Analog 32-kHz crystal oscillator pin 2

(1) NC = No connect(2) When the DC/DC converter is not used, the inductor between DCDC_SW and VDDR can be removed. VDDR and VDDR_RF must still

be connected and the VDDR decoupling capacitor must connected and moved close to VDDR.

4.3 Connections for Unused Pins and Modules

Table 4-2. Connections for Unused Pins

FUNCTION SIGNAL NAME PIN NUMBER ACCEPTABLEPRACTICE (1)

PREFERREDPRACTICE (1)

GPIO DIO_n

5–1214–2126–3236–43

NC or GND NC

32.768-kHz crystal X32K_Q1X32K_Q2 3–4 NC NC

DC/DC converter (2) DCDC_SW 33 NC NCVDDS_DCDC 34 VDDS VDDS


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SpecificationsCopyright © 2018, Texas Instruments Incorporated

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under Recommended OperatingConditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to ground, unless otherwise noted.(3) VDDS2 and VDDS3 must be at the same potential as VDDS.(4) Including analog capable DIO.

5 Specifications

5.1 Absolute Maximum Ratingsover operating free-air temperature range (unless otherwise noted) (1) (2)

MIN MAX UNITVDDS (3) Supply voltage –0.3 4.1 V

Voltage on any digital pin (4) –0.3 VDDS + 0.3, max 4.1 VVoltage on crystal oscillator pins, X32K_Q1, X32K_Q2, X48M_N and X48M_P –0.3 VDDR + 0.3, max 2.25 V

Vin Voltage on ADC inputVoltage scaling enabled –0.3 VDDS

VVoltage scaling disabled, internal reference –0.3 1.49Voltage scaling disabled, VDDS as reference –0.3 VDDS / 2.9

Input level, RF pins 5 dBmTstg Storage temperature –40 150 °C

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

5.2 ESD RatingsVALUE UNIT

VESDElectrostaticdischarge

Human body model (HBM), per ANSI/ESDA/JEDEC JS001 (1)X48_NX48_P

±2000 V

All other pins ±2000 V

Charged device model (CDM), per JESD22-C101 (2)X48_NX48_P

±500 V

All other pins ±500 V

(1) For small coin-cell batteries, with high worst-case end-of-life equivalent source resistance, a 22-µF VDDS input capacitor must be usedto ensure compliance with this slew rate.

5.3 Recommended Operating Conditionsover operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

Ambient temperature –40 85 °C

Operating supply voltage (VDDS) 1.8 3.8 V

Rising supply voltage slew rate 0 100 mV/µs

Falling supply voltage slew rate (1) 0 20 mV/µs


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Specifications Copyright © 2018, Texas Instruments Incorporated

(1) Adds to core current Icore for each peripheral unit activated.(2) Iperi is not supported in Standby or Shutdown modes.

5.4 Power Consumption - Power ModesMeasured on a Texas Instruments reference design with Tc = 25°C, VDDS = 3.0 V withDC/DC enabled unless otherwise noted.

PARAMETER TEST CONDITIONS TYP UNITCORE CURRENT CONSUMPTION

IcoreCore currentconsumption

Reset and ShutdownReset. RESET_N pin asserted or VDDS below power-on-reset threshold 100

nAShutdown. No clocks running, no retention 105

Standby without cacheretention

RTC running, CPU, 80KB RAM and (partial) registerretention.RCOSC_LF

0.9 µA

RTC running, CPU, 80KB RAM and (partial) registerretentionXOSC_LF

0.99 µA

Standby with cacheretention

RTC running, CPU, 80KB RAM and (partial) registerretention.RCOSC_LF

2.82 µA

RTC running, CPU, 80KB RAM and (partial) registerretention.XOSC_LF

2.94 µA

Idle Supply Systems and RAM powered 661 µAActive MCU running CoreMark at 48 MHz 3.32 mA

PERIPHERAL CURRENT CONSUMPTION (1) (2)

Iperi

Peripheral power domain Delta current with domain enabled

µA

Serial power domain Delta current with domain enabled

RF Core Delta current with power domain enabled,clock enabled, RF core idle

µDMA Delta current with clock enabled, module is idleTimers Delta current with clock enabled, module is idleI2C Delta current with clock enabled, module is idleI2S Delta current with clock enabled, module is idleSSI Delta current with clock enabled, module is idleUART Delta current with clock enabled, module is idleCRYPTO Delta current with clock enabled, module is idle


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5.5 Power Consumption - Radio ModesMeasured on a Texas Instruments reference design with Tc = 25°C, VDDS = 3.0 V withDC/DC enabled unless otherwise noted.

PARAMETER TEST CONDITIONS TYP UNITRadio receive current 2440 MHz 6.9 mA

Radio transmit current

0-dBm output power2440 MHz 7.5 mA

+5-dBm output power2440 MHz 9.8 mA


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(1) Each row is 2048 bits (or 256 bytes) wide. This limitation corresponds to sequential memory writes of 4 (3.1) bytes minimum per writeover a whole flash sector before a sector erase is required.

(2) This number is dependent on Flash aging and increases over time and erase cycles.

5.6 Nonvolatile (Flash) Memory Characteristicsover operating free-air temperature range and VDDS = 3.0 V (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNITFlash sector size 8 KBSupported flash erase cycles before failure, full bank 30 k CyclesSupported flash erase cycles before failure, singlesector 60 k Cycles

Maximum number of write operations per row beforesector erase (1) 83 write

operations

Flash retention 105 °C 11.4 years at105 °C

Flash sector erase current Average delta current 10.4 mAFlash sector erase time (2) 8 msFlash write current Average delta current, 4 bytes at a time 6 mAFlash write time (2) 4 bytes at a time 21 µs


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(1) Numbers given as I/C dB.(2) Excluding one exception at Fwanted / 2, per Bluetooth Specification.

5.7 Bluetooth low energy — Receive (RX)Measured on a Texas Instruments reference design with Tc = 25°C, VDDS = 3.0 V, fRF= 2440 MHz withDC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TXpath.All measurements are performed conducted.

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT125-kbps (Bluetooth 5 coded)Receiver sensitivity Differential mode. BER = 10–3 -103 dBmReceiver saturation Differential mode. BER = 10–3 >5 dBm

Frequency error tolerance Difference between the incoming carrier frequencyand the internally generated carrier frequency -260 310 kHz

Data rate error tolerance Difference between incoming data rate and theinternally generated data rate (37-byte packets) -260 260 ppm


Co-channel rejection (1)Wanted signal at –79 dBm, modulated interferer inchannel,BER = 10–3

-3 dB

Selectivity, ±1 MHz (1)Wanted signal at –79 dBm, modulated interferer at±1 MHz,BER = 10–3

9 / 5 (1) dB


43 / 32 (1) dB


47 / 42 (1) dB


46 / 47 (1) dB

Selectivity, ±6 MHz (1)Wanted signal at –79 dBm, modulated interferer at≥ ±6 MHz,BER = 10–3

49 / 46 (1) dB

Alternate channel rejection, ±7MHz

Wanted signal at –79 dBm, modulated interferer at≥ ±7 MHz,BER = 10–3

50 / 47 (1) dB

Selectivity, Image frequency (1)Wanted signal at –79 dBm, modulated interferer atimage frequency,BER = 10–3

32 dB

Selectivity, Image frequency ±1MHz (1)

Note that Image frequency + 1 MHz is the Co-channel –1 MHz. Wanted signal at –79 dBm,modulated interferer at ±1 MHz from imagefrequency,BER = 10–3

5 / 32 (1) dB

Blocker rejection, ±8 MHz andabove (1)

Wanted signal at –79 dBm, modulated interferer at≥ ±8 MHz and above,BER = 10–3

> 46 dB

Out-of-band blocking (2) 30 MHz to 2000 MHz -40 dBmOut-of-band blocking 2003 MHz to 2399 MHz -19 dBmOut-of-band blocking 2484 MHz to 2997 MHz -22 dBm

IntermodulationWanted signal at 2402 MHz, –76 dBm. Twointerferers at 2405 and 2408 MHz respectively, atthe given power level

-42 dBm

500-kbps (Bluetooth 5 coded)Receiver sensitivity Differential mode. BER = 10–3 -101 dBmReceiver saturation Differential mode. BER = 10–3 > 5 dBm


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Bluetooth low energy — Receive (RX) (continued)Measured on a Texas Instruments reference design with Tc = 25°C, VDDS = 3.0 V, fRF= 2440 MHz withDC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TXpath.All measurements are performed conducted.

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Frequency error tolerance Difference between the incoming carrier frequencyand the internally generated carrier frequency -240 240 kHz




-5 dB


9 / 5 (1) dB


41 / 31 (1) dB


44 / 41 (1) dB


44 / 44 (1) dB

Selectivity, ±6 MHz (1)Wanted signal at –79 dBm, modulated interferer at≥ ±6 MHz,BER = 10–3

44 / 44 (1) dB

Alternate channel rejection, ±7MHz

Wanted signal at –79 dBm, modulated interferer at≥ ±7 MHz,BER = 10–3

44 / 44 (1) dB


31 dB

Selectivity, Image frequency ±1MHz (1)

Note that Image frequency + 1 MHz is the Co-channel –1 MHz. Wanted signal at –79 dBm,modulated interferer at ±1 MHz from imagefrequency,BER = 10–3

5 / 41 (1) dB

Blocker rejection, ±8 MHz andabove

Wanted signal at –79 dBm, modulated interferer at≥ ±8 MHz and above,BER = 10–3

44 dB

Out-of-band blocking (2) 30 MHz to 2000 MHz -35 dBmOut-of-band blocking 2003 MHz to 2399 MHz -19 dBmOut-of-band blocking 2484 MHz to 2997 MHz -19 dBm


-37 dBm

1-Mbps 2-GFSK (Bluetooth 4 and Bluetooth 5 low energy)Receiver sensitivity Differential mode. BER = 10–3 –97 dBmReceiver saturation Differential mode. BER = 10–3 4 dBm

Frequency error tolerance Difference between the incoming carrier frequencyand the internally generated carrier frequency –350 350 kHz

Data rate error tolerance Difference between incoming data rate and theinternally generated data rate –750 750 ppm


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(3) X / Y, where X is +N MHz and Y is –N MHz.(4) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2

(Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).


–6 dB


7 / 3 (3) dB


34 / 25 (3) dB


38 / 26 (3) dB


42 / 29 (3) dB

Selectivity, ±5 MHz or more (1) Wanted signal at –67 dBm, modulated interferer at≥ ±5 MHz, BER = 10–3 32 dB


25 dB

Selectivity, Image frequency±1 MHz (1)

Wanted signal at –67 dBm, modulated interferer at±1 MHz from image frequency, BER = 10–3 3 / 26 (3) dB

Out-of-band blocking (2) 30 MHz to 2000 MHz –20 dBmOut-of-band blocking 2003 MHz to 2399 MHz –5 dBmOut-of-band blocking 2484 MHz to 2997 MHz –8 dBmOut-of-band blocking 3000 MHz to 12.75 GHz –8 dBm


–34 dBm

Spurious emissions,30 to 1000 MHz (4) Measurement in a 50-Ω single-ended load. –71 dBm

Spurious emissions,1 to 12.75 GHz (4) Measurement in a 50 Ω single-ended load. –62 dBm

RSSI dynamic range 70 dBRSSI accuracy dB2-Mbps 2-GFSK (Bluetooth 5)

Receiver sensitivity Differential mode. Measured at SMA connector,BER = 10–3 –92 dBm

Receiver saturation Differential mode. Measured at SMA connector,BER = 10–3 4 dBm

Frequency error tolerance Difference between the incoming carrier frequencyand the internally generated carrier frequency –300 500 kHz

Data rate error tolerance Difference between incoming data rate and theinternally generated data rate –1000 1000 ppm


–7 dB

Selectivity, ±2 MHz (1)Wanted signal at –67 dBm, modulated interferer at±2 MHz, Image frequency is at –2 MHzBER = 10–3

8 / 4 (3) dB


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31 / 26 (3) dB


37 / 38 (3) dB

Alternate channel rejection, ±7MHz (1)

Wanted signal at –67 dBm, modulated interferer at≥ ±7 MHz, BER = 10–3 37 / 36 (3) dB


4 dB

Selectivity, Image frequency±2 MHz (1)

Note that Image frequency + 2 MHz is the Co-channel. Wanted signal at –67 dBm, modulatedinterferer at ±2 MHz from image frequency, BER =10–3

–7 / 26 (3) dB

Out-of-band blocking (2) 30 MHz to 2000 MHz –33 dBmOut-of-band blocking 2003 MHz to 2399 MHz –15 dBmOut-of-band blocking 2484 MHz to 2997 MHz –12 dBmOut-of-band blocking 3000 MHz to 12.75 GHz –10 dBm


–45 dBm


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(1) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2(Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).

5.8 Bluetooth low energy — Transmit (TX)Measured on a Texas Instruments reference design with Tc = 25°C, VDDS = 3.0 V, fRF= 2440 MHz withDC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TXpath.All measurements are performed conducted.

PARAMETER TEST CONDITIONS MIN TYP MAX UNITGeneral ParametersMax output power Differential mode, delivered to a single-ended 50 Ω load through a balun 5 dBmOutput powerprogrammablerange

Differential mode, delivered to a single-ended 50 Ω load through a balun 26 dB

Output powervariation overtemperature

Over recommended temperature operating range dB

Spurious emissions and harmonics

Spuriousemissions (1)

f < 1 GHz, outside restrictedbands +5-dBm setting –43 dBm

f < 1 GHz, restricted bandsETSI +5-dBm setting –65 dBm

f < 1 GHz, restricted bandsFCC +5-dBm setting –76 dBm

f > 1 GHz, including harmonics +5-dBm setting –46 dBm

Harmonics (1)

Second harmonic +5-dBm setting dBmThird harmonic +5-dBm setting dBmFourth harmonic +5-dBm setting dBmFifth harmonic +5-dBm setting dBm


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(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.(2) °C/W = degrees Celsius per watt.

5.9 Thermal Resistance Characteristics

THERMAL METRIC (1)

PACKAGE

UNIT (2)RGZ(VQFN)48 PINS

RθJA Junction-to-ambient thermal resistance 23.4 °C/WRθJC(top) Junction-to-case (top) thermal resistance 13.3 °C/WRθJB Junction-to-board thermal resistance 8.0 °C/WψJT Junction-to-top characterization parameter 0.1 °C/WψJB Junction-to-board characterization parameter 7.9 °C/WRθJC(bot) Junction-to-case (bottom) thermal resistance 1.7 °C/W


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5.10 Timing and Switching Characteristics

Table 5-1. Reset TimingPARAMETER MIN TYP MAX UNIT

RESET_N low duration 1 µs

(1) Duration of wakeup sequence is dependent on VDDR capacitor size and remaining charge on VDDR capacitor when starting the deviceagain.

Table 5-2. Wakeup Timing (1)

Measured over operating free-air temperature with VDDS = 3.0 V (unless otherwise noted). The times listed here do notinclude software overhead.

PARAMETER TEST CONDITIONS MIN TYP MAX UNITMCU, Reset to Active 750-2500 µsMCU, Shutdown to Active 750-2500 µsMCU, Standby to Active 160 µsMCU, Active to Standby 36 µsMCU, Idle to Active 14 µs


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5.10.1 Clock Specifications

(1) Probing or otherwise stopping the crystal while the DC/DC converter is enabled may cause permanent damage to the device.(2) Adjustable load capacitance is integrated into the device.(3) On-chip default connected capacitance including reference design parasitic capacitance. Connected internal capacitance is changed

through software in the Customer Configuration section (CCFG)(4) Startup time number requires use of TI-provided power driver which performs clock calibration every crystal startup. Startup time may

increase if driver is not used.

Table 5-3. 48-MHz Crystal Oscillator (XOSC_HF)Measured on a Texas Instruments reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. (1)

PARAMETER MIN TYP MAX UNITCrystal frequency 48 MHz

ESR Equivalent series resistance 60 Ω

LMMotional inductance, relates to the load capacitance that is used for thecrystal (CL in Farads) < 0.5 × 10–24 / C2

L H

CL Crystal load capacitance (2) 5 7 (3) 9 pFStart-up time (4) 250 µs

(1) Probing or otherwise stopping the crystal while the DC/DC converter is enabled may cause permanent damage to the device.(2) Default load capacitance using TI reference designs including parasitic capacitance. Crystals with different load capacitance may be

used.

Table 5-4. 32.768-kHz Crystal Oscillator (XOSC_LF)Measured on a Texas Instruments reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. (1)

MIN TYP MAX UNITCrystal frequency 32.768 kHz

ESR Equivalent series resistance 30 100 kΩCL Crystal load capacitance 6 7 (2) 12 pF

(1) Accuracy relatively to the calibration source (XOSC_HF).

Table 5-5. 48-MHz RC Oscillator (RCOSC_HF)Measured on a Texas Instruments reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.

MIN TYP MAX UNITFrequency 48 MHzUncalibrated frequency accuracy ±1 %Calibrated frequency accuracy (1) ±0.25 %Start-up time 5 µs

Table 5-6. 2-MHz RC Oscillator (RCOSC_MF)Measured on a Texas Instruments reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.

MIN TYP MAX UNITCalibrated frequency 2 MHzStart-up time 5 µs

Table 5-7. 32-kHz RC Oscillator (RCOSC_LF)Measured on the Texas Instruments reference design with Tc = 25°C,VDDS = 3.0 V, unless otherwise noted.

MIN TYP MAX UNITCalibrated frequency 32.768 kHzTemperature coefficient 50 ppm/°C


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0

SSIClk

SSIFss

SSITx

SSIRx

MSB LSB

MSB LSB

S2

S3

S1

8-bit control

4 to 16 bits output data

SSIClk

SSIFss

SSITx

SSIRxMSB LSB

S2

S3

S1

4 to 16 bits

21




5.10.2 Synchronous Serial Interface (SSI) Characteristics

(1) When using the TI-provided Power driver, the SSI system clock is always 48 MHz.(2) Refer to SSI timing diagrams Figure 5-1, Figure 5-2, and Figure 5-3.

Table 5-8. Synchronous Serial Interface (SSI) Characteristicsover operating free-air temperature range (unless otherwise noted)

PARAMETERNO. PARAMETER MIN TYP MAX UNIT

S1 tclk_per SSIClk cycle time 12 65024 system clocks (1)

S2 (2) tclk_high SSIClk high time 0.5 tclk_per

S3 (2) tclk_low SSIClk low time 0.5 tclk_per

Figure 5-1. SSI Timing for TI Frame Format (FRF = 01), Single Transfer Timing Measurement

Figure 5-2. SSI Timing for MICROWIRE Frame Format (FRF = 10), Single Transfer


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SSIClk(SPO = 1)

SSITx(Master)

SSIRx(Slave) LSB

SSIClk(SPO = 0)

S2

S1

SSIFss

LSB

S3

MSB

MSB

22




Figure 5-3. SSI Timing for SPI Frame Format (FRF = 00), With SPH = 1

5.10.3 UART

Table 5-9. UART Characteristicsover operating free-air temperature range (unless otherwise noted)

PARAMETER MIN TYP MAX UNITUART rate 3 MBaud

5.11 Peripheral Characteristics


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5.11.1 ADC

(1) Using IEEE Std 1241-2010 for terminology and test methods.(2) Input signal scaled down internally before conversion, as if voltage range was 0 to 4.3 V.(3) No missing codes. Positive DNL typically varies up to 1.8 LSB, depending on device.(4) Applied voltage must be within Absolute Maximum Ratings (see Section 5.1) at all times.

Table 5-10. ADC CharacteristicsTc = 25°C, VDDS = 3.0 V and voltage scaling enabled, unless otherwise noted. (1)

PARAMETER TEST CONDITIONS MIN TYP MAX UNITInput voltage range 0 VDDS VResolution 12 BitsSample rate 200 kSamples/sOffset Internal 4.3-V equivalent reference (2) 2 LSBGain error Internal 4.3-V equivalent reference (2) 7.8 LSB

DNL (3) Differential nonlinearity >–1 LSBINL Integral nonlinearity ±4 LSB

ENOB Effective number of bits

Internal 4.3-V equivalent reference (2), 200 kSamples/s,9.6-kHz input tone 9.5

BitsVDDS as reference, 200 kSamples/s, 9.6-kHz inputtone 9.8

Internal 1.48-V reference, voltage scaling disabled,32 samples average, 200 kSamples/s, 300-Hz inputtone

9.9

THD Total harmonic distortion

Internal 4.3-V equivalent reference (2), 200 kSamples/s,9.6-kHz input tone –64

dBVDDS as reference, 200 kSamples/s, 9.6-kHz inputtone –68


–72

SINAD,SNDR

Signal-to-noiseandDistortion ratio

Internal 4.3-V equivalent reference (2), 200 kSamples/s,9.6-kHz input tone 59

dBVDDS as reference, 200 kSamples/s, 9.6-kHz inputtone 61


68

SFDR Spurious-free dynamicrange

Internal 4.3-V equivalent reference (2), 200 kSamples/s,9.6-kHz input tone 69

dBVDDS as reference, 200 kSamples/s, 9.6-kHz inputtone 72


75

Conversion time Serial conversion, time-to-output, 24-MHz clock 50 clock-cyclesCurrent consumption Internal 4.3-V equivalent reference (2) 0.69 mACurrent consumption VDDS as reference 0.93 mA

Reference voltage

Equivalent fixed internal reference (input voltagescaling enabled). For best accuracy, the ADCconversion should be initiated through the TI-RTOSAPI in order to include the gain/offset compensationfactors stored in FCFG1.

4.3 (2) (4) V

Reference voltage

Fixed internal reference (input voltage scalingdisabled). For best accuracy, the ADC conversionshould be initiated through the TI-RTOS API in order toinclude the gain/offset compensation factors stored inFCFG1. This value is derived from the scaled value(4.3 V) as follows:Vref = 4.3 V × 1408 / 4095

1.48 V


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Table 5-10. ADC Characteristics (continued)Tc = 25°C, VDDS = 3.0 V and voltage scaling enabled, unless otherwise noted.(1)


Reference voltage VDDS as reference (Also known as RELATIVE) (inputvoltage scaling enabled) VDDS V

Reference voltage VDDS as reference (Also known as RELATIVE) (inputvoltage scaling disabled)

VDDS /2.82 (4) V

Input impedance200 kSamples/s, voltage scaling enabled. Capacitiveinput, Input impedance depends on sampling frequencyand sampling time

>1 MΩ


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5.11.2 Temperature and Battery Monitor

(1) Automatically compensated when using supplied driver libraries.

Table 5-11. Temperature SensorMeasured on a Texas Instruments reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.

PARAMETER TEST CONDITIONS MIN TYP MAX UNITResolution 2 °CMeasurement range –40 85 °CAccuracy -40 °C 4.4 °CAccuracy 25 °C 1.9 °CAccuracy 85 °C 1.8 °CSupply voltage coefficient (1) 3.8 °C/V

Table 5-12. Battery MonitorMeasured on a Texas Instruments reference design with Tc = 25°C, unless otherwise noted.

PARAMETER TEST CONDITIONS MIN TYP MAX UNITResolution 25 mVRange 1.8 3.8 VINL (max) 23 mVAccuracy VDDS = 3.0 V 22.5 mVOffset error -32 mVGain error -1 %


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5.11.3 Comparators

(1) The comparator can use the output of an internal DAC as its reference. Reference voltages can be derived from VDDS, DCOUPL(1.28V), and the internal ADC reference.

Table 5-13. Continuous Time ComparatorTc = 25°C, VDDS = 3.0 V, unless otherwise noted.

PARAMETER TEST CONDITIONS MIN TYP MAX UNITInput voltage range 0 VDDS VExternal reference voltage 0 VDDS V

Internal reference voltage (1) Using internal DAC with VDDS as referencevoltage, DAC code = 0-255 0 - 2.78 V

Offset ±4 mVHysteresis < 2 mV

(1) The comparator can use the output of an internal DAC as its reference. Reference voltages can be derived from VDDS, DCOUPL(1.28V), and the internal ADC reference.

Table 5-14. Low-Power Clocked ComparatorTc = 25°C, VDDS = 3.0 V, unless otherwise noted.

PARAMETER TEST CONDITIONS MIN TYP MAX UNITInput voltage range 0 VDDS VClock frequency 32.768 kHz

Internal reference voltage (1) Using internal DAC with VDDS as referencevoltage, DAC code = 0-255 0 - 2.78 V

5.11.4 Current Source

(1) Additionally, the bias module must be enabled when running in standby mode.

Table 5-15. Programmable Current SourceTc = 25°C, VDDS = 3.0 V, unless otherwise noted.

PARAMETER TEST CONDITIONS MIN TYP MAX UNITCurrent source programmable output range(logarithmic range) 0.25 to 20 µA

Resolution 0.25 µA

Current consumption (1) Including current source at maximumprogrammable output 21 µA


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5.11.5 GPIO

Table 5-16. GPIO DC CharacteristicsPARAMETER TEST CONDITIONS MIN TYP MAX UNIT

TA = 25°C, VDDS = 1.8 VGPIO VOH at 8-mA load IOCURR = 2, high-drive GPIOs only 1.54 VGPIO VOL at 8-mA load IOCURR = 2, high-drive GPIOs only 0.25 VGPIO VOH at 4-mA load IOCURR = 1 1.58 VGPIO VOL at 4-mA load IOCURR = 1 0.21 VGPIO pullup current Input mode, pullup enabled, Vpad = 0 V 68 µAGPIO pulldown current Input mode, pulldown enabled, Vpad = VDDS 18.5 µAGPIO low-to-high input transition, with hysteresis IH = 1, transition voltage for input read as 0 → 1 1.08 VGPIO high-to-low input transition, with hysteresis IH = 1, transition voltage for input read as 1 → 0 0.72 V

GPIO input hysteresis IH = 1, difference between 0 → 1and 1 → 0 points 0.36 V

TA = 25°C, VDDS = 3.0 VGPIO VOH at 8-mA load IOCURR = 2, high-drive GPIOs only 2.57 VGPIO VOL at 8-mA load IOCURR = 2, high-drive GPIOs only 0.45 VGPIO VOH at 4-mA load IOCURR = 1 2.61 VGPIO VOL at 4-mA load IOCURR = 1 0.40 V


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Table 5-16. GPIO DC Characteristics (continued)PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

(1) Each GPIO is referenced to a specific VDDS pin. See the technical reference manual listed in Section 8.2 for more details.

TA = 25°C, VDDS = 3.8VGPIO pullup current Input mode, pullup enabled, Vpad = 0 V 265 µAGPIO pulldown current Input mode, pulldown enabled, Vpad = VDDS 106 µAGPIO low-to-high input transition, with hysteresis IH = 1, transition voltage for input read as 0 → 1 1.97 VGPIO high-to-low input transition, with hysteresis IH = 1, transition voltage for input read as 1 → 0 1.53 V

GPIO input hysteresis IH = 1, difference between 0 → 1and 1 → 0 points 0.43 V

VIH Lowest GPIO input voltage reliably interpretedas a High 0.8 VDDS

(1)

VIL Highest GPIO input voltage reliably interpretedas a Low 0.2 VDDS

(1)


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Main CPU

Up to 352KBFlash

with 8KB Cache

Sensor Interface

cJTAG

Up to80KBSRAM

256KBROM

Arm ®

Cortex ®-M4F Processor

LDO, Clocks, and ReferencesOptional DC/DC Converter

RF Core

Arm ®

Cortex ®-M0 Processor

DSP Modem

16KB SRAM

ROM

ULP Sensor Controller

Low-Power Comparator

12-bit ADC, 200 ks/s

Constant Current Source

SPI-I2C Digital Sensor IF

4KB SRAM

Time-to-Digital Converter

General Hardware Peripherals and Modules

4× 32-bit Timers

2× SSI (SPI)

Watchdog Timer

Temperature and Battery Monitor

RTC

I2C and I 2S

2× UART

32 ch. µDMA

31 GPIOs

AES-256, SHA2-512

ECC, RSA

ADC

ADC

Digital PLL

48 MHz69 µA/MHz

2.4 GHz

TRNG

CC26x2R

Copyright © 2018, Texas Instruments Incorporated

29



Detailed DescriptionCopyright © 2018, Texas Instruments Incorporated

6 Detailed Description

6.1 OverviewSection 6.2 shows the core modules of the CC2642R device.

6.2 Functional Block Diagram

Figure 6-1. CC2642R Block Diagram


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Detailed Description Copyright © 2018, Texas Instruments Incorporated

6.3 System CPUThe CC2642R SimpleLink™ Wireless MCU contains an Arm® Cortex®-M4F system CPU, which runs theapplication and the higher layers of radio protocol stacks.

The system CPU is the foundation of a high-performance, low-cost platform that meets the systemrequirements of minimal memory implementation, and low-power consumption, while deliveringoutstanding computational performance and exceptional system response to interrupts.

Its features include the following:• ARMv7-M architecture optimized for small-footprint embedded applications• Arm Thumb®-2 mixed 16- and 32-bit instruction set delivers the high performance expected of a 32-bit

Arm core in a compact memory size• Fast code execution permits increased sleep mode time• Deterministic, high-performance interrupt handling for time-critical applications• Single-cycle multiply instruction and hardware divide• Hardware division and fast digital-signal-processing oriented multiply accumulate• Saturating arithmetic for signal processing• IEEE 754-compliant single-precision Floating Point Unit (FPU)• Memory Protection Unit (MPU) for safety-critical applications• Full debug with data matching for watchpoint generation

– Data Watchpoint and Trace Unit (DWT)– JTAG Debug Access Port (DAP)– Flash Patch and Breakpoint Unit (FPB)

• Trace support reduces the number of pins required for debugging and tracing– Instrumentation Trace Macrocell Unit (ITM)– Trace Port Interface Unit (TPIU) with asynchronous serial wire output (SWO)

• Optimized for single-cycle flash memory access• Tightly connected to 8-KB 4-way random replacement cache for minimal active power consumption

and wait states• Ultra-low-power consumption with integrated sleep modes• 48-MHz operation• 1.25 DMIPS per MHz


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6.4 Radio (RF Core)The RF Core is a highly flexible and future proof radio module which contains an Arm Cortex-M0processor that interfaces the analog RF and base-band circuitry, handles data to and from the systemCPU side, and assembles the information bits in a given packet structure. The RF core offers a high level,command-based API to the main CPU that configurations and data are passed through. The Arm Cortex-M0 processor is not programmable by customers and is interfaced through the TI-provided RF driver thatis included with the SimpleLink Software Development Kit (SDK).

The RF core can autonomously handle the time-critical aspects of the radio protocols, thus offloading themain CPU, which reduces power and leaves more resources for the user application. Several signals arealso available to control external circuitry such as RF switches or range extenders autonomously.

The various physical layer radio formats are partly built as a software defined radio where the radiobehavior is either defined by radio ROM contents or by non-ROM radio formats delivered in form offirmware patches with the SimpleLink SDKs. This allows the radio platform to be updated for support offuture versions of standards even with over-the-air (OTA) updates while still using the same silicon.

6.4.1 Bluetooth 5 low energyThe RF Core offers full support for Bluetooth 5 low energy, including the high-sped 2-Mbps physical layerand the 500-kbps and 125-kbps long range PHYs (Coded PHY) through the TI provided Bluetooth 5 stackor through a high-level Bluetooth API. The Bluetooth 5 PHY and part of the controller are in radio andsystem ROM, providing significant savings in memory usage and more space available for applications.

The new high-speed mode allows data transfers up to 2 Mbps, twice the speed of Bluetooth 4.2 and fivetimes the speed of Bluetooth 4.0, without increasing power consumption. In addition to faster speeds, thismode offers significant improvements for energy efficiency and wireless coexistence with reduced radiocommunication time.

Bluetooth 5 also enables unparalleled flexibility for adjustment of speed and range based on applicationneeds, which capitalizes on the high-speed or long-range modes respectively. Data transfers are nowpossible at 2 Mbps, enabling development of applications using voice, audio, imaging, and data loggingthat were not previously an option using Bluetooth low energy. With high-speed mode, existingapplications deliver faster responses, richer engagement, and longer battery life. Bluetooth 5 enables fast,reliable firmware updates.


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6.5 MemoryThe up to 352-KB nonvolatile (Flash) memory provides storage for code and data. The flash memory is in-system programmable and erasable. The last flash memory sector must contain a Customer Configurationsection (CCFG) that is used by boot ROM and TI provided drivers to configure the device. Thisconfiguration is done through the ccfg.c source file that is included in all TI provided examples.

The ultra-low leakage system static RAM (SRAM) is split into up to five 16-KB blocks and can be used forboth storage of data and execution of code. Retention of SRAM contents in Standby power mode isenabled by default and included in Standby mode power consumption numbers. System SRAM is alwaysinitialized to zeroes upon code execution from boot and supports parity checking for detection of bit errorsin memory.

To improve code execution speed and lower power when executing code from nonvolatile memory, a 4-way nonassociative 8-KB cache is enabled by default to cache and prefetch instructions read by thesystem CPU. The cache can be used as a general-purpose RAM by enabling this feature in the CustomerConfiguration Area (CCFG).

There is a 4-KB ultra-low leakage SRAM available for use with the Sensor Controller Engine which istypically used for storing Sensor Controller programs, data and configuration parameters. This RAM isalso accessible by the system CPU. The Sensor Controller RAM is not cleared to zeroes between systemresets.

The ROM includes a TI-RTOS kernel and low-level drivers, as well as significant parts of selected radiostacks, which frees up flash memory for the application. The ROM also contains a serial (SPI and UART)bootloader that can be used for initial programming of the device.


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6.6 Sensor ControllerThe Sensor Controller contains circuitry that can be selectively enabled in both Standby and Active powermodes. The peripherals in this domain can be controlled by the Sensor Controller Engine, which is aproprietary power-optimized CPU. This CPU can read and monitor sensors or perform other tasksautonomously; thereby significantly reducing power consumption and offloading the system CPU.

The Sensor Controller Engine is user programmable with a simple programming language that has syntaxsimilar to C. This programmability allows for sensor polling and other tasks to be specified as sequentialalgorithms rather than static configuration of complex peripheral modules, timers, DMA, registerprogrammable state machines, or event routing.

The main advantages are:• Flexibility - data can be read and processed in unlimited manners while still ensuring ultra-low

power• Dynamic reuse of hardware resources• Ability to perform simple data processing without the need for dedicated hardware• Observability and debugging options

Sensor Controller Studio is used to write, test, and debug code for the Sensor Controller. The toolproduces C driver source code, which the System CPU application uses to control and exchange datawith the Sensor Controller. Typical use cases may be (but are not limited to) the following:• Read analog sensors using integrated ADC or comparators• Interface digital sensors using GPIOs, SPI, UART, or I2C (UART and I2C are bit-banged)• Capacitive sensing• Waveform generation• Very low-power pulse counting (flow metering)• Key scan

The peripherals in the Sensor Controller include the following:• The low-power clocked comparator can be used to wake the system CPU from any state in which the

comparator is active. A configurable internal reference DAC can be used in conjunction with thecomparator. The output of the comparator can also be used to trigger an interrupt or the ADC.

• Capacitive sensing functionality is implemented through the use of a constant current source, a time-to-digital converter, and a comparator. The continuous time comparator in this block can also be usedas a higher-accuracy alternative to the low-power clocked comparator. The Sensor Controller takescare of baseline tracking, hysteresis, filtering, and other related functions when these modules areused for capacitive sensing.

• The ADC is a 12-bit, 200-ksamples/s ADC with eight inputs and a built-in voltage reference. The ADCcan be triggered by many different sources including timers, I/O pins, software, and comparators.

• The analog modules can connect to up to eight different GPIOs• Dedicated SPI master with up to 6-MHz clock speed

The peripherals in the Sensor Controller can also be controlled from the main application processor.


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http://www.ti.com/tool/SENSOR-CONTROLLER-STUDIO

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6.7 CryptographyThe CC2642R device comes with a wide set of modern cryptography-related hardware accelerators,drastically reducing code footprint and execution time for cryptographic operations. It also has the benefitof being lower power and improves availability and responsiveness of the system because thecryptography operations runs in a background hardware thread.Together with a large selection of open-source cryptography libraries provided with the SoftwareDevelopment Kit (SDK), this allows for secure and future proof IoT applications to be easily built on top ofthe platform. The hardware accelerator modules are:• True Random Number Generator (TRNG) module provides a true, nondeterministic noise source for

the purpose of generating keys, initialization vectors (IVs), and other random number requirements.The TRNG is built on 24 ring oscillators that create unpredictable output to feed a complex nonlinear-combinatorial circuit.

• Secure Hash Algorithm 2 (SHA-2) with support for SHA224, SHA256, SHA384, and SHA512• Advanced Encryption Standard (AES) with 128 and 256 bit key lengths• Public Key Accelerator - Hardware accelerator supporting mathematical operations needed for elliptic

curves up to 512 bits and RSA key pair generation up to 1024 bits.

Through use of these modules and the TI provided cryptography drivers, the following capabilities areavailable for an application or stack:• Key Agreement Schemes

– Elliptic curve Diffie–Hellman with static or ephemeral keys (ECDH and ECDHE)– Elliptic curve Password Authenticated Key Exchange by Juggling (ECJ-PAKE)

• Signature Generation– Elliptic curve Diffie-Hellman Digital Signature Algorithm (ECDSA)

• Curve Support– Short Weierstrass form (full hardware support), such as:

• NIST-P224, NIST-P256, NIST-P384, NIST-P521• Brainpool-256R1, Brainpool-384R1, Brainpool-512R1• secp256r1

– Montgomery form (hardware support for multiplication), such as:• Curve25519

• SHA2 based MACs– HMAC with SHA224, SHA256, SHA384, or SHA512

• Block cipher mode of operation– AESCCM– AESGCM– AESECB– AESCBC– AESCBC-MAC

• True random number generation

Other capabilities, such as RSA encryption and signatures as well as Edwards type of elliptic curves suchas Curve1174 or Ed25519, can also be implemented using the provided hardware accelerators but are notpart of the TI SimpleLink SDK for the CC2642R device.


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6.8 TimersA large selection of timers are available as part of the CC2642R device. These timers are:• Real-Time Clock (RTC)

– A 70-bit 3-channel timer running on the 32-kHz low frequency system clock (SCLK_LF)This timer is available in all power modes except Shutdown. The timer can be calibrated tocompensate for frequency drift when using the LF RCOSC as the low frequency system clock. If anexternal LF clock with frequency different from 32768 Hz is used, the RTC tick speed can beadjusted to compensate for this. When using TI-RTOS, the RTC is used as the base timer in theoperating system and should thus only be accessed through the kernel APIs such as the Clockmodule. The real time clock can also be read by the Sensor Controller Engine to timestamp sensordata and also has dedicated capture channels. By default, the RTC halts when a debugger haltsthe device.

• General Purpose Timers (GPTIMER)The four flexible GPTIMERs can be used as either 4× 32 bit timers or 8× 16 bit timers, all running onup to 48 MHz. Each of the 16- or 32-bit timers support a wide range of features such as one-shot orperiodic counting, pulse width modulation (PWM), time counting between edges and edge counting.The inputs and outputs of the timer are connected to the device event fabric, which allows the timers tointeract with signals such as GPIO inputs, other timers, DMA and ADC. The GPTIMERs are availablein Active and Idle power modes.

• Sensor Controller TimersThe Sensor Controller contains 3 timers:AUX Timer 0 and 1 are 16-bit timers with a 2N prescaler. Timers can either increment on a clock or oneach edge of a selected tick source. Both one-shot and periodical timer modes are available.AUX Timer 2 is a 16-bit timer that can operate at 24-MHz, 2-MHz or 32-kHz independent of the SensorController functionality. There are 4 capture or compare channels, which can be operated in one-shotor periodical modes. The timer can be used to generate events for the Sensor Controller or the ADC,as well as for PWM output or waveform generation.

• Radio TimerA multichannel 32-bit timer running on 4 MHz is available as part of the device radio. The radio timer istypically used as the timing base in wireless network communication using the 32-bit timing word asthe network time. The radio timer is synchronized with the RTC by using a dedicated radio API whenthe device radio is turned on or off. This ensures that for a network stack, the radio timer seems toalways be running when the radio is enabled. The radio timer is in most cases used indirectly throughthe trigger time fields in the radio APIs and should only be used when running the accurate 48 MHzhigh frequency crystal is the source of SCLK_HF.

• Watchdog timerThe watchdog timer is used to regain control if the system operates incorrectly due to software errors.It is typically used to generate an interrupt to and reset of the device for the case where periodicmonitoring of the system components and tasks fails to verify proper functionality. The watchdog timerruns on a 1.5-MHz clock rate and cannot be stopped once enabled. The watchdog timer pauses to runin Standby power mode and when a debugger halts the device.


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6.9 Serial Peripherals and I/OThe SSIs are synchronous serial interfaces that are compatible with SPI, MICROWIRE, and TI'ssynchronous serial interfaces. The SSIs support both SPI master and slave up to 4 MHz. The SSImodules support configurable phase and polarity.

The UARTs implement universal asynchronous receiver and transmitter functions. They support flexiblebaud-rate generation up to a maximum of 3 Mbps.

The I2S interface is used to handle digital audio and can also be used to interface pulse-densitymodulation microphones (PDM).

The I2C interface is also used to communicate with devices compatible with the I2C standard. The I2Cinterface can handle 100-kHz and 400-kHz operation, and can serve as both master and slave.

The I/O controller (IOC) controls the digital I/O pins and contains multiplexer circuitry to allow a set ofperipherals to be assigned to I/O pins in a flexible manner. All digital I/Os are interrupt and wake-upcapable, have a programmable pullup and pulldown function, and can generate an interrupt on a negativeor positive edge (configurable). When configured as an output, pins can function as either push-pull oropen-drain. Five GPIOs have high-drive capabilities, which are marked in bold in Section 4. All digitalperipherals can be connected to any digital pin on the device.

For more information, see the CC13x2, CC26x2 SimpleLink™ Wireless MCU Technical ReferenceManual.

6.10 Battery and Temperature MonitorA combined temperature and battery voltage monitor is available in the CC2642R device. The battery andtemperature monitor allows an application to continuously monitor on-chip temperature and supply voltageand respond to changes in environmental conditions as needed. The module contains windowcomparators to interrupt the system CPU when temperature or supply voltage go outside definedwindows. These events can also be used to wake up the device from Standby mode through the Always-On (AON) event fabric.

6.11 µDMAThe device includes a direct memory access (µDMA) controller. The µDMA controller provides a way tooffload data-transfer tasks from the system CPU, thus allowing for more efficient use of the processor andthe available bus bandwidth. The µDMA controller can perform a transfer between memory andperipherals. The µDMA controller has dedicated channels for each supported on-chip module and can beprogrammed to automatically perform transfers between peripherals and memory when the peripheral isready to transfer more data.

Some features of the µDMA controller include the following (this is not an exhaustive list):• Highly flexible and configurable channel operation of up to 32 channels• Transfer modes: memory-to-memory, memory-to-peripheral, peripheral-to-memory, and

peripheral-to-peripheral• Data sizes of 8, 16, and 32 bits• Ping-pong mode for continuous streaming of data

6.12 DebugThe on-chip debug support is done through a dedicated cJTAG (IEEE 1149.7) or JTAG (IEEE 1149.1)interface. The device boots by default into cJTAG mode and must be reconfigured to use 4-pin JTAG.


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6.13 Power ManagementTo minimize power consumption, the CC2642R supports a number of power modes and powermanagement features (see Table 6-1).

Table 6-1. Power Modes, VDDS = 3.0V

MODESOFTWARE CONFIGURABLE POWER MODES RESET PIN

HELDACTIVE IDLE STANDBY SHUTDOWNCPU Active Off Off Off OffFlash On Available Off Off OffSRAM On On Retention Off OffRadio Available Available Off Off OffSupply System On On Duty Cycled Off OffRegister and CPU retention Full Full Partial No NoSRAM retention Full Full Full No No48 MHz high-speed clock(SCLK_HF)

XOSC_HF orRCOSC_HF

XOSC_HF orRCOSC_HF Off Off Off

2 MHz medium-speed clock(SCLK_MF) RCOSC_MF RCOSC_MF Available Off Off

32 kHz low-speed clock(SCLK_LF)

XOSC_LF orRCOSC_LF

XOSC_LF orRCOSC_LF

XOSC_LF orRCOSC_LF Off Off

Peripherals Available Available Off Off OffSensor Controller Available Available Available Off OffWake-up on RTC Available Available Available Off OffWake-up on pin edge Available Available Available Available OffWake-up on reset pin Available Available Available Available AvailableBrownout detector (BOD) Active Active Duty Cycled Off N/APower-on reset (POR) Active Active Active Active N/AWatchdog timer (WDT) Available Available Paused Off N/A

In Active mode, the application system CPU is actively executing code. Active mode provides normaloperation of the processor and all of the peripherals that are currently enabled. The system clock can beany available clock source (see Table 6-1).

In Idle mode, all active peripherals can be clocked, but the Application CPU core and memory are notclocked and no code is executed. Any interrupt event brings the processor back into active mode.

In Standby mode, only the always-on (AON) domain is active. An external wake-up event, RTC event, orSensor Controller event is required to bring the device back to active mode. MCU peripherals withretention do not need to be reconfigured when waking up again, and the CPU continues execution fromwhere it went into standby mode. All GPIOs are latched in standby mode.

In Shutdown mode, the device is entirely turned off (including the AON domain and Sensor Controller),and the I/Os are latched with the value they had before entering shutdown mode. A change of state onany I/O pin defined as a wake from shutdown pin wakes up the device and functions as a reset trigger.The CPU can differentiate between reset in this way and reset-by-reset pin or power-on reset by readingthe reset status register. The only state retained in this mode is the latched I/O state and the flash memorycontents.


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The Sensor Controller is an autonomous processor that can control the peripherals in the SensorController independently of the system CPU. This means that the system CPU does not have to wake up,for example to perform an ADC sampling or poll a digital sensor over SPI, thus saving both current andwake-up time that would otherwise be wasted. The Sensor Controller Studio tool enables the user toprogram the Sensor Controller, control its peripherals, and wake up the system CPU as needed. AllSensor Controller peripherals can also be controlled by the system CPU.

NOTEThe power, RF and clock management for the CC2642R device require specific configurationand handling by software for optimized performance. This configuration and handling isimplemented in the TI-provided drivers that are part of the CC2642R software developmentkit (SDK). Therefore, TI highly recommends using this software framework for all applicationdevelopment on the device. The complete SDK with TI-RTOS (optional), device drivers, andexamples are offered free of charge in source code.

6.14 Clock SystemsThe CC2642R device has several internal system clocks.

The 48-MHz SCLK_HF is used as the main MCU and peripheral clock. This can be driven by the internal48-MHz RC Oscillator (RCOSC_HF) or an external 48-MHz crystal (required for radio operation)

SCLK_MF is an internal 2-MHz clock which is used by the Sensor Controller in low-power mode and alsofor internal power management circuitry. The SCLK_MF clock is always driven by an internal 2-MHz RCOscillator (RCOSC_HF)

SCLK_LF is the 32.768-kHz internal low-frequency system clock. It can be used by the Sensor Controllerfor ultra-low-power operation and is also used for the RTC and to synchronize the radio timer before orafter Standby power mode. SCLK_LF can be driven by an internal 32.768-kHz RC Oscillator(RCOSC_LF), a 32.768-kHz watch-type crystal or a clock input on any digital IO.

When using a crystal or the internal RC oscillator, the device can output the 32-kHz SCLK_LF signal toother devices, thereby reducing the overall system cost.

6.15 Network ProcessorDepending on the product configuration, the CC2642R device can function as a wireless networkprocessor (WNP—a device running the wireless protocol stack with the application running on a separatehost MCU), or as a system-on-chip (SoC) with the application and protocol stack running on the systemCPU inside the device.

In the first case, the external host MCU communicates with the device using SPI or UART. In the secondcase, the application must be written according to the application framework supplied with the wirelessprotocol stack.


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Application, Implementation, and LayoutCopyright © 2018, Texas Instruments Incorporated

7 Application, Implementation, and Layout

NOTEInformation in the following Applications section is not part of the TI component specification,and TI does not warrant its accuracy or completeness. TI's customers are responsible fordetermining suitability of components for their purposes. Customers should validate and testtheir design implementation to confirm system functionality.

7.1 LaunchPad™ Development Kit Reference DesignThe LaunchPad Development Kit that supports the CC2642R device also functions as a detailed referencedesign for schematic and layout.CC26X2R LaunchPad™ Development Kit Design Files SPACER

The CC26X2R LaunchPad Design Files contain detailed schematics and layouts to buildapplication specific boards using the CC2642R device. This design applies to both theCC2642R and CC2652R devices.

Sub-1 GHz and 2.4 GHz Antenna Kit for LaunchPad™ Development Kit and SensorTag SPACERThe antenna kit allows real-life testing to identify the optimal antenna for your application.The antenna kit includes 16 antennas for frequencies from 169 MHz to 2.4 GHz, including:• PCB antennas• Helical antennas• Chip antennas• Dual band antennas for 868 and 915 MHz combined with 2.4 GHz

The antenna kit includes a µSMA(JSC) cable to connect the wireless LaunchPadDevelopment Kits and SensorTags.


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Device and Documentation Support Copyright © 2018, Texas Instruments Incorporated

8 Device and Documentation Support

TI offers an extensive line of development tools. Tools and software to evaluate the performance of thedevice, generate code, and develop solutions are listed as follows.

8.1 Tools and SoftwareThe CC2642R device is supported by a variety of software and hardware development tools.

Development KitCC26x2 LaunchPad™ Development Kit SPACER

The CC26x2R LaunchPad™ Development Kit enables development of high-performancewireless applications that benefit from low-power operation. The kit features the CC2652RSimpleLink Wireless MCU, which allows you to quickly evaluate and prototype 2.4-GHzwireless applications such as Bluetooth 5 low energy, Zigbee and Thread, plus combinationsof these. The kit works with the LaunchPad ecosystem, easily enabling additionalfunctionality like sensors, display and more. The built-in EnergyTrace™ software is anenergy-based code analysis tool that measures and displays the application’s energy profileand helps to optimize it for ultra-low-power consumption. See Table 3-1 for guidance inselecting the correct device for single-protocol products.

SoftwareSimpleLink™ CC26X2 SDK SPACER

The SimpleLink CC26X2 Software Development Kit (SDK) provides a complete package forthe development of Bluetooth-based applications for the CC2642R wireless MCU. TheSimpleLink CC26X2 SDK is part of TI’s SimpleLink MCU platform, offering a singledevelopment environment that delivers flexible hardware, software and tool options forcustomers developing wired and wireless applications. For more information about theSimpleLink MCU Platform, visit http://www.ti.com/simplelink.

Development ToolsCode Composer Studio™ Integrated Development Environment (IDE) SPACER

Code Composer Studio is an integrated development environment (IDE) that supports TI'sMicrocontroller and Embedded Processors portfolio. Code Composer Studio comprises asuite of tools used to develop and debug embedded applications. It includes an optimizingC/C++ compiler, source code editor, project build environment, debugger, profiler, and manyother features. The intuitive IDE provides a single user interface taking you through eachstep of the application development flow. Familiar tools and interfaces allow users to getstarted faster than ever before. Code Composer Studio combines the advantages of theEclipse® software framework with advanced embedded debug capabilities from TI resultingin a compelling feature-rich development environment for embedded developers.CCS has support for all SimpleLink Wireless MCUs and includes support for EnergyTracesoftware (application energy usage profiling). A real-time object viewer plugin is available forTI-RTOS, part of the SimpleLink SDK.Code Composer Studio is provided free of charge when used in conjunction with the XDSdebuggers included on a LaunchPad Development Kit.

Code Composer Studio™ Cloud IDE SPACERCode Composer Studio (CCS) Cloud is a web-based IDE that allows you to create, edit andbuild CCS and Energia™ projects. After you have successfully built your project, you candownload and run on your connected LaunchPad. Basic debugging, including features likesetting breakpoints and viewing variable values is now supported with CCS Cloud.

IAR Embedded Workbench® for Arm® SPACERIAR Embedded Workbench® is a set of development tools for building and debuggingembedded system applications using assembler, C and C++. It provides a completelyintegrated development environment that includes a project manager, editor, and build tools.IAR has support for all SimpleLink Wireless MCUs. It offers broad debugger support,including XDS110, IAR I-jet™ and Segger J-Link™. A real-time object viewer plugin isavailable for TI-RTOS, part of the SimpleLink SDK. IAR is also supported out-of-the-box onmost software examples provided as part of the SimpleLink SDK.A 30-day evaluation or a 32 KB size-limited version is available through iar.com.


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http://www.ti.com/lsds/ti/tools-software/cloud_tools.page

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Device and Documentation SupportCopyright © 2018, Texas Instruments Incorporated

SmartRF™ Studio SPACERSmartRF™ Studio is a Windows® application that can be used to evaluate and configureSimpleLink Wireless MCUs from Texas Instruments. The application will help designers ofRF systems to easily evaluate the radio at an early stage in the design process. It isespecially useful for generation of configuration register values and for practical testing anddebugging of the RF system. SmartRF Studio can be used either as a standalone applicationor together with applicable evaluation boards or debug probes for the RF device. Features ofthe SmartRF Studio include:• Link tests — send and receive packets between nodes• Antenna and radiation tests — set the radio in continuous wave TX and RX states• Export radio configuration code for use with the TI SimpleLink SDK RF driver• Custom GPIO configuration for signaling and control of external switches

Sensor Controller Studio SPACERSensor Controller Studio is used to write, test and debug code for the Sensor Controllerperipheral. The tool generates a Sensor Controller Interface driver, which is a set of Csource files that are compiled into the System CPU application. These source files alsocontain the Sensor Controller binary image and allow the System CPU application to controland exchange data with the Sensor Controller. Features of the Sensor Controller Studioinclude:• Ready-to-use examples for several common use cases• Full toolchain with built-in compiler and assembler for programming in a C-like

programming language• Provides rapid development by using the integrated sensor controller task testing and

debugging functionality, including visualization of sensor data and verification ofalgorithms

CCS UniFlash SPACERCCS UniFlash is a standalone tool used to program on-chip flash memory on TI MCUs.UniFlash has a GUI, command line, and scripting interface. CCS UniFlash is available free ofcharge.


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Device and Documentation Support Copyright © 2018, Texas Instruments Incorporated

8.2 Documentation SupportTo receive notification of documentation updates on data sheets, errata, application notes and similar,navigate to the device product folder on ti.com/product/CC2642R. In the upper right corner, click on Alertme to register and receive a weekly digest of any product information that has changed. For changedetails, review the revision history included in any revised document.

The current documentation that describes the MCU, related peripherals, and other technical collateral islisted as follows.

TI Resource ExplorerTI Resource Explorer Software examples, libraries, executables, and documentation are available for

your device and development board.

ErrataCC2642R Silicon Errata The silicon errata describes the known exceptions to the functional

specifications for each silicon revision of the device.

Technical Reference Manual (TRM)CC13x2, CC26x2 SimpleLink™ Wireless MCU TRM The TRM provides a detailed description of all

modules and peripherals available in the device family.

8.2.1 TI SimpleLink™TI’s new SimpleLink microcontroller platform sets a new standard for developers with the broadestportfolio of wired and wireless Arm® MCUs (System-on-Chip) in a single software developmentenvironment. Delivering flexible hardware, software and tool options for your IoT applications. Invest oncein the SimpleLink software development kit and use throughout your entire portfolio. Learn more onti.com/simplelink.

8.2.2 TI Design NetworkThe TI Design Network is a worldwide community of respected, well-established companies offeringproducts and services that complement TI's semiconductor device solutions. Products and servicesinclude a broad range of reference designs, turnkey products and services, system modules, embeddedsoftware, engineering services, and development tools that help customers accelerate development effortsand reduce time-to-market.

Search the network on www.ti.com/3p to find a suitable partner for modules, engineering services, ordevelopment tools.

8.3 Community ResourcesThe following links connect to TI community resources. Linked contents are provided "AS IS" by therespective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views;see TI's Terms of Use.TI E2E™ Online Community The TI engineer-to-engineer (E2E) community was created to foster

collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge,explore ideas and help solve problems with fellow engineers.

TI Embedded Processors Wiki Established to help developers get started with Embedded Processorsfrom Texas Instruments and to foster innovation and growth of general knowledge about thehardware and software surrounding these devices.


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Mechanical, Packaging, and Orderable InformationCopyright © 2018, Texas Instruments Incorporated

8.4 TrademarksSmartRF, SimpleLink, EnergyTrace, Code Composer Studio, E2E are trademarks of Texas Instruments.LaunchPad is a trademark of Texas Instruments Inc.Arm, Cortex, Arm Thumb are registered trademarks of Arm Limited (or its subsidiaries).Bluetooth is a registered trademark of Bluetooth SIG Inc.Eclipse is a registered trademark of Eclipse Foundation.CoreMark is a registered trademark of Embedded Microprocessor Benchmark Consortium.I-jet is a trademark of IAR Systems AB.IAR Embedded Workbench is a registered trademark of IAR Systems AB.Windows is a registered trademark of Microsoft Corporation.J-Link is a trademark of SEGGER Microcontroller Systeme GmbH.Wi-Fi is a registered trademark of Wi-Fi Alliance.All other trademarks are the property of their respective owners.

8.5 Electrostatic Discharge CautionThis integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled withappropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be moresusceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

8.6 GlossaryTI Glossary This glossary lists and explains terms, acronyms, and definitions.

9 Mechanical, Packaging, and Orderable Information

9.1 Packaging InformationThe following pages include mechanical packaging and orderable information. This information is the mostcurrent data available for the designated devices. This data is subject to change without notice andrevision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.


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PACKAGE OPTION ADDENDUM

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Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status(1)

Package Type PackageDrawing

Pins PackageQty

Eco Plan(2)

Lead/Ball Finish(6)

MSL Peak Temp(3)

Op Temp (°C) Device Marking(4/5)

Samples

CC2642R1FRGZR PREVIEW VQFN RGZ 48 2500 TBD Call TI Call TI -40 to 85

CC2642R1FRGZT PREVIEW VQFN RGZ 48 250 TBD Call TI Call TI -40 to 85

XCC2642R1FRGZR ACTIVE VQFN RGZ 48 2500 Green (RoHS& no Sb/Br)

CU NIPDAU |CU NIPDAUAG

Level-3-260C-168 HR -40 to 85 (CC2642, XCC2642)R1F

(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substancedo not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI mayreference these types of products as "Pb-Free".RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide basedflame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finishvalue exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

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Addendum-Page 2

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device PackageType

PackageDrawing

Pins SPQ ReelDiameter

(mm)

ReelWidth

W1 (mm)

A0(mm)

B0(mm)

K0(mm)

P1(mm)

W(mm)

Pin1Quadrant

XCC2642R1FRGZR VQFN RGZ 48 2500 330.0 16.4 7.3 7.3 1.1 12.0 16.0 Q2

PACKAGE MATERIALS INFORMATION


Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

XCC2642R1FRGZR VQFN RGZ 48 2500 336.6 336.6 31.8

PACKAGE MATERIALS INFORMATION


Pack Materials-Page 2

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IMPORTANT NOTICE

Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to itssemiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyersshould obtain the latest relevant information before placing orders and should verify that such information is current and complete.TI’s published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integratedcircuit products that TI has qualified and released to market. Additional terms may apply to the use or sale of other types of TI products andservices.Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and isaccompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such reproduceddocumentation. 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CC2642R SimpleLink™ Bluetooth 5 low energy Wireless MCU · TION 7 CC2642R SWRS194A –JANUARY...

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