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Capstone Design Course

Lecture-2: The Timer

By

Syed Masud Mahmud, Ph.D.

Copyright 2002 by Syed Masud Mahmud

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The Timer• The 68HC11 has a 16-Bit Free Running

Timer.

• The count value of the timer is available in a

16-bit register by the name TCNT.

Address Register

$100E TCNT (high-byte)

$100F TCNT (low-byte)

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The Timer (contd.)• The MCU clock (E clock) is divided by a pre-

scale factor before it is used for the timer.

• The pre-scale factor is controlled by the least

significant two bits of register TMSK2.

TMSK2 : Timer Mask Register 2 $1024

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The Timer (contd.)Problem:

• How often the Timer will count up by ONE if

E=2MHz, PR1=1 and PR0=0?

Answer:

• Here the prescale factor is 8. Thus, the timer

clock frequency is 2MHz/8 = 250KHz.

• Hence, the timer will count up by ONE once

every 1/250KHz = 4 micro seconds.

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Changing PR1 and PR0• The values of PR1 and PR0 can be changed

once only during the first 64 clock cycles (E

clock) after RESET.

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Timer Overflow• A timer overflow condition is detected when the

content of the timer changes from 65535 to 0

(i.e. from $FFFF to $0000).

• When a timer overflow occurs the bit TOF of

register TFLG2 is automatically set.

TMSK2 : Timer Mask Register 2 $1024

TFLG2 : Timer Flag Register 2 $1025

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Timer Overflow Interrupt• If the bit TOI (Timer Overflow Interrupt bit) of

register TMSK2 is set by the programmer, then

the processor will be interrupted when a timer

overflow occurs.

TMSK2 : Timer Mask Register 2 $1024

TFLG2 : Timer Flag Register 2 $1025

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Timer Overflow Interrupt

Circuit

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Input Capture Functions• The pins PA0, PA1 and PA2 are used with input

capture (IC) functions of the timer.

• Each one of these three pins can be individually

programmed to capture a particular edge of a

signal.

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IC Functions (contd.)• Each input-capture function includes a 16-bit

latch, input edge-detection logic, and interrupt

generation logic.

• The 16-bit latch captures the current value of

the free-running counter when a selected edge

is detected at the corresponding timer input pin.

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TIC1, TIC2 and TIC3 Registers

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Input Capture Edge Control

TCTL2 : Timer Control Register 2 $1021

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IC Flags and IC Interrupts• The ICxF bit is automatically set to one each

time a selected edge is detected at the

corresponding input-capture pin.

• If the ICxI bit is set by the programmer then

the processor will be interrupted at the time a

selected edge is detected.

TMSK1 : Timer Mask Register 1 $1022

TFLG1 : Timer Flag Register 1 $1023

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IC Interrupt Logic

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Clearing Bits of Timer Flag Registers

• A flag bit is cleared by writing a one in the bit position.

Example-1: The IC1F bit can be cleared as follows:

LDAA #4 ; A = 00000100

STAA $1023

Example-2: The IC1F and IC3F bits can be cleared as

follows:

LDAA #5 ; A = 00000101

STAA $1023

TFLG1 : Timer Flag Register 1 $1023

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Clearing Bits of Timer Flag Registers (contd.)

• Timer flag bits can also be cleared by using a BCLR

instruction with the mask having 0s in the

corresponding bit positions.

Example: IC1F and IC3F bits can be cleared as follows:

REGBAS EQU $1000

TFLG1 EQU $23

LDX #REGBAS

BCLR TFLG1,X $FA ; Mask = 11111010

TFLG1 : Timer Flag Register 1 $1023

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Measuring Period with Input Capture

• Capture the time of first rising edge: T1

• Capture the time of second rising edge: T2

Period = T2 – T1

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Measuring Period with Input Capture• The program uses polling rather than interrupts.

• Measures period between two rising edges at IC1

pin

REGBAS EQU $1000 Starting addr. for reg. block

TCNT EQU $0E Free running counter

TIC1 EQU $10 IC1 register (16 bit)

TCTL2 EQU $21 Timer Control Reg. 2

*--,--,EDGlB,EDGlA;EDG2B,EDG2A,EDG3B,EDG3A

TMSK1 EQU $22 Timer Mask Reg. 1

*OC1I, OC2I, OC3I, OC4I, OC51, IC1I, IC2I, IC3I

TFLG1 EQU $23 Timer Flag Reg. 1

*OC1F, OC2F, OC3F, OC4F, OC5F, IC1F, IC2F, IC3F

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Measuring Period with Input CaptureORG $0200

EDG1 RMB 2 ; Location to keep time of 1st edge

PERD RMB 2 ; Location to keep value of period

ORG $1040

LDX #REGBAS ;PointS to register block

LDAA #%00010000

STAA TCTL2,X

* EDG1B = 0, :EDG1A = 1, rising edges selected

LDAA #$04

STAA TFLG1,X ;Clear IC1F bit

* Ready to capture the first rising edge

BRCLR TFLG1,X $04 * ;Wait until IC1F = 1

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Measuring Period with Input Capture* First edge detected

LDD TIC1,X ;Read time of first edge

STD EDG1 ;Save first capture value

LDAA # $04

STAA TFLG1,X ;Clear IC1F bit

* Ready to capture the second rising edge

BRCLR TFLG1,X $04 * ;Wait until IC1F = 1

* Second edge detected

LDD TIC1,X ;Read time of second edge

SUBD EDG1 ; D 2nd Edge – 1st Edge

STD PERD ; Save result in PERD

* Note the period has been measured in terms of timer

counts (or timer clock cycles)

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Measuring Pulse Width with Input Capture

• Capture the time of the rising edge: T1

• Capture the time of the falling edge: T2

Pulse Width = T2 – T1

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Measuring Pulse Width with Input CaptureORG $0200

EDG1 RMB 2 ; Location to keep time of 1st edge

PWID RMB 2 ; Location for value of pulse width

ORG $1040

LDX #REGBAS ;PointS to register block

LDAA #%00010000

STAA TCTL2,X

* EDG1B = 0, :EDG1A = 1, rising edges selected

LDAA #$04

STAA TFLG1,X ;Clear IC1F bit

* Ready to detect the rising edge

BRCLR TFLG1,X $04 * ;Wait until IC1F = 1

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Measuring Pulse Width with Input Capture* First edge detected

LDD TIC1,X ;Read time of first edge

STD EDG1 ;Save first capture value

LDAA #%00100000

STAA TCTL2,X

• EDG1B = 1, :EDG1A = 0, falling edges selected

LDAA # $04

STAA TFLG1,X ;Clear IC1F bit

* Ready to detect the falling edge

BRCLR TFLG1,X $04 * ;Wait until IC1F = 1

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Measuring Pulse Width with Input Capture* Second edge detected

LDD TIC1,X ;Read time of second edge

SUBD EDG1 ; D 2nd Edge – 1st Edge

STD PWID ; Save result in PWID

* Note the pulse width has been measured in terms of

timer counts (or timer clock cycles)