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    A SINGLE-PIECE CHARGE-BASED MODEL FORTHE OUTPUT CONDUCTANCEOFMOS TRANSISTORS

    M. C. Schneider', C. Galup- Montor~' ,~0.C. Gouveia Filho' and A. I. A. Cunha2'LINSE - Departamento de Engenharia Eldtrica - UFSC - C.P. 47688 040 900 Florianopolis - SC - BrasilE-mail: [email protected]'Departamento de Engenharia ElCtrica da Escola Politdcnica - UFBA402 10-630 Salvador - BA - B r a dDepartment of Electrical Engineering - Texas A & M UniversityCollege Station - Texas - 77843-3 128 - US A

    Abstract

    This paper presents a physically based model of theMO SFET output conductance. The drain current and theoutput conductance of the MO S transistor areaccurately described by single-piece functions of theinversion charge densities at source and drain. Carriervelocity saturation, channel length modulation (CLM)and drain induced barrier lowering (DIBL) are includedin a single-piece analytical model. The results hereincan be readily applied for first order analog circuit handcalculation.1. Introduction

    Almost all the MOSFET models included in circuitsimulators use the regional approach and some non-physical curve interpolation to bridge the linear andsaturation regions [l-41. A good MOSFET modelshould exhibit continuity not only in the drain currentbut also in the output conductance. The effects of carriervelocity saturation, CLM, DIBL and substrate currentinduced body effect (SCBE) must be taken into accountto calculate the output conductance of a MOS FET.In the classical approach to model the saturation region,the output conductance is assumed to be proportional tothe (saturation) drain current and inversely proportionalto the Early voltage V, [13, a constant parameter in firstorder models such as SPICE1. However, it is widelyknown that a constant Early voltage is inadequate tomodel the output conductance for the simulation ofanalog circuits. Other models [2,4,11] use smoothingfunctions to unify the linear and saturation regions.However, they demand the extraction of parameterswhich neither have a simple physical interpretation nor

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    are easy to extract. Another drawback of somesimulators is that the carrier velocity saturation model isonly valid in strong inversion [l, 2 , 5 , 61, but not inweak inversion, where the channel is almostequipotential [11. Consequently, saturation is modeledwith a physical background in strong inversion while,on the other hand, it is defined in an empirical manner[5, 81 in weak and moderate inversion.This paper presents a charge-based physical model ofthe MOSFET output conductance, valid from weak tostrong inversion. Our model includes velocity saturationeffects, CLM and DIBL. Impact ionization effects canbe easily included in our model by adding a substratecurrent such as in [2]. A physical definition of theMOSFET output conductance in terms of a saturationcharge is proposed. From the basic definition ofsaturation charge, alternative definitions of saturation interms of current or voltage can be derived. A simpleexpression for the output conductance showing itsdependence on bias is given.2. MOSFET charge-based current model

    The basic assumption of our model is the lineardependence of the inversion charge density Q; on thesurface potential $s [7, 91, for a given gate-to-bulkvoltage (VG):whe re C;, is the oxide capacitance per unit area and nis the slope factor, slightly dependent on the gatevoltage.The effect of velocity saturation in our inodel is basedon the expression [7] below:

    dQ; = nC;,d$, (1)

    0-7803-5008-1/98/$10.00@1998 EEE.

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    (2 )1 + - 2vlim dx" = p d$

    where the mobility p is a function of the gate -to-bulkpotential V, only and vllms the saturation velocity.The substitution of both the approximations (1) and (2)into the differential equation of the drain current leads,after integration along the channel, to [7,8]PWeq 1 [Q;: - Qg 2nCL(Q;s -ab)] (3)

    Co,iLcg + Q;, -QLII, =- 2nQAwhere

    I

    (4)hmQ = ".CoxL,.Uc, an d U, =-$t is the thermal potential and Le, is the transistorelectrical length.The charge-based expression (3) to calculate the draincurrent includes the effects of diffusion, drift and carriervelocity saturation. (3) is a general expression that isvalid from weak to very strong inversion. The charge inthe denominator models velocity saturation; the termIQ;, - QLI correctly represents the channel potential instrong as well as in weak inversion.

    ' 3. Operation in saturationThe maximum current that can flow in the channeloccurs when the maximum velocity in the inversionlayer reaches the saturation velocity. In this case:Equating (3) to ( 5 ) allow s one to calculate QL,,, , hevalue of Q', which corresponds to the onset of

    ID = -wvi,,Qb ( 5 )

    saturation:r

    L( 6 )Equation (6) is a general definition, for any inversionlevel, of the MOSFET inversion charge at the onset ofsaturation. (6) can be readily interpreted if one assumes

    IQiSl,

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    The saturation charge QkS AT depen ds n the channellength, L:q, and on the inv ersion charg e density atsource, QIS At this point we can include both the CLMand DIBL effects to calculate the small-signal outputconductance. The channel length is generally written asLe, =L- AL, where AL is the channel shrink age. Manymodels have been tried to describe CLM [ 1 11 . Here wemodel the CLM as in [5]

    AL = A.L, In 1+ DS - DSSAT ][ LCUCIUT (13)where A and L, can be considered as fitting parameters.The DIBL effect is represented in our model by theDIBL parameter, 0, hich models the dependence ofthe pinch-o ff voltage, V,, on both the drain and sourcevoltages according to:0vp(vG,vs,vD> =vpo(vG) + ( v D + vs) (14)

    Now, (12), (13) and (14), together with (7 ) and ( l o ) ,can be used to calculate the MOSFET outputconductance to current ratio:

    10

    lo"

    10'.

    2

    k.U,Eqn.(l5) is a generalization, for any bias conditions, ofthe MOSFET output conductance presented in [6]. On ecan readily notice that the CLM component of V,, theEarly voltage, depends only on the effective voltagedrop across the shrunk part of the channel while theDIBL component depends o n the cu rrent level id. TheEarly voltage is independent of the current level forweak inversion and increases in moderate inversion. Forhigher inversion levels the DIBL component of theEarly voltage can be neglected compared to the CLMcomponent.From the above results it becomes clear that the newmodel (15) of the Early voltage proposed here includesthe conventional Early voltage formulation as a limitcase. (15) is valid as long as

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    Fig.3 shows that the Early voltage is almost independentof V, in weak inversion. The comparison of Fig 3 a)and 3 b) shows that for the transistor with L=0.75ymthe DIBL component of VA is dominant and the CLMcomponent becomes important as the channel lengthincreases.

    10'

    V,= 2.5 V0 -V, = 3.0 V

    0 v, = 3.5 v10* V, = 4.0 V

    " 0 ' t - -=-@-%

    ?O RV, = 2.5 V

    (b) vGFig.3. The outpu t conducta nce to current ratio versus gatevoltage with V, varyin g from 2.5V to 4.0V of NM OS

    transistors with a) L=0.75pm and b) 1.25pm-6.Conclusions

    A compact charge-based model for the outputconductance of the MOSFET has been presented. Someadvahtages of our model over BSIM3v3 are the use ofsimple expressions to describe all regions of operationas well as a smaller number of device parameters. Thepresent model includes the conventional Early voltageformulation as a limit case and allows the calculation ofthe Early voltage in terms of physical parameters aswell as bias conditions.

    Ac knowl e dgme nt sThe authors would like to thank CAPES and CNPq (from theBrazilian Ministries of Education and Science andTechnology) for the financial support.ReferencesDlI21

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    Y. P. Tsividis, "Operation and Modeling of the MOSTransistor", New York: McGraw-Hill, 1987.Y. Cheng and al, "A physical and scalable I-V model inBSIM3v3 for analoddigital simulation", IEEETransactionson Electron Devices, vol. 44, no 2, pp. 277-287, Feb. 1997.Y. P. Tsividis, and K. Suyama, "MOSFET modeling foranalog circuit CAD: problems and prospects", IEEEJournal of Solid-State Circuits, vol. 29, no 3, pp. 210-216,Mar. 1994.K. Lee, M. Shur, T. A. Fjeldly and T. Ytterdal,"Semiconductor device modeling for VLSI", PrenticeHall, Englewoods Cliffs, 1993.C. C., Enz, F. Krummenacher and E. A. Vittoz, "Ananalytical MO S transistor model valid in all regions ofoperation and dedicated to low-voltage and low-currentapplications", Analog Integrated Circuits and SignalProcessing Journal, vol. 8, pp. 83-1 14, Jul. 19 95.K. Toh, P. KO, and R. G. Meyer, "An engineering modelfor short-channel MOS devices", IEEE Journal of Solid-State Circuits, vol. 23, no4, pp. 950-958, Aug. 1988.M. A. Maher and C.A. Mead, "A physical charge-controlled model for MOS transistors, in P. Losleben(ed.), Advanced research in VLSI", MIT Press,Cambridge, 1987.B. Iniguez and E. G. Moreno, "A physically based Cwcontinuous model for small-geometry MOSFET's", IEEETransactions on Electron Devices, vol. 42, no 2, pp. 28 3-287, Feb.1995.A. 1. A. Cunha, M. C. Schneider and C. Galup-Montoro,"An explicit physical model for the long-channel MOStransistor including small-signal parameters", Solid-StateElectronics, vol. 38, no 11, pp. 1945-1952, Nov. 1995.[lo] A. I. A. Cunha, 0. C. Gouveia Filho, M. C. Schneiderand C. Galup-Montoro, "A current-based model of theMOS transistor", Proc. 1997 Int. Symposium on Circuitsand Systems, pp. 1608- 161 1, Hong-Kong, Jun. 1997.[ll] A. Chatterjee, C. F. Machala, 111 and P. Yang, "Asubmicron DC MOSFET model for simulation of analogcircuits", IEEE Trans. on Computer-Aided Design ofIntegrated Circuits and Systems, vol. 14, no. 10, pp. 1 193-1207, Oct. 1995.

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