Bai tap Lon VXL

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    Khoa in in T Lp DHDT1_K1

    TRNG I HC THNH

    KHOA IN - IN T

    BI TP LN MN K THUT

    VI X L

    H v tn:

    Nguyn Vn Thc

    Nguyn Thanh Thi

    Nguyn Th Thy

    Nguyn Khc Sng

    Nguyn nh S

    Lp: T1 Kha: 1

    H Ni 2012

    Bi tp ln mn in t s 1

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    Khoa in in T Lp DHDT1_K1

    MC LC

    Bi tp ln mn in t s 2

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    LI NI U

    Trong s pht trin ca t nc ta hin nay, in- in t l ngnh c vai tr rt

    quan trng trong s pht trin chung . Cc h thng in- in t c ng dng

    trong mi lnh vc ca i sng cng nh trong cc dy truyn sn xut hin i.

    xy dng ln cc h thng in- in t phi cn rt nhiu kin thc nh:

    Phn tch h thng, thit k nh gi h thng, kin thc v phn cng, kin thc v

    phn mmV vy i hi cc k s in t phi c mt kin thc vng vng.

    Bn bo co ny cung cp nhng kin thc c bn nht v vi iu khin 8051.

    ng thi qua nhng kin thc c bn , cc bn sinh vin s c ci nhn tng qut

    nht v vi x l v vi iu khin.

    Ni dung ca bn bo co gm 3 chng:

    Chng 1: H vi iu khin 8051.

    Chng 2: Ngt v Timer trong 8051.

    Chng 3: Mt s bi ng dng ca 8051.

    V thi lng bin son c hn nn trong bn bo co ny, nhm em ch a ra

    nhng vn c bn nht. Nhm em mong cc qu thy c c nhng li khuyn gip

    nhm em hon thin hn bn bo co ny.

    Chng em xin chn thnh cm n !

    Bi tp ln mn in t s 3

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    Chng 1

    H VI IU KHIN 8051

    1.1. Mt s khi nim c bn:1.1.1.Vi x l (VXL): L thut ng chung dng ng dng cc cng ngh vi x l,

    cng ngh tch hp v x l theo chng trnh v cc chip c ch to ch tch hp

    nhng phn cng thit yu nh CPU cng vi cc giao tip vi CPU v cc phn cng

    khc. Cc phn cng cn li (k c b nh) khng c tch hp ln chip m c

    ghp ni bn ngoi.

    1.1.2. Vi iu khin (VK): L thut ng dng ch cc chp c tch hp cc thitb ngoi vi ln trn cng 1 IC, vic tch hp thm cc thit b ngoi vi nh vy to ra

    nhiu li ch nh : gim thiu cc ghp ni bn ngoi, gim thiu cc linh kin in t

    ph, gim chi ph cho thit k h thng, nng cao hiu xut v tnh nng s dng.

    1.1.3. Cc phng php la chn mt b vi iu khin:

    Hin nay, c 4 b vi iu khin 8 bit chnh. l : 6811 ca Motorola, 8051 ca

    Intel, Z8 ca Xilog v Pic16 x ca Microchip Technology . Mi mt loi trn iu c

    mt tp lnh v thanh ghi ring duy nht, nu chng khng tng thch ln nhau. V

    cng c rt nhiu cc nh sn sut khc c cng loi nh trn, vy u s l tiu chun

    la chn mt b vi iu khin c bn. Gm c 3 tiu chun chnh trong vic la chn

    mt b vi iu khin l :

    - Tiu chun th nht: L phi p ng nhu cu tnh ton ca bi ton mt cch hiu

    qu v mt gi thnh v y chc nng c th nhn thy c.

    Trong khi phn tch bi ton th trc ht b vi iu khin m ta chn phi p

    ng c nhu cu t ra v mt cng sut v gi thnh. Chng ta phi bit c b vi

    iu khin no l 8 bit,16 bit hay 32 bit c th p ng tt nht nhu cu bi ton, cc

    tiu chun c a ra cn nhc l:

    + Tc : Tc ln nht m b vi iu khin h tr l bao nhiu.

    + Kiu ng v: l kiu ng 40 chn DIP hay QEP hay l kiu khc

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    + Cng sut tiu th: iu ny c bit kht khe i vi nhng sn phm dng

    pin,acquy

    + Dung lng b nh ROM v RAM trn chp

    + S chn vo - ra v b nh thi trn chp.

    + Kh nng d dng nng cp cng sut cao hoc gim cng sut tiu th.

    + Gi thnh cho mt n v: iu ny quyt nh gi thnh cui cng ca b sn phm

    m mt b vi iu khin c s dng

    - Tiu chun th hai: L kh nng pht trin cc sn phm xung quanh n d rng nh

    th no? Cc cn nhc ch yu trong tiu chun ny bao gm: kh nng c sn trnhlng ng,g ri, trnh bin dch ngn ng C hiu qu v m ngun, trnh m phng h

    tr k thut v kh nng s dng trong nh v ngoi mi trng, Trong nhiu trng

    hp s h tr ca nh cung cp th ba (khng phi nh sn xut chip) cho chp cng tt

    nh nhau.

    - Tiu chun th ba: L kh nng sn sng p ng v s lng trong hin ti v tng

    lai. i vi mt s nh thit k tiu chun ny cn quan trng hn hai tiu chun

    trc. Hin nay, cc b vi iu khin 8 bit du u, h 8051 c s lng ln cc nh

    cung cp(nhiu ngun). Trong trng hp 8051 nh sng ch ca n l Intel, nhng

    hin nay c rt nhiu nh sn xut n (bao gm: Intel,Atmel, AMD)

    1.2. Tng quan v h vi iu khin 8051

    1.2.1. Lch s ra i v pht trin

    Vo nm 1981. Hng Intel gii thiu b vi iu khin c gi l 8051.B viiu khin ny bao gm: 128 byte RAM ,4K byte ROM trn chip, 2 b inh thi, 1

    cng ni tip v 4 cng vo ra tt c c t trong cng mt chp. H 8051 l mt b

    vi x l 8 bit, ngha l CPU x l c 8 bit d liu trong cng mt thi im, cn

    nhng d liu no ln hn 8 bit s c chia ra thnh cc d liu 8 bit cho CPU x l.

    H vi iu khin 8051 tr nn ph bin khi Intel cho php cc nh sn xut

    khc cng sn xut ra 8051 v bn bt k dng bin th no ca n nhng tt c nhng

    chp bin th u phi tng thch vi 8051 ban u v cc lnh. iu ny c ngha

    Bi tp ln mn in t s 5

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    l nu ta vit chng trnh iu khin cho phin bn ca h 8051 th tt c nhng dng

    bin th iu hot ng c.

    1.2.2. Cc c tnh ca h 8051:

    - Cc c tnh ring ca h 8051

    - Ngoi b vi iu khin 8051, chng ta cn c b vi iu khin 8052,8031 v cc

    dng bin th khc.

    - Bng so snh cc c tnh ca h 8051 vi cc loi khc:

    1.3. B tr bn trong ca s khi 8051:

    Bi tp ln mn in t s

    c tnh S lng

    Ram trn chip

    Rom

    B nh thi

    Chn vo ra

    Cng ni tip

    Ngun ngt

    128 byte

    4k byte

    2

    32

    1

    6

    6

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    1.3.1. n v x l trung tm CPU:- Cu to: CPU c xem nh b no ca vi iu khin v n c cu to bao gm n

    v x l s hc v lgic(ALU), cc thanh ghi, cc khi lgic v cc mch giao tip.

    - Chc nng: CPU tin hnh cc thao tc tnh ton x l, a ra cc tn hiu a ch, d

    liu v iu khin nhm thc hin mt nhim v no do ngi lp trnh a ra thng

    qua cc lnh.

    1.3.2. B nh :

    Hin nay, b nh ca vi iu khin 8051 gm c hai dng chnh. l b nh

    chng trinh v b nh d liu. Trong , b nh chng trnh dng cha m

    chng trnh hng dn cho CPU thc hin mt nhim v no . Thng thng b

    nh chng trnh khng b mt d liu khi dng cung cp ngun nui. Th d c th k

    n nh: ROM, PROM, EPROM, EEPROM, Flash. B nh d liu dng cha d

    liu (bao gm cc tham s, cc bin tm thi). Ty vo dng d liu m loi b nh

    ny c th mt hoc khng mt d liu khi dng cp ngun nui.

    1.3.3. Cng vo/ ra ni tip:

    - Khi nim: Cng ni tip c th c hiu n gin l vic truyn ln lt cc bt d

    liu trn cng mt ng tn hiu. ng thi vic truyn d liu bng cng ni tip

    phi tun theo mt c ch, mt giao thc hay mt nguyn tc nht nh. Th d mt s

    giao thc nh: SPI, I2C, SCI

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    - Phn loi: Cng ni tip gm c 02 kiu d liu chnh:

    + Truyn ng b: Thit b truyn v nhn u dng chung mt xung nhp.

    + Truyn d b: Thit b truyn v nhn s dng hai ngun xung nhp ring vi chnh lch nhau khng nhiu.

    Lu : Trong truyn d liu ni tip, xung nhp l yu t khng th thiu v n c vai

    tr xc nh gi tr ca bt d liu hay ni mt cch khc l xc nh thi im c mc

    lgic trn ng truyn d liu.

    - Chc nng: Cng ni tip gm 03 chc nng c bn:

    + n cng: Thit b ch c th hoc l truyn, hoc l nhn d liu.

    + Bn song cng: Thit b c th truyn v nhn d liu nhng ti mt thi im ch c

    th lm mt trong hai vic .

    + Song cng: Thit b c th ng thi truyn v nhn d liu.

    1.3.4. Cng vo/ ra song song:

    - Khi nim: Cng song song c th c hiu l cng gm cc bt d liu ctruyn cng mt lc trn cc ng tn hiu khc nhau.

    - c im:

    + y l cng bao gm cc ng tn hiu c ni vi mt s chn ca IC dng

    giao tip vi th gii bn ngoi IC. Giao tip y l a in p ra hoc c vo gi

    tr in p ti chn cng tng ng vi gi tr lgic 0(mc in p thp xp x 0

    VDC)hoc 1(mc in p cao xp x +5 VDC).+ Mi cng vo/ra song song thng vo/ra khc nhau v gi l cc cng 08 bt. Cc

    ng tn hiu vo/ra ca cc cng v thuc cng mt cng l c lp vi nhau. T ,

    ta c th a ra hay c vo cc gi tr lgic khc nhau i vi tng ng tn hiu

    vo/ra.

    + Cc cng vo/ra song song c th c tch hp thm cc chc nng c bit lin

    quan n cc ngoi vi khc.

    Bi tp ln mn in t s 8

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    1.3.5. B m/B nh thi:

    - Nhim v : Dng m cc xung nhp v gi tr ca b m s c tng ln 01

    n v hay gim i 01 n v mi khi c thm mt xung nhp ti u vo m.

    - Phn loi xung nhp: Gm 02 loi chnh:

    + Xung nhp bn trong IC: l xung nhp c to ra nh kt hp mch dao ng

    bn trong IC v cc linh kin ph bn ngoi ni vi IC hay cn c gi l cc b nh

    thi (Timers).

    + Xung nhp bn ngoi IC:L cc tn hiu lgic thay i lin tc gia 02 mc 0-1v

    khng nht thit phi l u n hay cn c gi l cc b m (counters).1.3.6. Khi giao tip bus:

    - Chc nng: Dng ghp ni gia cc bus bn trong chip v cc chn a ra ngoi

    chip. Ngoi ra, vic a cc tn hiu a ch v d liu ra ngoi l nhm m rng kh

    nng phi ghp thm ca vi x l vi cc ngoi vi khc (ch yu l cc b nh

    ngoi) ngoi cc ngoi vi c tch hp trn IC.

    - c im ca cc ng tn hiu:

    + Thng thng th s lng cc ng tn hiu l gi nguyn khi a ra ngoi chip,

    tuy nhin trong mt s trng hp s lng cc ng tn hiu c th nh hn s lng

    thc bn trong (v d nh trng hp ca vi x l 8088, bus d liu bn trong l 16 bit

    nhng a ra ngoi ch c 8 bit).

    + Khi a ra ngoi, cc tn hiu a ch v d liu c th c ghp vi nhau (cng s

    dng chung mt s chn no ) hoc c tch ring (tn hiu a ch dng mt schn, tn hiu d liu dng mt s chn khc).

    + Ngi ta thng dn knh hay cn gi l ghp chc nng gia bus a ch v bus

    d liu gim thiu s chn cn thit. Lc , tn hiu a ch s xut hin trc v tn

    hiu d liu xut hin sau trn cng mt tp hp cc ng tn hiu.

    1.4. Kiu ng v ca chp 8051

    Bi tp ln mn in t s 9

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    - Cu to: Mt b chp 8051 c tt c 40 chn vi cc chc nng ring v c ng

    vo trong mt hp theo cc cch khc nhau.

    - Phn loi: Hin nay c 2 kiu ng v i vi h 8051:

    + ng theo kiu hai hng chn PDIP/Cerdip:

    + ng theo kiu vung dt PQFP/TQFP:

    Bi tp ln mn in t s 10

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    + ng theo kiu vung dt PLCC/LCC:

    1.5. Chc nng cc chn ca 8051:

    Bi tp ln mn in t s 11

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    Chp AT89C51 gm c 40 chn. Trong , c 32 chn dnh cho 4 cng P0, P1,

    P2, P3 vi mi cng c 8 chn. V 8 chn cn li dng cho ngun VCC, t GND, cc

    chn giao ng XTAL1 v XTAL2 ti lp RST cho php cht a ch ALE truy cp a

    ch ngoi cho php ct chng trnh. C th l:

    - Chn VCC: l chn s 40 dng cp in p ngun (+5V) cho chp.

    - Chn GND: l chn s 20 v cn c gi l chn ni Mass.

    - Chn XTAL1 v XTAL2: Ln lt l hai chn u vo 19 v 18 c ni vi b

    giao ng thch anh. B giao ng thch anh c ni ti XTAL1 v XTAL2 cng cn

    hai t in gi tr 30pF. Mt pha ca t in c ni xung t. Cn phi lu rng

    c nhiu tc khc nhau ca h 8051. Tc c coi nh l tn s cc i ca bgiao ng c ni ti chn XTAL.

    - Chn RST: l chn s 9 cn gi l chn ti lp RESET cho chp 8051. N l u

    vo c mc tch cc cao (bnh thng mc thp). Khi chn ny c cp mt xung

    cao th vi iu khin s hiu rng phi thit lp li trng thi. Di y l s cu to

    chn RST:

    Bi tp ln mn in t s 12

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    - Chn EA : l chn s 31 c ngha l truy cp ngoi (External Access). Ngoi ra,

    n l mt chn u vo v phi c ni hoc vi VCC hoc GND. Hay ni cch khc

    n khng c h.

    - Chn PSEN : l chn s 29, chn ny cho php xut gi tr vo b nh ngoi, chn

    ny c ni vi chn OE (Output Enable) ca Rom ngoi. Khi vi iu khin lm vic

    vi b nh ngoi, chn PSEN pht ra tn hiu kch hot mc thp v c kch hot 2

    ln trong mt chu k my.

    - Chn ALE: l chn s 30, chn ny cho php cht a ch ngoi v c tch cc

    cao. Tn hiu chn ALE dng lm tn hiu iu khin gii a hp cc ng a

    ch v cc ng d liu khi kt ni chung vi IC cht. Ngoi ra, chn ALE c sdng phn knh a ch v d liu bng cch ni ti chn G ca chp 74LS373. Cc

    xung a vo chn ALE c tc bng 1/6 tn s dao ng a vo vi iu khin, nh

    vy c th dng tn hiu chn ALE lm tn hiu xung nhp cho cc phn khc ca h

    thng.

    - Cng P0: y l cng chim tt c 8 chn (t chn s 32 n 39). N c th c

    dng nh cng u ra, s dng cc chn ca cng 0 va lm u ra, va lm u vo

    th mi chn phi c ni ti mt in tr ko bn ngoi 10k v cng P0 l mtmng m khc vi cc cng P1, P2 v P3. Ngoi ra, khi ni 8051/31 ti b nh ngoi

    th cng 0 cung cp c a ch v d liu 8051 dn d liu v a ch qua cng P0

    tit kim s chn. Di y l s cng P0:

    Bi tp ln mn in t s 13

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    - Cng P1: Cng P1 cng chim tt c 8 chn (t chn 1 n chn 8) n c th c s

    dng nh u vo hoc u ra. So vi cng P0 th cng ny khng cn n in tr ko

    v n c cc in tr ko bn trong. Trong qu trnh ti lp th cng P1 c cu

    hnh nh mt cng u ra. Cn bin cng P1 thnh u vo th n phi c lp

    trnh mc logic cao n tt c cc bit ca n.

    - Cng P2: Cng P2 cng chim 8 chn (cc chn t 21 n 28). N c th c sdng nh u vo hoc u ra ging nh cng P1, cng P2 cng khng cn in tr

    ko v n c cc in tr ko bn trong. Khi ti lp, th cng P2 c cu hnh nh

    mt cng u ra. Cn to cng P2 nh u vo th n phi c lp trnh bng mc

    logic cao ti tt c cc chn ca n.

    Vai tr kp ca P2: Cng P2 c dng nh u ra n gin trong cc h thng da

    trn 8751, 89C51 v DS5000. Cng P2 cng c ch nh nh l A8 - A15 bo chc

    nng kp ca n. V mt b 8051/31 c kh nng cung cp 64kbyte b nh ngoi, ncn mt ng a ch 16 bt. Trong khi P.0 cung cp 8 bit thp qua A0 A7. Cng

    vic ca P2 l khi 8051/31c ni ti b nh ngoi th P2 c dng cho 8 bt ca

    a ch 16 bit v n khng th dng cho vo ra.

    - Cng P3: y l cng chim tng cng l 8 chn (t chn 10 n chn 17) n c th

    c s dng nh u vo hoc u ra. Cng P3 khng cn cc in tr ko cng nh

    P1 v P2. V n c chc nng b sung l cung cp mt s tn hiu quan trng c bit

    Bi tp ln mn in t s 14

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    chng hn nh cc ngt. Bng di y cung cp cc chc nng khc ca cng P3

    trong c 8051 v 8031.

    Nhn vo bng trn ta thy:

    + Cc bit P3.0 v P3.1 c dng cho cc tn hiu nhn v pht d liu trong truyn

    thng d liu ni tip.

    + Cc bit P3.2 v P3.3 c dnh cho cc ngt ngoi.

    + Bit P3.4 v P3.5 c dng cho cc b nh thi 0 v 1.

    + Cui cng cc bit P3.6 v P3.7 c cp cho cc tn hiu ghi v c cc b nh ngoi

    c ni ti cc h thng da trn 8051/31. Hai bit ny, c dng vi chc nng vo -

    ra trong cc h thng da trn 8751, 89C51 hoc D35000.

    1.6. S mch in c bn chp 8051 c th hot ng c:

    Bi tp ln mn in t s 15

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    Chng 2

    Bi tp ln mn in t s 16

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    NGT V TIMER TRONG 8051

    2.1. Tm hiu cc b timer:

    2.1.1. Timer l g?- Timer l mt chui cc Flip-Flop c chia lm 2, n nhn tn hiu vo l mt xung

    nhp, xung nhp ca Flip Flop th nht cng l xung nhp ca Flip Flop th 2 m n

    cng chia tn s ca xung cho 2 v c tip tc cho n ht. V mi tng k tip phi

    chia cho 2 nn timer n tng phi chia tn s xung nhp cho 2n.

    - Cc b nh thi (timer) c s dng rt rng ri nh:

    + Trong trong ng dng o lng v iu khin.

    + nh khong thi gian (hn gi) thng qua vic thit lp c trn bng 1.

    + Dng to xung nhp hoc o rng ca xung.

    + m s kin dng xc nh s ln xy ra ca s kin. chnh l vic a cc s

    kin thnh s chuyn mc t 1 xung 0 trn cc chn T0, T1 hoc T2 dng cc

    Timer tng ng m cc s kin .

    - Ty thuc vo mi ng dng m u vo b nh thi c th l ngun xung ly t

    xung nhp ca vi iu khin hoc ngun xung t bn ngoi a vo.

    2.1.2. Cc thanh ghi ca Timer:

    - Thanh ghi ch nh thi (TMOD):

    + c im: Thanh ghi TMOD cha 2 nhm 4 bt dng t ch lm vic cho

    Timer 0 v Timer 1.

    + Chc nng cc bt trn thanh ghi ch nh thi (TMOD):

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    GATE 1: Bt m cng cho Timer 1, khi c t bng 1 th Timer 1 ch chy khi chn

    INT 1 mc cao. Nu bt ny c ci t l 0 th hot ng ca Timer 1 khng b nh

    hng bi mc logic trn chn INT 1.

    GATE 0: Bt m cng cho Timer 0, khi c ci t bng 1 th Timer 0 ch chy khi

    chn INT 0 mc cao. Nu bt ny c t l 0 th hot ng ca Timer 0 khng b

    nh hng bi mc logic trn chn INT 0.

    C/#T1: Bt chn ch Counter/Timer ca Timer 1.Nu bng 1(couter) m s kin

    , nu bng 0(timer) dng nh khong thi gian

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    IT1: C ngt do Timer 1.

    IE1: C ngt ngoi 1.

    IT0: C ngt do Timer 0.IE0: C ngt ngoi 0.

    - Cc thanh ghi cha gi tr ca cc b nh thi:

    + c im: Cc Timer 0 v Timer 1 u l cc Timer 16 bt, mi Timer c thanh ghi

    8 bt dng cha gi tr khi to hoc gi tr hin thi ca cc Timer. C th Timer 0

    c TH0 v TL0; Timer TH1 v TL1.

    - Thanh ghi T2CON :

    + c im: Thanh ghi T2CON cha cc bt trng thi v cc bt iu khin cho Timer

    0 v Timer 1.

    + Chc nng cc bt trn thanh T2CON:

    TF2: C bo trn ca Timer 2, TF2 c t khi Timer 2 trn v c xa bng phn

    mm TF2 khng c thit lp khi TCLK hoc RCLK c t bng 1.EXF2: C ngt ngoi ca Timer 2, TXF2=1, khi xy ra s np li hoc thu nhn.

    EXF2=1cng gy ra ngt do Timer 2 nu nh ngt ny c lp trnh cho php, EXF2

    c xa bi phn mm.

    RCLK: Bt chn Timer cung cp xung nhp cho ng nhn cng ni tip. RCLK=1

    th Timer 2 s cung cp tc baud cho cng ni tip ( ch 1 v 3) RCLK=0 th

    Timer s cung cp tc baud cho cng ni tip ( ch 1 v 3).

    Bi tp ln mn in t s 19

    TH0 (8 bt) TL0 (8 bt)

    Timer 0

    TH1 (8 bt) TL1 (8 bt)

    Timer 1

    TF2 EXF2 RCLK TCLK EXEN2 TR2 C/#T2 CP/#RL2

    T2CON.7 T2CON. 6 T2CON.5 T2CON. 4 T2CON. 3 T2CON.2 T2CON. 1 T2CON.0

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    TCLK: Bt chn Timer cung cp xung nhp cho ng truyn cng ni tip. TCLK=1

    th Timer 2 s cung cp cho tc baud cho cng ni tip ng truyn TCLK th

    Timer 1 s cung cp tc baud cho cng ni tip ng truyn.

    EXEN2: Bt iu khin hot ng ca Timer 2, khi EXEN2=1 vic np li hoc thu

    nhn (Capture) din ra khi c s chuyn trng thi t 1 sang 0 chn T2EX nu T2

    khng s dng cung cp tc baud cho cng ni tip.

    TR2: Bt iu khin hot ng ca Timer 2( ging nh TR0 v TR1)

    C/#T2: Bt chn ch Counter/Timer ca Timer 2.

    CP/#RL2: Bt chn ch thu nhn hay np li ca Timer 2. Khi CP/#RL2C=1 victhu nhn c thc hin khi c xn xung chn T2EX v bt EXEN2 c t l 1.

    Khi CP/#RL2C =0 vic np li c thc hin khi hoc l Timer 2 trn hoc l c sn

    xung chn T2EX v bt EXEN2 c t mc 1. N RCLK v TCLK =1, bt ny

    c b qua, Timer 2 t np li khi trn.

    - Thanh ghi T2MOD:

    Cc bt t T2MOD.7 n T2MOD.2 khng c s dng.Bt T2MOD.1 k hiu

    l DCEN cho php u ra khi s dng Timer 2 to xung(ch to xung Clock

    out). Bt T2MOD.0 k hiu l DXEN bt ny cho php Timer 2 hot ng nhu 1 b

    m tin/li.

    - Thanh ghi TH2,TL2.RCAP2H v RCAP2L:

    Ging nh TH0,1 v TL0,1, TH2 v TL2 cha cc gi tr m ca Timer 2, tuy

    nhin khc nhau l Timer 0,1 c th dng THx cha gi tr np li cn Timer 2 li

    dng RCAP2H v RCAP2L cha gi tr cn np li.

    2.1.3. Cc ch hot ng ca Timer:

    - Ch 0:

    + c im: Ch 0 l ch nh thi 13 bt, ch ny ch tng thch vi cc b

    v iu khin trc kia, gi ch ny khng cn thch hp, t c s dng. Trong

    ch ny b nh thi dng 13 bt (8 bt TH v 5 bt TL) cha gi tr m, 3 btthp ca TL khng c s dng.

    Bi tp ln mn in t s 20

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    + S :

    + Nguyn l hot ng:

    Ngun xung Clock c a ti Timer t cc ngun khc nhau ph thuc vo

    bt C/#Tx trong thanh ghi TMOD. Nu C/Tx=1, xung Clock c ly t bn ngoi qua

    chn Tx(T0,T1 hoc T2). Cn nu C/Tx=0, xung Clock s c ly t b chia tn trong

    chp, tn s ca xung y l 1/12 tn s ca b dao ng thnh anh (Fosc).

    Ngun xung Clock ni trn s c iu khin a ti cc Timer bng cc bit

    TR, GATE v mc logic trn cc chn INTx. Nu TRx=0, cc Timer s b cm m

    khng cn quan tm n GATE v mc logic trn cc chn INTx (th hin l cng

    AND). Cn nu TRx=1, cc Timer s hot ng khi hoc l bt GATE =0 hoc l bt

    GATE=1 v trn chn INTx c mc logic l 1.- Ch 1:

    + c im:

    Trong ch 1, b nh thi dng c hai thanh ghi TH v TL cha gi trm, v vy ch ny cn gi l ch nh thi 16 bt.

    Vi ch 1 gi tr ln nht m Timer cha c l 65535 (tng ng FFFFH),

    khi m qu gi tr ny s xy ra trn, khi c trn TF s c t bng 1. Sau khi trn

    Bi tp ln mn in t s 21

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    nu mun chng trnh m tip ta phi c cu lnh np li gi tr khi to sau khidng Timer.

    + S :

    - Ch 2:

    + c im:

    Trong ch 2 b Timer dng TL cha cc gi tr m v TH cha gi tr np li

    v vy ch ny c gi l ch t np li 8 bt.

    Sau khi m qu 255 s xy ra trn, khi TF c t bng 1 ng thi gi tr ca

    Timer t ng c np li bng ni dung TH.

    + S :

    Bi tp ln mn in t s 22

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    - Ch 3:

    + c im: Trong ch 3, Timer 0 c tch thnh 2 b Timer 8 bt hot ng c

    lp ch ny s gip cung cp thm cho ta 1 b Timer na.

    + S :

    + Nguyn l hot ng:

    B Timer th 1 vi ngun xung Clock c ly t b chia tn trn chp hoc t

    b dao ng bn ngoi qua chn T0 ty thuc vo gi tr ca bt C/#T0 vic iu khin

    Bi tp ln mn in t s 23

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    Khoa in in T Lp DHDT1_K1

    hot ng ca b th 1 do bt GATE, bit TL0 v mc lgic trn chn INT0 (ging ch

    0,1,2). Gi tr m cha trong TL0, khi trn c TF0=1 gy bi Timer 0.

    B Timer th 2 vi ngun xung Clock c ly t b chia tn trn chp vic iu

    khin hot ng ch l vic t li gi tr ca bt TR0, gi tr m cha trong TH0 khi

    c trn TH1=1 gy ra ngt bi Timer 1.Khi Timer 0 c tch thnh 2 Timer 8 bt th

    Timer 1 vn hot ng bnh thng vi cc ch 0,1,2 tuy nhin khi xy ra trn c

    TF1 khng c thit lp bng 1. Nh vy trong trng hp ny Timer 1 ch c th s

    dng cho cc ng dng khng cn n ngt nh to tc baud cho port ni tip.

    2.1.4. Lp trnh cho Timer:

    - Nh ta bit cho Timer hot ng trc ht chng ta phi tnh ton hai gi trTH0 vTL np vo cho chip. Sau y l cc bc tinh ton lp trnh cho Timer:

    + Bc 1: Chia thi gian tr cn thit ( rng xung) cho 1us.

    + Bc 2: Ly 65536 n . Vi n l kt qu ca bc 1

    + Bc 3: Chuyn kt qu bc 2 sang h thp lc phn di dng: OxAABB

    + Bc 4: t TL=OxAA, TH0=OXBB.

    2.2. Tm hiu cc ngt:

    2.2.1. Ngt l g?

    - Mt b phn vi iu khin c th khc phc mt vi thit b, c 2 cch d thc hin

    iu ny l s dng cc ngt v thm d (polling). Trong phng php ny s dng

    cc ngt th mi khi c mt thit b bt k cn n dch v ca n th n bo cho b vi

    iu khin bng cch gi 1 tn hiu ngt.

    - Khi nhn c tn hiu ngt th b vi iu khin ngt tt c nhng g n ang thc

    hin chuyn sang phc v thit b. Chng trnh i cng vi ngt c gi l trnh

    dch v ngt ISR (Interrupt Service Rouine) hay cn gi l trnh qun l ngt

    (Interruput Handler).

    Bi tp ln mn in t s 24

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    - Cn trong phng php thm d th b vi s iu khin hin th lin tc tnh trng ca

    mt thit b cho v iu kin tha mn th n phc v thit b. Sau n chuyn

    sang hin th tnh trng ca thit b k tip cho n khi tt c u c phc v.

    - Khi kch hot mt ngt b vi iu khin i qua cc bc sau:

    + N kt thc lnh ang thc hin v lu a ch ca lnh k tip (PC) vo ngn xp.

    + N cng lu tnh trng hin ti ca tt c cc ngt vo bn trong ( ngha l khng lu

    vo ngn xp).

    + N nhy n mt s v tr c nh trong b nh c gi l bng vc t ngt ni lu

    gi a ch ca mt tnh trnh phc v ngt.+ B vi iu khin nhn a ch ISR t bng vc t ngt v nhy ti . N bt u thc

    hin trnh phc v ngt cho n lnh cui cng ca ISR l RETI (tr v t ngt).

    + Khi thc hin lnh RETI b vi iu khin quay tr v ni n b ngt. Trc ht n

    nhn a ch ca b m chng trnh PC t ngn xp bng cch ko 02 byte trn nh

    ca ngn xp vo PC. Sau bt u thc hin cc lnh t a ch .

    Lu : bc 5 n vai tr nhy cm ca ngn xp, v l do ny m chng ta phi cnthn khi thao tc cc ni dung ca ngn xp trong ISR. c bit trong ISR cng nh bt

    k chng trnh con CALL no s ln y vo ngn xp (Push) v s ln ra t n (Pop)

    v phi bng nhau.

    2.2.2. Cc ngt (Interrupt) ca 8051:

    - Hin nay, chp AT89C51 c 6 ngt:

    + Hai ngt ngoi n t chn #INT0 v t chn #INT1 tng ng cc chn P3.2 vP3.3 ca cng P3. V tr trong bng vector ca cc ngt ngoi ny ln lt l 0003H v

    0013H gn cho cc chn INT0 v INT1.

    + Ngt do b Timer 0. a ch ca ngt ny l 000B4.

    + Ngt do b Timer 1. a ch ca ngt ny l 001B4.

    + Ngt do b Timer 2

    Bi tp ln mn in t s 25

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    + Ngt do Port ni tip

    - Su ngt ny c xa khi Reset v c t ring bng phn mm bi cc bt trong

    cc thanh ghi cho php ngt (IE), thanh ghi u tin ngt (IP).

    2.2.3. Cc thanh ghi ca Ngt:

    - Thanh ghi cho php ngt IE (Interrupt Enable)

    Trong :+ EA: Cho php hoc cm ton b

    + - : Khng c nh ngha

    + ET2 : Cho php ngt t Timer 2

    + ES : Cho php ngt t t Port ni tip

    + ET1 : Cho php ngt t Timer 1

    + EX1 : Cho php ngt ngoi 1

    + ET0 : Cho php ngt t Timer 0

    + EX0 : Cho php ngt ngoi 0

    - Thanh ghi u tin ngt IP :

    Trong :

    + - : Khng c nh ngha

    + - : Khng c nh ngha

    + PT2 : u tin cho ngt t Timer 2

    Bi tp ln mn in t s 26

    - - PT2 PS PT1 PX1 PT0 PX0

    7 6 5 4 3 2 1 0

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    Khoa in in T Lp DHDT1_K1

    + PS : u tin cho ngt Port ni tip

    + PT 1 : u tin cho ngt t Timer 1

    + PX1 : u tin cho ngt ngoi 1+ PT0 : u tin cho ngt t Timer 0

    + PX0 : u tin cho ngt ngoi 0.

    - Cc Vector Ngt :

    Khi c mt ngt no c chp nhn, gi tr c np vo PC c gi l

    Vector ngt. N l a ch bt u ca chng trnh con phc v ngt ISR (Interrupt

    Service Routine) tng ng vi ngun to ngt. Khi ch n mt ngt, c gy ngt t

    ng b xa bi phn cng, ngoi tr RI v TI phi c xa bng phn mm.

    Di y l bng Vector ngt ca 8051:

    - Cc bc cho php ngt :

    + Bc 1: Bit D7 ca thanh ghi IE l EA phi c bt ln cao cho php cc bit cn

    li ca thanh ghi nhn c hiu ng.

    + Bc 2: Nu EA =1 th tt c mi ngt u c php v s p ng nu cc bit

    tng ng ca chng trong IE c mc cao. Nu EA =0 th khng c ngt no c p

    ng cho d bit tng ng ca n ttrong IE l mc cao.

    2.2.4. Lm vic vi Ngt :

    Bi tp ln mn in t s 27

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    - Ngt do cc b Timer : Thng p dng cho cc dng bi tp to nhiu xung khc

    nhau trn cc chn iu khin nh : P1.0, P1.1, P1.2

    - Ngt do cng ni tip :

    + Ngt cng ni tip khi hoc c pht (TI) hoc c thu (RI) c t ln mc logic 1.

    Ngt pht xy ra khi b m truyn rng, ngt thu xy ra khi thu xog v ang i

    SBUF c (b m truyn y).

    + Cc ngt do cng ni tip khc vi cc ngt do Timer. C gy ra ngt do Port ni tip

    khng b xa bng phn cng khi CPU chuyn ti IR do c 02 ngun ngt do cng ni

    tip TI v RI, ngun ngt phi c xc nh trong ISR v c to ngt s c xa bi

    phn mm.

    - Ngt ngoi :

    + Cc ngt ngoi xy ra khi c mt mc thp hoc cnh xung trn chn INT0 hoc

    INT1 ca b vi iu khin.

    + Cc c to ngt ny l cc bt IE0 v IE1 trong TCON. Khi quyn iu khin

    chuyn n ISR, c to ra ngt ch c xa khi ngt c tch cc bng cch xung,

    nu ngt c tch cc theo mc, th ngun yu cu ngt t bn ngoi s iu khin

    mc ca c thay i ddoit cho phn cng.

    + Cch thc tch cu ngt c t bi cc bt Itx trong thanh ghi SCON, nu Itx=0,

    ngt c tch cc bng mc thp, nu Itx=1, ngt c tch cc bng cnh xung

    (sn m). Nu ngt ngoi c tc ng bng cnh xung th ngun bn ngoi phi

    gi chn INTx mc cao ti thiu trong 1 chu k my m bo cho CPU pht hin

    c sn xung.

    + Nu ngt ngoi tc ng mc thp th ngun bn ngoi phi gi chn INTx mc

    thp cho n khi ngt c p ng v khng tc ng na khi ISR hon tt nu khng

    mt ngt khc s c lp li.

    - Phn loi ngt ngoi : Gm 02 loi c bn :

    + Ngt theo mc : ch ngt theo mc th cc chn INT0 v INT1 bnh thng

    mc cao (ging nh tt c cc chn ca cng I/O) nu c mt tn hiu mc thp a

    Bi tp ln mn in t s 28

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    Khoa in in T Lp DHDT1_K1

    n chng th n ghi nhn ngt . Sau b vi iu khin dng tt c mi cng vic ca

    n ang thc hin v nhy n bng vector ngt phc v ngt . iu ny c gi l

    ngt theo mc v l ch ngt mc nh cho 8051 khi c cp ngun. Tn hiu mc

    thp ti chn INT phi c ly i trc khi thc hin lnh cui cng ca trnh phc vngt RETI,nu khng mt ngt khc li c to ra.

    + Ngt theo sn : Cc chn INT0 v INT1 l cc ngt theo mc thp, mun cc chn

    ny thnh ngt theo sn th mt chng trnh s c vit cho thanh ghi TCON.

    Thanh ghi TCON tm gi cc bit c IT0 v IT1 l cc bit D0 v D2 ca thanh ghi

    TCON tng ng . Chng c th c biu din nh TCON0 v TCON 2 v thanh ghi

    TCON c th nh a ch theo bit l. Khi bt ngun tr li th TCON.0(IT0) v

    TCON.2(IT1) u mc thp (0) .

    Bi tp ln mn in t s 29

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    Khoa in in T Lp DHDT1_K1

    Chng 3

    MT S BI NG DNG CA 8051

    Bi 1 : Vit chng trnh iu khin 16 LED n nhy 4 trng thi khc nhau?SVTH : Nguyn nh S

    Bi lm :

    L Thuyt

    //Ly th vin

    #include

    // Khai bo bin

    unsigned int i,j,x,t;

    //Hm to tr

    void delay(unsigned int x)

    {for(i=0;i

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    {unsigned int M[]={0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80};

    unsigned int j,t;

    P2=P3=0x00;for(t=0;t

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    {for(j=0;j

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    Bi 2: Vit chng trnh iu khin LED nhy lin tc, LED xanh nhy 10 ln mikhi nhn SW?

    SVTH : Nguyn Khc Sng

    Bi lm:

    L thuyt

    // Ly th vin cho chip

    #include

    // Khai bo bin

    unsigned int i,j,x;

    //Hm to tr

    void delay(unsigned int x)

    { for(i=0;i

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    { ledx=1;

    delay(20000);

    ledx=0;delay(20000);

    ledd=~ledd;

    }

    }

    }

    }

    M phng

    Bi tp ln mn in t s 34

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    Khoa in in T Lp DHDT1_K1

    Bi 3: Vit chng trnh s dng ngt ngoi iu khin LED nhy lin tc, LEDxanh nhy 10 ln mi khi nhn SW1, LED vng nhy 5 ln mi khi nhn SW2?

    SVTH : Nguyn Khc Sng

    Bi lm: Sai (Cha lm c)

    L thuyt

    //Ly th vin

    #include

    #include

    //nh ngha cho cc chn Chip

    sbit sw1=P1^0;

    sbit sw2=P1^1;

    sbit DO=P2^0;

    sbit XANH=P2^1;

    sbit VANG=P2^2;

    //Khai bo bin

    unsigned int i;

    // Hm to tr

    void delay(unsigned int x)

    { for(i=0;i

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    {for(i=1;i

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    Khoa in in T Lp DHDT1_K1

    Bi 4: Vit chng trnh to mt xung vung c tn s 10KHz s dng timer?

    SVTH: Nguyn Vn Thc

    Bi lm:

    L Thuyt

    // Ly th vin cho Chip

    #include

    // nh ngha cho chn ca Chip

    sbit F=P2^0;

    // Hm chnh

    void main(){

    IE=0x82;

    TMOD=0x02;

    TR0=1;

    TH0=-50;}

    // Hm s dng ngt

    void ngat(void) interrupt 1{

    F=~F;

    }

    M phng:

    Bi tp ln mn in t s 37

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    Bi tp ln mn in t s 38

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    Khoa in in T Lp DHDT1_K1

    Bi 5: Vit chng trnh s dng ngt to hai xung vung c tn s khc nhau?

    SVTH: Nguyn Th Thy

    Bi lm:

    L thuyt

    // Ly th vin

    #include

    // nh ngha cc chn xung

    sbit XUNG1 = P2^0;

    sbit XUNG2 = P2^1;

    unsigned int c=0,v1=0;

    // Hm chnh

    void main(void)

    { IE=0x82; /*ngat ngoai INTO*/

    TMOD = 0x02; /*timer 0 che do 2*/

    TR0=1;

    TH0=-100;}

    // Hm s dng ngt

    void ngat(void) interrupt 1

    {XUNG1=~XUNG1;

    XUNG2=~XUNG1;

    }

    Bi tp ln mn in t s 39

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    M phng:

    Bi tp ln mn in t s 40

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    Khoa in in T Lp DHDT1_K1

    Bi 6: Vit chng trnh s dng timer to hai xung vung o nhau?

    SVTH: Nguyn nh S

    Bi lm:

    L Thuyt

    // Ly th vin cho Chip

    #include

    #include

    // nh ngha cc chn xung

    sbit xung1=P2^1;

    sbit xung2=P2^0;

    // Hm chnh

    void main (void)

    {TMOD=0x21;

    TH1=-100; //he so chia 200

    TR1=1;

    //khoi tao thanh ghi

    IE=0x8a;

    IP=0;

    TF0=1;

    while(1);}

    //Hm s dng ngt

    void ngatT0 (void) interrupt 1

    {

    TR0=0;

    Bi tp ln mn in t s 41

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    Khoa in in T Lp DHDT1_K1

    TH0=-10000/256;

    TL0=-10000%256;

    xung2=~xung2;

    TR0=1;}

    // Hm s dng Timer

    void ngatT1 (void) interrupt 3

    {

    xung1= ~xung1;

    }

    M phng

    Bi tp ln mn in t s 42

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    Khoa in in T Lp DHDT1_K1

    Bi 7: Vit chng trnh qut 4 LED 7 thanh m t 1234 n 4567?

    SVTH: Nguyn Th Thy

    Bi lm:

    L thuyt

    // Ly th vin cho Chip

    #include

    // Khai bo bin

    unsigned int i,j,nghin,tram,chuc,dvi,so;

    // Khai bo mng

    unsigned int M[]={ 0x40,0xf9,0x24,0x30,0x19,0x12,0x02,0x78,0x00,0x10};

    // To hm tr

    void delay(void)

    { for(i=0;i

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    P2=M[chuc];

    delay();

    P3=0x02;

    P2=M[tram];

    delay();

    P3=0x01;

    P2=M[nghin];

    delay();}

    // Hm chnh

    void main()

    {while(1)

    {for(so=1234;so

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    Khoa in in T Lp DHDT1_K1

    Bi 8: Vit chng trnh qut 6 LED 7 thanh m t 123456 n 252525?

    SVTH: Nguyn Thanh Thi

    Bi lm:

    L thuyt:

    // Ly th vin cho Chip

    #include

    // Khai bo cc bin

    unsigned int i,j,s6,s5,s4,s3,s2,s1;

    unsigned long so;

    // Khai bo mng

    unsigned int M[]={ 0x40,0xf9,0x24,0x30,0x19,0x12,0x02,0x78,0x00,0x10};

    // Hm tr

    void delay(void)

    { for(i=0;i

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    P2=M[s1];

    delay();

    P3=0x10;

    P2=M[s2];

    delay();

    P3=0x08;

    P2=M[s3];

    delay();

    P3=0x04;

    P2=M[s4];

    delay();

    P3=0x02;

    P2=M[s5];

    delay();

    P3=0x01;

    P2=M[s6];

    delay();

    }

    // Hm chnh

    void main()

    {while(1)

    {for(so=123456;so

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    delay();

    }

    }

    }}

    M phng

    Bi tp ln mn in t s 47

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    Khoa in in T Lp DHDT1_K1

    Bi 9: Vit chng trnh qut Matrix LED 8x8 hin th ch G?

    SVTH: Nguyn Vn Thc

    Bi lm:

    L thuyt

    // Ly th vin cho Chip

    #include

    // Khai bo bin

    unsigned int i,j;

    // Khai bo mng

    unsigned char MC[]={0xfe,0xfd,0xfb,0xe7,0xef,0xdf,0xbf,0x7f};

    unsigned char MH[]={0x00,0x7e,0xff,0xc3,0xdb,0xdf,0xde,0x18};

    // Hm to tr

    void delay()

    {

    for(i=0;i

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    delay();

    }

    }

    }

    M Phng

    Bi tp ln mn in t s 49

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    Khoa in in T Lp DHDT1_K1

    Bi 10: Vit chng trnh qut Matrix LED 8x8 hin th ch B?

    SVTH: Nguyn Thanh Thi

    Bi lm:

    L thuyt

    // Ly th vin cho Chip

    #include

    // Khai bo bin

    unsigned int i,j;

    // Khai bo mng

    unsigned int MC[]={0xfe,0xfd,0xfb,0xe7,0xef,0xdf,0xbf,0x7f};

    unsigned int MH[]={0x00,0xff,0xff,0x99,0x99,0xff,0x66,0x00 };

    // Hm to tr

    void delay()

    {for(i=0;i

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    }

    M phng

    Bi tp ln mn in t s 51

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    CHNG 4: BI TP THC T