B sc cs i bo-de u-ii logic gates
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Transcript of B sc cs i bo-de u-ii logic gates
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Logic Gates & Boolean Algebra
Course: B.Sc.(CS)
Sem.:1st
Subject: Basics of Digital Electronics
Unit: 2nd
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Basic Definitions
Binary Operators◦ AND
z = x • y = x y z=1 if x=1 AND y=1
◦ ORz = x + y z=1 if x=1 OR y=1
◦ NOTz = x = x’ z=1 if x=0
Boolean Algebra◦ Binary Variables: only ‘0’ and ‘1’ values
◦ Algebraic Manipulation
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Boolean Algebra Postulates
Commutative Law
x • y = y • x x + y = y + x
Identity Element
x • 1 = x x + 0 = x
Complement
x • x’ = 0 x + x’ = 1
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Boolean Algebra Theorems
Duality
◦ The dual of a Boolean algebraic expression is
obtained by interchanging the AND and the OR
operators and replacing the 1’s by 0’s and the 0’s
by 1’s.
◦ x • ( y + z ) = ( x • y ) + ( x • z )
◦ x + ( y • z ) = ( x + y ) • ( x + z )
Theorem 1
◦ x • x = x x + x = x
Theorem 2
◦ x • 0 = 0 x + 1 = 1
Applied to a
valid equation
produces a
valid equation
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Boolean Algebra Theorems
Theorem 3: Involution◦ ( x’ )’ = x ( x ) = x
Theorem 4: Associative & Distributive◦ ( x • y ) • z = x • ( y • z )( x + y ) + z = x + ( y + z
)
◦ x • ( y + z ) = ( x • y ) + ( x • z )
x + ( y • z ) = ( x + y ) • ( x + z)
Theorem 5: De Morgan◦ ( x • y )’ = x’ + y’ ( x + y )’ = x’ • y’
◦ ( x • y ) = x + y ( x + y ) = x • y
Theorem 6: Absorption◦ x • ( x + y ) = x x + ( x • y ) = x
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Boolean Functions
Boolean Expression
Example: F =
x + y’ z
Truth Table
All possible
combinations
of input variables
Logic Circuit
x y z F
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1x
yz
F
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Algebraic Manipulation
Literal:A single variable within a term that may be complemented or not.
Use Boolean Algebra to simplify Boolean functions to produce simpler circuitsExample: Simplify to a minimum number of literals
F = x + x’ y ( 3 Literals)
= x + ( x’ y )
= ( x + x’ ) ( x + y )
= ( 1 ) ( x + y ) = x + y ( 2 Literals)
Distributive law (+ over
•)
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Complement of a Function
DeMorgan’s Theorm
Duality & Literal Complement
CBAF
CBAF
CBAF
CBAF
CBAF
CBAF
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Canonical Forms
Minterm
◦ Product (AND function)
◦ Contains all variables
◦ Evaluates to ‘1’ for a
specific combination
Example
A = 0 A B C
B = 0 (0) • (0) • (0)
C = 01 • 1 • 1 = 1
A B C Minterm
0 0 0 0 m0
1 0 0 1 m1
2 0 1 0 m2
3 0 1 1 m3
4 1 0 0 m4
5 1 0 1 m5
6 1 1 0 m6
7 1 1 1 m7
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Canonical Forms
Maxterm
◦ Sum (OR function)
◦ Contains all variables
◦ Evaluates to ‘0’ for a
specific combination
Example
A = 1 A B C
B = 1 (1) + (1) + (1)
C = 10 + 0 + 0 = 0
A B C Maxterm
0 0 0 0 M0
1 0 0 1 M1
2 0 1 0 M2
3 0 1 1 M3
4 1 0 0 M4
5 1 0 1 M5
6 1 1 0 M6
7 1 1 1 M7
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Canonical Forms
Truth Table to Boolean Function
CBAF CBA CBA ABCA B C F
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 1
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Canonical Forms
Sum of Minterms
Product of Maxterms
ABCCBACBACBAF
7541 mmmmF
)7,5,4,1(F
CABBCACBACBAF
CABBCACBACBAF
CABBCACBACBAF
))()()(( CBACBACBACBAF
6320 MMMMF
(0,2,3,6)F
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Standard Forms Sum of Products (SOP)
ABCCBACBACBAF BA
BA
CCBA
)1(
)(
AC
BBAC
)(
CB
AACB
)(
)()()( BBACCCBAAACBF
ACBACBF
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Standard Forms Product of Sums (POS)
CABBCACBACBAF
)( CCBA
)( AACB
)( BBCA
)()()( AACBCCBABBCAF
CBBACAF
))()(( CBBACAF
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Two-Level Implementations Sum of Products (SOP)
Product of Sums (POS)
B’C
FB’A
AC
AC
FB’A
B’C
ACBACBF
))()(( CBBACAF
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Logic Operators
AND
NAND (Not AND)
xy
x • y
xy
x • y
x y AND
0 0 0
0 1 0
1 0 0
1 1 1
x y NAND
0 0 1
0 1 1
1 0 1
1 1 0
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Logic Operators
OR
NOR (Not OR)
xy
x + y
xy
x + y
x y OR
0 0 0
0 1 1
1 0 1
1 1 1
x y NOR
0 0 1
0 1 0
1 0 0
1 1 0
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Logic Operators
XOR (Exclusive-OR)
XNOR (Exclusive-NOR)
(Equivalence)
xy
x Å yx y + x y
xy
x Å y
x � yx y + x y
x y XOR
0 0 0
0 1 1
1 0 1
1 1 0
x y XNOR
0 0 1
0 1 0
1 0 0
1 1 1
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Logic Operators
NOT (Inverter)
Buffer
x x
x x
x NOT
0 1
1 0
x Buffer
0 0
1 1
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Multiple Input Gates
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De Morgan’s Theorem on
Gates AND Gate
◦ F = x • y F = (x • y) F = x +
y
OR Gate
◦ F = x + y F = (x + y) F = x • y
Change the “Shape” and “bubble” all lines
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Universal Gates
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NOR Gate as an Inverter
Gate
X XZ
XXX (Before Bubble)
X Z
0 1
1 0Equivalent to Inverter
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NOR Gate as an OR Gate
X
YYX Y XZ
Y X
NOR Gate “Inverter”
X Y Z
0 0 0
0 1 1
1 0 1
1 1 1
Equivalent to OR Gate
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NOR Gate as an AND Gate
Y XY X Y XZ
“Inverters” NOR Gate
X Y Z
0 0 0
0 1 0
1 0 0
1 1 1
Equivalent to AND Gate
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NOR Gate Equivalent of AOI
Gates
AND OR INVERTER
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1. If starting from a logic expression, implement the design with AOI logic.
2. In the AOI implementation, identify and replace every AND,OR, and INVERTER gate with its NOR equivalent.
3. Redraw the circuit.
4. Identify and eliminate any double inversions. (i.e. back-to-back inverters)
5. Redraw the final circuit.
Process for NOR Implementation
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NAND Gate
X
YY X YXZ
X Y Z
0 0 1
0 1 1
1 0 1
1 1 0
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NAND Gate as an Inverter
GateXXX
XZ
X Z
0 1
1 0 Equivalent to Inverter
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NAND Gate as an AND Gate
X
Y YX YXZ
YX
NAND Gate Inverter
X Y Z
0 0 0
0 1 0
1 0 0
1 1 1
Equivalent to AND
Gate
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NAND Gate as an OR Gate
X
Y
YXY X Y XZ
X
NAND GateInverters
Y
X Y Z
0 0 0
0 1 1
1 0 1
1 1 1
Equivalent to OR Gate
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NAND Gate Equivalent to AOI
Gates
AND OR INVERTER
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1. If starting from a logic expression, implement the design with AOI logic.
2. In the AOI implementation, identify and replace every AND,OR, and INVERTER gate with its NAND equivalent.
3. Redraw the circuit.
4. Identify and eliminate any double inversions (i.e., back-to-back inverters).
5. Redraw the final circuit.
Process for NAND
Implementation
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References
Book References:
Digital Logic and Computer Design –
M. Morris Mano – Pearson
Fundamentals of Digital Circuits – A.
Anand Kumar – PHI
Modern Digital Electronics - R.P. Jain -
TMH
Digital Electronics -Tokneinh – MGH
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Web References www.ddegjust.ac.in/studymaterial/pg
dcal
www.indianshout.com/digital-
electronics-notes-material/3023
www.wiley.com/college/engin/balabani
an293512/pdf/ch04.pdf
www.electronics-tutorials.ws
Image References:
http://www.youshouldgoaway.com/wp-
content/uploads/2014/11/thankyou.jpg
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