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Atmel | SMART SAM9 MPUs

SAM9G15 / SAM9G25 / SAM9G35 / SAM9X25 / SAM9X35Evaluation Kit

USER GUIDE

Introduction

This User Guide introduces the Evaluation Kit and describes the development anddebugging capabilities running on Atmel® | SMART SAM9 ARM®-basedEmbedded MPUs as listed below:

SAM9G15

SAM9G25

SAM9X25

SAM9G35

SAM9X35

The User Guide pertains to the following Evaluation Kit references:

SAM9G15-EK

SAM9G25-EK

SAM9X25-EK

SAM9G35-EK

SAM9X35-EK

Atmel-11115B-ATARM-SAM9G15-SAM9G25-SAM9G35-SAMX25-SAM9X35-User-Guide_05-Feb-16

Contents

Board

One EK board

One of the five available CPU modules (CM)SAM9G15-CMSAM9G35-CMSAM9X35-CMSAM9G25-CMSAM9X25-CM

One optional DM board featured in SAM9G15, SAM9G35, SAM9X35 kits only.

Power supply

Universal input AC/DC power supply with US, Europe and UK plug adapters

One 3V Lithium Battery type CR1225

Cables

One serial RS232 cable

One micro A/B-type USB cable

One RJ45 crossed cable

A Welcome Letter

Board Photo (Display module is optional)

SAM9G15/SAM9G25/SAM9G35/SAM9X25/SAM9X35 Evaluation Kit [USER GUIDE]Atmel-11115B-ATARM-SAM9G15-SAM9G25-SAM9G35-SAMX25-SAM9X35-User-Guide_05-Feb-16

2

Related Documents

The datasheets can be found on www.atmel.com at the SAM9G MPU and SAM9X MPU product sections.

Title Reference Comment

SAM9G15 Datasheet

SAM9G25 Datasheet

SAM9X25 Datasheet

SAM9G35 Datasheet

SAM9X35 Datasheet

Atmel lit° 11052

Atmel lit° 11032

Atmel lit° 11054

Atmel lit° 11053

Atmel lit° 11055

These documents provide technical support for each of the Atmel ARM-based Embedded MPU products supported by these

Evaluation Kits.

3SAM9G15/SAM9G25/SAM9G35/SAM9X25/SAM9X35 Evaluation Kit [USER GUIDE]Atmel-11115B-ATARM-SAM9G15-SAM9G25-SAM9G35-SAMX25-SAM9X35-User-Guide_05-Feb-16


4

Table of Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Related Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.1 Kit Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.2 Board Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2. Power Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1 Power Up the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.2 Sample Code and Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.3 Recovery Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3. Hardware Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3.2 Computer Module (CM). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.3 EK Board Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

3.4 Optional Display Module (DM) Board Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

4. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87


1. Specifications

1.1 Kit Specifications

Unpack and inspect the kit carefully. Contact your local Atmel distributor, should there be issues concerning thecontents of the kit.

Figure 1-1. Unpacked Evaluation Kit

1.2 Board Specifications

Table 1-1. Evaluation Kit Specifications

Characteristics Specifications

Clock speed 400 MHz PCK, 133 MHz MCK

Ports Ethernet, USB, RS232, DBGU, JTAG, CAN, Audio, SD Card

Board supply voltage 5 VDC from connector

Temperature

- operating

- storage

-10° to +50° C

-40° to +85° C

Relative humidity 0 to 90% (non condensing)

Dimensions

EK (Evaluation Kit)

CM (Computer Module)

DM (Display Module)

165 mm x 135 mm

67.6 mm x 35 mm

135 mm x 80 mm

RoHS status Compliant

2. Power Up

2.1 Power Up the Board

Unpack the board taking care to avoid electrostatic discharge. Unpack the power supply, select the right powerplug adapter corresponding to that of your country, and insert it in the power supply.

Connect the power supply DC connector to the board and plug the power supply to an AC power plug.

For SAM9G15, SAM9G35, SAM9X35 kits which contain LCD, the screen should light up and display the welcomepage of a graphic demo. Click or touch icons displayed on the screen and enjoy the demo.

For SAM9G25 and SAM9X25 which do not contain LCD, before power up, connect DBGU port J11 on the EKboard (refer to Section 3.3.3.4 for details) to RS232 port on your computer through the RS232 cable provided withthe kit. It is recommended to open a communication session under HyperTerminal. After power up, a command-line based demo runs that can be monitored on HyperTerminal window.

2.2 Sample Code and Technical Support

After boot up, designers can run sample code or their own application, on the development kit. Users candownload sample code and get technical support from the Atmel web site:

http://www.atmel.com/products/at91/default.asp?category_id=163&family_id=605&source=global_nav

Figure 2-1. Atmel Web Site

Note: Different interfaces on the EK boards share the same connections to the CPU module. Therefore the actual usage

depends on the CPU module featured in the evaluation kit.


6

2.3 Recovery Procedure

All EK boards have passed strict test procedures before shipment. These test procedures are contained in the SPIserial Flash in case users need to examine the boards again at any time.

If the contents of the SPI serial Flash have been deleted, follow the instructions below to recover the state as it waswhen shipped by Atmel.

1. Go to the page on atmel.com for the EK being used.

2. Locate the EK Design & Manufacturing Files as shown in Figure 2-2.

3. Find the xxx-EK_test_12_public.zip, which is the file for Flash content burning.

4. Follow the step-by-step instructions in the file SAM9X5_EK_Test_Software to recover the content and to test each section of the boards.

Figure 2-2. EK Design & Manufacturing Files


3. Hardware Overview

3.1 Introduction

The Evaluation Kit is a fully-featured evaluation platform for the Atmel MPU. The Evaluation Kit enables users toextensively evaluate, prototype and create application-specific designs.

The Evaluation Kit is a new platform architecture based on a Main Board (MB), a CPU Module (CM) equipped withone of the five processors and an optional Display Module (DM).

The Evaluation Kit consists of three boards:

1. The CPU Module (CM) board, is a single-board computer that integrates all the core components and is mounted onto an application-specific carrier board (EK board). The CPU Module has specified pinouts based on the SODIMM200 connector. It provides the functional requirements for an embedded application. These functions include, but are not limited to, graphics, audio, mass storage, network and multiple serial and USB ports. A single SODIMM200 connector provides an interface for the carrier board to carry all the I/O signals to and from the CPU Module.

2. The Evaluation Kit board (EK Main Board) provides all the interface connectors required to attach the system to the application specific peripherals. This versatility allows the designer to create a densely packed solution, which results in a more reliable product while simplifying system integration.

3. The optional Display Module (DM) board integrates LCD, TouchScreen and QTouch® technology.

Table 3-1 lists the features provided on the Evaluation Kit:


8

Table 3-1. Evaluation Kit Features

Supported Modules Product Name

Expansion Slot SO-DIMM200

Processor Options SAM9G15 SAM9G25 SAM9G35 SAM9X25 SAM9X35

LAN

MII/RMII Ethernet 10/100 w/PHY and three Led status

ETH0 – X X X X

RMII Ethernet 10/100 w/PHY and three Led status

ETH1 – – – X –

USART/UART

RS232 four wires/RS485

Shared interface COM0 X X X X X

RS232 four wires COM3 – X – X –

RS232 two wires DBGU X X X X X

CAN CAN interface Shared interfaceCAN0 – – – X X

CAN1 – – – X X

USB2 * USB 2.0 Host – X X X X X

1 * USB 2.0 Host/Device – X X X X X

SMD Software Modem Device – X X X X X

Memory Card Support

µSD Card Slot Onboard HSMCI0 X X X X X

MMC/MMC+/SD/SDIO/CE-ATA HSMCI1 X X X X X

ISI – – – X – – –

LCD + Touch Screen

24-bit Output Mode – X – X – X

ZigBee® – – X X X X X

SPI – – X X X X X

TWI – – X X X X X

DEBUG JTAG Test Access Port – X X X X X


3.2 Computer Module (CM)

3.2.1 CM Board Overview

The CM board is the CPU module at the heart of the system. It connects to the EK board through a SO-DIMM200interface. It carries the processor and external memories. The CM board serves as a minimal CPU sub-system. Allfive processors:SAM9G15, SAM9G25, SAM9X25,SAM9G35 and SAM9X35 share the same CM circuitry withminor configuration settings.

Note: There are three CM boards from three different manufacturers. The five processors are implemented as shown in Table 3-2 below:

The three CM boards share the same circuitry design but with different designator information and PCB layouts.The circuitry reference in this guide, for common design parts, refers to schematics from SAM9G25-CM (mfg 3).All the other schematics are provided in Section 3.2.6 ”Schematics”.

Figure 3-1. Board Architecture

Table 3-2. CM Board Implementation

Manufacturer & Module kind SAM9G15-CM SAM9G25-CM SAM9G35-CM SAM9X25-CM SAM9X35-CM

mfg 1 x – x – –

mfg 2 – – – x x

mfg 3 x x x x x


10

3.2.2 Equipment List

The CM board is built around the integration of an ARM926-based microcontroller (BGA217 package) withexternal memory and optional Ethernet PHYsical Layer Transceiver.

3.2.2.1 Devices

Following is the list of the CM board components:

One SAM9 Embedded MPU from the list below

SAM9G15

SAM9G25

SAM9G35

SAM9X25

SAM9X35

12 MHz crystal

32.768 KHz crystal

1 Gbit DDR2 memory

2 Gits NAND Flash memory with Chip Selection control switch

32 Mbits SPI Serial Flash with Chip Selection control switch

512 Kbits EEPROM

1 Kbyte 1-Wire EEPROM

On-board power regulation

Two user LEDs

Optional PHY

3.2.2.2 Interface Connection

SODIMM200 card edge interface

3.2.2.3 Configuration Items

Dual ON/OFF switch for NAND Flash and SPI serial Flash Chip Select connection

Figure 3-2. CM Board Layout Commented

Sodimm200 card edge SAM9 chip

NAND Flash

DDR2 SDRAM

PHY


3.2.3 Function Blocks

3.2.3.1 Processor

The CM Board is equipped with an Atmel ARM-based embedded MPU, as listed below, in a 217-ball BGApackage. The five devices share an identical footprint. All five share the same CM Board PCB with minorconfiguration differences.

The five devices are:

SAM9G15

SAM9G25

SAM9G35

SAM9X25

SAM9X35

As different interfaces can be defined using the same pins, it depends on the actual configuration of the CPU as towhich functions are in fact available to the EK board.

Refer to Section 3.2.4.1 ”Chip Identification” for details. The processor runs at a nominal frequency of 400 MHz forthe core and 133 MHz for the system bus.

The peripheral configuration possibilities and implementation requirements of the CM are dependent on themodule's chipset. Two configuration resistors are implemented on board in order to select the mode ofconfiguration.

3.2.3.2 Clock Circuitry

The CM includes 3 clock sources:

Two are alternatives for the processor main clock

One crystal and one crystal oscillator are used for the Ethernet MII/RMII chip

3.2.3.3 Reset Circuitry

The reset sources for the CM board are:

Power on reset

Push button reset (Push button is equipped on EK board)

JTAG reset from an in-circuit emulator (JTAG interface is equipped on EK board)

Table 3-3. Main Components Associated with the Clock Systems

Quantity Description Component assignment

1 Crystal for Internal Clock, 12 MHz Y1

1 Crystal for RTC Clock, 32.768 kHz Y2

1 Oscillator for Ethernet Clock RMII, 50 MHz Y3


12

3.2.3.4 Power Supplies

The CM Board is driven by +3V3 input power rail from the EK board through the SODIMM200 connector. The CMBoard embeds all the necessary power rails required for the micro processor.

When additional voltages are required, for example VDDCORE, they are generated on board from the 3.3Vsupply. The detailed power supply requirements for any given module are specified within the correspondingproduct documentation. The following table summarizes the power specifications.

Table 3-4. Power Rails Associated with the Systems

Nominal Name Powers Component

3.3v VDDNFthe NAND Flash I/O and control, D16-D32 and

multiplexed SMC linesFrom SODIMM200 connector

3.3v VDDIOP0 Partial Peripheral I/O lines From SODIMM200 connector

3.3v VDDIOP1 Partial Peripheral I/O lines From SODIMM200 connector

3.0v VDDBUthe Slow Clock oscillator, the internal 32 kHz RC, the internal 12 MHz RC and a part of the

System ControllerFrom SODIMM200 connector

3.3v VDDUTMII the USB device and host UTMI+ interface From SODIMM200 connector

3.3v VDDOSC the Main Oscillator cells From SODIMM200 connector

3.3v VDDANA the Analog to Digital Converter From SODIMM200 connector

1.8v VDDIOM the External Memory Interface I/O lines on-board

1.0v VDDUTMIC DC Supply UDPHS and UHPHS UTMI+ Core on-board

3.3v VDDPLLUTMIDC Supply UDPHS and UHPHS UTMI+

InterfaceFrom SODIMM200 connector

1.0v VDDPLLA the PLLA cell on-board

1.0v VDDCOREthe core, including the processor, the

embedded memories and the peripheralson-board

3.0V or 3.3V configurable

ADVREF ADC Reference voltage From SODIMM200 connector


Figure 3-3. CM Power Supply

C8100nF

C7100nF

C6100nF

C284.7uF

R10

1R

PWR_EN

C15100nF

C14100nF

C13100nF

C25100nF

C34.7uF

VDDANA

C20100nF

C5100nF

C4100nF

VDDNF

VDDCORE

VDDIOM

C23100nF

C21100nF

VDDIOP0

VDDIOP1

C26100nF

VDDANA

C33100nF

C434.7uF

L610uH/150mA

VDDIOP0

R25

1R

C41100nF

VDDPLLA

C30100nF

VDDUTMICC35100nF

C344.7uF

L410uH/150mA

R17

1R

C32100nF

C1122pF

ADVREF

R239.2K 1%

R459K 1%

VDDIOP1

C104.7uF

+3V3 MN3AS1301EHT-adj

IN4

EN1

FB5

LX3

GN

D2

L2

2.2uH 3D16

C37100nF

C1210uF

C361uF

C40100nF

C42100nF

VDDBU

VDDUTMII

C27100nF

VDDOSC

C161uF

C1810nF

+1V

C171uF

PWR_EN

MN4TPS71710DCK

IN1

OUT5

EN3

NR4

GN

D2

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D2

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C210uF


14

3.2.3.5 Memory

The Device serial processor features a DDR/SDR memory interface and an External Bus Interface (EBI) to enableinterfacing to a wide range of external memories and to almost any kind of parallel peripheral.

The External Bus Interface (EBI) is connected to two kinds of memory devices:

One 1 Gbyte DDR2 SDRAM

One 2 Gbytes (or 4 Gbytes depending on supplier) NAND Flash


Figure 3-4. CM Board External Memory

R28

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SAM9x5_LBGA217 - PIOD

MN

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14

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2/A

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4/N

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3P

12

PD

5/N

WA

ITP

14

PD

6/D

16N

14

PD

7/D

17R

15

PD

8/D

18M

14

PD

9/D

19N

16

PD

10/D

20N

17

PD

11/D

21N

15

PD

12/D

22K

15

PD

13/D

23M

15

PD

14/D

24L1

4

PD

15/D

25/A

20M

16

PD

16/D

26/A

23L1

6

PD

17/D

27/A

24L1

5

PD

18/D

28/A

25K

17

PD

19/D

29/N

CS

2J1

7

PD

20/D

30/N

CS

4K

16

PD

21/D

31/N

CS

5J1

6

EB

I_A

13

R41

0R

EB

I_A

6

EB

I_D

0

R46

470K

VD

DIO

M

EB

I_D

5E

BI_

D4

EB

I_D

7E

BI_

D6

EB

I_A

14

DD

R2_

SD

CK

E

EB

I_A

7

DD

R2_

RA

S

DD

R2_

SD

CK

DD

R2_

SD

WE

DD

R2_

CA

S

DD

R2_

NS

DC

K

RR

16A

18

DD

R_V

RE

F

DD

R2_

D1

DD

R2_

D0

EB

I_A

8

RR

3D4

5

DD

R2_

D3

DD

R2_

D4

(NA

ND

ALE

)

MT47H64M16HR

DDR2 SDRAM

MN

5

A0

M8

A1

M3

A2

M7

A3

N2

A4

N8

A5

N3

A6

N7

A7

P2

A8

P8

A9

P3

A10

M2

BA

0L2

OD

TK

9

DQ

0G

8

DQ

1G

2

DQ

2H

7

DQ

3H

3

DQ

4H

1

DQ

5H

9

DQ

6F

1

DQ

7F

9

UD

QS

B7

UD

QS

A8

LDM

F3

VD

DJ9

VD

DM

9

VD

DL

J1

VR

EF

J2

VD

DQ

E9

VS

SA

3

VS

SE

3

VD

DQ

A9

VD

DE

1

RF

U1

A2

RF

U2

E2

CK

EK

2

CK

J8

CK

K8

CA

SL7

RA

SK

7

WE

K3

CS

L8V

DD

QC

3

VD

DQ

C7

VD

DQ

C9

VS

SQ

D8

VS

SQ

E7

VS

SQ

F2

VS

SQ

F8

VD

DA

1

VS

SJ3

A11

P7

BA

1L3

A12

R2

BA

2L1

VS

SN

1

VS

SD

LJ7

VS

SQ

B2

RF

U3

R3

DQ

8C

8

DQ

9C

2

DQ

10D

7

DQ

11D

3

DQ

12D

1

DQ

13D

9

DQ

14B

1

DQ

15B

9

VD

DR

1

VD

DQ

G1

VD

DQ

G7

VD

DQ

G9

VS

SP

9

VS

SQ

D2

VS

SQ

A7

VS

SQ

B8

VS

SQ

H2

VS

SQ

H8

VD

DQ

G3

VD

DQ

C1

UD

MB

3

LDQ

SE

8LD

QS

F7

RF

U4

R7

RF

U5

R8

C53

100n

F

SAM9x5_LBGA217 - EBI

MN

2F

D0

D14

D1

D15

D2

A16

D3

B16

D4

A17

D5

B15

D6

C14

D7

B14

D8

A15

D9

C15

D10

D12

D11

C13

D12

A14

D13

B13

D14

A13

D15

C12

A0/

NB

S0

J15

A1/

NB

S2/

DQ

M2/

NW

R2

H16

A2

H15

A3

H17

A4

G17

A5

G16

A6

F17

A7

E17

A8

F16

A9

G15

A10

G14

A11

F15

A12

D17

A13

C17

A14

E16

A15

D16

A16

/BA

0C

16

NW

R1/

NB

S1

C7

NR

DD

9

NW

R0/

NW

RE

C9

NC

S0

B9

SD

CK

EB

12

A17

/BA

1B

17

SD

CK

D11

NC

S1/

SD

CS

B8

RA

SB

11

DQ

M1

B10

NW

R3/

NB

S3/

DQ

M3

A8

DQ

M0

A10

A19

E14

DQ

S1

A9

CA

SC

10

DQ

S0

A11

SD

A10

C8

SD

WE

A12

#SD

CK

C11

A18

/BA

2E

15

EB

I_A

9

DD

R2_

D5

DD

R2_

D6

DD

R2_

D8

DD

R2_

D7

EB

I_A

2

RR

16B

27

EB

I_A

2E

BI_

A3

EB

I_A

15

C44

100n

F

C47

100n

F

C45

100n

F

EB

I_D

9E

BI_

D8

C46

100n

F

EB

I_D

13E

BI_

D12

EB

I_D

11E

BI_

D10

RR

16C

36

EB

I_D

15E

BI_

D14

RR

4B2

7

PD

21

PD

3P

D2

R48

470K

DD

R2_

DQ

S1

DD

R2_

DQ

S0

RR

16D

45

(NA

ND

CLE

)

C48

100n

F

EB

I_D

1

RR

4A1

8

RR

17A

18

EB

I_A

5E

BI_

A4

C55

100n

F

EB

I_A

6E

BI_

A7

EB

I_S

DC

KE

NA

ND

_FS

H_D

2

EB

I_S

DC

K

EB

I_N

CS

1_S

DC

S

NA

ND

_FS

H_D

6

NA

ND

_FS

H_D

3N

AN

D_F

SH

_D4

EB

I_D

QS

0

EB

I_D

QM

0E

BI_

DQ

M1

NA

ND

_FS

H_D

5

NA

ND

_FS

H_D

7

EB

I_D

QS

1

EB

I_R

AS

EB

I_N

SD

CK

WP

NA

ND

_FS

H_D

1N

AN

D_F

SH

_D0

EB

I_S

DW

E

EB

I_C

AS

CE

WE

RE

EB

I_S

DA

10

RB

CLE

ALE

(NA

ND

CS

)

RR

17B

27

C66

100n

FC

6510

0nF

RR

3B2

7

RR

17C

36

DD

R2_

D1

DD

R2_

D0

DD

R2_

D5

DD

R2_

D4

DD

R2_

D3

DD

R2_

D2

DD

R2_

D9

DD

R2_

D8

DD

R2_

D7

DD

R2_

D6

R26

27R

C49

100n

F

DD

R2_

D13

DD

R2_

D12

DD

R2_

D11

DD

R2_

D10

DD

R2_

D15

DD

R2_

D14

RR

17D

45

C57

100n

F

PD

5

RR

3C3

6

R27

27R

RR

4D4

5


16

3.2.3.6 Serial Peripheral Interface (SPI) Controller

The serial processor provides two high-speed Serial Peripheral Interface (SPI) controllers. One port is used tointerface with the on-board serial Flash.

Figure 3-5. SPI

3.2.3.7 Two Wire Interface (TWI)

The serial processor has a full speed (400 kHz) master/slave TWI Serial Controller. The controller is mostlycompatible with industry standard I2C and SMBus Interfaces. This port is used to interface with the on-board SerialEEPROM, ISI, QTouch device and audio codec interface.

Figure 3-6. TWI

3.2.3.8 1-Wire EEPROM

The Evaluation Kit uses a 1-Wire device as “firmware label” to store the information such as chip type,manufacturer’s name, production date etc.

Figure 3-7. 1-Wire Device

3.2.3.9 Optional PHY

Some of the device modules provide a location for a 10/100 Ethernet MAC/PHY interface.

For more information about the Ethernet controller device, refer to the Davicom DM9161 controller manufacturer'sdatasheet.

R57 0RR58 0RR59 0R

VDDIOP0

VDDIOP0

PA13

PA12PA11 (SPI0_MIS0)

MN7AT25DF321

HOLD7

GND4

VCC8

CS1

SCK6

SI5

SO2

WP3

(SPI0_MOSI)

(SPI0_SPCK)

(SPI0_NPCS0)

C69100nF

2 ON

SW1BSWITCH-2-1.27mm

2 3PA14

R56470K

VDDIOP0

R6310K

VDDIOP0 VDDIOP0

PA30PA31

MN8AT24C512BN-SH25-B

A01

A12

WP7

SCL6

VCC8 A3

3SDA5

GND4

(TWCKO)(TWDO)

R614.7K

VDDIOP0 R64DNP

R624.7K

C70100nF

MN9DS2431P+

IO2

GN

D1

NC13

NC24

NC35

NC46

VDDANA

R66 0RPB18

R651.5K


Figure 3-8. Ethernet

R94 10K

RR

14D4

5

TP28

SM

D

PB

6

VD

DA

NA

R95 DNP

PB

5

PB

[0..18]

ETH

0_RX+

PB

8

ETH

0_RX-

VD

DA

NA

R73

22R

ETH

0_TX+

VD

DA

NA

ETH

0_TX-

PB

3

LED

0

PB

4

LED

1

RR

13B2

7

RR

13D4

5R

R13C

36

LED

2

R92 4.7K

AV

DD

T

PB

10

TP27

SM

D

R71

49.9R 1%

GN

D_E

TH

+C

8210uF

R98

10K

R72

49.9R 1%

R96

0RC

79100nF

C71

100nF

R99

0R

GN

D_E

TH

RR

810K

X4

1234 5

678

PB

9

E0_R

X0E

0_RX1

E0_TX0

E0_TX1

E0_TXE

NP

B7

E0_M

DIO

E0_M

DC

E0_R

XDV

E0_IN

TR

E0_R

XER

+C

7510uF

VDD

VSSOUT

OE

Y350M

Hz

41

32

MN

10

DM

9161AE

P

TX_ER

/TXD4

16

CO

L/RM

II36

MD

C24

RX-

4

RX+

3

TX-8

TX+7

XT143

RE

F_C

LK/XT2

42

RX_C

LK/10B

TSE

R34

RX_D

V/TE

STM

OD

E37

RX_E

R/R

XD4/R

PTR

38

TX_EN

21

BG

RE

S48

AV

DD

R1

AV

DD

R2

DV

DD

41

DG

ND

44D

GN

D15

AG

ND

5

AG

ND

6

LED

2/OP

213

LED

1/OP

112

LED

0/OP

011

TXD3

17

TXD2

18

TXD0

20TXD

119

TX_CLK

/ISO

LATE

22

RXD

0/PH

YA

D0

29R

XD1/P

HY

AD

128

RXD

2/PH

YA

D2

27R

XD3/P

HY

AD

326

CR

S/P

HY

AD

435

MD

IO25

MD

INTR

32

PW

RD

WN

10

DG

ND

33

RE

SE

T40

AV

DD

T9

DIS

MD

IX39

DV

DD

30

DV

DD

23

AG

ND

46

BG

RE

SG

47

CA

BLE

STS

/LINK

STS

14

N.C

45

LED

MO

DE

31

R83

49.9R 1%

R84

49.9R 1%

PB

1

NR

ST

E0_TXC

K

AV

DD

TB

1

BLM

21BD

222TN1

GN

D_E

TH

C80

100nF

C72

100nF

C81

100nF

R86

1.5K

RR

710K

X4

1234 5

678

DNP to remainsingle PHYconnection onEK board

+C

7610uF

RR

9

10KX4

1234 5

678

C73

100nF

C74

100nF

C78

100nF

PB

0

RR

15A1

8

R70

10K

C77

100nF

R97

6.8K

GN

D_E

TH

R100

0R

RR

15B2

7

VD

DA

NA

PB

2R

R15C

36

R93 10K

VD

DA

NA

RR

14A1

8R

R14B

27

VD

DA

NA

R91 DNP

RR

14C3

6

R74

22R


18

3.2.3.10 SODIMM200 Interface

The CM board uses SODIMM200 card edge connector to interface with the EK board.

Figure 3-9. SODIMM200 Interface on CM Board

HHSDMC

PB5PB3PB1

PB7

PD10

PD16PD14PD12

VDDIOP1

PWR_EN

+3V3

PA2PA0

PA11PA4

PC27PC25PC23

PC30PC28

C841uF

NANDCS

VDDNF

C8310uF

PD8

PC16PC15PC13

PC20PC18

NRST

PD18

R1020R

ETH0_TX+

PC1

PC8PC6PC5PC3

PC10

PD20

R101DNP

ETH0_TX-

PA13

NANDOE

PA24PA9PA6

PA28PA26

VDDNF

J1

PIO 200-pin SODIMM

VCC_3V31

VCC_3V32

VCC_3V33

VCC_3V34

GND5

VBAT6

USBC_DP7

JTAGSEL8

USBC_DM9

WKUP10

GND11

SHDN12

USBB_DM13

BMS14

USBB_DP15

nRST16

GND17

nTRST18

DIBP19

TDI20

DIBN21

TCK22

GND23

TMS24

USBA_DM25

TDO26

USBA_DP27

RTCK28

GND29

PWR_EN30

RFU131

RFU232

RFU333

RFU434

RFU535

RFU636

RFU737

RFU838

RFU939

RFU1040

GND41

GND42

RFU1143

RFU1244

RFU1345

RFU1446

RFU1547

RFU1648

RFU1749

RFU1850

GND51

GND52

RFU1953

RFU2054

RFU2155

RFU2256

RFU2357

RFU2458

RFU2559

RFU2660

VDDNF61

VDDNF62

PD063

PD164

PD265

PD366

PD467

PD568

PD669

PD770

PD871

PD972

NC73

GND74

PD1075

PD1176

PD1277

PD1378

PD1479

PD1580

PD1681

PD1782

PD1883

PD1984

PD2085

PD2186

VDDIOP087

VDDIOP088

PA089

PA190

PA291

PA392

PA493

GND94

PA1195

PA1296

PA1397

PA1498

GND99

PA7100

PA8101

PA21102

PA22103

PA23104

PA31105

PA30106

GND107

PA15108

PA16109

PA17110

PA18111

PA19112

PA20113

GND114

PA5115

PA6116

PA10117

PA9118

GND119

PA24120

PA25121

PA26122

PA27123

PA28124

PA29125

GND126

VDDIOP1127

VDDIOP1128

PC0129

PC1130

PC2131

PC3132

PC4133

PC5134

GND135

PC6136

PC7137

PC8138

PC9139

PC10140

PC11141

GND142

PC12143

PC13144

PC14145

PC15146

GND147

PC16148

PC17149

PC18150

PC19151

PC20152

PC21153

GND154

PC22155

PC23156

PC24157

PC25158

PC26159

PC27160

GND161

PC28162

PC29163

PC30164

PC31165

SELCONFIG0166

VDDANA167

VDDANA168

PB0169

PB1170

PB2171

PB3172

PB4173

PB5174

PB6175

PB7176

PB8177

GNDANA178

PB9179

PB10180

PB11181

PB12182

PB13183

PB14184

PB15185

PB16186

PB17187

GNDANA188

PB18189

ADVREF190

GND191

LED0192

ETH0_TX+193

LED1194

ETH0_TX-195

LED2196

ETH0_RX+197

AVDDT198

ETH0_RX-199

GND_ETH200ETH0_RX+

PA8

PA31PA22

PA30PA23PA21

PA19PA17PA15

C854.7uF

+3V3

ADVREF

PA5PA20PA18PA16

PA10

JTAGSEL

VDDANA

NANDALE

PA7PA14PA12

VDDIOP1PA27PA25

PA29

ETH0_RX-

WKUP

PA3PA1

HHSDMBHHSDPB

PC4PC2PC0

NANDR_B

BMS

PC9PC7

PC14PC12PC11

NANDWE

PD11

PD21PD19PD17PD15PD13

LED0

PC21PC19PC17

PC24PC22

NTRST

DIBNDIBP

PD9PD7PD5

PC26

TDI

VDDIOP0

NANDCLE

HHSDPAHHSDMA

R101 only if G15, G35, X35

LED1

PC29PC31

TCK

GND_ETH

AVDDT

TMS

LED2R102 only if G25, X25

SHDN

PB0

PB8PB6PB4PB2

PB9C881uFPB13

PB11

PB18PB17PB15

HHSDPC

C864.7uF

TDO

VDDIOP0

C874.7uF

VDDANA

+3V3

VDDBU

RTCK

PB14PB12PB10

PB16


3.2.4 Configuration

3.2.4.1 Chip Identification

The CM board may be equipped with any of the five processors, all sharing an identical BGA217 footprint. Thereare two resistors on the CM board for the purpose of identifying which of the five is the one actually mounted.

The tables below show in detail how the CM board, relative to different processors, determines the dedicated“SELCONFIG” logic.

Table 3-5. Resistor Identification

Resistor SAM9G15 SAM9G25 SAM9G35 SAM9X25 SAM9X35

R49 – – – Populated Not Populated

R50 – – – Not Populated Populated

R87 Populated – Populated – –

R88 Not Populated – Not Populated – –

R101 Populated Not Populated Populated Not Populated Populated

R102 Not Populated Populated Not Populated Populated Not Populated

Table 3-6. Module Configuration Identification

SAM9G15 module

SAM9G35 module

SAM9X35 module

SAM9G25 module

SAM9X25 module

CM

Setting

R101 Populated Populated Populated Not Populated Not Populated

R102 Not Populated Not Populated Not Populated Populated Populated

SELCONFIG

(SODIMM200 pin 166)

High High High Low Low

EK

Setting

USART3 Not Selected Not Selected Not Selected Selected Selected

ETH1 Not Selected Not Selected Not Selected Not Selected Selected

DM

SettingLCD Selected Selected Selected Not Selected Not Selected


20

3.2.4.2 Boot Configuration

In order to use the SAM-BA boot, users must ensure that JP9 (BMS configuration) on the board is open, so thatthe embedded ROM code runs and searches for a bootable device. For more details, refer to the productdatasheet. To make the processor boot from SAM-BA, the external memory devices cannot be bootable.

All three CM boards from different vendors feature a de-select function of the Chip Select signal on NAND and SPIserial Flash.

To boot from software, users may erase the bootable content within NAND and SPI serial Flash to launch a SAM-BA boot. A hardware disconnection of the Chip Select signal is not necessary.

Figure 3-10. SW1A and SW1B Position on Embest Modules

Table 3-7. Boot Configuration

Board Vendor Designation Default Setting Feature

Embest CM

SW1A (1,4) ON1. Default ON to select NAND Flash

2. Set to OFF to deselect the NAND Flash

SW1B (2,3) ON1. Default ON to select SPI serial Flash

2. Set to OFF to deselect the SPI serial Flash

Ronetix CM

J1

R17

J1 DNP

R17 populated

1. Default select NAND Flash always

2. Users need to dismount R17, mount J1 as 2.54mm jumper to ease frequent changes

3. Close J1 to select NAND Flash

Open J1 to deselect NAND Flash

J2

R24

J2 DNP

R24 populated

1. Default select SPI serial Flash always

2. Users need to dismount R24, mount J2 as 2.54mm jumper to ease frequent changes

3. Close J2 to select SPI serial Flash

Open J2 to deselect SPI serial Flash

Cogent CM

P2

R90

P2 normal close

R90 DNP

1. By default, P2 is closed to select NAND Flash

2. Open P2 to deselect NAND Flash

3. Mounting R90 as 0-ohm always selects NAND Flash

R15 R15 populated1. Default select SPI serial Flash always

2. Dismount R15 to deselect SPI serial Flash

SW1BSW1A


3.2.5 Connectors

Figure 3-11. CM Board Dimensions


22

3.2.6 Schematics

Figure 3-12. CM Board Schematics – 1 of 55 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

NTRS

TTD

ITM

STC

KRT

CKTD

O

SHDN

NRST

WKU

P

PWR_

EN

NTRS

T

TDI

TMS

TCK

RTCK

TDO

NRST

WKU

P

SHDN

PWR_

EN

+3V3

+1V

VDDI

OP1

VDDI

OM

+3V3

+1V

VDDB

U

VDDB

U

VDDA

NA

ADVR

EF

VDDI

OP0

VDDB

U

VDDI

OM

+3V3

VDDC

ORE

+3V3

+3V3

+3V3

+1V

VDDA

NA

VDDI

OP0

VDDI

OP1

VDDN

F

VDDI

OP0

VDDI

OP0

VDDI

OP0

+3V3

+1V

+3V3

VDDN

F

HHSD

MA

{5}

HHSD

PA{5

}

HHSD

MB

{5}

HHSD

PB{5

}

HHSD

MC

{5}

HHSD

PC{5

}

BMS

{5}

TDO

{5}

NTRS

T{5

}TD

I{5

}TM

S{5

}TC

K{5

}RT

CK{5

}

SHDN

{5}

WKU

P{5

}

NRST

{4,5

}

DIBP

{5}

DIBN

{5}

PWR_

EN{5

}

JTAG

SEL

{5}

Title

:

Size

:Do

cum

entN

umbe

r:Re

v:

Date

:Sh

eet:

ofDr

awBy

:

AT91

SAM

9G45

-I&PO

WER

A

MBC

-SAM

9X5

A3

15

Thur

sday

,Nov

embe

r04,

2010

Zhu

Xuel

iang

Title

:

Size

:Do

cum

entN

umbe

r:Re

v:

Date

:Sh

eet:

ofDr

awBy

:

AT91

SAM

9G45

-I&PO

WER

A

MBC

-SAM

9X5

A3

15

Thur

sday

,Nov

embe

r04,

2010

Zhu

Xuel

iang

Title

:

Size

:Do

cum

entN

umbe

r:Re

v:

Date

:Sh

eet:

ofDr

awBy

:

AT91

SAM

9G45

-I&PO

WER

A

MBC

-SAM

9X5

A3

15

Thur

sday

,Nov

embe

r04,

2010

Zhu

Xuel

iang

TP16

SMD

TP16

SMD

C41

100n

FC4

110

0nF

L1

2.2u

H3D

16

L1

2.2u

H3D

16

R15

100K

R15

100K

TP3

SMD

TP3

SMD

C26

100n

FC2

610

0nF

C29

20pF

C29

20pF

TP15

SMD

TP15

SMD

C1 4.7u

FC1 4.

7uF

TP13

SMD

TP13

SMD

TP6

SMD

TP6

SMD

C11

22pF

C11

22pF

L3

10uH

/150

mA

L3

10uH

/150

mA

C34

4.7u

FC3

44.

7uF

C5 100n

FC5 10

0nF

R19

39R

R19

39R

TP19

SMD

TP19

SMD

R16

6.8KR1

66.

8K

C12

10uF

C12

10uF

C3 4.7u

FC3 4.

7uF

R13

100K

R13

100K

R12

DNP

R12

DNP

C6 100n

FC6 10

0nF

TP10

SMD

TP10

SMD

C38

100n

FC3

810

0nF

TP18

SMD

TP18

SMD

C40

100n

FC4

010

0nF

TP17

SMD

TP17

SMD

C31

10pF

C31

10pF

R2 39.2

K1%

R2 39.2

K1%

TP20

SMD

TP20

SMD

TP22

SMD

TP22

SMD

C16

1uF

C16

1uF

C4 100n

FC4 10

0nF

C43

4.7u

FC4

34.

7uF

R20

39R

R20

39R

L4 10uH

/150

mA

L4 10uH

/150

mA

TP7

SMD

TP7

SMD

R24

27R

R24

27R

C30

100n

FC3

010

0nF

TP12

SMD

TP12

SMD

C33

100n

FC3

310

0nF

C23

100n

FC2

310

0nF

TP21

SMD

TP21

SMD

C35

100n

FC3

510

0nF

TP14

SMD

TP14

SMD

R10

1RR10

1RC2

710

0nF

C27

100n

F

MN4

TPS7

1710

DCK

MN4

TPS7

1710

DCK

IN1

OU

T5

EN3

NR

4

GND2

C20

100n

FC2

010

0nF

C9 22pF

C9 22pF

R21

100K

R21

100K

C18

10nF

C18

10nF

SAM9x5_LBGA217 - INTERFACE

MN2

GSAM9x5_LBGA217 - INTERFACE

MN2

G

HFS

DPC

L17

HH

SDM

BP1

7

HH

SDPB

R17

HFS

DM

BP1

6

HFS

DPB

R16

HH

SDM

AU

15

HH

SDPA

U14

HFS

DM

AT1

5

HFS

DPA

T14

XIN

32A6

XOU

T32

A5

XIN

T12

XOU

TU

12

DIB

NR

11

WKU

PA7

TST

B7

BMS

P9

VBG

U17

SHD

ND

8D

IBP

P11

JTAG

SEL

D7

NTR

STT1

1

TDI

T9

TMS

U11

TCK

U10

RTC

KR

10

TDO

T10

NR

STP1

0

HFS

DM

CM

17

R4 59K

1%R4 59

K1%

L6 10uH

/150

mA

L6 10uH

/150

mA

TP4

SMD

TP4

SMD

R17

1RR17

1R

MN3

AS13

01EH

T-ad

jM

N3AS

1301

EHT-

adj

IN4

EN1

FB5

LX3

GND2

C21

100n

FC2

110

0nF

C39

4.7u

FC3

94.

7uF

C37

100n

FC3

710

0nF

R839

RR8

39R

R11

100K

R11

100K

C2 10uF

C2 10uF

C15

100n

FC1

510

0nF

R1 118K

1%R1 11

8K1%

Y232

.768

kHz

Y232

.768

kHz

1 2

B2

120

OHM

@10

0MHZ

B2

120

OHM

@10

0MHZ

21

L5 10uH

/150

mA

L5 10uH

/150

mA

R14

100K

R14

100K

R25

1RR25

1R

R23

27R

R23

27R

SAM9X5_LBGA217 - POWER

MN2

ASAM9X5_LBGA217 - POWER

MN2

A

GN

DIO

PM

4

GN

DIO

MJ1

0G

ND

IOM

J9G

ND

IOM

H10

GN

DIO

MH

9

GN

DC

OR

EJ8

GN

DC

OR

EK1

0

GN

DBU

B6

GN

DAN

AD

6

GN

DU

TMI

T16

VDD

NF

J14

VDD

NF

K14

VDD

IOM

F14

VDD

IOM

D13

VDD

IOM

D10

VDD

UTM

ICT1

7

VDD

ANA

C6

ADVR

EFA4

VDD

PLLA

R12

GN

DC

OR

EH

8

VDD

BUB5

VDD

UTM

IIU

16

VDD

CO

RE

K9VD

DC

OR

EK8

VDD

CO

RE

H14

VDD

IOP0

P7

VDD

IOP1

H4

GN

DIO

PP6

VDD

OSC

T13

GN

DO

SCU

13

C28

4.7u

FC2

84.

7uF

TP8

SMD

TP8

SMD

C14

100n

FC1

410

0nF

L2

2.2u

H3D

16

L2

2.2u

H3D

16

R3 59K

1%R3 59

K1%

C22

20pF

C22

20pF

C19

20pF

C19

20pF

TP11

SMD

TP11

SMD

R18

100K

R18

100K

TP2

SMD

TP2

SMD

C8 100n

FC8 10

0nF

C10

4.7u

FC1

04.

7uF

C32

100n

FC3

210

0nF

C7 100n

FC7 10

0nF

MN1

AS13

01EH

T-ad

jM

N1AS

1301

EHT-

adj

IN4

EN1

FB5

LX3

GND2

C25

100n

FC2

510

0nF

TP5

SMD

TP5

SMD

R22

1RR22

1R

R6 DNP

R6 DNP

Y112

MHz

Y112

MHz

1

2 3

4

R739

RR7

39R

C24

20pF

C24

20pF

C13

100n

FC1

310

0nF

C42

100n

FC4

210

0nF

TP1

SMD

TP1

SMD

C36

1uF

C36

1uF

C17

1uF

C17

1uF

TP9

SMD

TP9

SMD


Figure 3-13. CM Board Schematics – 2 of 5

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

(NAN

DOE)

(NAN

DWE)

(NAN

DALE

)(N

ANDC

LE)

(NAN

DCS)

(NAN

DOE)

(NAN

DWE)

(NAN

DALE

)(N

ANDC

LE)

(NAN

DCS)

DDR2 SDRAM

NAND FLASH

(NAN

DR/B

)

EBI_

SDCK

E

EBI_

NCS1

_SDC

S

EBI_

SDCK

DDR2

_NCS

1

EBI_

DQM

1EB

I_DQ

M0

EBI_

DQS0

EBI_

NSDC

K

EBI_

RAS

EBI_

DQS1

EBI_

CAS

EBI_

SDW

E

PD4

PD5

PD7

PD6

EBI_

D2

EBI_

A8EB

I_A9

EBI_

A10

EBI_

A11

EBI_

A14

EBI_

A13

DDR2

_SDC

KE

EBI_

D4EB

I_D3

PD3

PD0

PD1

PD4

PD2

DDR2

_SDW

E

PD14

PD15

PD13

PD12

PD8

PD9

PD11

PD10

EBI_

D6EB

I_D7

EBI_

D8

EBI_

D5

DDR2

_SDC

K

DDR2

_DQ

M0

DDR2

_DQ

M1

EBI_

D9EB

I_D1

0EB

I_D1

1EB

I_D1

2

EBI_

D15

EBI_

D14

EBI_

D13

PD0

DDR2

_RAS

DDR2

_NSD

CK

EBI_

A18

EBI_

A16

EBI_

A17

PD19

PD16

PD17

PD18

PD20

DDR2

_CAS

PD1

EBI_

D0

EBI_

A2EB

I_A3

PD21

PD2

PD3

DDR2

_DQ

S1DD

R2_D

QS0

EBI_

D1

EBI_

A4EB

I_A5

EBI_

A6EB

I_A7

EBI_

SDCK

E

EBI_

NCS1

_SDC

S

EBI_

SDCK

EBI_

DQM

1EB

I_DQ

M0

EBI_

DQS0

EBI_

NSDC

K

EBI_

RAS

EBI_

DQS1

EBI_

CAS

EBI_

SDW

E

EBI_

SDA1

0

DDR2

_DQ

M0

DDR2

_DQ

M1

DDR2

_DQ

S1

DDR2

_DQ

S0

DDR2

_NCS

1

EBI_

A10

DDR2

_D9

DDR2

_D10

DDR2

_D11

DDR2

_D12

DDR2

_D13

DDR2

_D15

DDR2

_D14

EBI_

A3

EBI_

A16

EBI_

A11

EBI_

A4

EBI_

A17

DDR2

_D2

EBI_

SDA1

0

EBI_

A5

EBI_

A18

EBI_

A13

EBI_

A6

EBI_

A14

EBI_

A7

DDR2

_SDC

KE

DDR2

_SDW

E

DDR2

_SDC

K

DDR2

_RAS

DDR2

_NSD

CK

DDR2

_CAS

DDR2

_D1

DDR_

VREFDD

R2_D

0

EBI_

A8

DDR2

_D4

DDR2

_D3

EBI_

A9DD

R2_D

6DD

R2_D

5

DDR2

_D7

DDR2

_D8

EBI_

A2

NAND

_FSH

_D2

NAND

_FSH

_D4

NAND

_FSH

_D3

NAND

_FSH

_D6

NAND

_FSH

_D7

NAND

_FSH

_D5

NAND

_FSH

_D0

NAND

_FSH

_D1

WP

RE WE

CE RBCLE

ALE

PD3

PD2

PD0

PD1

PD5

DDR_

VREF

EBI_

D0EB

I_D1

EBI_

D2EB

I_D3

EBI_

D4EB

I_D5

EBI_

D6EB

I_D7

EBI_

D8EB

I_D9

EBI_

D10

EBI_

D11

EBI_

D12

EBI_

D13

EBI_

D14

EBI_

D15

DDR2

_D0

DDR2

_D1

DDR2

_D2

DDR2

_D3

DDR2

_D4

DDR2

_D5

DDR2

_D6

DDR2

_D7

DDR2

_D8

DDR2

_D9

DDR2

_D10

DDR2

_D11

DDR2

_D12

DDR2

_D13

DDR2

_D14

DDR2

_D15

NCS0

NCS0EB

I_A1

5

EBI_

A15

PD6

PD4

PD6

PD7

PD8

PD9

PD10

PD11

PD12

PD13

NAND

_FSH

_D0

NAND

_FSH

_D1

NAND

_FSH

_D2

NAND

_FSH

_D3

NAND

_FSH

_D4

NAND

_FSH

_D5

NAND

_FSH

_D6

NAND

_FSH

_D7

VDDI

OM

VDDN

F

VDDN

F

VDDI

OM

VDDN

F

NAND

CS{5

}NA

NDCL

E{5

}NA

NDAL

E{5

}NA

NDW

E{5

}NA

NDO

E{5

}

PD[5

..21]

{3,5

}

NAND

R_B

{5}

Title

:

Size

:Do

cum

entN

umbe

r:Re

v:

Date

:Sh

eet:

ofDr

awBy

:

AT91

SAM

9G45

-II&D

DR2&

NAND

FLAS

HA

MBC

-SAM

9X5

A3

25

Thur

sday

,Nov

embe

r04,

2010

Zhu

Xuel

iang

Title

:

Size

:Do

cum

entN

umbe

r:Re

v:

Date

:Sh

eet:

ofDr

awBy

:

AT91

SAM

9G45

-II&D

DR2&

NAND

FLAS

HA

MBC

-SAM

9X5

A3

25

Thur

sday

,Nov

embe

r04,

2010

Zhu

Xuel

iang

Title

:

Size

:Do

cum

entN

umbe

r:Re

v:

Date

:Sh

eet:

ofDr

awBy

:

AT91

SAM

9G45

-II&D

DR2&

NAND

FLAS

HA

MBC

-SAM

9X5

A3

25

Thur

sday

,Nov

embe

r04,

2010

Zhu

Xuel

iang

R40

0RR4

00R

R28

27R

R28

27R

R43

0RR4

30R

R35

27R

R35

27R

R29

27R

R29

27R

R44

0RR4

40R

R36

27R

R36

27R

SAM9x5_LBGA217 - EBI

MN2

FSAM9x5_LBGA217 - EBI

MN2

F

D0

D14

D1

D15

D2

A16

D3

B16

D4

A17

D5

B15

D6

C14

D7

B14

D8

A15

D9

C15

D10

D12

D11

C13

D12

A14

D13

B13

D14

A13

D15

C12

A0/N

BS0

J15

A1/N

BS2/

DQ

M2/

NW

R2

H16

A2H

15

A3H

17

A4G

17

A5G

16

A6F1

7

A7E1

7

A8F1

6

A9G

15

A10

G14

A11

F15

A12

D17

A13

C17

A14

E16

A15

D16

A16/

BA0

C16

NW

R1/

NBS

1C

7

NR

DD

9

NW

R0/

NW

RE

C9

NC

S0B9

SDC

KEB1

2

A17/

BA1

B17

SDC

KD

11

NC

S1/S

DC

SB8

RAS

B11

DQ

M1

B10

NW

R3/

NBS

3/D

QM

3A8

DQ

M0

A10

A19

E14

DQ

S1A9

CAS

C10

DQ

S0A1

1

SDA1

0C

8SD

WE

A12

#SD

CK

C11

A18/

BA2

E15

RR3A

RR3A

18

R30

27R

R30

27R

C53

100n

FC5

310

0nF

R41

0RR4

10R

RR2A

RR2A

18

R37

27R

R37

27R

R32

27R

R32

27R

C46

100n

FC4

610

0nF

R38

27R

R38

27R

R31

27R

R31

27R

L7 10uH

150m

A

L7 10uH

150m

A

C64

104

C64

104

SAM9x5_LBGA217 - PIOD

MN2

ESAM9x5_LBGA217 - PIOD

MN2

E

PD0/

NAN

DO

EP1

3

PD1/

NAN

DW

ER

14

PD2/

A21/

NAN

DAL

ER

13

PD3/

A22/

NAN

DC

LEP1

5

PD4/

NC

S3P1

2

PD5/

NW

AIT

P14

PD6/

D16

N14

PD7/

D17

R15

PD8/

D18

M14

PD9/

D19

N16

PD10

/D20

N17

PD11

/D21

N15

PD12

/D22

K15

PD13

/D23

M15

PD14

/D24

L14

PD15

/D25

/A20

M16

PD16

/D26

/A23

L16

PD17

/D27

/A24

L15

PD18

/D28

/A25

K17

PD19

/D29

/NC

S2J1

7

PD20

/D30

/NC

S4K1

6

PD21

/D31

/NC

S5J1

6

C58

100n

FC5

810

0nF

RR4C

RR4C

36

RR1C

RR1C

36

MN1

1

MT2

9F2G

08AA

D

MN1

1

MT2

9F2G

08AA

D

WE

18

N.C

66

VCC

37

CE

9R

E8

N.C

1120

WP

19

N.C

55

N.C

11

N.C

22

N.C

33

N.C

44

DN

U1

21

DN

U2

22

N.C

1223

N.C

1324

R/B

7

I/O8_

N.C

26

I/O9_

N.C

27

I/O10

_N.C

28

I/O0

29

VCC

_N.C

34

N.C

1435

VSS

36

DN

U3

38

VCC

_N.C

39

VCC

12

VSS

13

ALE

17

N.C

811

N.C

710

N.C

914

N.C

1015

CLE

16

VSS_

N.C

25

I/O11

_N.C

33

I/O1

30

I/O3

32I/O

231

I/O15

_N.C

47I/O

14_N

.C46

I/O13

_N.C

45

I/O7

44I/O

643

I/O5

42I/O

441

I/O12

_N.C

40

VSS_

N.C

48

MT47H64M16HR

DDR2 SDRAM

MN5

MT47H64M16HR

DDR2 SDRAM

MN5 A0

M8

A1M

3

A2M

7

A3N

2

A4N

8

A5N

3

A6N

7

A7P2

A8P8

A9P3

A10

M2

BA0

L2

OD

TK9

DQ

0G

8

DQ

1G

2

DQ

2H

7

DQ

3H

3

DQ

4H

1

DQ

5H

9

DQ

6F1

DQ

7F9

UD

QS

B7

UD

QS

A8

LDM

F3

VDD

J9

VDD

M9

VDD

LJ1

VREF

J2

VDD

QE9

VSS

A3

VSS

E3

VDD

QA9

VDD

E1

RFU

1A2

RFU

2E2

CKE

K2

CK

J8

CK

K8

CAS

L7

RAS

K7

WE

K3

CS

L8VD

DQ

C3

VDD

QC

7

VDD

QC

9

VSSQ

D8

VSSQ

E7

VSSQ

F2

VSSQ

F8

VDD

A1

VSS

J3

A11

P7

BA1

L3

A12

R2

BA2

L1

VSS

N1

VSSD

LJ7

VSSQ

B2

RFU

3R

3

DQ

8C

8

DQ

9C

2

DQ

10D

7

DQ

11D

3

DQ

12D

1

DQ

13D

9

DQ

14B1

DQ

15B9

VDD

R1

VDD

QG

1

VDD

QG

7

VDD

QG

9

VSS

P9

VSSQ

D2

VSSQ

A7

VSSQ

B8

VSSQ

H2

VSSQ

H8

VDD

QG

3

VDD

QC

1

UD

MB3

LDQ

SE8

LDQ

SF7

RFU

4R

7

RFU

5R

8

C54

100n

FC5

410

0nF

RR2B

RR2B

27

RR17

CRR

17C

36

R50

0RR5

00R

RR17

ARR

17A

18

TP23

SMD

TP23

SMD

C50

100n

FC5

010

0nF

RR16

CRR

16C

36

R51

0RR5

10R

R52

0RR5

20R

RR16

ARR

16A

18

RR2D

RR2D

45

R53

0RR5

30R

R34

1.5K

1%R3

41.

5K1%

C48

100n

FC4

810

0nF

C59

100n

FC5

910

0nF

R54

0RR5

40R

C60

100n

FC6

010

0nF

R48

470K

R48

470K

RR3D

RR3D

45

R46

470K

R46

470K

C55

100n

FC5

510

0nF

R33

1RR33

1R

RR4B

RR4B

27

C66

100n

FC6

610

0nF

C51

100n

FC5

110

0nF

R39

1.5K

1%R3

91.

5K1%

C44

100n

FC4

410

0nF

TP24

SMD

TP24

SMD

RR4A

RR4A

18

C63

4.7u

FC6

34.

7uF

RR1B

RR1B

27

R55

0RR5

50R

C56

100n

FC5

610

0nF

1

ON

SW1A

SWIT

CH-2

-1.2

7mm

1

ON

SW1A

SWIT

CH-2

-1.2

7mm

14

C65

100n

FC6

510

0nF

C61

4.7u

FC6

14.

7uF

RR3B

RR3B

27

RR17

DRR

17D

45

RR1A

RR1A

18

C52

100n

FC5

210

0nF

RR17

BRR

17B

27

C47

100n

FC4

710

0nF

RR16

DRR

16D

45

C62

104

C62

104

R47

470K

R47

470K

RR16

BRR

16B

27

RR3C

RR3C

36

C49

100n

FC4

910

0nF

RR2C

RR2C

36

R49

DNP

R49

DNP

R26

27R

R26

27R

R42

0RR4

20R

C45

100n

FC4

510

0nF

RR4D

RR4D

45

RR1D

RR1D

45

C57

100n

FC5

710

0nF

R27

27R

R27

27R


24

Figure 3-14. CM Board Schematics – 3 of 55 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

(TW

DO

)(T

WC

KO

)

(SP

I0_M

IS0)

(SP

I0_M

OS

I)

SE

RIA

L F

LA

SH

(SP

I0_S

PC

K)

(SP

I0_N

PC

S0)

SE

RIA

L E

EP

RO

M

1-W

IRE

EE

PR

OM

LE

D

DTXD

DRXD

*R: R

efer

to th

e B

OM

PC

3P

C2

PC

1P

C0

PC

13P

C12

PC

8P

C9

PC

4P

C5

PC

6P

C7

PC

28

PC

16P

C17

PC

18

PC

10P

C11

PC

15P

C14

PC

26

PC

19

PC

23P

C22

PC

21P

C20

PC

25P

C24

PC

29P

C30

PC

31

PC

27

PB

0P

B1

PB

2P

B3

PB

7P

B6

PB

5P

B4

PB

9P

B8

PB

12P

B13

PB

14P

B15

PB

11P

B10

PB

18P

B17

PB

16

PA

0P

A1

PA

2P

A3

PA

4P

A5

PA

6P

A7

PA

8P

A9

PA

10P

A11

PA

15P

A14

PA

13P

A12

PA

16P

A17

PA

18P

A19

PA

23P

A22

PA

21P

A20

PA

25P

A24

PA

28P

A29

PA

30P

A31

PA

27P

A26

PA

30

PA

12

PA

13P

A11

PA

31

PB

18

PB

18

PD

21

PA

9

PA

10

PA

14

+3V

3

VD

DIO

P0

VD

DIO

P0

VD

DIO

P0

VD

DIO

P0

VD

DIO

P0

VD

DIO

P0

VD

DA

NA

PC

[0..3

1]{6

}

PA

[0..3

1]{6

}

PB

[0..1

8]{5

,6}

PD

[5..2

1]{3

,6}

Titl

e:

Siz

e:D

ocum

ent N

umbe

r:R

ev:

Dat

e:S

heet

:of

Dra

w B

y:

FLA

SH

,EE

PR

OM

,1-W

IRE

,LE

DB

SA

M9X

5-C

M

A3

46

Wed

nesd

ay, J

uly

20, 2

011

Zhu

Xue

liang

Titl

e:

Siz

e:D

ocum

ent N

umbe

r:R

ev:

Dat

e:S

heet

:of

Dra

w B

y:

FLA

SH

,EE

PR

OM

,1-W

IRE

,LE

DB

SA

M9X

5-C

M

A3

46

Wed

nesd

ay, J

uly

20, 2

011

Zhu

Xue

liang

Titl

e:

Siz

e:D

ocum

ent N

umbe

r:R

ev:

Dat

e:S

heet

:of

Dra

w B

y:

FLA

SH

,EE

PR

OM

,1-W

IRE

,LE

DB

SA

M9X

5-C

M

A3

46

Wed

nesd

ay, J

uly

20, 2

011

Zhu

Xue

liang

R56

470K

R56

470K

MN

8A

T24

C51

2BN

-SH

25-B

MN

8A

T24

C51

2BN

-SH

25-B

A0

1

A1

2

WP

7

SC

L6

VC

C8

A3

3S

DA

5

GN

D4

SAM9x5

_LBG

A217 - PIOC

MN

2D SAM9x5

_LBG

A217 - PIOC

MN

2D

PC

0/LC

DD

AT

0/IS

I_D

0/T

WD

1E

2

PC

1/LC

DD

AT

1/IS

I_D

1/T

WC

K1

F4

PC

2/LC

DD

AT

2/IS

I_D

2/T

IOA

3F

3

PC

3/LC

DD

AT

3/IS

I_D

3/T

IOB

3H

2

PC

4/LC

DD

AT

4/IS

I_D

4/T

CLK

3E

1

PC

5/LC

DD

AT

5/IS

I_D

5/T

IOA

4G

4

PC

6/LC

DD

AT

6/IS

I_D

6/T

IOB

4F

2

PC

7/LC

DD

AT

7/IS

I_D

7/T

CLK

4F

1

PC

8/LC

DD

AT

8/IS

I_D

8/U

TX

D0

G1

PC

9/LC

DD

AT

9/IS

I_D

9/U

RX

D0

G3

PC

10/L

CD

DA

T10

/ISI_

D10

/PW

M0

G2

PC

11/L

CD

DA

T11

/ISI_

D11

/PW

M1

H3

PC

12/L

CD

DA

T12

/ISI_

PC

K/T

IOA

5J3

PC

13/L

CD

DA

T13

/ISI_

VS

YN

C/T

IOB

5L2

PC

14/L

CD

DA

T14

/ISI_

HS

YN

C/T

CLK

5H

1

PC

15/L

CD

DA

T15

/ISI_

MC

K/P

CK

0J2

PC

16/L

CD

DA

T16

/E1_

RX

ER

/UT

XD

1J1

PC

17/L

CD

DA

T17

//UR

XD

1L1

PC

18/L

CD

DA

T18

/E1_

TX

0/P

WM

0K

2

PC

19/L

CD

DA

T19

/E1_

TX

1/P

WM

1N

3

PC

20/L

CD

DA

T20

/E1_

RX

0/P

WM

2K

1

PC

21/L

CD

DA

T21

/E1_

RX

1/P

WM

3M

3

PC

22/L

CD

DA

T22

/TX

D3

P3

PC

23/L

CD

DA

T23

/RX

D3

J4

PC

24/L

CD

DIS

P/R

TS

3K

3

PC

25//C

TS

3M

2

PC

26/L

CD

PW

M/S

CK

3P

2

PC

27/L

CD

VS

YN

C/E

1_T

XE

N/R

TS

1M

1

PC

28/L

CD

HS

YN

C/E

1_C

RS

DV

/CT

S1

K4

PC

29/L

CD

DE

N/E

1_T

XC

K/S

CK

1N

1

PC

30/L

CD

PC

K/E

1_M

DC

R2

PC

31/F

IQ/E

1_M

DIO

/PC

K1

N2

R58

*RR

58*R

C69

100n

FC

6910

0nF

R61

4.7K

R61

4.7K

TP

26S

MD

TP

26S

MD

R59

*RR

59*R

D2

red

D2

red

TP

25S

MD

TP

25S

MD

R65

1.5K

R65

1.5K

MN

9D

S24

31P

+M

N9

DS

2431

P+

IO2

GND1

NC

13

NC

24

NC

35

NC

46

R57

*RR

57*R

SAM9

x5_L

BGA2

17 -

PIO

BM

N2C SAM9

x5_L

BGA2

17 -

PIO

BM

N2C

PB

0/E

0_E

RX

0/R

TS

2D

3

PB

1/E

0_E

RX

1/C

TS

2D

4

PB

2/E

0_E

RX

ER

/SC

K2

D2

PB

3/E

0_E

RX

DV

/SP

I0_N

PC

S3

E4

PB

4/E

0_E

TX

CK

/TW

D2

D1

PB

5/E

0_E

MD

IO/T

WC

K2

E3

PB

6/E

0_E

MD

CB

3

PB

7/E

0_E

TX

EN

C2

PB

8/E

0_E

TX

ER

C5

PB

9/E

0_E

TX

0/P

CK

1C

1

PB

10/E

0_E

TX

1/P

CK

0B

2

PB

11/E

0_E

TX

2/P

WM

0A

3

PB

12/E

0_E

TX

3/P

WM

1B

4

PB

13/E

0_E

RX

2/P

WM

2A

2

PB

14/E

0_E

RX

3/P

WM

3C

4

PB

15/E

0_E

RX

CK

C3

PB

16/E

0_E

CR

SA

1

PB

17/E

0_E

CO

LB

1

PB

18/IR

Q/A

DT

RG

D5

2

ON

SW

1BN

HD

S-2

2

ON

SW

1BN

HD

S-2

23

R62

4.7K

R62

4.7K

D1

Blu

eD

1B

lue

R66

0RR

660R

MN

7A

T25

DF

321

MN

7A

T25

DF

321 HO

LD7

GN

D4

VC

C8

CS

1

SC

K6

SI

5

SO

2

WP

3

R67

470R

R67

470R

R68

100K

R68

100K

Q1

IRLM

L250

2Q

1IR

LML2

502

1

32

R69

470R

R69

470R

R64

DN

PR

64D

NP

SAM9

x5_L

BGA2

17 -

PIO

AM

N2B

SAM9

x5_L

BGA2

17 -

PIO

AM

N2B

PA

0/T

XD

0/S

PI1

_NP

CS

1L3

PA

1/R

XD

0/S

PI0

_NP

CS

2P

1

PA

2/R

TS

0/M

CI1

_DA

1/E

0_E

TX

0L4

PA

3/C

TS

0/M

CI1

_DA

2/E

0_E

TX

1N

4

PA

4/S

CK

0/M

CI1

_DA

3/E

0_E

TX

ER

T3

PA

5/T

XD

1/C

AN

TX

1R

1

PA

6/R

XD

1/C

AN

RX

1R

4

PA

7/T

XD

2/S

PI0

_NP

CS

1R

3

PA

8/R

XD

2/S

PI1

_NP

CS

0P

4

PA

9/D

RX

D/C

AN

RX

0U

3

PA

10/D

TX

D/C

AN

TX

0T

1

PA

11/S

PI0

_MIS

O/M

CI1

_DA

0U

1

PA

12/S

PI0

_MO

SI/M

CI1

_CD

AT

2

PA

13/S

PI0

_SP

CK

/MC

I1_C

KT

4

PA

14/S

PI0

_NP

CS

0U

2

PA

15/M

CI0

_DA

0U

4

PA

16/M

CI0

_CD

AP

5

PA

17/M

CI0

_CK

R5

PA

18/M

CI0

_DA

1U

5

PA

19/M

CI0

_DA

2T

5

PA

20/M

CI0

_DA

3U

6

PA

21/T

IOA

0/S

PI1

_MIS

OT

6

PA

22/T

IOA

1/S

PI1

_MO

SI

R6

PA

23/T

IOA

2/S

PI1

_SP

CK

U7

PA

24/T

CLK

0/T

KT

7

PA

25/T

CLK

1/T

FT

8

PA

26/T

CLK

2/T

DR

7

PA

27/T

IOB

0/R

DP

8

PA

28/T

IOB

1/R

KU

8

PA

29/T

IOB

2/R

FR

9

PA

30/T

WD

0/S

PI1

_NP

CS

3/E

0_E

MD

CR

8

PA

31/T

WC

K0/

SP

I1_N

PC

S2/

E0_

ET

XE

NU

9

R63

10K

R63

10K

C70

100n

FC

7010

0nF



5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

E0_R

X1E0

_RX0

E0_T

X1E0

_TX0

E0_T

XEN

E0_R

XDV

E0_M

DCE0

_MDI

OE0

_INT

R

E0_R

XER

E0_T

XCK

ETH

ERN

ET

Install as need to

alter PHYaddress,

must override internal

pullup on SAM9x5

PB4

PB10

PB9

PB7

PB1

PB0

PB2

PB6

PB5

PB8

PB3

AVDD

T

GND

_ETH

GND

_ETH

AVDD

T

GND

_ETH

GND

_ETH

VDDA

NA

VDDA

NA

VDDA

NA

VDDA

NA

VDDA

NA

VDDA

NA

NRST

{1,5

}

ETH0

_RX+

{5}

ETH0

_RX-

{5}

ETH0

_TX+

{5}

ETH0

_TX-

{5}

LED0

{5}

LED1

{5}

LED2

{5}

PB[0

..18]

{3,5

}

Title

:

Size

:Do

cum

entN

umbe

r:Re

v:

Date

:Sh

eet:

ofDr

awBy

:

ETHE

RNET

A

MBC

-SAM

9X5

A3

45

Thur

sday

,Nov

embe

r04,

2010

Zhu

Xuel

iang

Title

:

Size

:Do

cum

entN

umbe

r:Re

v:

Date

:Sh

eet:

ofDr

awBy

:

ETHE

RNET

A

MBC

-SAM

9X5

A3

45

Thur

sday

,Nov

embe

r04,

2010

Zhu

Xuel

iang

Title

:

Size

:Do

cum

entN

umbe

r:Re

v:

Date

:Sh

eet:

ofDr

awBy

:

ETHE

RNET

A

MBC

-SAM

9X5

A3

45

Thur

sday

,Nov

embe

r04,

2010

Zhu

Xuel

iang

R83

49.9

R1%R8

3

49.9

R1%

R86

1.5K

R86

1.5K

RR9

10KX

4

RR9

10KX

4

12345

678

R70

10K

R70

10K

C78

100n

FC7

810

0nF

TP27

SMD

TP27

SMD

RR14

CRR

14C

36

R99

0RR9

90R

R84

49.9

R1%

R84

49.9

R1%

R91DNP R91DNP

C77

100n

FC7

710

0nF

RR8

10KX

4RR

810

KX4

12345

678

R74

22R

R74

22R

R71

49.9

R1%R7

1

49.9

R1%

R96

0RR9

60R

RR15

ARR

15A

18

RR7

10KX

4RR

710

KX4

12345

678

R97

6.8K

R97

6.8K

RR14

BRR

14B

27

R9310K R9310K

C80

100n

FC8

010

0nF

TP28

SMD

TP28

SMD

+C7

510

uF+

C75

10uF

C79

100n

FC7

910

0nF

+C8

210

uF+

C82

10uF

RR15

CRR

15C

36

+C7

610

uF+

C76

10uF

RR13

BRR

13B

27

R72

49.9

R1%

R72

49.9

R1%

VDD

VSS

OUT

OEY3

50M

Hz

VDD

VSS

OUT

OEY3

50M

Hz

41

32

C72

100n

FC7

210

0nF

R924.7K R924.7K

B1 BLM

21BD

222T

N1

B1 BLM

21BD

222T

N1

R98

10K

R98

10K

C73

100n

FC7

310

0nF

RR14

DRR

14D

45

R73

22R

R73

22R

RR14

ARR

14A

18

RR13

CRR

13C

36

MN1

0

DM91

61AE

P

MN1

0

DM91

61AE

P

TX_E

R/T

XD4

16

CO

L/R

MII

36

MD

C24

RX-

4

RX+

3

TX-

8

TX+

7

XT1

43R

EF_C

LK/X

T242

RX_

CLK

/10B

TSER

34

RX_

DV/

TEST

MO

DE

37

RX_

ER/R

XD4/

RPT

R38

TX_E

N21

BGR

ES48

AVD

DR

1

AVD

DR

2

DVD

D41

DG

ND

44D

GN

D15

AGN

D5

AGN

D6

LED

2/O

P213

LED

1/O

P112

LED

0/O

P011

TXD

317

TXD

218

TXD

020

TXD

119

TX_C

LK/IS

OLA

TE22

RXD

0/PH

YAD

029

RXD

1/PH

YAD

128

RXD

2/PH

YAD

227

RXD

3/PH

YAD

326

CR

S/PH

YAD

435

MD

IO25

MD

INTR

32

PWR

DW

N10

DG

ND

33

RES

ET40

AVD

DT

9

DIS

MD

IX39

DVD

D30

DVD

D23

AGN

D46

BGR

ESG

47

CAB

LEST

S/LI

NKS

TS14

N.C

45

LED

MO

DE

31

R100

0RR100

0R

C81

100n

FC8

110

0nF

R95DNP R95DNP

R9410K R9410K

RR13

DRR

13D

45

C74

100n

FC7

410

0nF

C71

100n

FC7

110

0nF

RR15

BRR

15B

27


26


5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

PD10

PD12

PD14

PD16

PA0

PA2

PA4

PA11

PD8

PD18

PD20

PA13

PA8

PA22

PA31

PA16

PA18

PA20

PA5

PA10

PA25

PA27

PA29

PC0

PC2

PC4

PC7

PC9

PC11

PC12

PC14

PC17

PC19

PC21

PC22

PC24

PC26

PC29

PC31

PB0

PB2

PB4

PB6

PB8

PB9

PB11

PB13

PB15

PB17

PB18

PB10

PB12

PB14

PB16

PB1

PB3

PB5

PB7

PC23

PC25

PC27

PC28

PC30

PC13

PC15

PC16

PC18

PC20

PC1

PC3

PC5

PC6

PC8

PC10

PA6

PA9

PA24

PA26

PA28

PA21

PA23

PA30

PA15

PA17

PA19

PA12

PA14

PA7

PA1

PA3

PD17

PD19

PD21

PD11

PD13

PD15

PD7

PD9

PD5

PA0

PA1

PA3

PA2

PA5

PA7

PA6

PA4

PA9

PA11

PA10

PA13

PA15

PA14

PA12

PA8

PA17

PA19

PA18

PA21

PA23

PA22

PA20

PA25

PA27

PA26

PA29

PA31

PA30

PA28

PA24

PA16

PB1

PB2

PB3

PB6

PB7

PB5

PB4

PB9

PB15

PB13

PB10

PB11

PB8

PB12

PB14

PB18

PB17

PB16

PB0

PC1

PC2

PC3

PC6

PC7

PC5

PC4

PC9

PC15

PC13

PC12

PC10

PC11

PC8

PC14

PC21

PC18

PC19

PC17

PC25

PC20

PC22

PC23

PC31

PC29

PC26

PC27

PC16

PC24

PC28

PC30

PC0

PD9

PD8

PD11

PD10

PD13

PD12

PD17

PD16

PD19

PD18

PD20

PD15

PD14

PD5

PD7

PD21

+3V3

+3V3

AVDD

T

GND

_ETH

VDDA

NAVD

DANA

VDDN

F

VDDN

F

VDDI

OP0

VDDI

OP0

VDDI

OP1

VDDI

OP1

VDDB

U

ADVR

EF

+3V3

PA[0

..31]

{3}

PB[0

..18]

{3,4

}

PC[0

..31]

{3}

PD[5

..21]

{2,3

}

NAND

OE

{2}

NAND

ALE

{2}

NAND

WE

{2}

NAND

CLE

{2}

NAND

CS{2

}

HHSD

PC{1

}JT

AGSE

L{1

}W

KUP

{1}

BMS

{1}

NTRS

T{1

}TD

I{1

}TC

K{1

}TM

S{1

}

SHDN

{1}

TDO

{1}

RTCK

{1}

PWR_

EN{1

}

NRST

{1,4

}

HHSD

MC

{1}

HHSD

PB{1

}HH

SDM

B{1

}

DIBP

{1}

DIBN

{1}

HHSD

PA{1

}HH

SDM

A{1

}

ETH0

_TX+

{4}

ETH0

_TX-

{4}

ETH0

_RX+

{4}

ETH0

_RX-

{4}

LED0

{4}

LED1

{4}

LED2

{4}

NAND

R_B

{2}

Title

:

Size

:Do

cum

entN

umbe

r:Re

v:

Date

:Sh

eet:

ofDr

awBy

:

AT91

SAM

9G45

-IIA

MBC

-SAM

9X5

A3

55

Thur

sday

,Nov

embe

r04,

2010

Zhu

Xuel

iang

Title

:

Size

:Do

cum

entN

umbe

r:Re

v:

Date

:Sh

eet:

ofDr

awBy

:

AT91

SAM

9G45

-IIA

MBC

-SAM

9X5

A3

55

Thur

sday

,Nov

embe

r04,

2010

Zhu

Xuel

iang

Title

:

Size

:Do

cum

entN

umbe

r:Re

v:

Date

:Sh

eet:

ofDr

awBy

:

AT91

SAM

9G45

-IIA

MBC

-SAM

9X5

A3

55

Thur

sday

,Nov

embe

r04,

2010

Zhu

Xuel

iang

R102

0RR102

0R

C86

4.7u

FC8

64.

7uF

C87

4.7u

FC8

74.

7uF

C83

10uF

C83

10uF

R101

DNP

R101

DNP

C88

1uF

C88

1uF

C85

4.7u

FC8

54.

7uF

J1 PIO

200-

pin

SODI

MM

J1 PIO

200-

pin

SODI

MM

VCC

_3V3

1VC

C_3

V32

VCC

_3V3

3VC

C_3

V34

GN

D5

VBAT

6

USB

C_D

P7

JTAG

SEL

8

USB

C_D

M9

WKU

P10

GN

D11

SHD

N12

USB

B_D

M13

BMS

14

USB

B_D

P15

nRST

16

GN

D17

nTR

ST18

DIB

P19

TDI

20

DIB

N21

TCK

22

GN

D23

TMS

24

USB

A_D

M25

TDO

26

USB

A_D

P27

RTC

K28

GN

D29

PWR

_EN

30

RFU

131

RFU

232

RFU

333

RFU

434

RFU

535

RFU

636

RFU

737

RFU

838

RFU

939

RFU

1040

GN

D41

GN

D42

RFU

1143

RFU

1244

RFU

1345

RFU

1446

RFU

1547

RFU

1648

RFU

1749

RFU

1850

GN

D51

GN

D52

RFU

1953

RFU

2054

RFU

2155

RFU

2256

RFU

2357

RFU

2458

RFU

2559

RFU

2660

VDD

NF

61VD

DN

F62

PD0

63PD

164

PD2

65PD

366

PD4

67PD

568

PD6

69PD

770

PD8

71PD

972

NC

73G

ND

74

PD10

75PD

1176

PD12

77PD

1378

PD14

79PD

1580

PD16

81PD

1782

PD18

83PD

1984

PD20

85PD

2186

VDD

IOP0

87VD

DIO

P088

PA0

89PA

190

PA2

91PA

392

PA4

93G

ND

94

PA11

95PA

1296

PA13

97PA

1498

GN

D99

PA7

100

PA8

101

PA21

102

PA22

103

PA23

104

PA31

105

PA30

106

GN

D10

7PA

1510

8

PA16

109

PA17

110

PA18

111

PA19

112

PA20

113

GN

D11

4

PA5

115

PA6

116

PA10

117

PA9

118

GN

D11

9PA

2412

0

PA25

121

PA26

122

PA27

123

PA28

124

PA29

125

GN

D12

6

VDD

IOP1

127

VDD

IOP1

128

PC0

129

PC1

130

PC2

131

PC3

132

PC4

133

PC5

134

GN

D13

5PC

613

6

PC7

137

PC8

138

PC9

139

PC10

140

PC11

141

GN

D14

2

PC12

143

PC13

144

PC14

145

PC15

146

GN

D14

7PC

1614

8

PC17

149

PC18

150

PC19

151

PC20

152

PC21

153

GN

D15

4

PC22

155

PC23

156

PC24

157

PC25

158

PC26

159

PC27

160

GN

D16

1PC

2816

2

PC29

163

PC30

164

PC31

165

SELC

ON

FIG

016

6

VDD

ANA

167

VDD

ANA

168

PB0

169

PB1

170

PB2

171

PB3

172

PB4

173

PB5

174

PB6

175

PB7

176

PB8

177

GN

DAN

A17

8

PB9

179

PB10

180

PB11

181

PB12

182

PB13

183

PB14

184

PB15

185

PB16

186

PB17

187

GN

DAN

A18

8

PB18

189

ADVR

EF19

0

GN

D19

1LE

D0

192

ETH

0_TX

+19

3LE

D1

194

ETH

0_TX

-19

5LE

D2

196

ETH

0_R

X+19

7AV

DD

T19

8

ETH

0_R

X-19

9G

ND

_ETH

200

C84

1uF

C84

1uF


3.3 EK Board Description

3.3.1 EK Board Overview

The EK board serves as the main board that carries the CPU module. It features all necessary peripherals andinterfaces for processor evaluation.

Figure 3-17. Commented EK Board Layout


Based on the processor installed on the CM board, the EK board is equipped with the following interfaces orperipherals:

3.3.2.1 Devices

List of the EK board peripherals:

Two EMAC PHY

One Audio codec

Two high speed MCI Card interfaces

Two CAN transceivers

Three RS232 ports with level translator features: DBGU, USART0 and USART3

One Smart DAA port

Two USB host ports

One USB host/device port

On-board power regulation


28

LCD/ISI extension interface

ZigBee interface

One-wire device

3.3.2.2 Board Interface Connection

Main power supply (J4)

One SODIMM200 socket (CON1)

USB A Host/Device, support USB host/device using a type micro AB connector (J20)

USB B Host, support USB host using a type A connector (J19, upper)

USB C Host, support USB host using a type A connector (J19, lower)

DBGU (RX and TX only) connected to a 9-way male RS232 connector (J11)

USART1 (RX, TX, RTS, CTS) connected to a 9-way male RS232 connector (J8)

USART3 (RX, TX, RTS, CTS) connected to a 9-way male RS232 connector (J12)

JTAG, 20 pin IDC connector (J9)

MicroSD connector (J6)

SD/MMC connector (J7)

Headphone (J15), line-in (J13)

Image sensor connector (J21)

DM board connection for QTouch and TFT LCD display with Touch Screen and backlight (J21, J22)

DAA connecter RJ11 6P4C type (J16)

CAN bus connectors RJ12 6P6C type (CON2, CON3)

ZigBee connector (J10)

Three IO expansion ports (J1, J2, J3)

Test points, various test points are located throughout the board

3.3.2.3 Push Button Switches

Reset, board reset (BP1)

Wake up, push button to bring the processor out of low power mode (BP2)


3.3.3.1 Processor

The Evaluation Kit board may be used with any of the Core Modules:

SAM9G15

SAM9G25

SAM9G35

SAM9X25

SAM9X35


Figure 3-18. SODIMM Interface on EK Board

PC0

NRST

PB6

PB16

PA27

LCDDAT3LCDDAT1

PD13

PA3

PA18

VDDNF

LCDPCK

PC3

PB1

ISI_D2

PD15

PC16

LCDDAT0

PD7

PC5

EN5V_HDA#

PA16

PA20

PD17

ETH0_RX-

ONE_WIRE

LCDDAT5

PB17

PD12

USBC_DM

PB7

USBC_DP

ISI_D4

E1_CRSDV

PA15

PC6

PD5

PC16LCDDAT17PC17

PC17

PA1

PB18

PC31

LCDDAT6

JTAG

PC8

DIBN

LCDDAT2PC2PC2

PC10

PB4PB3

VDDNF

PD17

PA17

ISI_D7

PD3

PB5

E1_INTR

PC13

LCDDAT8

LCDDEN

DIBP

ISI_D9

JP9

SIP2

1 2

LCDDAT4PC4PC4

PA24

PWR_EN

R834.7k

PD15

PC20

PA19

PA5

LCDDAT10

VDDIOP0

LCDDAT7PC7PC7

PC31

PA26

ISI_D11

PA7

(MCI1_CD)

RTS0TXD0

PD19

RXD3CTS3

TXD3

JP9 f or BMS Conf ig: When Open,BMS=1: Boot on embedded ROM When Close,BMS=0: Boot on External memory

RTS3

PA0

3V3

PB16

PA16

PB5

PA10

LCDDAT19

LCDDAT13

PA1

PA13

PA30

LCDDAT9 PC9

PB1

PC9

PA2

PA28

LCDDAT15ISI_PCK

PD19

CANRX1CANTX1DRXDCANTX0

PB0

PA8

VDDIOP0

PA28

PA18

PD0

PC18

LCDDAT21

PC29SELCONFIG

PA3

PA26

PA11

PA31

LCDDAT11PC11PC11

PB2

PC29

PA24

ISI_HSYNC

PB8

PB17

PD20 PD21PD20 PD21

PD9

PB4

PB7

PC20

PA20

3V3

SHDN

PD12

ETH0_AVDDT

PA8

E1_TXCK

DTXD

E1_RX0E1_RX1

PB0

E1_TXEN

E1_TX0E1_TX1

E1_RXER

E1_MDIOE1_MDC

LCDDAT12PC12

PB8

PC12

PB11

PB15PB13 PB15

PB13PB11

AD4_LRAD2_YPAD0_XP PB12PB14

PB12AD3_YMAD1_XM

PB14

PC15

TF

RF

TKTDRKRD

PC22PC22LCDDAT22

E0_INTR

ISI_VSYNC

PA31

TDO

PA10

BMS

LCDDAT16

PD10

ISI_MCK

PA12

PC14

EN5V_HDC#

LCDDAT14PC14

PC25

PC3

PD16

OVCUR_USB

PA29

ISI_D1

PA25

PC24PC24LCDDISP

ETH0_GND

PA0

PD14

VDDANA

PC21

TWCK0

ISI_D3

LCDDAT18

PA17PA15

PA19

PD5

PB18

(MCI0_DA3)

(MCI0_CDA) (MCI0_CK)(MCI0_DA0)

(MCI0_DA1)

TDI

(MCI0_DA2)

PD8

PD18

VDDIOP0

ETH0_TX+

PC27

PC5

EN5V_HDB#

PA22

PA6

VBUS_SENSE

PC26 PC26

PA27

LCDPWM

PA2

PC25

LCDDAT20

ISI_D5

PD11

PA30

VDDANA

PB9

PD6

TCK

PC6

PA9

PD18

PA22

PD14

PA29

PA4

LCDDAT23

VDDIOP1

ISI_D6

PC27

PC23

PD4

PC8

PB10

PC19

VBAT

PD16

E0_RX1E0_RXDV

E0_RX0

TMS

E0_TXEN

E0_TX0 E0_TX1

E0_RXERE0_MDIO

E0_MDC

PA11

E0_TXCK

PA23

PA5

PB6

PA12PA4 (MCI1_CDA)

(MCI1_CK)(MCI1_DA0)

(MCI1_DA1) (MCI1_DA2)(MCI1_DA3)

ETH0_LED0

PA14

PC18

PB3

PB9

TWD0

ISI_D8

CANRX0

PC23

PC10

PD2

PC21

PA13

RTCK

PA14

PB10

ETH0_RX+

USBB_DM

PD1

PCK0

PC13

ISI_D10

PC30

PA7

USBB_DP

PA23

LCDVSYNC

VDDIOP1PC1

PD13

ETH0_TX-

LCDHSYNC

PC15

ETH0_LED1

NTRST

ISI_D0

PA9PA6

ADVREF

USBA_DPUSBA_DM

PA25

PB2

PA21

PC30

(MCI0_CD)

PD10PD11

PA21SPI1_MISO

PC28

PC19

SPI1_MOSI

ZB_IRQ1

SPI1_NPCS1

ZB_RSTN

ZB_IRQ0

SPI1_SPCK

ZB_SLPTR

PC0

WAKE UP

ETH0_LED2

PC1

KEY

CON1

1612618-4

GND1052

RFU333 RFU131

RFU2559 RFU2357

GND741

RFU2054

RFU1850

RFU1749 RFU1547 RFU1345

GND951

RFU1040RFU838

GND15 VCC33 VCC11

VCC22

VCC44

VBAT6

RFU939

RFU1143

RFU1244

RFU1446

RFU1648

GND842

RFU1953

RFU2155

RFU2256

RFU2458

RFU2660

RFU232

GND311

USBC_DP7

USBC_DM9

GND629

USBB_DP15 USBB_DM13

GND417

DIBP19

DIBN21

GND523

USBA_DM25

USBA_DP27

GND1294

PD0/NANDOE63

PD2/A21/NANDALE65

PD4/NCS367

PD6/D1669

PD8/D1871

GND1174

PD10/D2075

PD12/D2277

PD14/D2479

PD16/D26/A2381

PD18/D28/A2583

PD20/D30/NCS485

PA0/TXD0/SPI1_NPCS189

PA2/RTS0/MCI1_DA1/E0_ETX091

PA4/SCK0/MCI1_DA3/E0_ETXER93

PA11/SPI0_MISO/MCI1_DA095

PA13/SPI0_SPCK/MCI1_CK97

PA21/RXD2/SPI1_NPCS0102

PA23/TIOA2/SPI1_SPCK104

PA31/TWCK0/SPI1_NPCS2/E0_ETXEN105

PA16/MCI0_CDA109

PA18/MCI0_DA1111

PA20/MCI0_DA3113

PA5/TXD1/CANTX1115

PA10/DTXD/CANTX0117

PA25/TCLK1/TF121

PA27/TIOB0/RD123

PA29/TIOB2/RF125

PC0/LCDDAT0/ISI_D0/TWD1129

PC2/LCDDAT2/ISI_D2/TIOA3131

PC4/LCDDAT4/ISI_D4/TCLK3133

PC7/LCDDAT7/ISI_D7/TCLK4137

PC9/LCDDAT9/ISI_D9/URXD0139

PC11/LCDDAT11/ISI_D11/PWM1141

PC12/LCDDAT12/ISI_PCK/TIOA5143

PC14/LCDDAT14/ISI_HSYNC/TCLK5145

PC17/LCDDAT17/URXD1149

PC19/LCDDAT19/E1_TX1/PWM1151

PC21/LCDDAT21/E1_RX1/PWM3153

PC22/LCDDAT22/TXD3155

PC24/LCDDISP/RTS3157

PC26/LCDPWM/SCK3159

PC29/LCDDEN/E1_TXCK/SCK1163

PC31/FIQ/E1_MDIO/PCK1165

PB0/E0_RX0/RTS2169

PB2/E0_RXER/SCK2171

PB4/E0_TXCK/TWD2173

PB6/E0_MDC/AD7175

PB8/E0_TXER/AD9177

PB9/E0_TX0/PCK1/AD10179

PB11/E0_TX2/PWM0/AD0181

PB13/E0_RX2/PWM2/AD2183

PB15/E0_RXCK/AD4185

PB17/E0_COL/AD6187

PB18/IRQ/ADTRG189

PWR_EN30

JTAGSEL8

WKUP10

SHDN12

BMS14

nRST16

nTRST18

TDI20

TCK22

TMS24

TDO26

RTCK28

RFU434

PD1/NANDWE64

PD3/A22/NANDCLE66

PD5/NWAIT68

PD7/D1770

PD9/D1972

PD11/D2176

PD13/D2378

PD15/D25/A2080

PD17/D27/A2482

PD19/D29/NCS284

PD21/D31/NCS586

PA1/RXD090

PA3/CTS0/MCI1_DA2/E0_ETX192

PA12/SPI0_MOSI/MCI1_CDA96

PA14/SPI0_NPCS098

PA7/TXD2100

PA8/TIOA0/SPI1_MISO101

PA22/TIOA1/SPI1_MOSI103

PA30/TWD0/SPI1_NPCS3/E0_EMDC106

PA15/MCI0_DA0108

PA17/MCI0_CK110

PA19/MCI0_DA2112

PA6/RXD1/CANRX1116

PA9/DRXD/CANRX0118

PA24/TCLK0/TK120

PA26/TCLK2/TD122

PA28/TIOB1/RK124

PC1/LCDDAT1/ISI_D1/TWCK1130

PC3/LCDDAT3/ISI_D3/TIOB3132

PC5/LCDDAT5/ISI_D5/TIOA4134

PC6/LCDDAT6/ISI_D6/TIOB4136

PC8/LCDDAT8/ISI_D8/UTXD0138

PC10/LCDDAT10/ISI_D10/PWM0140

PC13/LCDDAT13/ISI_VSYNC/TIOB5144

PC15/LCDDAT15/ISI_MCK146

PC16/LCDDAT16/E1_RXER/UTXD1148

PC18/LCDDAT18/E1_TX0/PWM0150

PC20/LCDDAT20/E1_RX0/PWM2152

PC23/LCDDAT23/RXD3156

PC25/CTS3158

PC27/LCDVSYNC/E1_TXEN/RST1160

PC28/LCDHSYNC/E1_CRSDV/CTS1162

PC30/LCDPCK/E1_MDC164

PB1/E0_RX1/CTS2170

PB3/E0_RXDV/SPI0_NPCS3172

PB5/E0_MDIO/TWCK2174

PB7/E0_TXEN/AD8176

GNDANA1178

PB10/E0_TX1/PCK0/AD11180

PB12/E0_TX3/PWM1/AD1182

PB14/E0_RX3/PWM3/AD3184

PB16/E0_CRS/AD5186

GNDANA2188

RFU535

RFU636

RFU737

VDDNF161

VDDNF262

NC73

VDDIOP0_087

VDDIOP0_188

GND1399

GND14107

GND15119

GND16114

GND17126

GND18135

GND19142

GND20147

GND21154

GND22161

GND23191

VDDIOP1_0127

VDDIOP1_1128

VDDANA_0167

VDDANA_1168SELCONFIG166

ADVREF190

ETH0_TX+193

ETH0_TX-195

ETH0_RX+197

ETH0_RX-199

LED0192

LED1194

LED2196

AVDDT198

GND_ETH200

RXD0CTS0

PC28

PD9


30

3.3.3.2 Power Supplies

The EK Board features one adjustable LDO. It accepts DC 5V power input and outputs a regulated +3.3V to mostother circuits on the board through four 3.3V rails.

VDDPIO0

VDDPIO1

VDDANA

VDDISI

This LDO is enabled through a dual FET scheme. The processor can assert SHDN (which is a VDDBU- poweredI/O) to shut down the LDO to enter the so-called backup mode. The regulator on CM board is also shut down bythe action of the SHDN signal.

If the 3V battery is mounted on J5, both CM and EK boards can be woken up by action on the BP2 button, whichdrives the WKUP signal (also a VDDBU-powered I/O).

Figure 3-19. EK Board Power Management

JP4

SIP

2

12

VB

AT

R25

10k

VD

DA

NA

D1

BA

T54C

LT1G

1

3

2

VD

DIS

I

Pla

ce C

22 n

ear

MN

3.pi

n2

C57

100n

PW

R_E

N

R3

470R D2

Red

1 2

Q6

IRLM

L240

2

1

3 2

R2

47k

R8

10k

JP5

SIP

2

1 2

R4

100k

R5

15k

PO

WE

R_E

N

5V

PW

R_E

N#

FO

RC

EP

OW

ER

ON SH

DN

C8

1uC

71u

5VC

510

n

3V3

3V3

C6

10u

VOUT =

0.8V x (Rtop + Rbottom)/Rbottom

MN

3R

T901

8A

PG

OO

D1

EN

2

VIN

3

VD

D4

NC

5V

OU

T6

AD

J7

GN

D8

EP9

C12

01u

R7

10k

Q1

Si1

563E

DH

13

2

45

6

R1

100k

C9

10u

C10 15p

3V3

3V3

L16

220o

hm a

t 10

0MH

z1

2

L17

220o

hm a

t 10

0MH

z1

2

L1 220o

hm a

t 10

0MH

z1

2

L2 220o

hm a

t 10

0MH

z1

2

VD

DIO

P0

VD

DIO

P1

J5

C4

100n

C22

1u


There is another 3.3V rail, VDDNF, supplied from the CM board. VDDNF is set to 3.3V in the current CM design.The processors also support a 1.8V NAND Flash device, in which case VDDNF is set to 1.8V. In order to avoidpotential voltage conflict on user-defined applications, a level shifter is inserted between the PIO lines on VDDNFrail and the 3.3V application.

Figure 3-20. Level Shifter For VDDNF Rail

3.3.3.3 JTAG/ICE

Software debug is accessed by a standard 20-pin JTAG connection. This allows connection to a standard USB-to-JTAG in-circuit emulator such as SAM-ICE™.

Figure 3-21. JTAG Interface

3V3

C119 100nC118 100n

PD16PD17

PD18PD19PD20 ZB_RSTN

ZB_SLPTR

EN5V_HDB#EN5V_HDA#

EN5V_HDC#

MN18

SN74AVC8T245PWR

VCCA1

DIR2

A13

A24

A35

A46

A57

A68

A79

A810

B715B616B517B418B319B220B121OE22VCCB223VCCB124

GND111

GND212

GND313B814

VDDNF

VDDIOP0

R46

100k

DNP

R47

100kDNP

R48

100kDNP

R49

100kDNP

NRST

R580RDNP

R51 0R

R50 0RDNP

R54 0R

RTCK

TDITMS

TDO

NTRST

TCK

NRST

RTCK

NTRST

TCKTMSTDI

TDO

J9

BR20-H

12345678910111213151719

14161820

VDDIOP0

VDDIOP0


32

3.3.3.4 DBGU

The UART is connected to the DB-9 male socket through an RS-232 Transceiver (TXD and RXD only). A jumper,JP11, is used to select DBGU or CAN0 between IO (PA9, PA10) sharing scheme. Close JP11 to select DBGU.

Figure 3-22. DBGU Com Port

SEL_CAN

JP11SIP2

12

R67 0RPA9

C33 100n

VDDIOP0

C31100n

J11

5

4

3

2

1

9

8

7

6

10 11

C1+

V+

VCC

C1-C2+

C2- V-

T1

T2

R1

R2

GND

ENSD

MN8

ADM3222ARW

2 17

45

6

16

12

11

13

10 9

14

8

15

3

7

1 18

C30100n

R59

100k

R73 100k

VDDIOP0

C36100n

EARTH_RS232

R72 0R

C38 100n

PWR_EN

VDDIOP0

DTXDPA10

R60

100k

DRXD

R71 0R


3.3.3.5 USART

The USART0 and USART3 are used as serial communication ports. Both USARTs are buffered with an RS-232Transceiver (TXD, RXD and handshake CTS/RTS control) and connected to the DB-9 male socket. The softwaremust assign the appropriate PIO pins to enable the USART function.

The USART3 is only supported by SAM9G25 and SAM9X25 processors. The RS-232 Transceiver for USART3 isenabled by the signal SELCONFIG comprised of a pull down resistor on CM board. Ref to Section 3.4.1 ”DMBoard Overview” for details.

Figure 3-23. USART Com Port

(only for SAM9G25/SAM9X25)

VDDIOP1

VDDIOP1

R69 0RR70 0R

PC24

EARTH_RS232

C32 100n

PC22

C34 100n

PC23PC25

J12

5

4

3

2

1

9

8

7

6

10 11

C39 100n

R68 0R

RTSC3TXDC3

R64

47k

CTSC3

C29

100n

C28

4.7u

C35 100n

RXDC3

R63

47k

C37 100nR62

47k

R65 0R

R61

47k

R66 0R

CTS3RXD3

RTS3TXD3

SELCONFIG

MN9

ADM3312EARU

V+1

C2+2

VCC3

C2-4

EN5

C1+6

T1IN7

T2IN8

T3IN9

R1OUT10

R2OUT11

R3OUT12

R3IN13R2IN14R1IN15

T3OUT16T2OUT17T1OUT18

SD19

C1-20

V-21

C3-22

GND23

C3+24

USART3

USART0

R30 0RR31 0R

PA0PA2

C17 100n

C16 100n

EARTH_RS232

J8

5

4

3

2

1

9

8

7

6

10 11

PA1PA3

C19 100n

R29 0R

RTS0

MN4

ADM3312EARU

V+1

C2+2

VCC3

C2-4

EN5

C1+6

T1IN7

T2IN8

T3IN9

R1OUT10

R2OUT11

R3OUT12

R3IN13R2IN14R1IN15

T3OUT16T2OUT17T1OUT18

SD19

C1-20

V-21

C3-22

GND23

C3+24

TXD0

L5220ohm at 100MHz

1 2CTS0

RTSC0

RXD0

TXDC0

C13

4.7u

C14

100n

CTSC0

C15 100n

VDDIOP0

R24

47k

RXDC0

R23

47k

C18 100n

R27 0R

R22

47k

R28 0R

VDDIOP0


34

3.3.3.6 USB Ports

The Evaluation Kit features three USB communication ports:

All three USB Host ports are equipped with 500 mA high-side power switch for self-powered and bus-poweredapplications. The USB device port features VBUS insert detection function through the resistor ladder R138 andR139.

Refer to the embedded MPU product datasheet for detailed programming information. For datasheet referencenumbers and titles, see “Related Documents” .

Figure 3-24. USB Port (A)

Figure 3-25. USB Port (B & C)

Port AHost High Speed (EHCI) and Full Speed (OHCI) multiplexed with USB Device High speed Micro AB connector, J20

Port BHost High Speed (EHCI) and Full Speed (OHCI) standard type A connector, J19 upper port

Port C Host Full speed OHCI only standard type A connector, J19 lower port

R13947k

R138 82k

ACTIVE LOW

R13747k

OVCUR_USB

R14047k

C109100n

C108100n

(VBUS_SENSE)

EN5V_HDA#

(IDUSBA)

USB A HOST/DEVICE INTERFACE

+ C11033u

L15

220ohm at 100MHz

1 2

MN15

AIC1526-0GS

ENA1

FLGA2

ENB4

OUTA8

GNG6

FLGB3

IN7

OUTB5

PB16

5V

3V3

C107100n

+ C10633u

L14

220ohm at 100MHz

1 2

USBA_DPUSBA_DM

LCD_DETECT#5V_INTER

EARTH_USB

EARTH_USB

C11115p

VBUS

SHD DM

DPID

GND

J20

G3515-09010101-00

12345

76

PB17

3V3

L21220ohm at 100MHz

1 2

EARTH_USB

USBC_DPUSBC_DM

C101100n

EN5V_HDB#

EN5V_HDC#

+ C10333u

OVCUR_USB

L12

220ohm at 100MHz

1 2

+ C10433u

L13

220ohm at 100MHz

1 2

MN14

AIC1526-0GS

ENA1

FLGA2

ENB4

OUTA8

GNG6

FLGB3

IN7

OUTB5

PB17

5V

USB HOST B&C INTERFACE

EARTH_USB

A

B

J19Dual USB A

A1

A4

A2A3

1 2

B1B2B3B4

3 4

C102100n

C105100n

USBB_DMUSBB_DP


3.3.3.7 Ethernet 10/100 (EMAC) Port

Except for SAM9G15, the processor has two 10/100 Mbps Ethernet Mac Controllers.

The EK board is equipped with two Davicom DM9161AEP PHYs for each Ethernet port. Both PHY Transceiversare configured as RMII mode. Both PHY transceivers have an RJ45 port with embedded transformer and three-status LEDs.

By default, the ETH0 interface is implemented on the EK board. Additionally, for monitoring and control purposes,an LED functionality is carried on the RJ45 connectors to indicate activity, link, and speed status information forthe respective ports.

SAM9G15 SAM9G35 SAM9X35 SAM9G25 SAM9X25

EMAC – RMII RMII MII MII + RMII


36

Figure 3-26. ETH0 Port

EA

RTH

_ETH

0E

TH0_

GN

D

ETH

0_G

ND

ETH

0_G

ND

PB

5P

B8

ETH

0_R

X+E

TH0_

RX-

PB

3P

B2

E0_

RX0

E0_

RX1

E0_

RXD

V

RJ4

5 ET

HER

NET

CO

NN

ECTO

R

PB

0P

B1

PB

4

E0_

TX0

E0_

TX1

E0_

TXE

N

VD

DA

NA

VD

DA

NA

VD

DA

NA

E0_

AV

DD

T

E0_

AV

DD

T

PB

10

E0_

MD

IOE

0_M

DC

E0_

RXE

R

R17

70R

EA

RTH

_ETH

0

VDD

VSS

OUT

OEY1 50

MH

z

41

32

ETH

0_TX

+E

TH0_

AV

DD

T

ETH

0_TX

-

EA

RTH

_ETH

0

R17

80R

MN

12

DM

9161

AE

P

TX_E

R/T

XD4

16

CO

L/R

MII

36

MD

C24

RX-

4

RX+

3

TX-

8

TX+

7

XT1

43R

EF

_CLK

/XT2

42

RX_

CLK

/10B

TSE

R34

RX_

DV

/TE

STM

OD

E37

RX_

ER

/RXD

4/R

PTR

38

TX_E

N21

BG

RE

S48

AV

DD

R1

AV

DD

R2

DV

DD

41

DG

ND

44D

GN

D15

AG

ND

5

AG

ND

6

LED

2/O

P2

13LE

D1/

OP

112

LED

0/O

P0

11

TXD

317

TXD

218

TXD

020

TXD

119

TX_C

LK/I

SO

LATE

22

RXD

0/P

HY

AD

029

RXD

1/P

HY

AD

128

RXD

2/P

HY

AD

227

RXD

3/P

HY

AD

326

CR

S/P

HY

AD

435

MD

IO25

MD

INTR

32

PW

RD

WN

10

DG

ND

33

RE

SE

T40

AV

DD

T9

DIS

MD

IX39

DV

DD

30

DV

DD

23

AG

ND

46

BG

RE

SG

47

CA

BLE

STS

/LIN

KS

TS14

N.C

45

LED

MO

DE

31

L10

2200

R

12

RR

1822

R

1 2 3 45678

R11

30R

JP12

12

RR

1722

R

1 2 3 45678

C75

100n

VD

DA

NA

R21

822

R

R18

10R

R11

70R

R18

20R

ETH

0_LE

D2

R18

00R

DN

P

R17

10R

R17

40R

DN

P

R18

30R

DN

P

ETH

0_LE

D1

RR

610

k

12345

678

R17

20R

R17

50R

DN

P

R18

40R

DN

P

ETH

0_LE

D0

RR

710

k

12345

678

R10

80R

DN

P

R18

50R

DN

P

RR

810

k

12345

678

RR

910

k

12345

678

R11

90R

R17

30R

R17

60R

DN

P

Opt

iona

l PH

Y E

mbe

dded

on

CM

boa

rd

C87

10u

10V

C80

10u

10V

C84

100n

VD

DA

NA

R10

60R

C81

10u

10V

E0_

INTR

R11

46.

8k

VD

DA

NA

C77

100n

C79

100n

C85

100n

VD

DA

NA

VD

DA

NA

C82

100n

C86

100n

Opt

iona

l PH

Y E

mbe

dded

on

CM

boa

rd

C76

100n

C78

100n

C83

100n

R10

749

.9R

R10

949

.9R

R18

60R

DN

P

R11

049

.9R

R11

149

.9R

R11

547

0R

Place close to J17

ETH0

(Not available for SAM9G15)

R10

50R

R16

847

0R

R17

90R

FU

LL D

UP

LEX

R11

647

0R

R21

922

R

R10

410

k

R22

022

R

L19

220o

hm a

t 10

0MH

z1

2E

TH0_

GN

D

R22

122

R

D7

Red

12

PB

9P

B7

PB

6

1 2 3 6 4 5 7 8

75 75

7575

1nF

TD+

TD-

CT RD+

RD-

CT

TX+

TX-

RX+

RX-

Left LED

Right LED

J17

J002

6D21

B1 2 7 83 6 54

15

16 9

11

12

10

R11

21.

5k

E0_

TXC

K

NR

ST


Ethernet 1 is only available for SAM9X25. The PHY on Ethernet 1 is enabled by the SELCONFIG signal from apull-down resistor on the CM board. Refer to Section 3.4.1 ”DM Board Overview” for detail.

Some pins (PC16, PC20, PC21, PC28, PC26 and PC29) are configured as Ethernet 1 input from PHY forSAM9X25, whereas they are configured as LCD data pins on other processors. An IO buffer MN17 is inserted inseries with these signals to prevent the LCD from being disturbed by unknown status of the PHY device.


38

Figure 3-27. ETH1 Port

PC

18P

C27

PC

30

R12

81.

5k

E1_

TXC

K

NR

ST

L20

220o

hm a

t 10

0MH

z1

2R

169

470RV

DD

IOP

1

D8

Red

12

FU

LL D

UP

LEX

VD

DIO

P1

E1_

RX0

SE

LCO

NF

IG

C11

410

0n

R13

4

47k

RR

1122

R

1 2 3 45678

RR

1222

R

1 2 3 45678

E1_

RXE

R

SE

LCO

NF

IG

VD

DIO

P1

E1_

TXC

K

E1_

CR

SD

V

SE

LCO

NF

IG

E1_

TXC

K

E1_

RX1

VD

DIO

P1

VD

DIO

P1

E1_

INTR

ETH

1

RR

1022

R

1 2 3 45678

E1_

INTR

GN

D_E

TH1

EA

RTH

_ETH

1

GN

D_E

TH1

GN

D_E

TH1

GN

D_E

TH1

PC

31P

C26

E1_

RX0

E1_

RX1

PC

28P

C16

E1_

CR

SD

V

SE

LCO

NF

IG

RJ4

5 ET

HER

NET

CO

NN

ECTO

R

PC

21P

C20

PC

29

E1_

TX0

E1_

TX1

E1_

TXE

N

VD

DIO

P1

VD

DIO

P1

E1_

AV

DD

T

E1_

AV

DD

T

E1_

AV

DD

T

VD

DIO

P1

VD

DIO

P1

(Only availabel for SAM9X25)

E1_

MD

IOE

1_M

DC

PC

19

E1_

RXE

R

E1_

INTR

EA

RTH

_ETH

1

VDD

VSS

OUT

OEY2 50

MH

z

41

32

EA

RTH

_ETH

1

MN

13

DM

9161

AE

P

TX_E

R/T

XD4

16

CO

L/R

MII

36

MD

C24

RX-

4

RX+

3

TX-

8

TX+

7

XT1

43R

EF

_CLK

/XT2

42

RX_

CLK

/10B

TSE

R34

RX_

DV

/TE

STM

OD

E37

RX_

ER

/RXD

4/R

PTR

38

TX_E

N21

BG

RE

S48

AV

DD

R1

AV

DD

R2

DV

DD

41

DG

ND

44D

GN

D15

AG

ND

5

AG

ND

6

LED

2/O

P2

13LE

D1/

OP

112

LED

0/O

P0

11

TXD

317

TXD

218

TXD

020

TXD

119

TX_C

LK/I

SO

LATE

22

RXD

0/P

HY

AD

029

RXD

1/P

HY

AD

128

RXD

2/P

HY

AD

227

RXD

3/P

HY

AD

326

CR

S/P

HY

AD

435

MD

IO25

MD

INTR

32

PW

RD

WN

10

DG

ND

33

RE

SE

T40

AV

DD

T9

DIS

MD

IX39

DV

DD

30

DV

DD

23

AG

ND

46

BG

RE

SG

47

CA

BLE

STS

/LIN

KS

TS14

N.C

45

LED

MO

DE

31

R12

90R

L11

2200

R

12

C88

100n

JP13

12

R13

30R

RR

1310

k

12345

678

RR

1410

k

12345

678

R12

50R

DN

P

RR

1510

k

12345

678

RR

1610

k

12345

678

R13

60R

C10

010

u10

V

C93

10u

10V

C97

100n

C94

10u

10V

R12

20R

R13

06.

8k

C90

100n

1 2 3 6 4 5 7 8

75 75

7575

1nF

TD+

TD-

CT RD+

RD-

CT

TX+

TX-

RX+

RX-

Left LED

Right LED

J18

J002

6D21

B

1 2 7 83 6 54

15

16 9

11

12

10

C92

100n

C95

100n

C98

100n

C89

100n

C99

100n

C96

100n

OE1

I0 O4 I1 O5 I2 O6 I3 O7 GND

VCC

OE2 O0 I4 O1 I5 O2 I6 O3 I7

MN

17

74A

C24

4SC

1 2 3 4 5 6 7 8 9 1011121314151617181920

C91

100n

R12

449

.9R

R12

349

.9R

R12

649

.9R

VD

DIO

P1

R13

147

0R

R12

749

.9R

R13

247

0R

R12

10R

R12

010

k


3.3.3.8 Audio

The Evaluation Kit includes a WM8731 CODEC for digital sound input and output. This interface includes audiojacks for line audio input (J13) and headphone line output (J15).

The SAM9 processor is configured in IIS slave mode to interface with the WM8731 Codec. The IIS master mode isalso possible for evaluation by populating R162/R164 and removing the crystal Y3.

Figure 3-28. Audio Interface

R16

50R

C48

10u

AU

DIO

_GN

D

VD

DIO

P0

AU

DIO

_GN

D

C42

470p

C43

470p

C40

10u

LLIN

EIN

RLI

NEI

N

LOU

T

RO

UT

VMID

MIC

IN

MIC

BIAS

RH

POU

T

LHPO

UT

MO

DE

SDIN

SCLK

CSB

ADC

LRC

DBV

DD

DC

VDD

AVD

D

AGN

DH

PGN

D

CLK

OU

T

XTI/M

CLK

XTO

OSC

ADC

DAT

DAC

DAT

DAC

LRC

DG

ND

BCLK

HPV

DD

MN

10W

M87

31S

ED

S 14

910

27

1920

15

16 43 5 721

28

123 2422

1312 18 17

11

2 25 26

68

R86

0R

AU

DIO

_GN

D

AU

DIO

_GN

D

LIN

E_I

N

HE

AD

PH

ON

E

VD

DIO

P0

L3 220o

hm a

t 10

0MH

z1

2

J13

STE

RE

O_3

.5m

m

1

34

25

L4 220o

hm a

t 10

0MH

z1

2

C49

1u

C52

1u

C46

10u

C12

222

pC

121

22p

R87

33R

L18

220o

hm a

t 10

0MH

z1

2

R74

5.6K

PA

24

R78

5.6K

PA

26

VD

DIO

P0

PA

25

VC

C_D

AC

PA

29

TK TD TF

in Slave Mode

IIS of Audio Interface

TWC

K0

TWI_

addr

TWD

0R75

10k

MODE = 0: 2-wire

MPU mode for 9x5

TWI interface

PA

27

VC

C_D

AC

CSB = 1:

addr=0011011

RF

C11

710

0n

RD

RK

PA

31P

A30

PA

28

C44

470p

PCK0

AU

DIO

_GN

D

R76

10k

AU

DIO

_GN

D

R16

20R

DN

P

C41

470p

R77

4.7k

PB

10

J15

STE

RE

O_3

.5m

m

1

34

25

R79

4.7k

C11

510

u

C47

100n

R80

5.6K

AU

DIO

_GN

D

R16

4

22R

DN

P

R81

5.6K

C50

100n

Y3

12.2

88M

Hz

13

2 4

R91

47k

R90

47k

R162 near CODEC

C53

100n

C11

610

0n

AU

DIO

_GN

D

AU

DIO

_GN

D

AU

DIO

_GN

D

R88

0R

C56

100n

L6 220o

hm a

t 10

0MH

z1

2

L7 220o

hm a

t 10

0MH

z1

2

C61

470p

C62

470p

R89

0R

AU

DIO

_GN

D

+

C59

220u

F/1

0V

+

C60

220u

F/1

0V

C54

10u

R164 near SODIMM

C51

10u

C55

100n

AU

DIO

_GN

D

C45

100n


40

3.3.3.9 1-Wire EEPROM

The EK board also features a 1-Wire device acting as a “firmware label” to store information like chip type,manufacturer’s name, production date etc.

Figure 3-29. 1-Wire on EK

3.3.3.10 CAN Bus

Two boards, the SAM9X35-EK and SAM9X25-EK, feature two Controller Area Network (CAN) ports withtransceiver.

CAN0 uses the same IOs (PA9, PA10) as the DBGU. A jumper, JP11, is used to select either of the interfaces.

Open JP11 to select the CAN function.

Close JP11 to select the DBGU function.

A 3-state output buffer, MN19 is inserted in series with the output channels of the CAN transceiver, which shareIOs with the DBGU. This is necessary because the CAN transceiver does not feature 3-state outputs.

Figure 3-30. CAN on EK

R1441.5k

MN16

DS2431P

I/O2

GND1

NC13

NC24

NC35

NC46

VDDANA

R145 0RPB18 ONE_WIRE

(only for SAM9X35/SAM9X25)

VDDIOP0

VDDIOP0

VDDIOP0

VDDIOP0

MN19

SN74LVC1G126DBV

OE1

A2

GND3 Y

4

VCC5

SEL_CAN

R21 10k

PA5

PA6

R32 10k

CAN1

CAN0

JP7

SIP2

1 2

R20 0R

C2410u

R33 0R

CANTX0

5V

CANTX1

CANRX0

3V3

C23

100n

R37 0R

JP8

SIP2

1 2

CANRX1

C2110u

CON3

MJM0606GE06-H

123456

C20100n

CON2

MJM0606GE06-H

123456

MN5

SN65HVD234DR

RS8

D1

EN5

R4

CANH7

CANL6

VCC3

GND2

MN6

SN65HVD234DR

RS8

D1

EN5

R4

CANH7

CANL6

VCC3

GND2

3V35V

PA10

PA9

R34

120R

R19

120R

R35 10k


3.3.3.11 Telephone Interface

The Evaluation Kit features a smart DAA (Data Access Arrangement) chip to drive an analog telephone line onRJ11 6P4C port (J16).

Figure 3-31. Telephone Interface

MM

BA

T42

Q5

1

23

0R can be replaced by

bead to improve EMI

J16 M

JM06

06G

E06

-H

1 2 3 4 5 6

C67

100n

L8 220o

hm a

t 10

0MH

z

12

L9 220o

hm a

t 10

0MH

z

12

R92

6.81

M

R10

13.

01R

R95

280R

DA

A_G

ND

R10

39R

1

C70

47pF

DIB

P

DIB

N

0805

0805

C74

100n

R93

6.81

M

DA

A_G

ND

DA

A_G

ND

DA

A_G

ND

C65

100n

C63

470p

1 2

C64

470p

1 2

DA

A_G

ND

C66

100n

R96

280R

C69

10n

C72

150p

F

1%1%

1%1%

R97

280R

1206

LAN

0066

-50

TX1

123 4

R10

03.

01R

D4

TB31

00M

-13-

F

1206

1206

R98

280R

1206

R94

237K

MM

BA

T42

Q2

1

23

MN

11

CX2

0548

-11Z

RA

C4

TAC

5

EIC

11

RXI

6

EIO

10

EIF

9

TXO

8

TXF

7

GP

IO13

VC3

EP17

DV

DD

1

DIB

P14

DIB

N16

PW

R15

AV

DD

2

TES

T12

MM

BD

3004

S-7

-FD

51

3

2

C73

100n D

AA

_GN

D

R99

100R

DV

DD

MM

BA

T42

Q4

1

23

100V

R10

211

0R

C71

150p

F

C68

47n

MM

BD

3004

S-7

-FD

31

3

2

R16

60R

R16

70R

MM

BA

T42

Q3

1

23

1%1%

1% 1206

DA

A_G

ND

DA

A_G

ND

RJ11


42

3.3.3.12 SD/MMC Interface

The EK board has two high-speed MultiMedia Card Interfaces (MCI). The first interface is used as a 4-bit interface(MCI0), connected to a MicroSD card slot. The second interface is used as a 4-bit interface (MCI1), connected toan SD/MMC card slot.

The memory card is not included in the Evaluation Kit.

Please note that the power is connected to VCC, which is 3.3 volts.

Figure 3-32. SD/MMC Interface

PA15

PA17

PA16PA20PA19 SW

1

SW2

J6

PJS008-2110-0

8

5

76

4321

9

131211

10

14

PA18

VDDNF VDDIOP0

Micro SDRR1 27R1234 5

678

R10

68k

RR2 27R

1234 5

678

R12

68k

R11

68k

R13

68k

C11100n

(MCI0_DA1)

(MCI0_DA2)(MCI0_DA3)(MCI0_CDA)

(MCI0_CK)

(MCI0_DA0)

(MCI0_CD)

R910k R14

10k

PD15

PA11

PA13

PA12PA4PA3

PD14 (MCI1_CD)(MCI1_WP)

RR527R

1234 5

678

RR427R1234 5

678(MCI1_DA1)

(MCI1_DA2)(MCI1_DA3)(MCI1_CDA)

(MCI1_CK)

(MCI1_DA0)

R15

68k

RR310k

1 2 3 45678R16

68k

PA2

R17

68k

R18

68k

C12100n

3V3

DAT3DAT2

DAT1DAT0

CMD

CLKVDDVSS

VSSCDWP

GNDGNDSHSH

J7

7SDCN-B0-0101-F

8

5

76

43219

13121110

1415

JP6

SIP2

1 2

VDDIOP0 VDDNF


3.3.3.13 ZigBee

The EK board has a 10-pin male connector for the Atmel RZ600 ZigBee module.

DNP 0 Ohm resistors have been implemented in series with the PIO lines that are used elsewhere in the design.Thereby, enable their individual disconnections, should a conflict occur in user application.

Figure 3-33. ZigBee Interface

3.3.3.14 LED Indicators

The EK board has three LED indicators for purposes shown below:

Refer to Section 3.3.3.2 ”Power Supplies” and Section 3.3.3.7 ”Ethernet 10/100 (EMAC) Port” for details.

3.3.3.15 Expansion Ports

Most GPIOs are routed to expansion ports J1, J2, J3.

All I/Os of the MPU Image Sensor Interface (ISI) are routed to connectors J21.

The LCD and touch screen interfaces are routed to connectors J21, J22.

Figure 3-34. I/O Expansion

SPI1_MISOSPI1_MOSISPI1_SPCK

JP10DNP

123V3

R82 0R

DNP

C272.2u

DNP

R52 0R

DNP

ZB_SLPTRR56 0R

DNP

R53 0R

DNP

R57 0R

DNP

R55 0R

DNP

C262.2n

PA0

ZB_IRQ0

PA22PD17

C2515p

ZB_RSTN

PA23

J10

HD2X05

1 23 45 67 89 10

PA13PD16

PA21SPI1_NPCS1ZB_IRQ1

PA7

Table 3-8. LED Indicators

Reference Color Function

D2 Red 3v3 Power indicator

D7 Red ETH0 Full Duplex

D8 Red ETH1 Full Duplex

JP11

2

3

5V3V3

PA11

PA4

PA28

PA10

PA19

PA26

PA14

PA21

PA13

PA27PA12

PA5PA20

PA23PA24PA25

PA22

PA15

J1HD2X20-HH

1 23 45 67 89 10

11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 40

PA16

PA2PA1PA0

PA29

PA18

PA8

PA6

PA30

PA17

PA31

PA3

3V3

PA9

PA7

3V3

JP21

2

3

3V3 5V

PC11

PC4

PC28

PC10

PC19

PC26

PC14

PC21

PC13

PC27PC12

PC5PC20

PC24PC25

PC22

PC15

J2HD2X20-HH

1 23 45 67 89 10

11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 40

PC23

PC16

PC2PC1PC0

PC29

PC18

PC8

PC6

PC30

PC17

PC31

PC3

PC9

PC7

3V3 3V3

JP31

2

3

5V3V3

PB11

PB4

PD18

PB10 PD16

PB14PB13

PD17PB12

PB5

PD14PD15

PB15

J3HD2X20-HH

1 23 45 67 89 10

11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 40

PB16

PB2PB1PB0

PD19

PB18

PB8

PB6

PD20

PB17

PD21

PB3

3V3

PB9

PB7

3V3


44

Figure 3-35. LCD and ISI Expansion

3.3.4 Configuration

This section describes the PIO usage, the jumpers, the test points and the solder drops of the EK board.

3.3.4.1 JTAG/ICE Configuration

3.3.4.2 Boot Mode Select Configuration

LCD_DETECT

3V3_LCD

LCDDAT8LCDDAT10

LCDDEN

AD0_XPAD2_YP

LCDDAT1

LCDDAT21LCDDAT23

LCDDAT17LCDDAT19

LCDDAT3

AD4_LR

LCDDAT7LCDDAT5

LCDDAT9

3V3

5V_INTERJ3

TSM-120-01-L-DV-A

1 23 45 67 89 10

11 1213151719

14161820

21 2223 2425 2627 2829 3031 3233 3435 3637 3839 40

LCDDAT11

J2

TSM-115-01-L-DV-A

1 23 45 67 89 10

11 1213151719

14161820

21 2223 2425 2627 2829 30

LCDPWMLCDHSYNCLCDPCK

LCDDAT16LCDDAT18LCDDAT20

R22 0R

LCDDAT22

LCDDAT15

LCDDAT14

AD3_YM

LCDDAT13

LCDDAT12

LCDDISP

AD1_XM

LCDVSYNC

LCDDAT4LCDDAT6

LCDDAT0LCDDAT2

SELCONFIG

CHANGE#TWCK0 TWD0ZB_IRQ0

R19 0R ONE_WIRE

R5 0R DNP

R23 0R

R6 0R DNP

Table 3-9. JTAG/ICE

Designation Default Setting Feature

R50 Not Populated Disables the ICE NTRST input

R51 PopulatedEnables the ICE RTCK return. R94 must

be opened

R54 Populated Enables the ICE NRST input

R58 Not Populated Disables TCK <-> RTCK local loop

Table 3-10. BMS


JP9 OpenDefault to boot on embedded ROM

Close to boot on external memory


3.3.4.3 Force Power ON Configuration

3.3.4.4 White Protection Configuration on MCI1

3.3.4.5 Selection between DBGU and CAN

3.3.4.6 Codec IIS Configuration

3.3.4.7 ETH0 Configuration

Table 3-11. Force Power ON


JP5 CloseKeep on-board regulator always on

Open to feature SHDN function

Table 3-12. Write Protection on MCI1


JP6 CloseMCI1 write protect selected

Open to disable protection

Table 3-13. Select DBGU or CAN


JP11 CloseDefault to select DBGU

Open to select CAN0

Table 3-14. Codec IIS


R162, R164 Not PopulatedIIS master mode, clock the codec by

PCK0

C121, C122, Y3 PopulatedIIS slaver mode, clock the codec by

external crystal

Table 3-15. ETH0


R180, R183, R184, R185, R185, R186, R174, R175, R176

Not PopulatedPopulated to select the PHY channel on CM. Channel on EK must be cut if select

the PHY on CM.

R177, R178, R179, R181, R182, R218, R171, R172, R173

Populated Selection of PHY channel on EK


46

3.3.4.8 PIO Usage

Table 3-16. PIO A Pin Assignment and Signal Description

Signal Alternate Periph A Periph B Periph C Module CM EK

PA0 – TXD0 SPI1_NPCS1 – TXD0/ ZigBee USART0 shared with ZigBee

PA1 – RXD0 SPI0_NPCS2 – RXD0 USART0

PA2 – RTS0 MCI1_DA1 E0_ETX0 RTS0/ MCI1 USART0 shared with MCI1

PA3 – CTS0 MCI1_DA2 E0_ETX1 CTS0/ MCI1 USART0 shared with MCI1

PA4 – SCK0 MCI1_DA3 E0_ETXER MCI1 –

PA5 – TXD1 CANTX1 – CAN1 –

PA6 – RXD1 CANRX1 – CAN1 –

PA7 – TXD2 SPI0_NPCS1 – – ZB_IRQ0

PA8 – RXD2 SPI1_NPCS0 – – Serial Flash

PA9 – – CANRX0 – DBGU+CAN0 DBGU shared with CAN0

PA10 – – CANTX0 – DBGU+CAN0 DBGU shared with CAN0

PA11 – SPI0_MISO MCI1_DA0 – MCI1 –

PA12 – SPI0_MOSI MCI1_CDA – MCI1 –

PA13 – SPI0_SPCK MCI1_CK – MCI1 ZB_IRQ1

PA14 – SPI0_NPCS0 – – – MCI0

PA15 – MCI0_DA0 – – – MCI0

PA16 – MCI0_CDA – – – MCI0

PA17 – MCI0_CK – – – MCI0

PA18 – MCI0_DA1 – – – MCI0

PA19 – MCI0_DA2 – – – MCI0

PA20 – MCI0_DA3 – – – Serial Flash

PA21 – TIOA0 SPI1_MISO – ZigBee Serial Flash

PA22 – TIOA1 SPI1_MOSI – ZigBee Serial Flash

PA23 – TIOA2 SPI1_SPCK – ZigBee SSC

PA24 – TCLK0 TK – – SSC

PA25 – TCLK1 TF – – SSC

PA26 – TCLK2 TD – – SSC

PA27 – TIOB0 RD – – SSC

PA28 – TIOB1 RK – – SSC

PA29 – TIOB2 RF – – SSC

PA30 – TWD0 SPI1_NPCS3 E0_EMDC – TWD0

PA31 – TWCK0 SPI1_NPCS2 E0_ETXEN – TWCK0


Table 3-17. PIO B Pin Assignment and Signal Description


PB0 – E0_RX0 RTS2 – ETH0 –

PB1 – E0_RX1 CTS2 – ETH0 –

PB2 – E0_RXER SCK2 – ETH0 –

PB3 – E0_RXDV SPI0_NPCS3 – ETH0 –

PB4 – E0_TXCK TWD2 – ETH0 –

PB5 – E0_MDIO TWCK2 – ETH0 –

PB6 AD7 E0_MDC – – ETH0 –

PB7 AD8 E0_TXEN – – ETH0 –

PB8 AD9 E0_TXER – – ETH0_INTR –

PB9 AD10 E0_TX0 PCK1 – ETH0 –

PB10 AD11 E0_TX1 PCK0 – ETH0 –

PB11 AD0xp E0_TX2 PWM0 – – TSC

PB12 AD1xm E0_TX3 PWM1 – – TSC

PB13 AD2yp E0_RX2 PWM2 – – TSC

PB14 AD3ym E0_RX3 PWM3 – – TSC

PB15 AD4lr E0_RXCK – – – TSC

PB16 AD5 E0_CRS – – – VBUS_SENSE (USB)

PB17 AD6 E0_COL – – – OVCUR_USB (Open drain)

PB18 IRQ ADTRG – USER_LED1# ONE_WIRE


48

Table 3-18. PIO C Pin Assignment and Signal Description

Signal Alternate Periph A Periph B Periph C Module CM EK f (LCD) EK f (ISI+IO)

PC0 – LCDDAT0 ISI_D0 TWD1 – LCDDAT0 ISI_D0

PC1 – LCDDAT1 ISI_D1 TWCK1 – LCDDAT1 ISI_D1

PC2 – LCDDAT2 ISI_D2 TIOA3 – LCDDAT2 ISI_D2

PC3 – LCDDAT3 ISI_D3 TIOB3 – LCDDAT3 ISI_D3

PC4 – LCDDAT4 ISI_D4 TCLK3 – LCDDAT4 ISI_D4

PC5 – LCDDAT5 ISI_D5 TIOA4 – LCDDAT5 ISI_D5

PC6 – LCDDAT6 ISI_D6 TIOB4 – LCDDAT6 ISI_D6

PC7 – LCDDAT7 ISI_D7 TCLK4 – LCDDAT7 ISI_D7

PC8 – LCDDAT8 ISI_D8 UTXD0 – LCDDAT8 ISI_D8

PC9 – LCDDAT9 ISI_D9 URXD0 – LCDDAT9 ISI_D9

PC10 – LCDDAT10 ISI_D10 PWM0 – LCDDAT10 ISI_D10

PC11 – LCDDAT11 ISI_D11 PWM1 – LCDDAT11 ISI_D11

PC12 – LCDDAT12 ISI_PCK TIOA5 – LCDDAT12 ISI_PCK

PC13 – LCDDAT13 ISI_VSYNC TIOB5 – LCDDAT13 ISI_VSYNC

PC14 – LCDDAT14 ISI_HSYNC TCLK5 – LCDDAT14 ISI_HSYNC

PC15 – LCDDAT15 ISI_MCK PCK0 SSC LCDDAT15 ISI_MCK/PCK0

PC16 – LCDDAT16 E1_RXER UTXD1 – LCDDAT16 E1_RXER

PC17 – LCDDAT17 – URXD1 – LCDDAT17 –

PC18 – LCDDAT18 E1_TX0 PWM0 – LCDDAT18 E1_TX0

PC19 – LCDDAT19 E1_TX1 PWM1 – LCDDAT19 E1_TX1

PC20 – LCDDAT20 E1_RX0 PWM2 – LCDDAT20 E1_RX0

PC21 – LCDDAT21 E1_RX1 PWM3 – LCDDAT21 E1_RX1

PC22 – LCDDAT22 TXD3 – – LCDDAT22 TXD3

PC23 – LCDDAT23 RXD3 – – LCDDAT23 RXD3

PC24 – LCDDISP RTS3 – – LCDDISP RTS3

PC25 – – CTS3 – – – CTS3

PC26 – LCDPWM SCK3 – Eth1_Intr1 LCDPWM –

PC27 – LCDVSYNC E1_TXEN RTS1 – LCDVSYNC E1_TXEN

PC28 – LCDHSYNC E1_CRSDV CTS1 – LCDHSYNC E1_CRSDV

PC29 – LCDDEN E1_TXCK SCK1 – LCDDEN E1_TXCK

PC30 – LCDPCK E1_MDC – – LCDPCK E1_MDC

PC31 – FIQ E1_MDIO PCK1 – – E1_MDIO


Table 3-19. PIO D Pin Assignment and Signal Description


PD0 – NANDOE – – Nand Flash –

PD1 – NANDWE – – Nand Flash –

PD2 – A21/NANDALE – – Nand Flash –

PD3 – A22/NANDCLE – – Nand Flash –

PD4 – NCS3 – – CS NAND Flash –

PD5 – NWAIT – – NAND_RD/BY –

PD6 – D16 – – Nand Flash –




PD10 – D20 – – Nand Flash MCI0_CD (switch)

PD11 – D21 – – Nand Flash MCI1_CD (switch)

PD12 – D22 – – Nand Flash ZB_RSTN

PD13 – D23 – – Nand Flash ZB_SLPTR

PD14 – D24 – – – EN5V_HDA#

PD15 – D25 A20 – – EN5V_HDB#

PD16 – D26 A23 – – EN5V_HDC#

PD17 – D27 A24 – – –

PD18 – D28 A25 – – –

PD19 – D29 NCS2 – – –

PD20 – D30 NCS4 – – –

PD21 – D31 NCS5 – POWR_LED –


50

3.3.5 Connectors

3.3.5.1 Power Supply

Figure 3-36. Power Supply Connector J4

3.3.5.2 SODIMM Card Edge Socket

The Evaluation Kit uses a SODIMM200 standard connector for CM board interfacing.

Please note that this is not an industry standard pin-out and that it is unlikely to be compatible with off-the-shelfSODIMM cards.

Figure 3-37. SODIMM200 Socket CON1

Table 3-20. Power Supply Connector J2 Signal Description

Pin Mnemonic Signal description

1 Center +5V

2 – GND

3 – Floating

Table 3-21. SODIMM200 CON1 Signal Descriptions

Function Type x5 pad name SODIMM 200 x5 pad name Type Function

Front Side A – B Back Side

VCC 3V3 – POWER OUTPUT 1 – 2 POWER OUTPUT – VCC 3V3

VCC 3V3 – POWER OUTPUT 3 – 4 POWER OUTPUT – VCC 3V3

GND – – 5 – 6 POWER OUTPUT VBAT –

USBC_DP I/O USB Data Positive 7 – 8 – SYSC JTAGSEL

USBC_DM I/O USB Data Negative 9 – 10 – SYSC WKUP

GND – – 11 – 12 – SYSC SHDN

USBB_DM I/O USB Data Negative 13 – 14 – SYSC BMS

USBB_DP I/O USB Data Positive 15 – 16 – SYSC nRST


GND – – 17 – 18 – SYSC nTRST

DIBP I/O – 19 – 20 – RSTJTAG TDI

DIBN I/O – 21 – 22 – RSTJTAG TCK

GND – – 23 – 24 – RSTJTAG TMS

USBA_DM I/O USB Data Negative 25 – 26 – RSTJTAG TDO

USBA_DP I/O USB Data Positive 27 – 28 – RSTJTAG RTCK

GND – – 29 – 30 – – PWR_EN

RFU – RFU 31 – 32 RFU – RFU





KEY

GND – – 41 – 42 – – GND





GND – – 51 – 52 – – GND





VDDNF POWER DOMAIN FROM CM 61 – 62 POWER DOMAIN FROM CM VDDNF

PD0 GPIO D NANDOE 63 – 64 NANDWE GPIO D PD1

PD2 GPIO D A21/NANDALE 65 – 66 A22/NANDCLE GPIO D PD3

PD4 GPIO D NCS3 67 – 68 NWAIT GPIO D PD5

PD6 GPIO D D16 69 – 70 D17 GPIO D PD7


GND – – 73 – 74 – – GND



PD14 GPIO D D24 79 – 80 D25/A20 GPIO D PD15

PD16 GPIO D D26/A23 81 – 82 D27/A24 GPIO D PD17

PD18 GPIO D D28/A25 83 – 84 D29/NCS2 GPIO D PD19

PD20 GPIO D D30/NCS4 85 – 86 D31/NCS5 GPIO D PD21

VDDIOP0 POWER OUTPUT 87 – 88 POWER OUTPUT VDDIOP0

Table 3-21. SODIMM200 CON1 Signal Descriptions (Continued)



52

PA0 GPIO A TXD0/SPI1-NPCS1 89 – 90 RXD0/SPI0-NPCS2 GPIO A PA1

PA2 GPIO A MCI1_DA1/E0_ETX0 91 – 92CTS0/ MCI1_DA2/

E0_ETX1GPIO A PA3

PA4 GPIO ASCK0/MCI1_DA3/

E0_ETXER93 – 94 – – GND

PA11 GPIO ASPI0_MISO/MCI1_DA0

95 – 96SPI0_MOSI/ MCI1_CDA

GPIO A PA12

PA13 GPIO ASPI0_SPCK/

MCI1_CK97 – 98 SPI0_NPCS0 GPIO A PA14

GND – – 99 – 100TXD2/

SPI0_NPCS1GPIO A PA7

PA8 GPIO A RXD2/SPI1_NPCS0 101 – 102 TIOA0 /SPI1_MISO GPIO A PA21

PA22 GPIO A TIOA1/SPI1_MOS1 103 – 104TIOA2/

SPI1_SPCKGPIO A PA23

PA31 GPIO ATWCK0/SPI1_NPCS

2/E0_ETXEN105 – 106

TWD0/ SPI1_NPCS3/

E0_EMDCGPIO A PA30

GND – – 107 – 108 MCI0_DA0 GPIO A PA15

PA16 GPIO A MCI0_CDA 109 – 110 MCI0_CK GPIO A PA17

PA18 GPIO A MCI0_DA1 111 – 112 MCI0_DA2 GPIO A PA19

PA20 GPIO A MCI0_DA3 113 – 114 – – GND

PA5 GPIO A TXD1/CANTX1 115 – 116 RXD1/CANRX1 GPIO A PA6

PA10 GPIO A DTXD/CANTX0 117 – 118 DRXD/CANRX0 GPIO A PA9

GND – – 119 – 120 TCLK0/TK GPIO A PA24

PA25 GPIO A TCLK1/TF 121 – 122 TCLK2/TD GPIO A PA26

PA27 GPIO A TIOB0/RD 123 – 124 TIOB1/RK GPIO A PA28

PA29 GPIO A TIOB2/RF 125 – 126 – – GND

VDDIOP1 POWER OUTPUT 127 – 128 POWER OUTPUT VDDIOP1

PC0 GPIO C LCDDAT0/ISI_D0 129 – 130 LCDDAT1 GPIO C PC1

PC2 GPIO C LCDDAT2/ISI_D2 131 – 132 LCDDAT3 GPIO C PC3

PC4 GPIO C LCDDAT4 133 – 134 LCDDAT5 GPIO C PC5

GND – – 135 – 136 LCDDAT6 GPIO C PC6



PC11 GPIO C LCDDAT11 141 – 142 – – GND



GND – – 147 – 148 LCDDAT16 GPIO C PC16






PC21 GPIO C LCDDAT21 153 – 154 – – GND


PC24 GPIO C LCDDISP 157 – 158 – GPIO C PC25

PC26 GPIO C LCDPWM 159 – 160 LCDVSYNC GPIO C PC27

GND – – 161 – 162 LCDHSYNC GPIO C PC28

PC29 GPIO C LCDDEN 163 – 164 E1_MDC GPIO C PC30

PC31 GPIO C E1_MDIO 165 – 166 – – SELCONFIG

VDDANA POWER OUTPUT 167 – 168 POWER OUTPUT VDDANA

PB0 GPIO B E0_RX0 169 – 170 E0_RX1 GPIO B PB1

PB2 GPIO B E0_RXER 171 – 172 E0_RXDV GPIO B PB3

PB4 GPIO B E0_TXCK 173 – 174 E0_MDIO GPIO B PB5

PB6 GPIO B E0_MDC 175 – 176 E0_TXEN GPIO B PB7

PB8 GPIO B E0_TXER 177 – 178 GNDANA – –

PB9 GPIO B E0_TX0 179 – 180 E0_TX1 GPIO B PB10

PB11 GPIO B E0_TX2 181 – 182 E0_TX3 GPIO B PB12

PB13 GPIO B E0_RX2 183 – 184 E0_RX3 GPIO B PB14

PB15 GPIO B E0_RXCK 185 – 186 E0_CRS GPIO B PB16

PB17 GPIO B E0_COL 187 – 188 GNDANA – –

PB18 GPIO B IRQ 189 – 190 POWER OUTPUT POWR_REF

GND – – 191 – 192 – ETH LED0

ETH0_TX+ ETH – 193 – 194 – ETH LED1

ETH0_TX- ETH – 195 – 196 – ETH LED2

ETH0_RX+ ETH – 197 – 198 – ETH AVDDT

ETH0_RX- ETH – 199 – 200 – – GND_ETH




54

3.3.5.3 JTAG/ICE Connector

Figure 3-38. JTAG J9

Table 3-22. JTAG/ICE Connector J13 Signal Descriptions

Pin Mnemonic Description

1 VTref. 3.3V power

This is the target reference voltage. It is used to check if the target has power, to create the logic-level reference for the input comparators, and to control the output logic levels to the target. It is normally fed from VDD on the target board

and must not have a series resistor.

2 Vsupply. 3.3V powerThis pin is not connected in SAM-ICE. It is reserved for compatibility with other

equipment. Connect to VDD or leave open in target system.

3nTRST TARGET RESET - Active-low output

signal that resets the target

JTAG Reset. Output from SAM-ICE to the Reset signal on the target JTAG port. Typically connected to nTRST on the target CPU. This pin is normally pulled HIGH on the target to avoid unintentional resets when there is no connection.

4 GND Common ground

5TDI TEST DATA INPUT - Serial data output line, sampled on the rising edge of the TCK

signal.

JTAG data input of target CPU. It is recommended that this pin is pulled to a defined state on the target board. Typically connected to TDI on target CPU.

6 GND Common ground

7 TMS TEST MODE SELECTJTAG mode set input of target CPU. This pin should be pulled up on the target. Typically connected to TMS on target CPU. Output signal that sequences the target's JTAG state machine, sampled on the rising edge of the TCK signal.

8 GND Common ground

9TCK TEST CLOCK - Output timing signal,

for synchronizing test logic and control register access.

JTAG clock signal to target CPU. It is recommended that this pin is pulled to a defined state on the target board. Typically connected to TCK on target CPU.

10 GND Common ground

11RTCK - Input Return test clock signal from

the target.

Some targets must synchronize the JTAG inputs to internal clocks. To assist in meeting this requirement, a returned and retimed TCK can be used to

dynamically control the TCK rate. SAM-ICE supports adaptive clocking which waits for TCK changes to be echoed correctly before making further changes.

Connect to RTCK if available, otherwise to GND.


13TDO JTAG TEST DATA OUTPUT - Serial

data input from the target.JTAG data output from target CPU. Typically connected to TDO on target CPU.


15 nSRST RESET Active-low reset signal. Target CPU reset signal.


17 RFU This pin is not connected in SAM-ICE.


3.3.5.4 USB Type A Dual Port

Figure 3-39. USB Type A Dual Port J19


19 RFU This pin is not connected in SAM-ICE.


Table 3-22. JTAG/ICE Connector J13 Signal Descriptions (Continued)


Table 3-23. USB Type A Dual Port J19 Signal Descriptions


A1 Vbus – USB_A 5V power

A2 DM – USB_A Data minus

A3 DP – USB_A Data plus

A4 GND Common ground

B1 Vbus – USB_A 5V power

B2 DM – USB_A Data minus

B3 DP – USB_A Data plus

B4 GND Common ground

Mechanical pins Shield


56

3.3.5.5 USB Micro AB

Figure 3-40. USB USB Host/Device Micro AB Connector J20

3.3.5.6 DBGU

Figure 3-41. DBGU Connector J11

Table 3-24. USB USB Host/Device Micro AB Connector J20 Signal Descriptions


1 Vbus 5v power

2 DM Data minus

3 DP Data plus

4 ID On the Go Identification

5 GND Common ground

Table 3-25. DBGU Connector J11 Signal Descriptions


1, 4, 6, 9 – NO CONNECTION

2 RXD (RECEIVED DATA) RS232 serial data output signal

3 TXD (TRANSMITTED Data) RS232 serial data input signal

5 GND Common ground

7 RTS (REQUEST TO SEND) NO USED

8 CTS (CLEAR TO SEND) NO USED

Mechanical pins – Shield


3.3.5.7 RS232 Connector with RTS/CTS Handshake Support

Figure 3-42. USART Connector J12, J13

Table 3-26. USART Connector J12 Signal Descriptions

Pin Mnemonic PIO Description

1, 4, 6, 9 – – NO CONNECTION

2 RXD (RECEIVED DATA) PA1 RS232 serial data output signal

3 TXD (TRANSMITTED Data) PA0 RS232 serial data input signal

5 GND – Common ground

7 RTS (REQUEST TO SEND) PA2 Active-positive RS232 input signal

8 CTS (CLEAR TO SEND) PA3 Active-positive RS232 output signal

Mechanical pins – – Shield

Table 3-27. USART Connector J13 Signal Descriptions

Pin Mnemonic PIO Description

1, 4, 6, 9 – – NO CONNECTION

2 RXD (RECEIVED DATA) PC23 RS232 serial data output signal

3 TXD (TRANSMITTED Data) PC22 RS232 serial data input signal

5 GND – Common ground

7 RTS (REQUEST TO SEND) PC24 Active-positive RS232 input signal

8 CTS (CLEAR TO SEND) PC25 Active-positive RS232 output signal

Mechanical pins – – Shield


58

3.3.5.8 DAA RJ11 Socket (6P4C)

Figure 3-43. DAA RJ11 Socket J16

3.3.5.9 CAN RJ12 Socket (6P6C)

Figure 3-44. CAN RJ12 Socket CON2, CON3

Table 3-28. DAA RJ11 Socket J16 Signal Descriptions


1, 2, 5, 6 – NO CONNECTION

3 RAC RING side of ordinary telephone line

4 TAC TIP side of ordinary telephone line



1 3V3 POWER PIN

2 5V POWER PIN

4 CANL CAN bus differential pair

5 CANH CAN bus differential pair

4, 6 GND Common ground


3.3.5.10 MicroSD MCI0

Figure 3-45. MicroSD Socket J6

3.3.5.11 SD/MMC MCI1

Figure 3-46. SD/MMC Socket J7

Table 3-30. MicroSD Socket J6 Signal Descriptions


1 DAT2 Data Bit 2

2 CD/DAT3 Card Detect/Data Bit 3

3 CMD Command Line

4 VCC Supply Voltage 3.3V

5 CLK Command Line

6 VSS Common ground

7 DAT0 Data Bit 0

8 DAT1 Data Bit 1

9 SW1 No use, grounded

10 CARD DETECT CARD DETECT

Table 3-31. SD Socket J7 Signal Descriptions

Pin Mnemonic PIO

Signal

MMC CardSD Card

1-Bit Mode 4-Bit Mode

1 MCI1_DA2 PA3 Not Used Read Wait (RW) Data Line DAT2 or Read Wait (RW)

2 MCI1_DA3 PA4 Reserved Not Used Data Line DAT3

3 MCI1_CDA PA12 Command/Response

4 VDDIOP0 Supply Voltage (3.3-volts) VDDIOP0

5 MCI1_CK PA13 Clock

6 GND Ground


60

3.3.5.12 Ethernet RJ45 Socket J17, J18

Figure 3-47. Ethernet RJ45 Socket J17, J18

7 MCI1_DA0 PA11 Data Line DAT0

8 MC1_DA1 PA2 Not Used Interrupt (IRQ) Data Line DAT1 or Interrupt (IRQ)

9 GND Ground

10 MCI1_CD PD14 Card Detect, configured as GPIO, Power domain VDDNF

11 WP Write Protect Detect, connects to jumper JP6

12 GND Ground

13 GND Ground

14 GND Ground

15 GND Ground

Table 3-31. SD Socket J7 Signal Descriptions (Continued)

Pin Mnemonic PIO

Signal

MMC CardSD Card

1-Bit Mode 4-Bit Mode



1 TX+ DIFFERENTIAL OUTPUT PLUS

2 TX- DIFFERENTIAL OUTPUT MINUS

3 RX+ DIFFERENTIAL INPUT PLUS

4 Reserved –

5 Reserved DIFFERENTIAL INPUT MINUS

6 RX- –

7 Reserved –

8 Reserved –


3.3.5.13 ZigBee Socket J10

Figure 3-48. ZigBee Socket J10

3.3.5.14 LCD/ISI Socket J21

Figure 3-49. LCD/ISI Socket J21

Table 3-33. ZigBee Socket J10 Signal Descriptions

FunctionSignal Name Port Pin Pin Port

Signal Name Function

Option on misc. port set by OR or solder shunts

Reset /RST – 1 2 – Misc. –

EEprom for MAC address, cap array settings and serial number

TST: test mode activation

CLKM: RF chip clock output

Interrupt Request

IRQ – 3 4 – SLP_TR SLP_TR –

SPI chip select /SEL – 5 6 – MOSI SPI MOSI –

SPI MISO MISO – 7 8 – SCLK SPI CLK –

Power Supply GND GND 9 10 VCC VCC VCCVoltage range: 1.8v to 5.5v,

regulated to 3.3v

Table 3-34. LCD/ISI Socket J21 Signal Descriptions

LCD ISI Pin Num Pin Num ISI LCD

3V3 3V3 1 2 GND GND

VDDISI VDDISI 3 4 GND GND

ZB_IRQ0 ZB_IRQ0 5 6 – ZB_IRQ1

TWCK0 TWCK0 7 8 – TWD0

GND GND 9 10 ISI_MCK LCDDAT15

GND GND 11 12 ISI_VSYNC LCDDAT13

GND GND 13 14 ISI_HSYNC LCDDAT14

GND GND 15 16 ISI_PCK LCDDAT12

GND GND 17 18 ISI_D0 LCDDAT0


62

3.3.5.15 LCD/TSC Socket J22

Figure 3-50. LCD/TSC Socket J22

LCDDAT1 ISI_D1 19 20 ISI_D2 LCDDAT2





LCDDAT11 ISI_D11 29 30 GND GND

Table 3-34. LCD/ISI Socket J21 Signal Descriptions (Continued)

LCD ISI Pin Num Pin Num ISI LCD

Table 3-35. LCD/TSC Socket J22 Signal Descriptions

LCD Pin Num Pin Num LCD

5V 5V_INTER 1 2 GND GND

5V 5V_INTER 3 4 GND GND

LCDDAT16 – 5 6 – LCDDAT17




GND GND 13 14 GND GND

LCDDISP – 15 16 – LCDPWM

LCDCSYNC – 17 18 – LCDHSYNC

LCDDEN – 19 20 – LCDPCK


AD0_XP TSC 23 24 TSC AD1_XM

AD2_YP TSC 25 26 TSC AD3_YM

AD4_LR TSC 27 28 – ONE_WIRE


SPI1_MISO – 31 32 – SPI1_MOSI

SPI1_SPCK – 33 34 – SPI1_NPCS1

EN_PWRLCD SELCONFIG 35 36 LCD_DETECT LCD_DETECT#

PD16 – 37 38 – PD17



3.3.5.16 IO Expansion Port J1

Figure 3-51. IO Expansion Socket J1

Table 3-36. Expansion Socket J1 Signal Descriptions

PIO Power Pin Num Pin Num Power PIO

– 3V3, or 5V 1 2 3V3, or 5V –

– GND 3 4 GND –

PA0 – 5 6 – PA16

PA1 – 7 8 – PA17

PA2 – 9 10 – PA18

PA3 – 11 12 – PA19

PA4 – 13 14 – PA20

PA5 – 15 16 – PA21

PA6 – 17 18 – PA22

PA7 – 19 20 – PA23

PA8 – 21 22 – PA24

PA9 – 23 24 – PA25

PA10 – 25 26 – PA26

PA11 – 27 28 – PA27

PA12 – 29 30 – PA28

PA13 – 31 32 – PA29

PA14 – 33 34 – PA30

PA15 – 35 36 – PA31

– GND 37 38 GND –

– 3V3 39 40 3V3 –


64





– 3V3, or 5V 1 2 3V3, or 5V –

– GND 3 4 GND –

PC0 – 5 6 – PC16

PC1 – 7 8 – PC17

PC2 – 9 10 – PC18

PC3 – 11 12 – PC19

PC4 – 13 14 – PC20

PC5 – 15 16 – PC21

PC6 – 17 18 – PC22

PC7 – 19 20 – PC23

PC8 – 21 22 – PC24

PC9 – 23 24 – PC25

PC10 – 25 26 – PC26

PC11 – 27 28 – PC27

PC12 – 29 30 – PC28

PC13 – 31 32 – PC29

PC14 – 33 34 – PC30

PC15 – 35 36 – PC31

– GND 37 38 GND –

– 3V3 39 40 3V3 –






– 3V3, or 5V 1 2 3V3, or 5V –

– GND 3 4 GND –

PB0 – 5 6 – PB16

PB1 – 7 8 – PB17

PB2 – 9 10 – PB18

PB3 – 11 12 – –

PB4 – 13 14 – –

PB5 – 15 16 – –

PB6 – 17 18 – –

PB7 – 19 20 – –

PB8 – 21 22 – PD14

PB9 – 23 24 – PD15

PB10 – 25 26 – PD16

PB11 – 27 28 – PD17

PB12 – 29 30 – PD18

PB13 – 31 32 – PD19

PB14 – 33 34 – PD20

PB15 – 35 36 – PD21

– GND 37 38 GND –

– 3V3 39 40 3V3 –


66

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PA

17P

A18

PA

21P

A20

PA

19

PA

24P

A23

PA

22

PA

27P

A26

PA

25

PA

30P

A29

PA

28

PA

31

MC

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MC

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1M

CI0

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2M

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PI1

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PB

3P

B4

PB

5P

B6

PB

7P

B8

PB

12P

B11

PB

10P

B9

PB

15P

B14

PB

13

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PB

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PB

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PIO

CP

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PC

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C2

PC

3P

C4

PC

5P

C6

PC

7P

C8

PC

9P

C10

PC

11P

C12

PC

13P

C14

PC

15

LCD

DA

T0LC

DD

AT1

LCD

DA

T2LC

DD

AT3

LCD

DA

T4LC

DD

AT5

LCD

DA

T6LC

DD

AT7

LCD

DA

T8LC

DD

AT9

LCD

DA

T10

LCD

DA

T11

LCD

DA

T12

LCD

DA

T13

LCD

DA

T14

LCD

DA

T15

ISI_

D10

ISI_

D9

ISI_

D8

ISI_

D7

ISI_

D5

ISI_

D6

ISI_

D4

ISI_

D2

ISI_

D3

ISI_

D1

ISI_

D0

ISI_

D11

ISI_

PC

KIS

I_V

SY

NC

ISI_

HS

YN

CIS

I_M

CK

PIO

CP

C16

PC

17P

C18

PC

19P

C20

PC

21P

C22

PC

23P

C24

PC

25P

C26

PC

27P

C28

PC

29P

C30

PC

31

LCD

DA

T16

LCD

DA

T17

LCD

DA

T18

LCD

DA

T19

LCD

DA

T20

LCD

DA

T21

LCD

DA

T22

LCD

DA

T23

LCD

DIS

P

LCD

PW

MLC

DV

SY

NC

LCD

HS

YN

CLC

DD

EN

LCD

PC

K

E1_

RX

ER

E1_

TX0

E1_

TX1

E1_

RX

0E

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X1

TXD

3R

XD

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CTS

3E

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TRE

1_TX

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E1_

CR

SD

VE

1_TX

CK

E1_

MD

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1_M

DIO

PIO

DP

D0

PD

1P

D2

PD

3

PD

6P

D5

PD

4

PD

7

PD

10P

D9

PD

8

PD

11

PD

14P

D13

PD

12

PD

15

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R_U

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MC

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5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

(MC

I0_D

A1)

(MC

I0_D

A0)

(MC

I0_C

K)(M

CI0

_CD

A)

(MC

I0_D

A3)

(MC

I0_D

A2)

(MC

I1_D

A1)

(MC

I1_D

A0)

(MC

I1_C

K)(M

CI1

_CD

A)(M

CI1

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)(M

CI1

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)RXD0

CTS0

RTS0

TXD0

CANTX0

DRXD

CANTX1

CANRX1

E0_R

X1E0

_RX0

E0_R

XDV

E0_T

X1E0

_TX0

E0_T

XEN

E0_M

DC

E0_M

DIO

E0_R

XER

E0_T

XCK

PCK0

TWC

K0TWD0

TFTDTK

RF

RD

RK

E1_T

XCK

E1_R

X1E1

_RX0

E1_T

X1E1

_TX0

E1_T

XEN

E1_M

DC

E1_M

DIO

E1_R

XER

JTAG

DTXD

CANRX0

LCDDAT0

LCDDAT2

LCDDAT4

LCDDAT7

LCDDAT9

LCDDAT11

LCDDAT12

LCDDAT14

LCDDAT17

LCDDAT19

LCDDAT21

LCDDAT22

LCDDISP

LCDPWM

LCDDAT1

LCDDAT3

LCDDAT5

LCDDAT6

LCDDAT8

LCDDAT10

LCDDAT13

LCDDAT15

LCDDAT16

LCDDAT18

LCDDAT20

LCDDAT23

LCDVSYNC

LCDHSYNC

LCDPCK

LCDDEN

AD0_XP

AD2_YP

AD4_LR

AD1_XM

AD3_YM

SPI1_MISO

ZB_RSTN

SPI1_NPCS1

ZB_IRQ1

SPI1_MOSI

SPI1_SPCK

ZB_IRQ0

ZB_SLPTR

TXD3

CTS3

RXD3

RTS3

ISI_D1

ISI_D3

ISI_D5

ISI_D6

ISI_D8

ISI_D10

ISI_D0

ISI_D2

ISI_D4

ISI_D7

ISI_D9

ISI_D11

ISI_PCK

ISI_HSYNC

ISI_VSYNC

ISI_MCK

E1_C

RSD

V

(MC

I0_C

D)

ONE_WIRE

VBU

S_SE

NSE

(MC

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D)

EN5V_HDC#

EN5V_HDB#

OVC

UR

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B

EN5V_HDA#

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NTR

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Ext

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BM

S

PC19

PC10

PC28

PC4

PC11

PC20

PC5

PC12

PC27

PC13

PC21

PC14

PC26

PC15

PC22

PC25

PC24

PC23

PC0

PC1

PC2

PC16

PC3

PC31

PC17

PC30

PC6

PC8

PC18

PC29

PC7

PC9

PA19

PA10

PA28

PA4

PA11

PA20

PA5

PA12

PA27

PA13

PA21

PA14

PA26

PA15

PA22

PA25

PA24

PA23

PA0

PA1

PA2

PA16

PA3

PA31

PA17

PA30

PA6

PA8

PA18

PA29

PA7

PA9

PB10

PD18

PB4

PB11

PB5

PB12

PD17

PB13

PB14

PD16

PB15

PD15

PD14

PB0

PB1

PB2

PB16

PB3

PD21

PB17

PD20

PB6

PB8

PB18

PD19

PB7

PB9

PA1

PA3

PA12

PA0

PA2

PA4

PA11

PA13

PA15

PA17

PA19

PA16

PA18

PA20

PA25

PA27

PA29

PA24

PA26

PA28

PB10

PA30

PA31

PA5

PA10

PA6

PA9

PB4

PB9

PB7

PB1

PB0

PB3

PB2

PB6

PB5

PC29

PC19

PC21

PC18

PC20

PC27

PC30

PC16

PC31

PD19

PD18

PC0

PC2

PC4

PC7

PC9

PC11

PC12

PC14

PC17

PC22

PC24

PC26

PC1

PC3

PC5

PC6

PC8

PC10

PC13

PC15

PC23

PC28

PB11

PB13

PB15

PB12

PB14

PD21

PD20

PD17

PD15

PD14

PD16

PA8

PA22

PA23

PC25

PD1

PD13

PD11

PD9

PD7

PD5

PD3

PA14

PA7

PA21

PB16

PD0

PD12

PD10

PD8

PD6

PD4

PD2

PB8

PB18

PB17

5V3V

3

3V3

3V3

5V3V

3

3V3

3V3

5V3V

3

3V3

3V3

3V3

3V3

VDD

IOP1

VDD

IOP0

VDD

IOP0

VDD

IOP1

VDD

NF

VDD

NF

VDD

ANA

VDD

ANA

VDD

IOP0

SHD

N{4

}

PA15

{5}

PA17

{5}

PA19

{5}

PA18

{5}

PA16

{5}

PA20

{5}

PA12

{5}

PA4

{5}

PA13

{5,6

,14}

PA2

{5,7

}

PA11

{5}

PA3

{5,7

}PA

1{7

}

PA10

{6,7

}PA

5{6

}PA

9{6

,7}

PA6

{6}

USB

B_D

M{1

2}U

SBB_

DP

{12}

USB

A_D

M{1

2}U

SBA_

DP

{12}

USB

C_D

M{1

2}U

SBC

_DP

{12}

PA0

{6,7

,14}

TDO

{6}

TDI

{6}

TCK

{6}

TMS

{6}

RTC

K{6

}

NTR

ST{6

}N

RST

{6,1

0,11

,13}

PB4

{10}

PB0

{10}

PB2

{10}

PB9

{10}

PB1

{10}

PB3

{10}

PB5

{10}

PB7

{10}

PB6

{10}

DIB

N{9

}D

IBP

{9}

PA31

{8,1

4}PA

30{8

,14}

PA29

{8}

PA25

{8}

PA27

{8}

PA28

{8}

PA26

{8}

PA24

{8}

PC19

{11,

14}

PC31

{11}

PC29

{11,

14}

PC21

{11,

14}

PC18

{11,

14}

PB10

{8,1

0}

PC20

{11,

14}

PC27

{11,

14}

PC30

{11,

14}

PC16

{11,

14}

WAK

EU

P{1

3}

PD19

{12}

PD18

{12}

PC0

{14}

PC2

{14}

PC4

{14}

PC7

{14}

PC9

{14}

PC11

{14}

PC12

{14}

PC14

{14}

PC17

{14}

PC22

{7,1

4}PC

24{7

,14}

PC26

{11,

14}

PC1

{14}

PC3

{14}

PC5

{14}

PC6

{14}

PC8

{14}

PC10

{14}

PC13

{14}

PC15

{14}

PC23

{7,1

4}

PC28

{11,

14}

PB11

{14}

PB13

{14}

PB15

{14}

PB12

{14}

PB14

{14}

PD21

PD20

{12}

PD15

{5}

PD17

{12,

14}

PD16

{12,

14}

PD14

{5}

PA8

PA22

{6,1

4}PA

23{6

,14}

PC25

{7}

SELC

ON

FIG

{7,1

1,14

}

PB8

{10}

VBAT

{4,1

3}

ADVR

EF{1

3}

PA14

PA7

{6,1

4}

PB18

{13,

14}

PD5

PWR

_EN

{4,7

}

PD13

PD12

PA21

{6,1

4}

PD9

PD11

PD10

ETH

0_LE

D0

{10}

ETH

0_LE

D1

{10}

ETH

0_LE

D2

{10}

ETH

0_AV

DD

T{1

0}

ETH

0_TX

+{1

0}

ETH

0_R

X+{1

0}ET

H0_

TX-

{10}

ETH

0_R

X-{1

0}ET

H0_

GN

D{1

0}

PB17

{12}

PB16

{12}

RE

VD

AT

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DE

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DAT

EV

ER

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SC

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1/1

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V.

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T

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JP2

1

2

3

JP3

JP3

1

2

3

KEY

CO

N1

1612

618-

4

KEY

CO

N1

1612

618-

4

GN

D10

52

RFU

333

RFU

131

RFU

2559

RFU

2357

GN

D7

41

RFU

2054

RFU

1850

RFU

1749

RFU

1547

RFU

1345

GN

D9

51

RFU

1040

RFU

838

GN

D1

5V

CC

33

VC

C1

1V

CC

22

VC

C4

4

VB

AT

6

RFU

939

RFU

1143

RFU

1244

RFU

1446

RFU

1648

GN

D8

42

RFU

1953

RFU

2155

RFU

2256

RFU

2458

RFU

2660

RFU

232

GN

D3

11U

SB

C_D

P7

US

BC

_DM

9

GN

D6

29

US

BB

_DP

15U

SB

B_D

M13

GN

D4

17

DIB

P19

DIB

N21

GN

D5

23

US

BA

_DM

25

US

BA

_DP

27

GN

D12

94

PD

0/N

AN

DO

E63

PD

2/A

21/N

AN

DA

LE65

PD

4/N

CS

367

PD

6/D

1669

PD

8/D

1871

GN

D11

74

PD

10/D

2075

PD

12/D

2277

PD

14/D

2479

PD

16/D

26/A

2381

PD

18/D

28/A

2583

PD

20/D

30/N

CS

485

PA

0/TX

D0/

SP

I1_N

PC

S1

89

PA

2/R

TS0/

MC

I1_D

A1/

E0_

ETX

091

PA

4/S

CK

0/M

CI1

_DA

3/E

0_E

TXE

R93

PA

11/S

PI0

_MIS

O/M

CI1

_DA

095

PA

13/S

PI0

_SP

CK

/MC

I1_C

K97

PA

21/R

XD

2/S

PI1

_NP

CS

010

2

PA

23/T

IOA

2/S

PI1

_SP

CK

104

PA

31/T

WC

K0/

SP

I1_N

PC

S2/

E0_

ETX

EN

105

PA

16/M

CI0

_CD

A10

9

PA

18/M

CI0

_DA

111

1

PA

20/M

CI0

_DA

311

3

PA

5/TX

D1/

CA

NTX

111

5

PA

10/D

TXD

/CA

NTX

011

7

PA

25/T

CLK

1/TF

121

PA

27/T

IOB

0/R

D12

3

PA

29/T

IOB

2/R

F12

5

PC

0/LC

DD

AT0

/ISI_

D0/

TWD

112

9

PC

2/LC

DD

AT2

/ISI_

D2/

TIO

A3

131

PC

4/LC

DD

AT4

/ISI_

D4/

TCLK

313

3

PC

7/LC

DD

AT7

/ISI_

D7/

TCLK

413

7

PC

9/LC

DD

AT9

/ISI_

D9/

UR

XD

013

9

PC

11/L

CD

DA

T11/

ISI_

D11

/PW

M1

141

PC

12/L

CD

DA

T12/

ISI_

PC

K/T

IOA

514

3

PC

14/L

CD

DA

T14/

ISI_

HS

YNC

/TC

LK5

145

PC

17/L

CD

DA

T17/

UR

XD

114

9

PC

19/L

CD

DA

T19/

E1_

TX1/

PW

M1

151

PC

21/L

CD

DA

T21/

E1_

RX

1/P

WM

315

3

PC

22/L

CD

DA

T22/

TXD

315

5

PC

24/L

CD

DIS

P/R

TS3

157

PC

26/L

CD

PW

M/S

CK

315

9

PC

29/L

CD

DE

N/E

1_TX

CK

/SC

K1

163

PC

31/F

IQ/E

1_M

DIO

/PC

K1

165

PB

0/E

0_R

X0/

RTS

216

9

PB

2/E

0_R

XE

R/S

CK

217

1

PB

4/E

0_TX

CK

/TW

D2

173

PB

6/E

0_M

DC

/AD

717

5

PB

8/E

0_TX

ER

/AD

917

7

PB

9/E

0_TX

0/P

CK

1/A

D10

179

PB

11/E

0_TX

2/P

WM

0/A

D0

181

PB

13/E

0_R

X2/

PW

M2/

AD

218

3

PB

15/E

0_R

XC

K/A

D4

185

PB

17/E

0_C

OL/

AD

618

7

PB

18/IR

Q/A

DTR

G18

9

PW

R_E

N30

JTA

GS

EL

8

WK

UP

10

SH

DN

12

BM

S14

nRS

T16

nTR

ST

18

TDI

20

TCK

22

TMS

24

TDO

26

RTC

K28

RFU

434

PD

1/N

AN

DW

E64

PD

3/A

22/N

AN

DC

LE66

PD

5/N

WA

IT68

PD

7/D

1770

PD

9/D

1972

PD

11/D

2176

PD

13/D

2378

PD

15/D

25/A

2080

PD

17/D

27/A

2482

PD

19/D

29/N

CS

284

PD

21/D

31/N

CS

586

PA

1/R

XD

090

PA

3/C

TS0/

MC

I1_D

A2/

E0_

ETX

192

PA

12/S

PI0

_MO

SI/M

CI1

_CD

A96

PA

14/S

PI0

_NP

CS

098

PA

7/TX

D2

100

PA

8/TI

OA

0/S

PI1

_MIS

O10

1

PA

22/T

IOA

1/S

PI1

_MO

SI

103

PA

30/T

WD

0/S

PI1

_NP

CS

3/E

0_E

MD

C10

6

PA

15/M

CI0

_DA

010

8

PA

17/M

CI0

_CK

110

PA

19/M

CI0

_DA

211

2

PA

6/R

XD

1/C

AN

RX

111

6

PA

9/D

RX

D/C

AN

RX

011

8

PA

24/T

CLK

0/TK

120

PA

26/T

CLK

2/TD

122

PA

28/T

IOB

1/R

K12

4

PC

1/LC

DD

AT1

/ISI_

D1/

TWC

K1

130

PC

3/LC

DD

AT3

/ISI_

D3/

TIO

B3

132

PC

5/LC

DD

AT5

/ISI_

D5/

TIO

A4

134

PC

6/LC

DD

AT6

/ISI_

D6/

TIO

B4

136

PC

8/LC

DD

AT8

/ISI_

D8/

UTX

D0

138

PC

10/L

CD

DA

T10/

ISI_

D10

/PW

M0

140

PC

13/L

CD

DA

T13/

ISI_

VS

YNC

/TIO

B5

144

PC

15/L

CD

DA

T15/

ISI_

MC

K14

6

PC

16/L

CD

DA

T16/

E1_

RX

ER

/UTX

D1

148

PC

18/L

CD

DA

T18/

E1_

TX0/

PW

M0

150

PC

20/L

CD

DA

T20/

E1_

RX

0/P

WM

215

2

PC

23/L

CD

DA

T23/

RX

D3

156

PC

25/C

TS3

158

PC

27/L

CD

VS

YNC

/E1_

TXE

N/R

ST1

160

PC

28/L

CD

HS

YNC

/E1_

CR

SD

V/C

TS1

162

PC

30/L

CD

PC

K/E

1_M

DC

164

PB

1/E

0_R

X1/

CTS

217

0

PB

3/E

0_R

XD

V/S

PI0

_NP

CS

317

2

PB

5/E

0_M

DIO

/TW

CK

217

4

PB

7/E

0_TX

EN

/AD

817

6

GN

DA

NA

117

8

PB

10/E

0_TX

1/P

CK

0/A

D11

180

PB

12/E

0_TX

3/P

WM

1/A

D1

182

PB

14/E

0_R

X3/

PW

M3/

AD

318

4

PB

16/E

0_C

RS

/AD

518

6

GN

DA

NA

218

8

RFU

535

RFU

636

RFU

737

VD

DN

F161

VD

DN

F262

NC

73

VD

DIO

P0_

087

VD

DIO

P0_

188

GN

D13

99

GN

D14

107

GN

D15

119

GN

D16

114

GN

D17

126

GN

D18

135

GN

D19

142

GN

D20

147

GN

D21

154

GN

D22

161

GN

D23

191

VD

DIO

P1_

012

7V

DD

IOP

1_1

128

VD

DA

NA

_016

7V

DD

AN

A_1

168

SE

LCO

NFI

G16

6

AD

VR

EF

190

ETH

0_TX

+19

3

ETH

0_TX

-19

5

ETH

0_R

X+

197

ETH

0_R

X-

199

LED

019

2

LED

119

4

LED

219

6

AV

DD

T19

8

GN

D_E

TH20

0

JP1

JP1

1

2

3

J3 HD

2X20

-HH

J3 HD

2X20

-HH

12

34

56

78

910

1112

1314

1516

1718

1920

2122

2324

2526

2728

2930

3132

3334

3536

3738

3940

J1 HD

2X20

-HH

J1 HD

2X20

-HH

12

34

56

78

910

1112

1314

1516

1718

1920

2122

2324

2526

2728

2930

3132

3334

3536

3738

3940

JP9

SIP2

JP9

SIP2

12

R83

4.7k

R83

4.7k

J2 HD

2X20

-HH

J2 HD

2X20

-HH

12

34

56

78

910

1112

1314

1516

1718

1920

2122

2324

2526

2728

2930

3132

3334

3536

3738

3940


5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

5V/2

A In

put

FOR

CE

POW

ERO

N

VOUT

=

0.8V

x (

Rtop

+ R

bott

om)/

Rbot

tom

AD

HE

SIV

E F

EE

T

Plac

eC

22ne

arM

N3.

pin2

BD

erek

11-O

ct-1

0X.

XXX

-XXX

-XX

5V_I

NPU

T

POW

ER_E

N

PWR

_EN

#

5V5V

3V3

3V3

5V

VDD

IOP0

VDD

IOP1

VDD

ANA

3V3

5V 3V3

VDD

IOP0

VDD

IOP1

VDD

NF

3V3

SHD

N{3

}

VBAT

{3,1

3}

VDD

ISI

{14}

PWR

_EN

{3,7

}

RE

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duct

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icatio

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R7

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R7

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Q6

IRLM

L240

2Q

6IR

LML2

402

1

3 2R

410

0kR

410

0k

C3

100n

C3

100n

TP4

TP4

C6

10u

C6

10u

Z8

Bum

pon

Z8

Bum

pon

Z17

Bum

pon

Z17

Bum

pon

JP5

SIP2

JP5

SIP2

1 2

L2 220o

hmat

100M

Hz

L2 220o

hmat

100M

Hz

12

C7

1uC7

1u

MN

2BN

X002

-01

MN

2BN

X002

-01

B1

PS

G3

CB

2

CG

14

CG

25

CG

36

R25

10k

R25

10k

R8

10k

R8

10k

J5J5

C22

1uC22

1u

MN

3R

T901

8AM

N3

RT9

018A

PG

OO

D1

EN

2

VIN

3

VD

D4

NC

5V

OU

T6

AD

J7

GN

D8

EP9

TP2

TP2

C9

10u

C9

10u

C1

100n

C1

100n

C5

10n

C5

10n

D2

Red

D2

Red

1 2

MN

1ZE

N05

6V23

0A16

LSM

N1

ZEN

056V

230A

16LS

1

2

3

R3

470R

R3

470R

Z9

Bum

pon

Z9

Bum

pon

TP1

TP1

+C

233

u

+C

233

u

C8

1uC8

1uR

515

kR

515

k

L1 220o

hmat

100M

Hz

L1 220o

hmat

100M

Hz

12

L16

220o

hmat

100M

Hz

L16

220o

hmat

100M

Hz

12

TP7

TP7

JP4

SIP2

JP4

SIP2

12

C10 15p

C10 15p

R2

47k

R2

47k

TP3

TP3

Q1

Si15

63ED

HQ

1Si

1563

EDH

13

2

45

6

D1

BAT5

4CLT

1G

D1

BAT5

4CLT

1G

1

3

2

R1

100k

R1

100k

C4

100n

C4

100n

Z6

Bum

pon

Z6

Bum

pon

L17

220o

hmat

100M

Hz

L17

220o

hmat

100M

Hz

12

C12

01uC

120

1u

C57

100n

C57

100n

TP5

TP5

TP6

TP6

J4 DC

PO

WER

JAC

K

J4 DC

PO

WER

JAC

K

1 23

Z7

Bum

pon

Z7

Bum

pon


70

5 5

4 4

3 3

2 2

1 1

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CC

BB

AA

SD/M

MC

CAR

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TER

FAC

E - M

CI0

RR

1,R

R2

near

SOD

IMM

pla

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(MC

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A1)

(MC

I0_D

A0)

(MC

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K)

(MC

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DA)

(MC

I0_D

A3)

(MC

I0_D

A2)

(MC

I0_C

D)

(MC

I1_C

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(MC

I1_W

P)

SD/M

MC

Plus

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FAC

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CI1

RR

4,R

R5

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IMM

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A1)

(MC

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A0)

(MC

I1_C

K)

(MC

I1_C

DA)

(MC

I1_D

A3)

(MC

I1_D

A2)

Mic

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BD

erek

11-O

ct-1

0X.

XXX

-XXX

-XX

3V3

VDD

NF

VDD

IOP0

VDD

NF

VDD

IOP0

PA2

{3,7

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PA18

{3}

PA15

{3}

PA17

{3}

PA16

{3}

PA20

{3}

PA19

{3}

PA11

{3}

PA13

{3,6

,14}

PA12

{3}

PA4

{3}

PA3

{3,7

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PD15

{3}

PD14

{3}

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1R

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icatio

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icatio

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icatio

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1SA

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R10

68k

R10

68k

R9

10k

R9

10k

R18

68k

R18

68k

C12

100n

C12

100n

SW1

SW2

J6

PJS0

08-2

110-

0

SW1

SW2

J6

PJS0

08-2

110-

0

8 57 6 4 3 2 1

9

131211

10

14

DAT3

DAT2

DAT1

DAT0

CMD

CLK

VDD

VSS

VSS

CDWP

GND

GND

SHSH

J7

7SD

CN

-B0-

0101

-F

DAT3

DAT2

DAT1

DAT0

CMD

CLK

VDD

VSS

VSS

CDWP

GND

GND

SHSH

J7

7SD

CN

-B0-

0101

-F

8 57 6 4 3 2 1 9

13121110 14 15

R13

68k

R13

68k

R11

68k

R11

68k

RR

310

kR

R3

10k

12345

678

RR

227

RR

R2

27R

1 2 3 45678

R14

10k

R14

10k

JP6

SIP2

JP6

SIP2

12

R15

68k

R15

68k

RR

527

RR

R5

27R

1 2 3 45678

C11

100n

C11

100n

RR

427

RR

R4

27R

1 2 3 45678

R16

68k

R16

68k

RR

127

RR

R1

27R

1 2 3 45678

R12

68k

R12

68k R

17

68k

R17

68k


5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

ICE

INTE

RFA

CE

ZIG

BEE

INTE

RFA

CE SPI1_NPCS1

SPI1_MISO

SPI1_MOSI

SPI1_SPCK

ZB_IRQ0

PD17

PD16

ZB_IRQ1

CA

N IN

TER

FAC

E

CA

N0

CA

N1

CANTX0

CANRX0

CANTX1

CANRX1

(only for SAM9X35/SAM9X25)

BD

erek

11-O

ct-1

0X

.XX

X-X

XX

-XX

TDI

RTC

KTD

O

TMS

TCK

NTR

ST

NR

ST

3V3

5V3V3

5V3V3

VD

DIO

P0

VD

DIO

P0

VD

DIO

P0

VD

DIO

P0

VD

DIO

P0

VD

DIO

P0

VD

DIO

P0

NR

ST

{3,1

0,11

,13}

NTR

ST

{3}

RTC

K{3

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TDI

{3}

TMS

{3}

TCK

{3}

TDO

{3}

PA

13{3

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PA

21{3

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PA

7{3

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PA

0{3

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A22

{3,1

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A23

{3,1

4}

PA

6{3

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PA

5{3

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PA

9{3

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PA

10{3

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ZB_S

LPTR

{12}

ZB_R

STN

{12}

SE

L_C

AN

{7}

RE

VD

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DA

TEV

ER

.S

CA

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1R

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ET

This

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ion

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publ

icat

ion

with

outo

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shal

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galp

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A

AT9

1SA

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5-E

K6 14

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XX

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N&

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DN

PD

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R82

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R82

0R

DN

P

R50

0RD

NP

R50

0RD

NP

R37

0RR

370R

R58

0R DN

P

R58

0R DN

P

C26

2.2n

C26

2.2n

MN

6

SN

65H

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R

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7

CA

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6

VC

C3

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5

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R55

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JP7

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2

JP7

SIP

2

12

R34

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R34

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0606

GE

06-H

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06-H

1 2 3 4 5 6

R57

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DN

P

R57

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P

R33

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330R

C21

10u

C21

10u

C25

15p

C25

15p

R47

100k

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P

R47

100k

DN

P

R32

10k

R32

10k

MN

19

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74LV

C1G

126D

BV

MN

19

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C1G

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BV

OE

1

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C5

JP8

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2

12

R53

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R53

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R21

10k

R21

10k

C23

100n

C23

100n

R49

100k

DN

P

R49

100k

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P

CO

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06-H

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06-H

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R56

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C27

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2.2u

R54

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540R

R51

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510R

R52

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R52

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R35

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R35

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R19

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C20 10

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20 100n

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13 15 17 19

14 16 18 20

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R48

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R48

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R22

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R22

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J11

J11

54321 9876

10

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R29

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290R

C39

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C39

100n

R24

47k

R24

47k

C36

100n

C36

100n

R60

100k

R60

100k

R31

0RR

310R

C17

100n

C17

100n

R23

47k

R23

47k

J12

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54321 9876

10

11

C15

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C15

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C1+

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C1-

C2+

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R1 R2

GND

ENSD

MN

8

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M32

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C1-

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8

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M32

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RW

217

4 5 6

16

12 11 13 109148153 7

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C14

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R61

47k

R61

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C28

4.7u

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R64

47k

R64

47k

C30

100n

C30

100n

C37

100n

C37

100n

MN

9

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M33

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R1O

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13R

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V-

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R30

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300R

C31

100n

C31

100n

R66

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660R

C34

100n

C34

100n

R28

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280R

R73

100k

R73

100k

R67

0RR

670R

R62

47k

R62

47k

C32

100n

C32

100n

C33

100n

C33

100n

L5 220o

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100M

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L5 220o

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100M

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12

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680R

C16

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C16

100n

C18

100n

C18

100n

R65

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650R

JP11

SIP

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12

R72

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720R

R70

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700R

R27

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270R

R69

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690R

R63

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R63

47k

R59

100k

R59

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MN

4

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C35

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C19

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R71

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C38

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5.6K

R78

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C47

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C47

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C41

470p

C41

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R79

4.7k

R79

4.7k

C12

122

pC

121

22p

L3 220o

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100M

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L3 220o

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100M

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12

C42

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C42

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L7 220o

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100M

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L7 220o

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100M

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12

R89

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L4 220o

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100M

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L4 220o

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100M

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12

C12

222

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122

22p

C44

470p

C44

470p

R77

4.7k

R77

4.7k

C11

610

0nC

116

100n

R80

5.6K

R80

5.6K

R91

47k

R91

47k

C49

1uC

491u

R76

10k

R76

10k

C55

100n

C55

100n

R87

33R

R87

33R

C62

470p

C62

470p

C11

710

0nC

117

100n

R75

10k

R75

10k

R16

20R

DN

P

R16

20R

DN

P

C40

10u

C40

10u

C54

10u

C54

10u

J13

STE

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mJ1

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TER

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C11

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115

10u

C56

100n

C56

100n

R16

4

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P

R16

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DN

P

C46

10u

C46

10u

C45

100n

C45

100n

C52

1uC

521u

Y3 12.2

88M

Hz

Y3 12.2

88M

Hz

13

2 4

L6 220o

hmat

100M

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L6 220o

hmat

100M

Hz

12

R88

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880R

C43

470p

C43

470p

R16

50R

R16

50R

L18

220o

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100M

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L18

220o

hmat

100M

Hz

12

LLIN

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RLI

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IN

LOU

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RO

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VM

IDM

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MIC

BIA

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C

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M87

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1920

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16 43 5 721

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123 2422

1312 18 17

11

2 25 26

68

R90

47k

R90

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R86

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C59

220u

F/10

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C59

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F/10

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C61

470p

C61

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R74

5.6K

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5.6K

J15

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C51

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C51

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C60

220u

F/10

V

+

C60

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F/10

V

C48

10u

C48

10u

C53

100n

C53

100n

C50

100n

C50

100n

R81 5.6K

R81 5.6K


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5 5

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DA

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DA

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DE

S.

DA

TEV

ER

.S

CA

LE1/

1R

EV

.S

HE

ET

This

agre

emen

tis

ourp

rope

rty.R

epro

duct

ion

and

publ

icat

ion

with

outo

urw

ritte

nau

thor

izat

ion

shal

lexp

ose

offe

nder

tole

galp

roce

edin

gs.

A

AT9

1SA

M9x

5-E

K9 14

B

XX

-XX

X-X

XD

erek

X.X

Sm

artD

AA

10-J

UN

-10

R93

6.81

MR

936.

81M

R97

280R

R97

280R

R16

70R

R16

70R

L9 220o

hmat

100M

Hz

L9 220o

hmat

100M

Hz

12

MM

BA

T42

Q5

MM

BA

T42

Q5

1

23

R10

03.

01R

R10

03.

01R

MM

BA

T42

Q2

MM

BA

T42

Q2

1

23

R95

280R

R95

280R

J16 M

JM06

06G

E06

-H

J16 M

JM06

06G

E06

-H

1 2 3 4 5 6

C71

150p

F

C71

150p

F

R96

280R

R96

280R

C69

10n

C69

10n

D4

TB31

00M

-13-

F

D4

TB31

00M

-13-

F

C72

150p

F

C72

150p

F

C65

100n

C65

100n

C70

47pF

C70

47pF

C67

100n

C67

100n

C66

100n

C66

100n

MM

BD

3004

S-7

-FD

5M

MB

D30

04S

-7-F

D5

1

3

2C

64

470p

C64

470p

1 2

R94

237K

R94

237K

R92

6.81

MR

926.

81M

R16

60R

R16

60R

MN

11

CX

2054

8-11

Z

MN

11

CX

2054

8-11

Z

RA

C4

TAC

5

EIC

11

RX

I6

EIO

10

EIF

9

TXO

8

TXF

7

GP

IO13

VC3

EP17

DV

DD

1

DIB

P14

DIB

N16

PW

R15

AV

DD

2

TES

T12

LAN

0066

-50

TX1

LAN

0066

-50

TX1

123 4

C68

47n

C68

47n

C63

470p

C63

470p

1 2

MM

BD

3004

S-7

-FD

3M

MB

D30

04S

-7-F

D3

1

3

2

R99

100R

R99

100R

R10

211

0RR

102

110R

R10

13.

01R

R10

13.

01R

MM

BA

T42

Q4

MM

BA

T42

Q4

1

23

R10

39R

1R

103

9R1

R98

280R

R98

280R

C74

100n

C74

100n

L8 220o

hmat

100M

Hz

L8 220o

hmat

100M

Hz

12

C73

100n

C73

100n

MM

BA

T42

Q3

MM

BA

T42

Q3

1

23


5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

RJ11

0R c

an b

e re

plac

ed b

y b

ead

to i

mpro

ve E

MI

0805

0805

1%1%

1%1%

1206

1206

1206

1206

100V

1%1%

1% 1206

R94,

C68

shou

ld b

e pl

aced

nea

r Pi

n6(R

XI),

and

shou

ld b

e no

via

s on

the

RXI

Net

.

BD

erek

11-O

ct-1

0X

.XX

X-X

XX

-XX

DV

DD

DA

A_G

ND

DA

A_G

ND

DA

A_G

ND

DA

A_G

ND

DA

A_G

ND

DA

A_G

ND

DA

A_G

ND

DA

A_G

ND

DIB

N{3

}

DIB

P{3

}

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TEV

ER

.S

CA

LE1/

1R

EV

.S

HE

ET

This

agre

emen

tis

ourp

rope

rty.R

epro

duct

ion

and

publ

icat

ion

with

outo

urw

ritte

nau

thor

izat

ion

shal

lexp

ose

offe

nder

tole

galp

roce

edin

gs.

A

AT9

1SA

M9x

5-E

K9 14

B

XX

-XX

X-X

XD

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X.X

Sm

artD

AA

10-J

UN

-10

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TEV

ER

.S

CA

LE1/

1R

EV

.S

HE

ET

This

agre

emen

tis

ourp

rope

rty.R

epro

duct

ion

and

publ

icat

ion

with

outo

urw

ritte

nau

thor

izat

ion

shal

lexp

ose

offe

nder

tole

galp

roce

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A

AT9

1SA

M9x

5-E

K9 14

B

XX

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X-X

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X.X

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artD

AA

10-J

UN

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RE

VD

AT

EM

OD

IF.

DE

S.

DA

TEV

ER

.S

CA

LE1/

1R

EV

.S

HE

ET

This

agre

emen

tis

ourp

rope

rty.R

epro

duct

ion

and

publ

icat

ion

with

outo

urw

ritte

nau

thor

izat

ion

shal

lexp

ose

offe

nder

tole

galp

roce

edin

gs.

A

AT9

1SA

M9x

5-E

K9 14

B

XX

-XX

X-X

XD

erek

X.X

Sm

artD

AA

10-J

UN

-10

R93

6.81

MR

936.

81M

R97

280R

R97

280R

R16

70R

R16

70R

L9 220o

hmat

100M

Hz

L9 220o

hmat

100M

Hz

12

MM

BA

T42

Q5

MM

BA

T42

Q5

1

23

R10

03.

01R

R10

03.

01R

MM

BA

T42

Q2

MM

BA

T42

Q2

1

23

R95

280R

R95

280R

J16 M

JM06

06G

E06

-H

J16 M

JM06

06G

E06

-H

1 2 3 4 5 6

C71

150p

F

C71

150p

F

R96

280R

R96

280R

C69

10n

C69

10n

D4

TB31

00M

-13-

F

D4

TB31

00M

-13-

F

C72

150p

F

C72

150p

F

C65

100n

C65

100n

C70

47pF

C70

47pF

C67

100n

C67

100n

C66

100n

C66

100n

MM

BD

3004

S-7

-FD

5M

MB

D30

04S

-7-F

D5

1

3

2C

64

470p

C64

470p

1 2

R94

237K

R94

237K

R92

6.81

MR

926.

81M

R16

60R

R16

60R

MN

11

CX

2054

8-11

Z

MN

11

CX

2054

8-11

Z

RA

C4

TAC

5

EIC

11

RX

I6

EIO

10

EIF

9

TXO

8

TXF

7

GP

IO13

VC3

EP17

DV

DD

1

DIB

P14

DIB

N16

PW

R15

AV

DD

2

TES

T12

LAN

0066

-50

TX1

LAN

0066

-50

TX1

123 4

C68

47n

C68

47n

C63

470p

C63

470p

1 2

MM

BD

3004

S-7

-FD

3M

MB

D30

04S

-7-F

D3

1

3

2

R99

100R

R99

100R

R10

211

0RR

102

110R

R10

13.

01R

R10

13.

01R

MM

BA

T42

Q4

MM

BA

T42

Q4

1

23

R10

39R

1R

103

9R1

R98

280R

R98

280R

C74

100n

C74

100n

L8 220o

hmat

100M

Hz

L8 220o

hmat

100M

Hz

12

C73

100n

C73

100n

MM

BA

T42

Q3

MM

BA

T42

Q3

1

23


76

8 8

7 7

6 6

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

E0_

TXC

K

E0_

RX

1E

0_R

X0

E0_

RX

DV

RJ4

5ET

HER

NET

CO

NN

ECTO

R

E0_

TX1

E0_

TX0

E0_

TXE

N

E0_

MD

CE

0_M

DIO

E0_

RX

ER

E0_

INTR

(Only For SAM9G35/SAM9X35/SAM9G25/SAM9X25)

ETH0

FULL

DU

PLE

X

Place close to J17

BD

erek

11-O

ct-1

0X

.XX

X-X

XX

-XX

Opt

iona

lPH

YEm

bedd

ed o

n C

M b

oa rd

Opt

iona

lPH

YEm

bedd

ed o

n C

M b

oa rd

EA

RTH

_ETH

0

ETH

0_G

ND

ETH

0_G

ND

ETH

0_G

ND

VD

DA

NA

VD

DA

NA

E0_

AV

DD

T

E0_

AV

DD

T

VD

DA

NA

EA

RTH

_ETH

0

EA

RTH

_ETH

0

VD

DA

NA

VD

DA

NA

VD

DA

NA

VD

DA

NA

VD

DA

NA

PB

9{3

}P

B7

{3}

PB

6{3

}

NR

ST

{3,6

,11,

13}

PB

5{3

}P

B8

{3}

PB

2{3

}P

B3

{3}

PB

0{3

}P

B1

{3}

PB

4{3

}

PB

10{3

,8}

ETH

0_LE

D2

{3}

ETH

0_LE

D1

{3}

ETH

0_LE

D0

{3}

ETH

0_G

ND

{3}

ETH

0_TX

-{3

}

ETH

0_A

VD

DT

{3}

ETH

0_TX

+{3

}

ETH

0_R

X-

{3}

ETH

0_R

X+

{3}

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TEV

ER

.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agre

emen

tisou

rpro

perty

.Rep

rodu

ction

andp

ublic

ation

witho

utou

rwrit

tenau

thoriz

ation

shall

expo

seoff

ende

r tol

egal

proc

eedin

gs.

A

AT9

1SA

M9x

5-E

K10

14B

XX

-XX

X-X

XD

erek

X.X

ETH

0

10-J

UN

-10

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TEV

ER

.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agre

emen

tisou

rpro

perty

.Rep

rodu

ction

andp

ublic

ation

witho

utou

rwrit

tenau

thoriz

ation

shall

expo

seoff

ende

r tol

egal

proc

eedin

gs.

A

AT9

1SA

M9x

5-E

K10

14B

XX

-XX

X-X

XD

erek

X.X

ETH

0

10-J

UN

-10

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TEV

ER

.

SC

ALE

1/1

RE

V.

SH

EE

T

This

agre

emen

tisou

rpro

perty

.Rep

rodu

ction

andp

ublic

ation

witho

utou

rwrit

tenau

thoriz

ation

shall

expo

seoff

ende

r tol

egal

proc

eedin

gs.

A

AT9

1SA

M9x

5-E

K10

14B

XX

-XX

X-X

XD

erek

X.X

ETH

0

10-J

UN

-10

JP12

JP12

12

RR

910

kR

R9

10k

12345

678

R21

822

RR

218

22R

D7

Red

D7

Red

12

C76

100n

C76

100n

R18

30R

DN

PR

183

0RD

NP

R17

70R

R17

70R

R18

20R

R18

20R

C86

100n

C86

100n

R18

10R

R18

10R

R11

547

0RR

115

470R

R10

80R

DN

PR

108

0RD

NP

R17

90R

R17

90R

R16

847

0RR

168

470R

RR

1822

RR

R18

22R

1 2 3 45678

R17

60R

DN

PR

176

0RD

NP

R10

949

.9R

R10

949

.9R

R18

00R

DN

PR

180

0RD

NP

C85

100n

C85

100n

C82

100n

C82

100n

C84

100n

C84

100n

R10

410

kR

104

10k

C81

10u

10V

C81

10u

10V

R17

40R

DN

PR

174

0RD

NP

C83

100n

C83

100n

L10

2200

R

L10

2200

R

12

MN

12

DM

9161

AE

P

MN

12

DM

9161

AE

P

TX_E

R/T

XD

416

CO

L/R

MII

36

MD

C24

RX

-4

RX

+3

TX-

8

TX+

7

XT1

43R

EF_

CLK

/XT2

42

RX

_CLK

/10B

TSE

R34

RX

_DV

/TE

STM

OD

E37

RX

_ER

/RX

D4/

RP

TR38

TX_E

N21

BG

RE

S48

AV

DD

R1

AV

DD

R2

DV

DD

41

DG

ND

44D

GN

D15

AG

ND

5

AG

ND

6

LED

2/O

P2

13LE

D1/

OP

112

LED

0/O

P0

11

TXD

317

TXD

218

TXD

020

TXD

119

TX_C

LK/IS

OLA

TE22

RX

D0/

PH

YAD

029

RX

D1/

PH

YAD

128

RX

D2/

PH

YAD

227

RX

D3/

PH

YAD

326

CR

S/P

HYA

D4

35

MD

IO25

MD

INTR

32

PW

RD

WN

10

DG

ND

33

RE

SE

T40

AV

DD

T9

DIS

MD

IX39

DV

DD

30

DV

DD

23

AG

ND

46

BG

RE

SG

47

CA

BLE

STS

/LIN

KS

TS14

N.C

45

LED

MO

DE

31

R10

749

.9R

R10

749

.9R

R11

30R

R11

30R

R11

647

0RR

116

470R

R17

50R

DN

PR

175

0RD

NP

R21

922

RR

219

22R

C79

100n

C79

100n

L19

220o

hmat

100M

Hz

L19

220o

hmat

100M

Hz

12

C75

100n

C75

100n

R11

149

.9R

R11

149

.9R

C80

10u

10V

C80

10u

10V

R18

50R

DN

PR

185

0RD

NP

R10

50R

R10

50R

R11

90R

R11

90R

R10

60R

R10

60R

R22

122

RR

221

22R

C78

100n

C78

100n

R17

20R

R17

20R

R17

30R

R17

30R

R11

21.

5kR

112

1.5k

R17

80R

R17

80R

R11

46.

8kR

114

6.8k

R11

70R

R11

70R

RR

610

kR

R6

10k

12345

678

C77

100n

C77

100n

RR

1722

RR

R17

22R

1 2 3 45678

RR

710

kR

R7

10k

12345

678

R18

40R

DN

PR

184

0RD

NP

R22

022

RR

220

22R

R11

049

.9R

R11

049

.9R

C87

10u

10V

C87

10u

10V

R18

60R

DN

PR

186

0RD

NP

VDD

VSS

OUT

OEY1

50M

Hz

VDD

VSS

OUT

OEY1

50M

Hz

41

32

1 2 3 6 4 5 7 8

75 75

7575

1nF

TD+

TD-

CT RD+

RD-

CT

TX+

TX-

RX+

RX-

Left

LED

Righ

t LE

D

J17

J002

6D21

B1 2 3 6 4 5 7 8

75 75

7575

1nF

TD+

TD-

CT RD+

RD-

CT

TX+

TX-

RX+

RX-

Left

LED

Righ

t LE

D

J17

J002

6D21

B1 2 7 83 6 54

15

16 9

11

12

10

RR

810

kR

R8

10k

12345

678

R17

10R

R17

10R


5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

E1_

RX

1E

1_R

X0

E1_

CR

SD

V

RJ4

5ET

HER

NET

CO

NN

ECTO

R

E1_

TX1

E1_

TX0

E1_

TXE

N

E1_

MD

CE

1_M

DIO

E1_

INTR

E1_

RX

ER

E1_

TXC

K

ETH

1(Only For SAM9X25)

FULL

DU

PLE

X

BD

erek

11-O

ct-1

0X

.XX

X-X

XX

-XX

SE

LCO

NFI

G

SE

LCO

NFI

G E1_

RX

ER

E1_

CR

SD

V

E1_

RX

1E

1_TX

CK

E1_

TXC

K

E1_

INTR

E1_

INTR

E1_

RX

0

SE

LCO

NFI

G

EA

RTH

_ETH

1

GN

D_E

TH1

GN

D_E

TH1

GN

D_E

TH1

GN

D_E

TH1

VD

DIO

P1

VD

DIO

P1

VD

DIO

P1

E1_

AV

DD

T

E1_

AV

DD

T

E1_

AV

DD

T

VD

DIO

P1

EA

RTH

_ETH

1

EA

RTH

_ETH

1

VD

DIO

P1

VD

DIO

P1

VD

DIO

P1

VD

DIO

P1

VD

DIO

P1

VD

DIO

P1

PC

31{3

}P

C26

{3,1

4}

PC

16{3

,14}

PC

28{3

,14}

PC

20{3

,14}

PC

21{3

,14}

PC

29{3

,14}

PC

19{3

,14}

PC

18{3

,14}

PC

27{3

,14}

PC

30{3

,14}

NR

ST

{3,6

,10,

13}

SE

LCO

NFI

G{3

,7,1

4}

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TEV

ER

.S

CA

LE1/

1R

EV

.S

HE

ET

This

agre

emen

tis

ourp

rope

rty.R

epro

duct

ion

and

publ

icat

ion

with

outo

urw

ritte

nau

thor

izat

ion

shal

lexp

ose

offe

nder

tole

galp

roce

edin

gs.

A

AT9

1SA

M9x

5-E

K11

14B

XX

-XX

X-X

XD

erek

X.X

ETH

1

10-J

UN

-10

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TEV

ER

.S

CA

LE1/

1R

EV

.S

HE

ET

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LCDDAT12

LCDDAT22

LCDDAT14

LCDDISP

LCDPWM

LCDDAT3

LCDDAT1

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LCDDAT5

LCDDAT6

LCDDAT8

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222

RR

212

22R

R16

00R

R16

00R

R21

422

RR

214

22RR

148

0RR

148

0R

R19

422

RR

194

22R

R21

022

RR

210

22R

R21

722

RR

217

22RR

149

0RR

149

0R

R17

00R

R17

00R

J22

ESW

-120

-33-

L-D

J22

ESW

-120

-33-

L-D

12

34

56

78

910

1112

13 15 17 19

14 16 18 2021

2223

2425

2627

2829

3031

3233

3435

3637

3839

40

R15

30R

R15

30RR

203

22R

R20

322

R

J21

ESW

-115

-33-

L-D

J21

ESW

-115

-33-

L-D

12

34

56

78

910

1112

13 15 17 19

14 16 18 2021

2223

2425

2627

2829

30

R20

222

RR

202

22R

R14

60R

R14

60R

R18

822

RR

188

22R

R20

922

RR

209

22R

R15

60R

R15

60R

R21

122

RR

211

22RR

201

22R

R20

122

RR

200

22R

R20

022

RR

199

22R

R19

922

R

R19

222

RR

192

22R

R15

40R

R15

40R

R21

322

RR

213

22R

R19

322

RR

193

22R

R21

522

RR

215

22RR

198

22R

R19

822

R

R19

122

RR

191

22R

R19

722

RR

197

22R

R15

10R

R15

10R

R15

00R

R15

00R

R19

622

RR

196

22R

R20

722

RR

207

22R

R15

20R

R15

20R

R19

522

RR

195

22R

R19

022

RR

190

22R

R21

622

RR

216

22R

R18

70R

DN

PR

187

0RD

NP

R16

30R

R16

30R

R20

622

RR

206

22R

R15

90R

R15

90R


3.4 Optional Display Module (DM) Board Hardware

3.4.1 DM Board Overview

The optional DM board carries a 5.0" TFT LCD module with touch screen. The DM board also carries four QTouchpads.

Figure 3-55. DM Board Layout


The list of the DM board components follows:

One 5.0" TFT LCD module

LCD Back light driver

3.3V regulator

QTouch device

1-Wire device


3.4.3.1 3.3V Regulator

The DM Board features its own LDO for local power regulation. It accepts DC 5V power from a 500 mA high-sidepower switch on the EK and outputs a regulated +3.3 V to most other circuits on the board.

Figure 3-56. DM Board Power Supply

C1210u

C1010u

3V3_LCD

C11100n

C152.2u

MN3

SPX3819

VIN1

GND2

EN3

BYP4

VOUT5

C13100n

5V_INTER

SELCONFIG

500mA capability


82

3.4.3.2 TFT LCD with Touch Panel

A 5" 800x480 LCD provides the DM with a low power display feature, back light unit and a touch panel, similar tothat used on commercial PDAs.

Graphics and text can be displayed on the dot matrix panel with up to 16 million colors by supplying 24-bit datasignals (8bit x RGB by default) or 16-bit data signals (5+6+5bit x RGB in option). This allows the user to developgraphical user interfaces for a wide variety of end applications.

Warning: Never connect/disconnect the LCD display from the board while the power supply is on. Doing so maydamage both units.

Figure 3-57. LCD with Touch Panel

VLE

D-

X_LE

FT

J1

GN

D2

2V

CC

13

VC

C2

4R

05

R1

6R

27

R3

8R

49

R5

10R

611

R7

12G

013

G1

14G

215

G3

16G

417

G5

18G

619

G7

20B

021

B1

22B

223

B3

24B

425

B5

26B

627

B7

28G

ND

329

DO

TCLK

30S

TB31

HS

YN

C32

VS

YN

C33

DE

34G

ND

435

GN

D5

36Y

237

X238

Y1

39X1

40G

ND

641

LED

1-42

LED

1+43

LED

2-44

LED

2+45

GN

D1

1

BLU

E2

BLU

E1

RE

D1

RE

D2

BLU

E0

R54

0RR

530R

RE

D0

R55

0R

LCD

DA

T21

LCD

DA

T13

RE

D5

RE

D7

LCD

DA

T22

LCD

DA

T14

RE

D6G

RE

EN

3LC

DD

AT6

LCD

DA

T23

LCD

DA

T15

GR

EE

N2

LCD

DA

T11

R11

0RD

NP

LCD

DA

T10

LCD

DA

T5R

360R

R46

0R

R27

0R

R48

0RR

470R

DN

P

R8

0R

R51

0RD

NP

R32

0R

R10

0RD

NP

R50

0R

R52

0R

R29

0R

LCD

DA

T12

R16

0RD

NP

LCD

DA

T7G

RE

EN

4

R49

0RD

NP

R30

0RD

NP

R28

0RD

NP

R34

0RD

NP

R17

0R

R24

0RD

NP

R33

0R

R15

0R

R25

0R

R12

0RD

NP

R13

0R

R43

0R

R14

0RD

NP

LCD

DIS

P

R44

0RD

NP

R9

0R

R35

0RD

NP

R42

0RD

NP

R26

0RD

NP

LCD

DA

T11

RE

D3

LCD

DA

T8G

RE

EN

5LC

DD

AT1

3

LCD

DA

T19

LCD

DA

T9G

RE

EN

6LC

DD

AT1

4

LCD

DA

T10

GR

EE

N7

LCD

DA

T15

BLU

E3

LCD

DA

T0LC

DD

AT3

LCD

DA

T5LC

DD

AT1

BLU

E4

LCD

DA

T4

LCD

DA

T6LC

DD

AT2

BLU

E5

LCD

DA

T7LC

DD

AT3

BLU

E6

LCD

DA

T4B

LUE

7

R38

0R

LCD

DA

T20

LCD

DA

T12

RE

D4

R37

0R

R18

0R

GR

EE

N0

LCD

DA

T18

GR

EE

N1

R20

0R

BLU

E[0

..7]

LCD

DA

T16

R21

0R

LCD

DA

T9

LCD

DA

T17

LCD

DA

T1LC

DD

AT2

LCD

DA

T8

LCD

DA

T0

R3

0R

B4

B3

B2

B1

B0

GR

EE

N7

AD

3_Y

M

BLU

E4

R7

27R

LCD

VS

YN

CLC

DD

EN

C6

10u

LCD

HS

YN

C

X_R

IGH

TY

_LO

W

LCD

PC

K

RE

D2

RE

D3

RE

D1

RE

D0

RE

D4

RE

D7

RE

D6

GR

EE

N3

GR

EE

N1

GR

EE

N0

RE

D5

GR

EE

N6

GR

EE

N5

GR

EE

N4

GR

EE

N2

BLU

E2

BLU

E1

BLU

E3

BLU

E0

BLU

E6

BLU

E5

BLU

E7

3V3_

LCD

C5

100n

R2

0R

C1

10n

DN

P

R1

0R C4

10n

DN

P

AD

2_Y

PA

D1_

XM

C2

10n

DN

P

GR

EE

N[0

..7]

Y_U

P

G5

G4

G3

G2

G1

G0

R4

0RA

D0_

XP

RE

D[0

..7]

R64

220K

DN

P

R3

R2

R1

R0

R4

Conductors onTOP SIDE

PIN 1

PIN 45

FOXLINK

5'' LCD,

800(H)×RGB×480(V)

M1

FL5

00W

VR

00-A

0T

VLE

D+

C3

10n

DN

P


3.4.3.3 Back Light

The back light voltage is generated from a CP2122ST boost converter. It is powered directly by the DC 5V from theEK board. The back light level is controlled by a PWM signal generated from the MPU Device processor.

Figure 3-58. Back Light Control

3.4.3.4 QTouch

The DM board carries a QTouch device piloted through a TWI interface. It manages four capacitive touch buttonsdirectly printed on the PCB.

There are dual footprints for the QTouch device, and SOIC is the default mounted one.

Figure 3-59. QTouch

50V

5V/217mA 24.5V/40mA

10V

VLED-

VLED+

C92.2u

2 x 7 LEDs Back Light

2*20mA, 24.5V

5V_INTER

LCDPWM

C710u

300mV

L122uH

R417R5

R4010k

MN1

CP2122ST

SW1

GND2

FB3

SHDN#4

VIN5

D1

RB160M-6060V/1A

880mA

TWD0

K2KEY

C14

100n

K3KEY

K4KEY

TWCK0

MN5

QT1070_SOIC

VDD1

MODE(VSS)2

SDA3

RESET4

CHANGE5

SCL6

KEY67

KEY58KEY49KEY310KEY211KEY112KEY013VSS14

RESET#

R59 4.7k DNP

R65 4.7kR66 4.7k

R56

4.7k

R67 4.7k

3V3_LCD

R68 4.7k

R57

4.7k

DNP

R60 4.7k DNPR61 4.7k DNP

R58

4.7k

DNP

TWD0

R62 4.7k DNP

RESET#3V3_LCD

CHANGE#

C16 100n

TWCK0

KEY4KEY3

MN4

QT1070DNP

NC47

NC310

NC218

NC119

NC020

SDA12

CHANGE14

RESET13

NC56

SCL15

KEY41

KEY32

KEY23

KEY14

KEY05

VD

D9

MO

DE

(VS

S)

11V

SS

8

KEY616

KEY517

The

rmal

21

KEY2KEY1

K1KEY

R63

10k

CHANGE#

3V3_LCD


84

3.4.3.5 1-Wire

The DM board also uses a 1-Wire device as “firmware label” to store the information such as chip type,manufacturer’s name, production date etc.

Figure 3-60. 1-Wire on DM

3V3_LCD

ONE_WIRE

R454.7k

MN2

DS2433S

NC11

NC22

DATA3

GND4

NC35NC46NC57NC68


3.4.4 Schematics

Figure 3-61. DM Board Schematics

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

2*20mA, 24.5V

2 x

7 L

ED

s B

ack

Lig

ht

300mV

50V

5V/217mA

24.5V/40mA

60V/1A

880mA

10V

500mA capability

B0

B1

B2

B3

B4

G0

G1

G2

G3

G4

G5

R0

R1

R2

R3

R4

Der

ekX.

X01-tc

O-11B

XX

-XX

X-X

X

ZB

_IR

Q0

XX

-XX

X-X

X

GR

EE

N7

VLE

D-

VLE

D+

LCD

PW

M

BLU

E4

LCD

VS

YN

CLC

DD

EN

LCD

HS

YN

C

Y_L

OW

X_R

IGH

T

LCD

PC

K

RE

D0

RE

D1

RE

D3

RE

D2

LCD

DA

T8

LCD

DA

T10

RE

D6

RE

D7

RE

D4

RE

D5

GR

EE

N0

GR

EE

N1

GR

EE

N3

LCD

DE

NG

RE

EN

2

GR

EE

N4

GR

EE

N5

GR

EE

N6

BLU

E0

BLU

E3

BLU

E1

BLU

E2

BLU

E7

BLU

E5

BLU

E6

AD

0_X

P

LCD

DA

T1

AD

2_Y

P

LCD

DA

T21

LCD

DA

T19

LCD

DA

T17

LCD

DA

T23

AD

4_LR

LCD

DA

T3

LCD

DA

T5

LCD

DA

T7

LCD

DA

T9

AD

2_Y

PA

D1_

XM

LCD

DA

T11

LCD

HS

YN

CLC

DP

WM

LCD

PC

K

LCD

DA

T16

LCD

DA

T18

LCD

DA

T20

LCD

DA

T22

AD

3_Y

M

LCD

DA

T14

LCD

DA

T15

LCD

DA

T12

LCD

DA

T13

LCD

DIS

P

AD

1_X

M

LCD

DA

T2

LCD

DA

T0

LCD

DA

T6

LCD

DA

T4

LCD

VS

YN

C

SE

LCO

NF

IG

Y_U

P

AD

0_X

P

X_L

EF

T

AD

3_Y

M

LCD

DIS

P

VLE

D+

VLE

D-

LCD

_DE

TE

CT

ON

E_W

IRE

BLU

E2

BLU

E1

BLU

E0

RE

D2

RE

D1

RE

D0

RE

D5

LCD

DA

T13

LCD

DA

T21

RE

D6

LCD

DA

T14

LCD

DA

T22

RE

D7

LCD

DA

T15

LCD

DA

T23

LCD

DA

T6

GR

EE

N3

LCD

DA

T11

GR

EE

N2

LCD

DA

T5

LCD

DA

T10

LCD

DA

T12

GR

EE

N4

LCD

DA

T7

RE

D3

LCD

DA

T11

LCD

DA

T13

GR

EE

N5

LCD

DA

T8

LCD

DA

T14

GR

EE

N6

LCD

DA

T9

LCD

DA

T19

LCD

DA

T15

GR

EE

N7

LCD

DA

T10

LCD

DA

T3

LCD

DA

T0

BLU

E3

LCD

DA

T4

BLU

E4

LCD

DA

T1

LCD

DA

T5

BLU

E5

LCD

DA

T2

LCD

DA

T6

BLU

E6

LCD

DA

T3

LCD

DA

T7

BLU

E7

LCD

DA

T4

RE

D4

LCD

DA

T12

LCD

DA

T20

GR

EE

N1

LCD

DA

T18

GR

EE

N0

LCD

DA

T16

BLU

E[0

..7]

LCD

DA

T17

LCD

DA

T9

LCD

DA

T8

LCD

DA

T2

LCD

DA

T1

LCD

DA

T0

RE

D[0

..7]

GR

EE

N[0

..7]

ON

E_W

IRE

SE

LCO

NF

IG

CH

AN

GE

#T

WC

K0

TW

D0

CH

AN

GE

#T

WD

0

KE

Y4

KE

Y3

KE

Y2

KE

Y1

TW

CK

0

RE

SE

T#

TW

D0

RE

SE

T#

CH

AN

GE

#T

WC

K0

5V_I

NT

ER

3V3_

LCD

5V_I

NT

ER

3V3

5V_I

NT

ER

3V3_

LCD

3V3_

LCD

3V3_

LCD

3V3_

LCD

3V3_

LCD

3V3_

LCD

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

AL

E1/

1R

EV

.S

HE

ET

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

A

AT

91S

AM

9x5-

EK

1 1B

XX

-XX

X-X

XD

erek

X.X

LCD

BO

AR

D

10-J

UN

-10

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

AL

E1/

1R

EV

.S

HE

ET

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

A

AT

91S

AM

9x5-

EK

1 1B

XX

-XX

X-X

XD

erek

X.X

LCD

BO

AR

D

10-J

UN

-10

RE

VD

AT

EM

OD

IF.

DE

S.

DA

TE

VE

R.

SC

AL

E1/

1R

EV

.S

HE

ET

This

agr

eem

ent i

s ou

r pro

perty

. Rep

rodu

ctio

n an

d pu

blic

atio

n w

ithou

t our

writ

ten

auth

oriz

atio

n sh

all e

xpos

e of

fend

er to

lega

l pro

ceed

ings

.

A

AT

91S

AM

9x5-

EK

1 1B

XX

-XX

X-X

XD

erek

X.X

LCD

BO

AR

D

10-J

UN

-10

K1

KE

YK

1K

EY

K3

KE

YK

3K

EY

C10

10u

C10

10u

MN

1

CP

2122

ST

MN

1

CP

2122

ST

SW

1

GN

D2

FB

3S

HD

N#

4

VIN

5

R67

4.7k

R67

4.7k

R58

4.7k

DN

PR

58

4.7k

DN

P

L1 22uH

L1 22uH

C4

10n

DN

P

C4

10n

DN

P

R40

10k

R40

10k

K4

KE

YK

4K

EY

MN

5 QT

1070

_SO

IC

MN

5 QT

1070

_SO

IC

VD

D1

MO

DE

(VS

S)

2

SD

A3

RE

SE

T4

CH

AN

GE

5

SC

L6

KE

Y6

7K

EY

58

KE

Y4

9K

EY

310

KE

Y2

11K

EY

112

KE

Y0

13V

SS

14

R56

4.7k

R56

4.7k

MN

4

QT

1070

DN

P

MN

4

QT

1070

DN

PN

C4

7

NC

310

NC

218

NC

119

NC

020

SD

A12

CH

AN

GE

14

RE

SE

T13

NC

56

SC

L15

KE

Y4

1

KE

Y3

2

KE

Y2

3

KE

Y1

4

KE

Y0

5

VDD9

MODE(VSS)11

VSS8

KE

Y6

16

KE

Y5

17

Thermal21

MN

2 DS

2433

S

MN

2 DS

2433

S

NC

11

NC

22

DA

TA

3

GN

D4

NC

35

NC

46

NC

57

NC

68

R1

0RR

10R

R62

4.7k

DN

PR

624.

7kD

NP

R5

0RD

NP

R5

0RD

NP

R44

0RD

NP

R44

0RD

NP

R47

0RD

NP

R47

0RD

NP

R60

4.7k

DN

PR

604.

7kD

NP

R66

4.7k

R66

4.7k

R30

0RD

NP

R30

0RD

NP

C15

2.2u

C15

2.2u

R12

0RD

NP

R12

0RD

NP

R16

0RD

NP

R16

0RD

NP

R55

0RR

550R

C14

100n

C14

100n

R34

0RD

NP

R34

0RD

NP

R45

4.7k

R45

4.7k

R43

0RR

430R

R27

0RR

270R

C5

100n

C5

100n

R15

0RR

150R

R53

0RR

530R

R24

0RD

NP

R24

0RD

NP

R52

0RR

520R

R42

0RD

NP

R42

0RD

NP

R10

0RD

NP

R10

0RD

NP

J2

TS

M-1

15-0

1-L-

DV

-A

J2

TS

M-1

15-0

1-L-

DV

-A

12

34

56

78

910

1112

13 15 17 19

14 16 18 2021

2223

2425

2627

2829

30

R36

0RR

360R

R29

0RR

290RR

6422

0KD

NP

R64

220K

DN

P

R11

0RD

NP

R11

0RD

NP

R17

0RR

170R

R63

10k

R63

10k

R37

0RR

370R

R7

27R

R7

27R R

200R

R20

0R

R2

0RR

20R

C11

100n

C11

100n

R41

7R5

R41

7R5

J3

TS

M-1

20-0

1-L-

DV

-A

J3

TS

M-1

20-0

1-L-

DV

-A

12

34

56

78

910

1112

13 15 17 19

14 16 18 2021

2223

2425

2627

2829

3031

3233

3435

3637

3839

40

J1J1

GN

D2

2V

CC

13

VC

C2

4R

05

R1

6R

27

R3

8R

49

R5

10R

611

R7

12G

013

G1

14G

215

G3

16G

417

G5

18G

619

G7

20B

021

B1

22B

223

B3

24B

425

B5

26B

627

B7

28G

ND

329

DO

TC

LK30

ST

B31

HS

YN

C32

VS

YN

C33

DE

34G

ND

435

GN

D5

36Y

237

X2

38Y

139

X1

40G

ND

641

LED

1-42

LED

1+43

LED

2-44

LED

2+45

GN

D1

1

R65

4.7k

R65

4.7k

R19

0RR

190R

R57

4.7k

DN

PR

57

4.7k

DN

P

R6

0RD

NP

R6

0RD

NP

C3

10n

DN

P

C3

10n

DN

P

MN

3

SP

X38

19

MN

3

SP

X38

19

VIN

1

GN

D2

EN

3B

YP

4

VO

UT

5

R18

0RR

180R

C1

10n

DN

P

C1

10n

DN

P

C6

10u

C6

10u

R22

0RR

220R

C2

10n

DN

P

C2

10n

DN

P

R68

4.7k

R68

4.7k

C13

100n

C13

100n

D1

RB

160M

-60

D1

RB

160M

-60

R61

4.7k

DN

PR

614.

7kD

NP

R4

0RR

40R

R59

4.7k

DN

PR

594.

7kD

NP

C7

10u

C7

10u


PIN 1

PIN 45

FOXLINK

5'' LCD,

800(H)×RGB×480(V)

M1

FL5

00W

VR

00-A

0T


PIN 1

PIN 45

FOXLINK

5'' LCD,

800(H)×RGB×480(V)

M1

FL5

00W

VR

00-A

0T

R35

0RD

NP

R35

0RD

NP

R51

0RD

NP

R51

0RD

NP

R9

0RR

90R

R49

0RD

NP

R49

0RD

NP

R8

0RR

80R

R14

0RD

NP

R14

0RD

NP

R13

0RR

130R

R54

0RR

540R

C12

10u

C12

10u

R28

0RD

NP

R28

0RD

NP

R38

0RR

380R

R48

0RR

480R

R25

0RR

250R

R3

0RR

30R

R26

0RD

NP

R26

0RD

NP

R33

0RR

330R

R32

0RR

320R

C9

2.2u

C9

2.2u

R23

0RR

230R

K2

KE

YK

2K

EY

R46

0RR

460R

R50

0RR

500R

R21

0RR

210R

C16

100n

C16

100n


86


4. Revision History

Table 4-1. Revision History

Document Comments

11115B

Replaced all occurrences of “DataFlash” with “serial Flash”.

Updated Section 2.1 ”Power Up the Board” and Section 2.3 ”Recovery Procedure”.

Deleted section “DevStart”.

Updated Table 3-7 ”Boot Configuration”. Added Figure 3-10, ”SW1A and SW1B Position on Embest Modules”.

Updated Figure 3-14, ”CM Board Schematics – 3 of 5”.

11115A First issue.

XX X XX XARM Connected Logo

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