Application and Evaluation of High Power Zigbee Based Wireless Sensor Network in Water Irrigation...

APPLICATION AND EVALUATION OF HIGH POWER ZIGBEE BASED WIRELESS SENSOR NETWORK IN WATER IRRIGATION CONTROL MONITORING SYSTEM

Project report on

APPLICATION AND EVALUATION OF HIGH POWER ZIGBEE BASED

WIRELESS SENSOR NETWORK IN WATER IRRIGATION CONTROL

MONITORING SYSTEM


CONTENTS

1. ABSTRACT

2. INTRODUCTION

I. RELATED WORK

II. INTRO TO EMBEDDED SYSTEMS AND DESIGN CYCLE

3. BLOCK DIAGRAM

1. BLOCK DIAGRAM DESCRIPTION

4. CIRCUIT DIAGRAM

1. CIRCUIT DIAGRAM DESCRIPTION

I. POWER SUPPLY

II. ARM7LPC2148

A) LCD

B) ZIGBEE

C) DC MOTOR

D) MOISTURE SENSOR

2. WORKING PRINCIPLE OF THE PROJECT

I. TRANSMITTER PROCESS

II. RECEIVER PROCESS

5. HARDWARE REQUIREMENT

A.LCD

B.ZIGBEE

C.DC MOTOR

D.MOISTURE SENSOR


6. SOFTWARE REQUIREMENT

7. COMPONENTS LIST

8. APPLICATIONS

9. RESULT

10. CONCLUSION


ABSTRACT


ABSTRACT

Aim:

The main aim the project is to design “Application and evaluation of high power zigbee based

wireless sensor network in water irrigation control monitoring system”.

DESCRIPTION:

This project demonstrates the concept of “Zigbee Based Wireless Sensor Network in Water

Irrigation Control Monitoring System” is that it reduces the time consuming and need of manual

application on an irrigation system to control the pumping the water to the farm filed. Using this

Zigbee based wireless technology we can control the pumping of the water according to

condition of the soil at the remote location. The sensor senses the moisture level of the soil and

sends the sensed data to the controller and the controller sends the data to control room through

the zigbee. Based on the sensed information obtained at the control room the motor turned

ON/OFF.

The system uses a compact circuitry built around LPC2148 (ARM7)/ 8051

microcontroller Programs are developed in Embedded C. Flash magic is used for loading

programs into Microcontroller.


INTRODUCTION


INTRODUCTION:

This project demonstrates the concept of “Zigbee Based Wireless Sensor Network

in Water Irrigation Control Monitoring System” is that it reduces the time consuming and need

of manual application on an irrigation system to control the pumping the water to the farm filed.

Using this Zigbee based wireless technology we can control the pumping of the water according

to condition of the soil at the remote location. The sensor senses the moisture level of the soil

and sends the sensed data to the controller and the controller sends the data to control room

through the zigbee. Based on the sensed information obtained at the control room the motor

turned ON/OFF.

The system uses a compact circuitry built around LPC2148 (ARM7)/ 8051

microcontroller Programs are developed in Embedded C. Flash magic is used for loading

programs into Microcontroller.

RELATED WORK: To complete our project we studied about embedded systems basics

and system design cycle to know how to develop the projects with the wireless technology.

Further we analyzed some devices like accelerometer sensor, LCD, zigbee,dc motor, moisture

sensor and PIC16F877A core. Because of its features (it is discussed in hardware requirements).

For our successful completion of this project obviously we utilized howstuffworks.com,

www.microchip.com, www.google.com, en.wikipedia.org.


INTRODUCTION TO EMBEDDEDSYSTEMS

EMBEDDED SYSTEM:

Embedded System is a combination of hardware and software used to achieve a single specific

task. An embedded system is a microcontroller-based, software driven, reliable, real-time control

system, autonomous, or human or network interactive, operating on diverse physical variables

and in diverse environments and sold into a competitive and cost conscious market.

An embedded system is not a computer system that is used primarily for processing,

not a software system on PC or UNIX, not a traditional business or scientific application. High-

end embedded & lower end embedded systems.

High-end embedded system - Generally 32, 64 Bit Controllers used with OS. Examples

Personal Digital Assistant and Mobile phones etc .Lower end embedded systems - Generally

8,16 Bit Controllers used with an minimal operating systems and hardware layout designed for

the specific purpose. Examples Small controllers and devices in our everyday life like Washing

Machine, Microwave Ovens, where they are embedded in.


SYSTEMDESIGNCALLS:

THE EMBEDDED SYSTEM DESIGN CYCLE:

EmbeddedSystems

ComputerArchitecture

SoftwareEngineering

Data Communication

ControlEngineering

Electric motorsand actuators

Sensors andmeasurements

AnalogElectronic design

DigitalElectronic design Integrated circuit

design

Embedded system design calls on many disciplines

Operating Systems

BuildDownload

DebugTools

System Testing

System Definiti

on

Targeting

Rapid Prototypi

ng

Hardware-in-the-

Loop Testing


“V Diagram”

In this place we need to discuss the role of simulation software, real-time systems and

data acquisition in dynamic test applications. Traditional testing is referred to as “static” testing

where functionality of components is tested by providing known inputs and measuring outputs.

Today there is more pressure to get products to market faster and reduce design cycle times.

This has led to a need for “dynamic” testing where components are tested while in use with the

entire system – either real or simulated. Because of cost and safety concerns, simulating the rest

of the the system with real-time hardware is preferred to testing components in the actual real

system.

The diagram shown on this slide is the “V Diagram” that is often used to describe the

development cycle. Originally developed to encapsulate the design process of software

applications, many different versions of this diagram can be found to describe different product

design cycles.

Here we have shown one example of such a diagram representing the design cycle of

embedded control applications common to automotive, aerospace and defense applications.

In this diagram the general progression in time of the development stages is shown from

left to right. Note however that this is often an iterative process and the actual development will

not proceed linearly through these steps. The goal of rapid development is to make this cycle as

efficient as possible by minimizing the iterations required for a design. If the x-axis of the


diagram is thought of as time, the goal is to narrow the “V” as much as possible and thereby

reduce development time.

The y-axis of this diagram can be thought of as the level at which the system components are

considered. Early on in the development, the requirements of the overall system must be

considered. As the system is divided into sub-systems and components, the process becomes

very low-level down to the point of loading code onto individual processors. Afterwards

components are integrated and tested together until such time that the entire system can enter

final production testing. Therefore the top of the diagram represents the high-level system view

and the bottom of the diagram represents a very low-level view.

Notes:

V diagram describes lots of applications—derived from software development.

Reason for shape, every phase of design requires a complimentary test phase. High-level

to low-level view of application.

This is a simplified version.

Loop back/ Iterative process, X-axis is time (sum up).

Characteristics of Embedded System:

An embedded system is any computer system hidden inside a product other than a

computer


• There will encounter a number of difficulties when writing embedded system software in

addition to those we encounter when we write applications

– Throughput – Our system may need to handle a lot of data in a short period of

time.

– Response–Our system may need to react to events quickly

– Testability–Setting up equipment to test embedded software can be difficult

– Debugability–Without a screen or a keyboard, finding out what the software is

doing wrong (other than not working) is a troublesome problem

– Reliability – embedded systems must be able to handle any situation without

human intervention

– Memory space – Memory is limited on embedded systems, and you must make

the software and the data fit into whatever memory exists

– Program installation – you will need special tools to get your software into

embedded systems

– Power consumption – Portable systems must run on battery power, and the

software in these systems must conserve power

– Processor hogs – computing that requires large amounts of CPU time can

complicate the response problem


– Cost – Reducing the cost of the hardware is a concern in many embedded system

projects; software often operates on hardware that is barely adequate for the job.

• Embedded systems have a microprocessor/ microcontroller and a memory. Some have a

serial port or a network connection. They usually do not have keyboards, screens or disk

drives.

APPLICATIONS:

1. Military and aerospace embedded software applications

2. Communicat ion Appl ica t ions

3. Indust r ia l automat ion and process control sof tware

CLASSIFICATION:

Real Time Systems.

RTS is one which has to respond to events within a specified deadline.

A right answer after the dead line is a wrong answer

HARD REAL TIME SYSTEM:

"Hard" real-time systems have very narrow response time.

Example: Nuclear power system, Cardiac pacemaker.

SOFT REAL TIME SYSTEM:

"Soft" real-time systems have reduced constrains on "lateness" but still must operate very

quickly and repeatable.


Example: Railway reservation system – takes a few extra seconds the data remains valid.

LANGUAGES USED:

C

Assembly

MPLAB FEATURES:

MPLAB Integrated Development Environment (IDE) is a free, integrated toolset for the

development of embedded applications employing Microchip's PIC® and dsPIC®

microcontrollers.

MPLAB Integrated Development Environment (IDE) is a free, integrated toolset for the

development of embedded applications employing Microchip's PIC® and dsPIC®

microcontrollers.


BLOCK DIAGRAM

BLOCK DIAGRAM:

TRANSMITER SECTION:

ARM7LPC2148

ACCELEROMETER ZIGBEE

LCD POWER SUPPLY


RECEIVER SECTION:

ARM7LPC2148

ZIGBEE

pc POWER SUPPLY


BLOCK DIAGRAM DESCRIPTION:

Power supply:

The Entire Project (both TX and RX side) needs power for its operation.

However, from the study of this project it comes to know that we supposed to design 5v and 12v

dc power supply. So by utilizing the following power supply components required power has

been gained. (230/12v (1A and 500mA) – Step down transformers, Bridge rectifier to converter

ac to dc, booster capacitor and +5v (7805) and +12v (7812) regulator to maintain constant 5v &

12 supply for the controller circuit and driver circuit).

ARM7 Microcontroller:


The LPC2141/2/4/6/8 microcontrollers are based on a 32/16 bit ARM7TDMI-S CPU with real-

time emulation and embedded trace support, that combines with the microcontroller with embedded high

speed flash memory ranging from 32 kB to 512 kB.A128-bit widememory interface and a unique

accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical code size

applications, the alternative 16-bit Thumb mode reduces code by more than 30 % with minimal

performance penalty.

Due to their tiny size and low power consumption, LPC2141/2/4/6/8 are ideal for applications

where miniaturization is a key requirement, such as access control andpoint-of-sale. A blend of serial

communications interfaces ranging from a USB 2.0 Full Speed device, multiple UARTS, SPI, SSP to

I2Cs and on-chip SRAM of 8 kB up to 40 kB,make these devices very well suited for communication

gateways and protocol converters, soft modems, voice recognition and low end imaging, providing both

large buffer size andhigh processing power.

ZIGBEE:

The name "ZigBee" is derived from the erratic zigging patterns many bees make between

flowers when collecting pollen. This is evocative of the invisible webs of connections existing in

a fully wireless environment. The standard itself is regulated by a group known as the ZigBee

Alliance, with over 150 members worldwide.

While Bluetooth focuses on connectivity between large packet user devices, such as

laptops, phones, and major peripherals, ZigBee is designed to provide highly efficient

connectivity between small packet devices. As a result of its simplified operations, which are one

to two full orders of magnitude less complex than a comparable Bluetooth device, pricing for


ZigBee devices is extremely competitive, with full nodes available for a fraction of the cost of a

Bluetooth node.

LCD:

Liquid crystal display (LCD) has material which combines the properties of both liquid and

crystals. They have a temperature range within which the molecules are almost as mobile as they

would be in a liquid, but are grouped together in an order form similar to a crystal.

More microcontroller devices are using 'smart LCD' displays to output visual information. The

following discussion covers the connection of a Hitachi LCD display to a PIC microcontroller.

LCD displays designed around Hitachi's LCD HD44780 module, are inexpensive, easy to use,

and it is even possible to produce a readout using the 8 x 80 pixels of the display. Hitachi LCD

displays have a standard ASCII set of characters plus Japanese, Greek and mathematical

symbols.

For an 8-bit data bus, the display requires a +5V supply plus 11 I/O lines. For a 4-bit data bus it

only requires the supply lines plus seven extra lines. When the LCD display is not enabled, data

lines are tri-state which means they are in a state of high impedance (as though they are

disconnected) and this means they do not interfere with the operation of the microcontroller.


ACCELEROMETER SENSOR:

An accelerometer is a device that measures proper acceleration, also called the four-

acceleration. For example, an accelerometer on a rocket accelerating through space will measure

the rate of change of the velocity of the rocket relative to any inertial frame of reference.

However, the proper acceleration measured by an accelerometer is not necessarily the coordinate

acceleration (rate of change of velocity). Instead, it is the acceleration associated with the

phenomenon of weight experienced by any test mass at rest in the frame of reference of the

accelerometer device. For an example where these types of acceleration differ, an accelerometer

will measure a value of g in the upward direction when remaining stationary on the ground,

because masses on earth have weight m*g. By contrast, an accelerometer in gravitational fall

toward the center of the Earth will measure a value of zero because, even though its speed is

increasing, it is at rest in a frame of reference in which objects are weightless.

http://en.wikipedia.org/wiki/Weightless

http://en.wikipedia.org/wiki/Frame_of_reference

http://en.wikipedia.org/wiki/Standard_gravity

http://en.wikipedia.org/wiki/Frame_of_reference

http://en.wikipedia.org/wiki/Proper_acceleration

http://en.wikipedia.org/wiki/Inertial_frame_of_reference

http://en.wikipedia.org/wiki/Four-acceleration

http://en.wikipedia.org/wiki/Four-acceleration

http://en.wikipedia.org/wiki/Proper_acceleration


CIRCUIT DIAGRAM


TRANSMITTER:


RECEIVER:


DESCRIPTION OF CIRCUIT DIAGRAM:

Power supply:

The Entire Project (both TX and RX side) needs power for its operation.

However, from the study of this project it comes to know that we supposed to design 5v and 12v

dc power supply. So by utilizing the following power supply components required power has

been gained. (230/12v (1A and 500mA) – Step down transformers, Bridge rectifier to converter


ac to dc, booster capacitor and +5v (7805) and +12v (7812) regulator to maintain constant 5v &

12 supply for the controller circuit and driver circuit).

ARM7 Microcontroller:

The LPC2141/2/4/6/8 microcontrollers are based on a 32/16 bit ARM7TDMI-S CPU with real-

time emulation and embedded trace support, that combines with the microcontroller with embedded high

speed flash memory ranging from 32 kB to 512 kB.A128-bit widememory interface and a unique










Max232:

The MAX232 is an integrated circuit that converts signals from an RS-232 serial port to signals

suitable for use in TTL compatible digital logic circuits. The MAX232 is a dual driver/receiver

and typically converts the RX, TX, CTS and RTS signals. The drivers provide RS-232 voltage

level outputs (approx. ± 7.5 V) from a single + 5 V supply via on-chip charge pumps and

external capacitors. This makes it useful for implementing RS-232 in devices that otherwise do

http://en.wikipedia.org/wiki/Charge_pump

http://en.wikipedia.org/wiki/Transistor-transistor_logic

http://en.wikipedia.org/wiki/RS-232

http://en.wikipedia.org/wiki/Integrated_circuit


not need any voltages outside the 0 V to + 5 V range, as power design does not need to be made

more complicated just for driving the RS-232 in this case.

HUMIDITY SENSOR:

A humidity sensor also called a hygrometer, measures and regularly reports the relative humidity

in the air. They may be used in homes for people with illnesses affected by humidity; as part of

home heating, ventilating, and air conditioning (HVAC) systems; and in humidors or wine

cellars. Humidity sensors can also be used in cars, office and industrial HVAC systems, and in

meteorology stations to report and predict weather.

A humidity sensor senses relative humidity. This means that it measures both air temperature and

moisture. Relative humidity, expressed as a percent, is the ratio of actual moisture in the air to

the highest amount of moisture air at that temperature can hold. The warmer the air is, the more

moisture it can hold, so relative humidity changes with fluctuations in temperature.

LDR:

LDRs or Light Dependent Resistors are very useful especially in light/dark sensor circuits.

Normally the resistance of an LDR is very high, sometimes as high as 1000 000 ohms, but when

they are illuminated with light resistance drops dramatically. The animation opposite shows

that when the torch is turned on, the resistance of the LDR falls, allowing current to pass through

it. Circuit Wizard software has been used to display, the range of values of a ORP12, LDR.

http://www.wisegeek.com/what-are-hvac-systems.htm

http://www.wisegeek.com/what-is-hvac.htm

http://www.wisegeek.com/what-is-relative-humidity.htm

http://www.wisegeek.com/what-is-a-hygrometer.htm

http://www.wisegeek.com/what-is-humidity.htm


HARDWARE REQUIREMENTS


POWER SUPPLY UNIT:

Circuit Diagram

Power supply unit consists of following units

i) Step down transformer

ii) Rectifier unit

iii) Input filter

iv) Regulator unit

v) Output filter

STEPDOWN TRANSFORMER:

The Step down Transformer is used to step down the main supply voltage from 230V AC

to lower value. This 230 AC voltage cannot be used directly, thus it is stepped down. The

Transformer consists of primary and secondary coils.


To reduce or step down the voltage, the transformer is designed to contain less

number of turns in its secondary core. The output from the secondary coil is also AC waveform.

Thus the conversion from AC to DC is essential. This conversion is achieved by using the

Rectifier Circuit/Unit.

Step down transformers can step down incoming voltage, which enables you to have the

correct voltage input for your electrical needs. For example, if our equipment has been specified

for input voltage of 12 volts, and the main power supply is 230 volts, we will need a step down

transformer, which decreases the incoming electrical voltage to be compatible with your 12 volt

equipment.

RECTIFIER UNIT:

The Rectifier circuit is used to convert the AC voltage into its corresponding DC voltage.

The most important and simple device used in Rectifier circuit is the diode. The simple function

of the diode is to conduct when forward biased and not to conduct in reverse bias. Now we are

using three types of rectifiers. They are

1. Half-wave rectifier

2. Full-wave rectifier

3. Bridge rectifier

Half-wave rectifier: In half wave rectification, either the positive or negative half of the AC

wave is passed, while the other half is blocked. Because only one half of the input waveform

reaches the output, it is very inefficient if used for power transfer. Half-wave rectification can be


achieved with a single diode in a one phase supply, or with three diodes in a three-phase supply.

Full-wave rectifier: A full-wave rectifier converts the whole of the input waveform to one of

constant polarity (positive or negative) at its output. Full-wave rectification converts both

polarities of the input waveform to DC (direct current), and is more efficient. However, in a

circuit with a non-center tapped transformer, four diodes are required instead of the one needed

for half-wave rectification. A full-wave rectifier uses a diode bridge, made of four diodes, like

this:

At first, this may look just as confusing as the one-way streets of Boston. The thing to realize is

that the diodes work in pairs. As the voltage of the signal flips back and forth, the diodes shepard

the current to always flow in the same direction for the output.

Here's what the circuit looks like to the signal as it alternates:


So, if we feed our AC signal into a full wave rectifier, we'll see both halves of the wave above 0

Volts. Since the signal passes through two diodes, the voltage out will be lower by two diode

drops, or 1.2 Volts.

AC Wave In:

AC Wave Out (Full-Wave Rectified):

If we're interested in using the full-wave rectifier as a DC power supply, we'll add a smoothing

capacitor to the output of the diode bridge.


Bridge rectifier: A bridge rectifier makes use of four diodes in a bridge arrangement to achieve

full-wave rectification. This is a widely used configuration, both with individual diodes wired as

shown and with single component bridges where the diode bridge is wired internally.

A diode bridge or bridge rectifier is an arrangement of four diodes in a bridge configuration

that provides the same polarity of output voltage for either polarity of input voltage. When used

in its most common application, for conversion of alternating current (AC) input into direct

current (DC) output, it is known as a bridge rectifier. A bridge rectifier provides full-wave

rectification from a two-wire AC input, resulting in lower cost and weight as compared to a

center-tapped transformer design.

The Forward Bias is achieved by connecting the diode’s positive with positive of the

battery and negative with battery’s negative. The efficient circuit used is the Full wave Bridge

http://en.wikipedia.org/wiki/Transformer

http://en.wikipedia.org/wiki/Center_tap

http://en.wikipedia.org/wiki/Rectifier



http://en.wikipedia.org/wiki/Direct_current

http://en.wikipedia.org/wiki/Direct_current

http://en.wikipedia.org/wiki/Alternating_current

http://en.wikipedia.org/wiki/Volt

http://en.wikipedia.org/wiki/Polarity_(physics)

http://en.wikipedia.org/wiki/Bridge_circuit

http://en.wikipedia.org/wiki/Diode


rectifier circuit. The output voltage of the rectifier is in rippled form, the ripples from the

obtained DC voltage are removed using other circuits available. The circuit used for removing

the ripples is called Filter circuit.

INPUT FILTER:

Capacitors are used as filter. The ripples from the DC voltage are removed and pure DC

voltage is obtained. And also these capacitors are used to reduce the harmonics of the input

voltage. The primary action performed by capacitor is charging and discharging. It charges in

positive half cycle of the AC voltage and it will discharge in negative half cycle. So it allows

only AC voltage and does not allow the DC voltage. This filter is fixed before the regulator.

Thus the output is free from ripples.

There are two types of filters. They are

1. Low pass filter

2. High pass filter

Low pass filter:


One simple electrical circuit that will serve as a low-pass filter consists of a resistor in

series with a load, and a capacitor in parallel with the load. The capacitor exhibits reactance, and

blocks low-frequency signals, causing them to go through the load instead.

At higher frequencies the reactance drops, and the capacitor effectively

functions as a short circuit. The combination of resistance and capacitance gives you the time

constant of the filter τ = RC (represented by the Greek letter tau). The break frequency, also

called the turnover frequency or cutoff frequency (in hertz), is determined by the time constant:

or equivalently (in radians per second):

One way to understand this circuit is to focus on the time the capacitor takes to charge. It

takes time to charge or discharge the capacitor through that resistor:

At low frequencies, there is plenty of time for the capacitor to charge up to

practically the same voltage as the input voltage.

At high frequencies, the capacitor only has time to charge up a small amount

before the input switches direction. The output goes up and down only a small fraction of the

amount the input goes up and down. At double the frequency, there's only time for it to charge

up half the amount.

Another way to understand this circuit is with the idea of reactance at a particular

frequency:


Since DC cannot flow through the capacitor, DC input must "flow out" the path

marked Vout (analogous to removing the capacitor).

Since AC flows very well through the capacitor — almost as well as it flows

through solid wire — AC input "flows out" through the capacitor, effectively short circuiting to

ground (analogous to replacing the capacitor with just a wire).

It should be noted that the capacitor is not an "on/off" object (like the block or pass fluidic

explanation above). The capacitor will variably act between these two extremes. It is the Bode

plot and frequency response that show this variability.

High pass filter:

The above circuit diagram illustrates a simple 'RC' high-pass filter. We should find that the

circuit passes 'high' frequencies fairly well, but attenuates 'low' frequencies. Hence it is useful as

a filter to block any unwanted low frequency components of a complex signal whilst passing


higher frequencies. Circuits like this are used quite a lot in electronics as a 'D.C. Block' - i.e. to

pass a.c. signals but prevent any D.C. voltages from getting through.

The basic quantities which describe this circuit are similar to those used for the Low Pass Filter.

In effect, this circuit is just a simple low-pass filter with the components swapped over.

The action of the circuit can also be described in terms of a related quantity, the Turn over

Frequency, f0, which has a value

As with the low-pass filter, the circuit's behavior we can be understood as arising due to the time

taken to change the capacitor's charge when we alter the applied input voltage. It always takes a

finite (i.e. non-zero) time to change the amount of charge stored by the capacitor. Hence it takes

time to change the potential difference across the capacitor. As a result, any sudden change in the

input voltage produces a similar sudden change on the other side of the capacitor. This produces

a voltage across the resistor and causes a current to flow thorough it, charging the capacitor until

all the voltage falls across it instead of the resistor. The result is that steady (or slowly varying)

voltages appear mostly across the capacitor and quick changes appear mostly across the resistor.


Since we're using the voltage across the resistor as out output the main

properties of the circuit are

Therefore

The Voltage Gain:

The Phase Delay:

Try using the above experimental system to collect results and plot a graph of how the voltage

gain, Av, (and the phase change) depend upon the input frequency and if we check result agrees

with the above formulae. Compare this with a low-pass filter that uses the same component

values and you should see that they give 'opposite' results. In the high-pass filter, the output

waveform 'leads' the input waveform -i.e.itpeaksbeforetheinput.

REGULATOR UNIT:

7805 Regulator


Regulator regulates the output voltage to be always constant. The output voltage is

maintained irrespective of the fluctuations in the input AC voltage. As and then the AC voltage

changes, the DC voltage also changes.

Thus to avoid this Regulators are used. Also when the internal resistance of the power

supply is greater than 30 ohms, the output gets affected. Thus this can be successfully reduced

here. The regulators are mainly classified for low voltage and for high voltage. Further they can

also be classified as:

i) Positive regulator

1---> input pin

2---> ground pin

3---> output pin

It regulates the positive voltage.

ii) Negative regulator

1---> ground pin

2---> input pin

3---> output pin

It regulates the negative voltage.

Fixed regulators


An assortment of 78xx series ICs

"Fixed" three-terminal linear regulators are commonly available to generate fixed voltages of

plus 3 V, and plus or minus 5 V, 9 V, 12 V, or 15 V when the load is less than about 7 amperes.

7805 VOLTAGE REGULATOR:

The 7805 provides circuit designers with an easy way to regulate DC voltages to 5v.

Encapsulated in a single chip/package (IC), the 7805 is a positive voltage DC regulator that

has only 3 terminals. They are: Input voltage, Ground, Output Voltage.

General Features:

Output Current up to 1A

Output Voltages of 5, 6, 8, 9, 10, 12, 15, 18, 24V

Thermal Overload Protection

Short Circuit Protection

Output Transistor Safe Operating Area Protection

http://en.wikipedia.org/wiki/File:7800_IC_regulators.jpg


7812 12V Integrated Circuit3-Terminal Positive Voltage Regulator:

The 7812 fixed voltage regulator is a monolithic integrated circuit in a TO220

type package designed for use in a wide variety of applications including

local, onboard regulation. This regulator employs internal current limiting,

thermal shutdown, and safe area compensation.

With adequate heat-sinking it can deliver output currents in excess of 1.0

ampere. Although designed primarily as a fixed voltage regulator, this device

can be used with external components to obtain adjustable voltages and

currents.

OUTPUT FILTER:

The Filter circuit is often fixed after the Regulator circuit. Capacitor is most often used

as filter. The principle of the capacitor is to charge and discharge. It charges during the positive

half cycle of the AC voltage and discharges during the negative half cycle. So it allows only AC

voltage and does not allow the DC voltage. This filter is fixed after the Regulator circuit to filter

any of the possibly found ripples in the output received finally. Here we used 0.1µF capacitor.

The output at this stage is 5V and is given to the Microcontroller. The output voltage overshoots

when the load is removed or a short clears. When the load is removing from a switching mode

power supply with a LC low-pass output filter, the only thing the control loop can do is stop the

switching action so no more energy is taken from the source. The energy that is stored in the

output filter inductor is dumped into the output capacitor causing a voltage overshoot.


The magnitude of the overshoot is the vector sum of two orthogonal voltages, the output voltage before

the load is removed and the current through the inductor times the characteristic impedance of the

output filter, Zo = (L/C)^1/2. This can be derived from conservation of energy considerations.

The initial energy, Ei, is:

Ei = 1/2*(L*Ii^2 + C*Vi^2)

The final energy, Ef, is:

Ef = 1/2*(L*If^2 = C*Vf^2)

The two energies are equal when the load is removed, since the load is no longer taking energy from the

system. Equating the two energies, substituting zero current for the final inductor current, then the

solution for the final voltage Vf is:

Vf = (Vi^2 + (Ii*Zo)^2)^1/2

This is the orthogonal vector sum of the output voltage and the load current times the characteristic

impedance and is illustrated in Figure 1.


Figure 1: Overshoot Voltage as Vector Sum

The problem becomes worse if the current in the inductor is established by a short circuit on the output

and the short circuit clears. In this case, the initial voltage is zero (short circuit) and the overshoot is

I*Zo, where I can be very large, resulting in a ruinous overshoot.

INTRODUCTION TO ARM7

Introduction:

The LPC2141/2/4/6/8 microcontrollers are based on a 32/16 bit ARM7TDMI-S CPU with

real-time emulation and embedded trace support, that combines with the microcontroller with embedded

high speed flash memory ranging from 32 kB to 512 kB.A128-bit widememory interface and a unique











Various 32-bit timers, single or dual 10-bit ADC(s), 10-bit DAC,PWM channels and 45 fast

GPIO lines with up to nine edge or level sensitive externalinterrupt pins make these microcontrollers

particularly suitable for industrial control andmedical systems.

Features:

• 16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.

• 8 to 40 kB of on-chip static RAM and 32 to 512 kB of on-chip flash program memory.

128 bit wide interface/accelerator enables high speed 60 MHz operation.

• In-System/In-Application Programming (ISP/IAP) via on-chip boot-loader software.Single flash sector

or full chip erase in 400 ms and programming of 256 bytes in 1 ms.

• EmbeddedICE RT and Embedded Trace interfaces offer real-time debugging with the on-chip

RealMonitor software and high speed tracing of instruction execution.

• USB 2.0 Full Speed compliant Device Controller with 2 kB of endpoint RAM.

In addition, the LPC2146/8 provide 8 kB of on-chip RAM accessible to USB by DMA.

• One or two (LPC2141/2 vs. LPC2144/6/8) 10-bit A/D converters provide a total of 6/14

analog inputs, with conversion times as low as 2.44 μs per channel.


• Single 10-bit D/A converter provides variable analog output.

• Two 32-bit timers/external event counters (with four capture and four compare

channels each), PWM unit (six outputs) and watchdog.

• Low power real-time clock with independent power and dedicated 32 kHz clock input.

• Multiple serial interfaces including two UARTs (16C550), two Fast I2C-bu (400 bit/s), SPI and SSP

with buffering and variable data length capabilities.

• Vectored interrupt controller with configurable priorities and vector addresses.

• Up to 45 of 5 V tolerant fast general purpose I/O pins in a tiny LQFP64 package.

• Up to nine edge or level sensitive external interrupt pins available.

• 60 MHz maximum CPU clock available from programmable on-chip PLL with settling

Time of 100 μs.

• On-chip integrated oscillator operates with an external crystal in range from 1 MHz to

30 MHz and with an external oscillator up to 50 MHz.

• Power saving modes include Idle and Power-down.

• Individual enable/disable of peripheral functions as well as peripheral clock scaling for additional

power optimization.

• Processor wake-up from Power-down mode via external interrupt, USB, Brown-Out

Detect (BOD) or Real-Time Clock (RTC).

• Single power supply chip with Power-On Reset (POR) and BOD circuits:

– CPU operating voltage range of 3.0 V to 3.6 V (3.3 V ± 10 %) with 5 V tolerant I/O

Applications:


• Industrial control

• Medical systems

• Access control

• Point-of-sale

• Communication gateway

• Embedded soft modem

• General purpose applications

Peripheral Bus (APB, a compatible superset of ARM’s AMBA Advanced Peripheral Bus)for connection

to on-chip peripheral functions. The LPC2141/24/6/8 configures theARM7TDMI-S processor in little-

endian byte order.


AHB peripherals are allocated a 2 megabyte range of addresses at the very top of the 4 gigabyte

ARM memory space. Each AHB peripheral is allocated a 16 kB address space interrupt controller) are

connected to the APB bus. The AHB to APB bridge interfaces theAPB bus within the AHB address

space.

LPC2141/2/4/6/8 peripheral functions (other than theto the AHB bus. APB peripherals are

also allocated a 2 megabyte rangeofaddresses, beginning at the 3.5 gigabyte address point. Each APB

peripheral isallocateda 16 kB address space within the APB address space.The connection of on-chip

peripherals to device pins is controlled by a Pin Connect Block(see chapter "Pin Connect Block" on page

58). This must be configured by software to fit specific application requirements for the use of peripheral

functions and pins.

ARM7TDMI-S processor:

The ARM7TDMI-S is a general purpose 32-bit microprocessor, which offers high performance

and very low power consumption. The ARM architecture is based on Reduced Instruction Set Computer

(RISC) principles, and the instruction set and related decode mechanism are much simpler than those of

microprogrammedComplexInstruction Set Computers. This simplicity results in a high instruction

throughput andimpressive real-time interrupt response from a small and cost-effective processor

core.Pipeline techniques are employed so that all parts of the processing and memory systemscan operate

continuously.

Typically, while one instruction is being executed, its successor is being decoded, and a third

instruction is being fetched from memory.The ARM7TDMI-S processor also employs a unique

architectural strategy known asTHUMB, which makes it ideally suited to high-volume applications with

memory restrictions, or applications where code density is an issue.The key idea behind THUMB is that

of a super-reduced instruction set. Essentially, theARM7TDMI-S processor has two instruction sets:

• The standard 32-bit ARM instruction set.

• A 16-bit THUMB instruction set.


The THUMB set’s 16-bit instruction length allows it to approach twice the density of standard

ARM code while retaining most of the ARM’s performance advantage over a traditional 16-bit processor

using 16-bit registers. This is possible because THUMB code operates on the same 32-bit register set as

ARM code.

THUMB code is able to provide up to 65% of the code size of ARM, and 160% of the performance of an

equivalent ARM processor connected to a 16-bit memory system. The ARM7TDMI-S processor is

described in detail in the ARM7TDMI-S Datasheet that can be found on official ARM website

On-chip flash memory system:

The LPC2141/2/4/6/8 incorporate a 32 kB, 64 kB, 128 kB, 256 kB, and 512 kB Flashmemory system,

respectively. This memory may be used for both code and data storage. Programming of the Flash

memory may be accomplished in several ways: over the serialbuilt-in JTAG interface, using In System

Programming (ISP) and UART0, or by means of In Application Programming (IAP) capabilities. The

application program, using the IAPfunctions, may also erase and/or program the Flash while the

applications running,allowing a great degree of flexibility for data storage fieldfirmware upgrades, etc.

When the LPC2141/2/4/6/8 on-chip boot loader is used, 32kB, 64 kB, 128 kB, 256 kB, and500 kB of

Flash memory is available for user code.The LPC2141/2/4/6/8 Flash memory provides minimum of

100,000 erase/write cycles and 20 years of data-retention.

On-chip Static RAM (SRAM)

On-chip Static RAM (SRAM) may be used for code and/or data storage. The on-chip SRAM may be

accessed as 8-bits, 16-bits, and 32-bits. The LPC2141/2/4/6/8 provides 8/16/32 kB of static RAM,

respectively. The LPC2141/2/4/6/8 SRAM is designed to be accessed as a byte-addressed memory. Word

and half word accesses to the memory ignore the alignment of the address and access the naturally-


aligned value that is addressed (so a memory access ignores address bits 0 and 1 for word accesses, and

ignores bit 0 for half word accesses).

Therefore valid reads and writes require data accessed as half words to originate from

addresses with address line 0 being 0 (addresses ending with 0, 2, 4, 6, 8, A, C, and E in hexadecimal

notation) and data accessed as words to originate from addresses with

Address lines 0 and 1 being 0 (addresses ending with 0, 4, 8, and C in hexadecimal notation). This rule

applies to both off and on-chip memory usage. The SRAM controller incorporates a write-back buffer in

order to prevent CPU stalls during back-to-back writes. The write-back buffer always holds the last data

sentbysoftware to the SRAM. This data is only written to the SRAM when another write isrequested by

software (the data is only written to the SRAM when software does anotherwrite). If a chip reset occurs,

actual SRAM contents will not reflect the most recent writerequest (i.e. after a "warm" chip reset, the

SRAM does not reflect the lastwrite operation).Any software that checks SRAM contents after reset must

take this into account.

Twoidentical writes to a location guarantee that the data will be present after a Reset.Alternatively,

a dummy write operation before entering idle or power-down mode will similarly guarantee that the last

data written will be present in SRAM after a subsequent reset


Prefetch abort and data abort exceptions:

The LPC2141/2/4/6/8 generates the appropriate bus cycle abort exception if an access isattempted

for an address that is in a reserved or unassigned address region. The regionsare:

• Areas of the memory map that are not implemented for a specific ARM derivative. For the

LPC2141/2/4/6/8, this is:– Address space between On-Chip Non-Volatile Memory and On-Chip

SRAM,labelled "Reserved Address Space" . For 32 kB Flash device this is memory address range from

0x0000 8000 to 0x3FFF FFFF, for 64 kB Flash device this is memory address range from 0x0001 0000 to

0x3FFF FFFF, for 128 kB Flash device this is memory address range from 0x0002 0000 to 0x3FFF FFFF,

for256 kB Flash device this is memory address range from 0x0004 0000 to0x3FFF FFFF while for 512

kB Flash device this range is from 0x0008 0000 to0x3FFF FFFF.

– Address space between On-Chip Static RAM and the Boot Block. Labelled

"Reserved Address Space" . For 8 kB SRAM device this is memory address range from 0x4000 2000 to

0x7FFF CFFF, for 16 kB SRAM device this ismemory address range from 0x4000 4000 to 0x7FFF

CFFF. For 32 kB SRAM device this range is from 0x4000 8000 to0x7FCF FFFF where the 8 kB USB

DMARAM starts, and from 0x7FD0 2000 to 0x7FFF CFFF.

– Address space between 0x8000 0000 and 0xDFFF FFFF, labelled "Reserved

Adress Space".

– Reserved regions of the AHB and APB spaces.

• Unassigned AHB peripheral spaces.

• Unassigned APB peripheral spaces.


For these areas, both attempted data access and instruction fetch generate an exception.In addition, a

Prefetch Abort exception is generated for any instruction fetch that maps to an AHB or APB peripheral

address.

Within the address space of an existing APB peripheral, a data abort exception is not

generated in response to an access to an undefined address. Address decoding within each peripheral is

limited to that needed to distinguish defined registers within the peripheral itself. For example, an access

to address 0xE000 D000 (an undefined address with in the UART0 space) may result in an access to the

register defined at address 0xE000 C000.

Details of such address aliasing within a peripheral space are not defined in the

LPC2141/2/4/6/8 documentation and are not a supported feature. Note that the ARM core stores the

Prefetch Abort flag along with the associated instruction (which will be meaningless) in the pipeline and

processes the abort only if an attempt is made to execute the instruction fetched from the illegal address.

This prevents accidental aborts that could be caused by prefetches that occur when code is executed very

near a memory boundry.

Memory accelerator module:

Introduction

The MAM block in the LPC2141/2/4/6/8 maximizes the performance of the ARM processor when it is

running code in Flash memory, but does so using a single Flash bank.

Operation

Simply put, the Memory Accelerator Module (MAM) attempts to have the next ARM instruction that will

be needed in its latches in time to prevent CPU fetch stalls. The LPC2141/2/4/6/8 uses one bank of Flash

memory, compared to the two banks used on predecessor devices. It includes three 128-bit buffers called


the Prefetch Buffer, the Branch Trail Buffer and the data buffer. When an Instruction Fetch is not satisfied

by either the Prefetch or Branch Trail Buffer, nor has a prefetch been initiated for that line, the ARM is

stalled while a fetch is initiated for the 128-bit line. If a prefetch has been initiated but not yet completed,

the ARM is stalled for a shorter time. Unless aborted by a data access, a prefetch is initiated as soon as the

Flash has completed the previous access. The prefetched line is latched by the Flash module, but the

MAM does not capture the line in its prefetch buffer until the ARM core presents the address from which

the prefetch has been made. If the core presents a different address from the one from which the prefetch

has been made, the prefetched line is discarded.

The Prefetch and Branch Trail buffers each include four 32-bit ARM instructions or eight

16-bit Thumb instructions. During sequential code execution, typically the Prefetch Buffer contains the

current instruction and the entire Flash line that contains it. The MAM differentiates between instruction

and data accesses. Code and data accesses use separate 128-bit buffers. 3 of every 4 sequential 32-bit

code or data accesses "hit" in the buffer without requiring a Flash access (7 of 8 sequential 16-bit

accesses, 15 of every 16 sequential byte accesses).

The fourth (eighth, 16th) sequential data access must access Flash, aborting any prefetch in

progress. When a Flash data access is concluded, any prefetch that had been in progress is re-initiated.

Timing of Flash read operations is programmable and is described later in this section. In this manner,

there is no code fetch penalty for sequential instruction execution hen the CPU clock period is greater

than or equal to one fourth of the Flash access time. He average amount of time spent doing program

branches is relatively small (less than 25%) and may be minimized in ARM (rather than Thumb) code

through the use of the Conditional execution feature present in all ARM instructions.

This conditional execution may often be used to avoid small forward branches that would

otherwise be necessary. Branches and other program flow changes cause a break in the sequential flow of

the instruction fetches described above. The Branch Trail Buffer captures the line to which such a non-

sequential break occurs. If the same branch is taken again, the next instruction is taken from the Branch

Trail Buffer. When a branch outside the contents of the Prefetch and Branch Trail Buffer is taken, a stall


of several clocks is needed to load the Branch Trail buffer. Subsequently, there will typically be no

further instruction fetch delays until a new and different branch occurs.

Flash memory bank

There is one bank of Flash memory with the LPC2141/2/4/6/8 MAM. Flash programming

operations are not controlled by the MAM, but are handled as a separate function. A “boot block” sector

contains Flash programming algorithms that may be called as part of the application program, and a

loader that may be run to allow serial

Programming of the Flash memory.


LPC2148PINOUT:


Features:

Allows individual pin configuration.

• 10 bit digital to analog converter

• Resistor string architecture

• Buffered output

• Power-down mode

• Selectable speed vs. power

Applications:

The purpose of the Pin connect block is to configure the microcontroller pins to the

Desired functions.

Description:

The pin connect block allows selected pins of the microcontroller to have more than one

Function. Configuration registers control the multiplexers to allow connection between the pin and the on

chip peripherals. Peripherals should be connected to the appropriate pins prior to being activated, and

prior to any related interrupt(s) being enabled. Activity of any enabled peripheral function that is not

mapped to a related pin should be considered undefined. Selection of a single function on a port pin

completely excludes all other functions otherwise available on the same pin. The only partial exception

from the above rule of exclusion is the case of inputs to the A/D converter. Regardless of the function that

is selected for the port pin that also hosts the A/D input, this A/D input can be read at any time and

variations of the voltage level on this pin will be reflected in the A/D readings. However, valid analog

reading(s) can be obtained if and only if the function of an analog input is selected. Only in this case


proper interface circuit is active in between the physical pin and the A/D module. In all other cases, a part

of digital logic necessary for the digital function to be performed will be active, and will disrupt proper

behavior of the A/D.

HUMIDITY SENSOR:

A humidity sensor, also called a hygrometer, measures and regularly reports the relative

humidity in the air. They may be used in homes for people with illnesses affected by humidity;

as part of home heating, ventilating, and air conditioning (HVAC) systems; and in humidors or

wine cellars. Humidity sensors can also be used in cars, office and industrial HVAC systems, and

in meteorology stations to report and predict weather.

A humidity sensor senses relative humidity. This means that it measures both air temperature and

moisture. Relative humidity, expressed as a percent, is the ratio of actual moisture in the air to

the highest amount of moisture air at that temperature can hold. The warmer the air is, the more

moisture it can hold, so relative humidity changes with fluctuations in temperature.

The most common type of humidity sensor uses what is called “capacitive measurement.” This

system relies on electrical capacitance, or the ability of two nearby electrical conductors to create

an electrical field between them. The sensor itself is composed of two metal plates with a non-

conductive polymer film between them. The film collects moisture from the air, and the moisture

causes minute changes in the voltage between the two plates. The changes in voltage are

converted into digital readings showing the amount of moisture in the air.

A person with a respiratory illness or certain allergies might use a home humidity sensor because

low humidity can exacerbate breathing problems and cause joint pain, while high humidity

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encourages bacteria, mold, and fungus growth. Home humidors and wine cellars often have a

humidity sensor that helps to maintain a consistent relative humidity optimal to safe long-term

storage. Humidity sensors can also be used in homes or museums where valuable antiques or

artwork are kept, because these items can be damaged or degraded from constant exposure to too

much moisture.

Commercial and office buildings often have humidity sensors in their HVAC systems, which

help to insure safe air quality. Many automobiles use a humidity sensor as part their defrosting

and defogging systems to automatically adjust the temperature and source of air used for heating

and air conditioning. Humidity sensors also have industrial applications for production of

materials that are sensitive to moisture. Humidity sensors give regular, ongoing readings of

relative humidity, so they are used for data collection in oceanography and weather stations

where humidity must be measured over time to analyze patterns and predict weather.

Relative humidity/temperature and relative humidity sensors are

configured with integrated circuitry to provide on-chip signal

conditioning. Absorption-based humidity sensors provide both

temperature and %RH (Relative Humidity) outputs. On-chip signal processing ensures linear

voltage output versus %RH. Sensor laser trimming offers +5 %RH accuracy and achieves 2

%RH accuracy with calibration. Packages are chemically resistant and operate in ranges of -

40 °C to 85 °C [-40 °F to 185 °F] to accommodate harsh environments.

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Digital Humidity and Temperature Sensors (RH&T) – Overview

Sensirion’s family of relative humidity and temperature sensors have become established as the industry standard - mainly due to their high performance and integration (CMOSens® Technology) in a miniature format. The capacitive humidity and temperature sensors provide digital and fully calibrated output which allows for easy integration without the need for additional calibration. The excellent long term stability has been very well perceived and the cutting edge low energy consumption is unachieved and makes them the right choice for any remote application.

Humidity and Temperature Sensor Packaging Max. RH Max. T Sensor Output

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tolerance* tolerance*

SHT10 SMD ±4.5%RH ±0.5°C Digital Sbus

SHT11 SMD ±3%RH ±0.4°C Digital Sbus

SHT15 SMD ±2%RH ±0.3°C Digital Sbus

SHT21 DFN ±3%RH ±0.4°C I2C, PWM, SDM

SHT25 DFN ±2%RH ±0.35°C I2C

SHT71 Pins ±3%RH ±0.4°C Digital Sbus

SHT75 Pins ±1.8%RH ±0.3°C Digital Sbus

STS21 DFN - ±0.3°C I2C

The digital humidity sensors are provided in different packaging types: SMD type (SHT1x series), pin type (SHT7x series) and the new DFN type (SHT2x series). The SHT1x and SHT2x are reflow solderable while pin type humidity sensors are used for devices where flexible integration is crucial or easy exchange is necessary. The three series are subdivided further according to different accuracy levels of humidity reading. Additionally, Sensirion provides the temperature only version STS21.

For customized high-volume OEM humidity sensor solutions, please contact Sensirion directly

Physical quantities like Humidity, temperature, pressure etc. are monitored to get information

about the environmental conditions. Various sensors are being used to measure these quantities

in analog form. This article demonstrates the principle and operation of interfacing the humidity

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mailto:[email protected]


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sensor with 8051 microcontroller (AT89C51). The humidity sensor is widely used in

applications like weather forecast, air conditioner, Hygro

ZIGBEE:

ZigBee is the set of specs built around the IEEE 802.15.4 wireless protocol. The IEEE is

the Institute of Electrical and Electronics Engineers. They are a non-profit organization

dedicated to furthering technology involving electronics and electronic devices. The 802 group

is the section of the IEEE involved in Information technology—Telecommunications and

information exchange between systems—Local and metropolitan area networks including

mid-sized networks. Group 15.4 deals specifically with wireless networking (Wireless Medium

Access Control (MAC) and Physical Layer (PHY) Specifications for Low-Rate Wireless

Personal Area Networks (WPANs)) technologies.

The name "ZigBee" is derived from the erratic zigging patterns many bees make between

flowers when collecting pollen. This is evocative of the invisible webs of connections existing in

a fully wireless environment. The standard itself is regulated by a group known as the ZigBee

Alliance, with over 150 members worldwide.

While Bluetooth focuses on connectivity between large packet user devices, such as

laptops, phones, and major peripherals, ZigBee is designed to provide highly efficient

connectivity between small packet devices. As a result of its simplified operations, which are one

to two full orders of magnitude less complex than a comparable Bluetooth device, pricing for

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ZigBee devices is extremely competitive, with full nodes available for a fraction of the cost of a

Bluetooth node.

ZigBee devices are actively limited to a through-rate of 250Kbps, operating on the 2.4

GHz ISM band, which is available throughout most of the world.

ZigBee has been developed to meet the growing demand for capable wireless networking

between numerous low-power devices. In industry ZigBee is being used for next generation

automated manufacturing, with small transmitters in every device on the floor, allowing for

communication between devices to a central computer. This new level of communication permits

finely-tuned remote monitoring and manipulation. In the consumer market ZigBee is being

explored for everything from linking low-power household devices such as smoke alarms to a

central housing control unit, to centralized

light controls.

The specified maximum range of operation for ZigBee devices is 250 feet (76m),

substantially further than that used by Bluetooth capable devices, although security concerns

raised over "sniping" Bluetooth devices remotely, may prove to hold true for ZigBee devices as

well.

Due to its low power output, ZigBee devices can sustain themselves on a small battery

for many months, or even years, making them ideal for install-and-forget purposes, such as most

small household systems. Predictions of ZigBee installation for the future, most based on the

explosive use of ZigBee in automated household tasks in China, look to a near future when


upwards of sixty ZigBee devices may be found in an average American home, all

communicating with one another freely and regulating common

INTRODUCTION

An LR-WPAN is a simple, low-cost communication network that allows wireless

connectivity in applications with limited power and relaxed throughput requirements. The main

objectives of an LR-WPAN are ease of installation, reliable data transfer, short-range operation,

extremely low cost, and a reasonable battery life, while maintaining a simple and flexible

protocol.

Some of the characteristics of an LR-WPAN are as follows:

— Over-the-air data rates of 250 kb/s, 100kb/s, 40 kb/s, and 20 kb/s

— Star or peer-to-peer operation

— Allocated 16-bit short or 64-bit extended addresses

— Optional allocation of guaranteed time slots (GTSs)

— Carrier sense multiple access with collision avoidance (CSMA-CA) channel access

— Fully acknowledged protocol for transfer reliability

— Low power consumption

— Energy detection (ED)

— Link quality indication (LQI)

— 16 channels in the 2450 MHz band, 30 channels in the 915 MHz band, and 3 channels in the

868 MHz band

Two different device types can participate in an IEEE 802.15.4 network; a full-function

device (FFD) and a reduced-function device (RFD). The FFD can operate in three modes serving


as a personal area network (PAN) coordinator, a coordinator, or a device. An FFD can talk to

RFDs or other FFDs, while an RFD can talk only to an FFD. An RFD is intended for

applications that are extremely simple, such as a light switch or a passive infrared sensor; they do

not have the need to send large amounts of data and may only associate with a single FFD at a

time. Consequently, the RFD can be implemented using minimal resources and memory

capacity.

NETWORK TOPOLOGIES

Depending on the application requirements, an IEEE 802.15.4 LR-WPAN may operate in

either of two topologies: the star topology or the peer-to-peer topology. Both are shown in Figure

x. In the star topology the communication is established between devices and a single central

controller, called the PAN coordinator. A device typically has some associated application and is

either the initiation point or the termination point for network communications.

A PAN coordinator may also have a specific application, but it can be used to initiate,

terminate, or route communication around the network. The PAN coordinator is the primary

controller of the PAN. All devices operating on a network of either topology shall have unique

64- bit addresses. This address may be used for direct communication within the PAN, or a short

address may be allocated by the PAN coordinator when the device associates and used instead.

The PAN coordinator might often be mains powered, while the devices will most likely

be battery powered. Applications that benefit from a star topology include home automation,

personal computer (PC) peripherals, toys and games, and personal health care.


The peer-to-peer topology also has a PAN coordinator; however, it differs from the star

topology in that any device may communicate with any other device as long as they are in range

of one another. Peer-to-peer topology allows more complex network formations to be

implemented, such as mesh networking topology. Applications such as industrial control and

monitoring, wireless sensor networks, asset and inventory tracking, intelligent agriculture, and

security would benefit from such a network topology. A peer-to-peer network can be ad hoc,

self-organizing, and self-healing. It may also allow multiple hops to route messages from any

device to any other device on the network. Such functions can be added at the higher layer, but

are not part of this standard.

Each independent PAN selects a unique identifier. This PAN identifier allows

communication between devices within a network using short addresses and enables

transmissions between devices across independent networks.

ARCHITECTURE

The IEEE 802.15.4 architecture is defined in terms of a number of blocks in order to

simplify the standard. These blocks are called layers. Each layer is responsible for one part of the


standard and offers services to the higher layers. The layout of the blocks is based on the open

systems interconnection (OSI) seven-layer model. The interfaces between the layers serve to

define the logical links that are described in this standard. An LR-WPAN device comprises a

PHY, which contains the radio frequency (RF) transceiver along with its low-level control

mechanism, and a MAC sub-layer that provides access to the physical channel for all types of

transfer. Figure y shows these blocks in a graphical representation

Figure x, Cluster tree Network


Figure y, ZigBee stack architecture

The upper layers, shown in Figure y, consist of a network layer, which provides network

configuration, manipulation, and message routing, and an application layer, which provides the

intended function of the device.

Physical layer (PHY)

The PHY provides two services: the PHY data service and the PHY management service

interfacing to the physical layer management entity (PLME) service access point (SAP) (known

as the PLME-SAP). The PHY data service enables the transmission and reception of PHY

protocol data units (PPDUs) across the physical radio channel. The features of the PHY are

activation and deactivation of the radio transceiver, ED, LQI, channel selection, clear channel

assessment (CCA), and transmitting as well as receiving packets across the physical medium.

The radio operates at one or more of the following unlicensed bands:


— 868–868.6 MHz (e.g., Europe)

— 902–928 MHz (e.g., North America)

— 2400–2483.5 MHz (worldwide)

MAC sub layer

The MAC sub layer provides two services: the MAC data service and the MAC

management service interfacing to the MAC sub layer management entity (MLME) service

access point (SAP) (known as MLME-SAP). The MAC data service enables the transmission

and reception of MAC protocol data units (MPDUs) across the PHY data service. The features of

the MAC sub layer are beacon management, channel access, GTS management, frame

validation, acknowledged frame delivery, association, and disassociation. In addition, the MAC

sub layer provides hooks for implementing application-appropriate security mechanisms.


The data frame provides a payload of up to 104 bytes. The frame is numbered to ensure that all

packets are tracked. A frame-check sequence ensures that packets are received without error.

This frame structure improves reliability in difficult conditions.

Another important structure for 802.15.4 is the acknowledgment (ACK) frame. It provides

feedback from the receiver to the sender confirming that the packet was received without error.

The device takes advantage of specified "quiet time" between frames to send a short packet

immediately after the data-packet transmission.

A MAC command frame provides the mechanism for remote control and configuration of client

nodes. A centralized network manager uses MAC to configure individual clients' command

frames no matter how large the network.

Finally, the beacon frame wakes up client devices, which listen for their address and go back to

sleep if they don't receive it. Beacons are important for mesh and cluster-tree networks to keep

all the nodes synchronized without requiring those nodes to consume precious battery energy by

listening for long periods of time.

DATA TRANSFER MODEL

Three types of data transfer transactions exist. The first one is the data transfer to a

coordinator in which a device transmits the data. The second transaction is the data transfer from

a coordinator in which the device receives the data. The third transaction is the data transfer

between two peer devices. In star topology, only two of these transactions are used because data

may be exchanged only between the coordinator and a device. In a peer-to-peer topology, data


may be exchanged between any two devices on the network; consequently all three transactions

may be used in this topology.

The mechanisms for each transfer type depend on whether the network supports the

transmission of beacons. A beacon-enabled PAN is used in networks that either require

synchronization or support for low latency devices, such as PC peripherals. If the network does

not need synchronization or support for low-latency devices, it can elect not to use the beacon for

normal transfers. However, the beacon is still required for network discovery.

DEVICE TYPES

ZigBee networks use three device types:

The network coordinator maintains overall network knowledge. It's the most

sophisticated of the three types and requires the most memory and computing power.

The full function device (FFD) supports all 802.15.4 functions and features specified by

the standard. It can function as a network coordinator. Additional memory and computing

power make it ideal for network router functions or it could be used in network-edge

devices (where the network touches the real world).

The reduced function device (RFD) carries limited (as specified by the standard)

functionality to lower cost and complexity. It's generally found in network-edge devices.

POWER AND BEACONS

Ultra-low power consumption is how ZigBee technology promotes a long lifetime for

devices with non rechargeable batteries. ZigBee networks are designed to conserve the power of

the slave nodes. For most of the time, a slave device is in deep-sleep mode and wakes up only for


a fraction of a second to confirm its presence in the network. For example, the transition from

sleep mode to data transition is around 15ms and new slave enumeration typically takes just

30ms.

ZigBee networks can use beacon or non-beacon environments. Beacons are used to

synchronize the network devices, identify the HAN, and describe the structure of the super

frame. The beacon intervals are set by the network coordinator and vary from 15ms to over 4

minutes. Sixteen equal time slots are allocated between beacons for message delivery. The

channel access in each time slot is contention-based. However, the network coordinator can

dedicate up to seven guaranteed time slots for non contention based or low-latency delivery.

The non-beacon mode is a simple, traditional multiple-access system used in simple peer

and near-peer networks. It operates like a two-way radio network, where each client is

autonomous and can initiate a conversation at will, but could interfere with others

unintentionally. The recipient may not hear the call or the channel might already be in use.

Beacon mode is a mechanism for controlling power consumption in extended networks

such as cluster tree or mesh. It enables all the clients to know when to communicate with each

other. Here, the two-way radio network has a central dispatcher that manages the channel and

arranges the calls. The primary value of beacon mode is that it reduces the system's power

consumption.

Non-beacon mode is typically used for security systems where client units, such as

intrusion sensors, motion detectors, and glass-break detectors, sleep 99.999% of the time.


Remote units wake up on a regular, yet random, basis to announce their continued presence in

the network. When an event occurs, the sensor wakes up instantly and transmits the alert

("Somebody's on the front porch"). The network coordinator, powered from the main source, has

its receiver on all the time and can therefore wait to hear from each of these stations. Since the

network coordinator has an "infinite" source of power it can allow clients to sleep for unlimited

periods of time, enabling them to save power.

Beacon mode is more suitable when the network coordinator is battery-operated. Client

units listen for the network coordinator's beacon (broadcast at intervals between 0.015 and 252s).

A client registers with the coordinator and looks for any messages directed to it. If no messages

are pending, the client returns to sleep, awaking on a schedule specified by the coordinator. Once

the client communications are completed, the coordinator itself returns to sleep.

This timing requirement may have an impact on the cost of the timing circuit in each end

device. Longer intervals of sleep mean that the timer must be more accurate or turn on earlier to

make sure that the beacon is heard, both of which will increase receiver power consumption.

Longer sleep intervals also mean the timer must improve the quality of the timing oscillator

circuit (which increases cost) or control the maximum period of time between beacons to not

exceed 252s, keeping oscillator circuit costs low.

SECURITY

Security and data integrity are key benefits of the ZigBee technology. ZigBee leverages the

security model of the IEEE 802.15.4 MAC sub layer which specifies four security services:


access control—the device maintains a list of trusted devices within the network

data encryption, which uses symmetric key 128-bit advanced encryption standard

frame integrity to protect data from being modified by parties without cryptographic keys

sequential freshness to reject data frames that have been replayed—the network

controller compares the freshness value with the last known value from the device and

rejects it if the freshness value has not been updated to a new value

The actual security implementation is specified by the implementer using a standardized toolbox

of ZigBee security.

MAX232:

he MAX232 is an integrated circuit that converts signals from an RS-232 serial port to signals

suitable for use in TTL compatible digital logic circuits. The MAX232 is a dual driver/receiver

and typically converts the RX, TX, CTS and RTS signals.

The drivers provide RS-232 voltage level outputs (approx. ± 7.5 V) from a single + 5 V supply

via on-chip charge pumps and external capacitors. This makes it useful for implementing RS-232

in devices that otherwise do not need any voltages outside the 0 V to + 5 V range, aspower

supply design does not need to be made more complicated just for driving the RS-232 in this

case.

The receivers reduce RS-232 inputs (which may be as high as ± 25 V), to standard

5 V TTLlevels. These receivers have a typical threshold of 1.3 V, and a typical hysteresis of

0.5 V.

http://en.wikipedia.org/wiki/Hysteresis


http://en.wikipedia.org/wiki/Power_supply

http://en.wikipedia.org/wiki/Power_supply

http://en.wikipedia.org/wiki/Charge_pump


http://en.wikipedia.org/wiki/RS-232

http://en.wikipedia.org/wiki/Integrated_circuit


The later MAX232A is backwards compatible with the original MAX232 but may operate at

higher baud rates and can use smaller external capacitors – 0.1 μF in place of the 1.0 μF

capacitors used with the original device.[1]

The newer MAX3232 is also backwards compatible, but operates at a broader voltage range,

from 3 to 5.5 V.

Voltage levels

It is helpful to understand what occurs to the voltage levels. When a MAX232 IC receives a TTL

level to convert, it changes a TTL Logic 0 to between +3 and +15 V, and changes TTL Logic 1

to between -3 to -15 V, and vice versa for converting from RS232 to TTL. This can be confusing

when you realize that the RS232 Data Transmission voltages at a certain logic state are opposite

from the RS232 Control Line voltages at the same logic state. To clarify the matter, see the table

below. For more information see RS-232 Voltage Levels.

RS232 Line Type & Logic Level RS232 Voltage TTL Voltage to/from MAX232

Data Transmission (Rx/Tx) Logic 0 +3 V to +15 V 0 V

Data Transmission (Rx/Tx) Logic 1 -3 V to -15 V 5 V

Control Signals (RTS/CTS/DTR/DSR) Logic 0 -3 V to -15 V 5 V

Control Signals (RTS/CTS/DTR/DSR) Logic 1 +3 V to +15 V 0 V

LDR:

http://en.wikipedia.org/wiki/RS-232#Voltage_levels

http://en.wikipedia.org/wiki/MAX232#cite_note-0

http://en.wikipedia.org/wiki/Farad

http://en.wikipedia.org/wiki/Baud


LDRs or Light Dependent Resistors are very useful especially in light/dark sensor

circuits. Normally the resistance of an LDR is very high, sometimes as high as 1000 000 ohms,

but when they are illuminated with light resistance drops dramatically.

The animation opposite shows that when the torch is turned on, the resistance of the LDR

falls, allowing current to pass through it.

Circuit Wizard software has been used to display, the range of values of a ORP12, LDR .

When a light level of 1000 lux (bright light) is directed towards it, the resistance is 400R (ohms).

When a light level of 10 lux (very low light level) is directed towards it, the resistance has

risen dramatically to 10.43M (10430000 ohms).

This is an example of a light sensor circuit :

When the light level is low the resistance of the LDR is high. This prevents current from

flowing to the base of the transistors. Consequently the LED does not light.

However, when light shines onto the LDR its resistance falls and current flows into the base of

the first transistor and then the second transistor. The LED lights.


The preset resistor can be turned up or down to increase or decrease resistance, in this way it can

make the circuit more or less sensitive.


SOFTWARE REQUIREMENTS

SOFTWARE REQUIREMENTS

SOFTWARE TOOLS


HI-Tech PIC C Compiler

MPLAB

Protel

Propic

INTRODUCTION TO EMBEDDED ‘C’:

Ex: Hitec – c, Keil – c

HI-TECH Software makes industrial-strength software development tools and C compilers that

help software developers write compact, efficient embedded processor code.

For over two decades HI-TECH Software has delivered the industry's most reliable embedded

software development tools and compilers for writing efficient and compact code to run on the most

popular embedded processors. Used by tens of thousands of customers including General Motors,

Whirlpool, Qualcomm, John Deere and many others, HI-TECH's reliable development tools and C

compilers, combined with world-class support have helped serious embedded software programmers to

create hundreds of breakthrough new solutions.

Whichever embedded processor family you are targeting with your software, whether it is the

ARM, PICC or 8051 series, HI-TECH tools and C compilers can help you write better code and bring it to

market faster.

HI-TECH PICC is a high-performance C compiler for the Microchip PIC micro 10/12/14/16/17

series of microcontrollers. HI-TECH PICC is an industrial-strength ANSI C compiler - not a subset

implementation like some other PIC compilers. The PICC compiler implements full ISO/ANSI C, with the

exception of recursion.

All data types are supported including 24 and 32 bit IEEE standard floating point. HI-TECH PICC

makes full use of specific PIC features and using an intelligent optimizer, can generate high-quality code

easily rivaling hand-written assembler. Automatic handling of page and bank selection frees the

programmer from the trivial details of assembler code.

EMBEDDED “C” COMPILER


ANSI C - full featured and portable

Reliable - mature, field-proven technology

Multiple C optimization levels

An optimizing assembler

Full linker, with overlaying of local variables to minimize RAM usage

Comprehensive C library with all source code provided

Includes support for 24-bit and 32-bit IEEE floating point and 32-bit long data types

Mixed C and assembler programming

Unlimited number of source files

Listings showing generated assembler

Compatible - integrates into the MPLAB IDE, MPLAB ICD and most 3rd-party development tools

Runs on multiple platforms: Windows, Linux, UNIX, Mac OS X, Solaris

MPLAB INTEGRATION

MPLAB Integrated Development Environment (IDE) is a free, integrated toolset for the development

of embedded applications employing Microchip's PIC micro and dsPIC microcontrollers. MPLAB IDE

runs as a 32-bit application on MS Windows, is easy to use and includes a host of free software

components for fast application development and super-charged debugging.

MPLAB IDE also serves as a single, unified graphical user interface for additional Microchip

and third party software and hardware development tools. Moving between tools is a snap, and

upgrading from the free simulator to MPLAB ICD 2 or the MPLAB ICE emulator is done in a flash

because MPLAB IDE has the same user interface for all tools.

Choose MPLAB C18, the highly optimized compiler for the PIC18 series microcontrollers, or try

the newest Microchip's language tools compiler, MPLAB C30, targeted at the high performance

PIC24 and dsPIC digital signal controllers. Or, use one of the many products from third party

language tools vendors. They integrate into MPLAB IDE to function transparently from the MPLAB

project manager, editor and compiler.


EMBEDDED DEVELOPMENT ENVIRONMENT

This environment allows you to manage all of your PIC projects. You can compile, assemble and

link your embedded application with a single step.

Optionally, the compiler may be run directly from the command line, allowing you to compile,

assemble and link using one command. This enables the compiler to be integrated into third party

development environments, such as Microchip's MPLAB IDE.

EMBEDDED SYSTEM TOOLS

ASSEMBLER

An assembler is a computer program for translating assembly language — essentially, a

mnemonic representation of machine language — into object code. A cross assembler (see cross

compiler) produces code for one type of processor, but runs on another. The computational step where an

assembler is run is known as assembly time. Translating assembly instruction mnemonics into opcodes,

assemblers provide the ability to use symbolic names for memory locations (saving tedious calculations

and manually updating addresses when a program is slightly modified), and macro facilities for

performing textual substitution — typically used to encode common short sequences of instructions to run

inline instead of in a subroutine. Assemblers are far simpler to write than compilers for high-level

languages.

ASSEMBLY LANGUAGE HAS SEVERAL BENEFITS

Speed: Assembly language programs are generally the fastest programs around.

Space: Assembly language programs are often the smallest.

Capability: You can do things in assembly which are difficult or impossible in High level

languages.

Knowledge: Your knowledge of assembly language will help you write better programs, even

when using High level languages. An example of an assembler we use in our project is RAD 51.

SIMULATOR

Simulator is a machine that simulates an environment for the purpose of training or research. We

use a UMPS simulator for this purpose in our project.

COMPILER

http://en.wikipedia.org/wiki/High-level_language

http://en.wikipedia.org/wiki/High-level_language

http://en.wikipedia.org/wiki/Compiler

http://en.wikipedia.org/wiki/Subroutine

http://en.wikipedia.org/wiki/Macro

http://en.wikipedia.org/wiki/Opcode

http://en.wikipedia.org/wiki/Cross_compiler

http://en.wikipedia.org/wiki/Cross_compiler

http://en.wikipedia.org/wiki/Object_code

http://en.wikipedia.org/wiki/Machine_language

http://en.wikipedia.org/wiki/Mnemonic

http://en.wikipedia.org/wiki/Assembly_language

http://en.wikipedia.org/wiki/Computer_program


A compiler is a program that reads a program in one language, the source language and

translates into an equivalent program in another language, the target language. The translation

process should also report the presence of errors in the source program.

Source Program → Compiler →Target

Program

↓

Error

Messages

There are two parts of compilation. The analysis part breaks up the source program into

constant piece and creates an intermediate representation of the source program. The synthesis

part constructs the desired target program from the intermediate representation.

COUSINS OF THE COMPILER ARE

1. Preprocessor.

2. Assembler.

3. Loader and Link-editor.

A naive approach to that front end might run the phases serially.

1. Lexical analyzer takes the source program as an input and produces a long string of tokens.

2. Syntax Analyzer takes an out of lexical analyzer and produces a large tree.

Semantic analyzer takes the output of syntax analyzer and produces another tree.

Similarly, intermediate code generator takes a tree as an input produced by semantic analyzer

and produces intermediate code

PHASES OF COMPILER

The compiler has a number of phases plus symbol table manager and an error handler.


Input Source

Program

↓

Lexical

Analyzer

↓

Syntax

Analyzer

↓

Symbol

Table

Manager

Semantic

Analyzer

Error

Handler

↓

Intermediate

Code Generator

↓

Code

Optimizer

↓

Code Generator

↓

Out Target


Program

FABRICATION DETAILS

The fabrication of one demonstration unit is carried out in the following sequence.

Finalizing the total circuit diagram, listing out the components and sources of procurement.

Procuring the components, testing the components and screening the components.

Making layout, repairing the interconnection diagram as per the circuit diagram.

Assembling the components as per the component layout and circuit diagram and soldering

components.

Integrating the total unit, intertwining the unit and final testing the unit.

DESIGN OF EMBEDDED SYSTEM

Like every other system development design cycle embedded system too have a design cycle. The

flow of the system will be like as given below. For any design cycle these will be the implementation

steps. From the initial state of the project to the final fabrication the design considerations will be taken

like the software consideration and the hardware components, sensor, input and output. The electronics

usually uses either a microprocessor or a microcontroller. Some large or old systems use general-purpose

mainframe computers or minicomputers.

USER INTERFACES

User interfaces for embedded systems vary widely, and thus deserve some special comment. User

interface is the ultimate aim for an embedded module as to the user to check the output with complete

convenience. One standard interface, widely used in embedded systems, uses two buttons (the absolute

minimum) to control a menu system (just to be clear, one button should be "next menu entry" the other

button should be "select this menu entry").

Another basic trick is to minimize and simplify the type of output. Designs sometimes use a

status light for each interface plug, or failure condition, to tell what failed. A cheap variation is to have

two light bars with a printed matrix of errors that they select- the user can glue on the labels for the

language that he speaks. For example, most small computer printers use lights labeled with stick-on labels


that can be printed in any language. In some markets, these are delivered with several sets of labels, so

customers can pick the most comfortable language.

In many organizations, one person approves the user interface. Often this is a customer, the

major distributor or someone directly responsible for selling the system.

PLATFORM

There are many different CPU architectures used in embedded designs such as ARM, MIPS,

Coldfire/68k, PowerPC, X86, PIC, 8051, Atmel AVR, H8, SH, V850, FR-V, M32R etc.

This in contrast to the desktop computer market, which as of this writing (2003) is limited to just

a few competing architectures, mainly the Intel/AMD x86, and the Apple/Motorola/IBM PowerPC, used

in the Apple Macintosh. With the growing acceptance of Java in this field, there is a tendency to even

further eliminate the dependency on specific CPU/hardware (and OS) requirements.

Standard PC/104 is a typical base for small, low-volume embedded and ruggedized system design. These

often use DOS, Linux or an embedded real-time operating system such as QNX or Inferno.

A common configuration for very-high-volume embedded systems is the system on a chip, an

application-specific integrated circuit, for which the CPU was purchased as intellectual property to add to

the IC's design. A related common scheme is to use a field-programmable gate array, and program it with

all the logic, including the CPU. Most modern FPGAs are designed for this purpose.

TOOLS

Like typical computer programmers, embedded system designers use compilers, assemblers, and

debuggers to develop embedded system software. However, they also use a few tools that are unfamiliar

to most programmers.

Software tools can come from several sources:

Software companies that specialize in the embedded market.

Ported from the GNU software development tools.

http://en.wikipedia.org/wiki/GNU

http://en.wikipedia.org/wiki/Debugger

http://en.wikipedia.org/wiki/Assembler

http://en.wikipedia.org/wiki/Compiler

http://en.wikipedia.org/wiki/FPGA

http://en.wikipedia.org/wiki/Field-programmable_gate_array

http://en.wikipedia.org/wiki/Application-specific_integrated_circuit

http://en.wikipedia.org/wiki/System_on_a_chip

http://en.wikipedia.org/wiki/Inferno

http://en.wikipedia.org/wiki/QNX

http://en.wikipedia.org/wiki/Linux

http://en.wikipedia.org/wiki/DOS

http://en.wikipedia.org/wiki/PC/104

http://en.wikipedia.org/wiki/Java_programming_language

http://en.wikipedia.org/wiki/Apple_Macintosh

http://en.wikipedia.org/wiki/PowerPC

http://en.wikipedia.org/wiki/IBM

http://en.wikipedia.org/wiki/Motorola

http://en.wikipedia.org/wiki/Apple_Computer

http://en.wikipedia.org/wiki/X86

http://en.wikipedia.org/wiki/AMD

http://en.wikipedia.org/wiki/Intel

http://en.wikipedia.org/wiki/As_of_2003

http://en.wikipedia.org/wiki/M32R

http://en.wikipedia.org/wiki/FR-V

http://en.wikipedia.org/wiki/V850

http://en.wikipedia.org/wiki/SuperH

http://en.wikipedia.org/wiki/H8

http://en.wikipedia.org/wiki/Atmel_AVR

http://en.wikipedia.org/wiki/8051

http://en.wikipedia.org/wiki/PIC_microcontroller

http://en.wikipedia.org/wiki/X86

http://en.wikipedia.org/wiki/PowerPC

http://en.wikipedia.org/wiki/68k

http://en.wikipedia.org/wiki/Coldfire

http://en.wikipedia.org/wiki/MIPS

http://en.wikipedia.org/wiki/ARM_architecture

http://en.wikipedia.org/wiki/CPU_architecture


Sometimes, development tools for a personal computer can be used if the embedded processor is

a close relative to a common PC processor. Embedded system designers also use a few software tools

rarely used by typical computer programmers.

One common tool is an "in-circuit emulator" (ICE) or, in more modern designs, an embedded

debugger. This debugging tool is the fundamental trick used to develop embedded code. It replaces or

plugs into the microprocessor, and provides facilities to quickly load and debug experimental code in the

system. A small pod usually provides the special electronics to plug into the system. Often a personal

computer with special software attaches to the pod to provide the debugging interface.

Another common tool is a utility program (often home-grown) to add a checksum or CRC to a

program, so it can check its program data before executing it.

An embedded programmer that develops software for digital signal processing often has a math

workbench such as MathCad or Mathematics to simulate the mathematics.

Less common are utility programs to turn data files into code, so one can include any kind of data

in a program. A few projects use Synchronous programming languages for extra reliability or digital

signal processing.

DEBUGGING

Debugging is usually performed with an in-circuit emulator, or some type of debugger that can

interrupt the microcontroller's internal microcode. The microcode interrupt lets the debugger operate in

hardware in which only the CPU works. The CPU-based debugger can be used to test and debug the

electronics of the computer from the viewpoint of the CPU. This feature was pioneered on the PDP-11.

As the complexity of embedded systems grows, higher level tools and operating systems are

migrating into machinery where it makes sense. For example, cell phones, personal digital assistants and

other consumer computers often need significant software that is purchased or provided by a person other

than the manufacturer of the electronics.

In these systems, an open programming environment such as Linux, OSGi or Embedded Java is

required so that the third-party software provider can sell to a large market.

OPERATING SYSTEM

http://en.wikipedia.org/wiki/Embedded_Java

http://en.wikipedia.org/wiki/OSGi

http://en.wikipedia.org/wiki/Linux

http://en.wikipedia.org/wiki/Personal_digital_assistant

http://en.wikipedia.org/wiki/Cellphone

http://en.wikipedia.org/wiki/PDP-11

http://en.wikipedia.org/wiki/Interrupt

http://en.wikipedia.org/wiki/In-circuit_emulator

http://en.wikipedia.org/wiki/Debugging

http://en.wikipedia.org/wiki/Digital_signal_processing


http://en.wikipedia.org/wiki/Synchronous_programming_language

http://en.wikipedia.org/wiki/Mathematica

http://en.wikipedia.org/wiki/MathCad


http://en.wikipedia.org/wiki/Cyclic_redundancy_check


Embedded systems often have no operating system, or a specialized embedded operating system

(often a real-time operating system), or the programmer is assigned to port one of these to the new

system.

BUILT- IN SELF- TEST

Most embedded systems have some degree or amount of built-in self-test.

There are several basic types.

1. Testing the computer.

2. Test of peripherals.

3. Tests of power.

4. Communication tests.

5. Cabling tests.

6. Rigging tests.

7. Consumables test.

8. Operational test.

9. Safety test.

START UP

All embedded systems have start-up code. Usually it disables interrupts, sets up the electronics,

tests the computer (RAM, CPU and software), and then starts the application code. Many embedded

systems recover from short-term power failures by restarting (without recent self-tests). Restart times

under a tenth of a second are common.

Many designers have found a few LEDs useful to indicate errors (they help troubleshooting). A

common scheme is to have the electronics turn on all of the LED(s) at reset (thereby proving that power is

applied and the LEDs themselves work), whereupon the software changes the LED pattern as the Power-

On Self Test executes. After that, the software may blink the LED(s) or set up light patterns during

normal operation to indicate program execution progress or errors. This serves to reassure most

http://en.wikipedia.org/wiki/Power-On_Self_Test

http://en.wikipedia.org/wiki/Power-On_Self_Test

http://en.wikipedia.org/wiki/Troubleshooting

http://en.wikipedia.org/wiki/Light-emitting_diode

http://en.wikipedia.org/wiki/Real-time_operating_system

http://en.wikipedia.org/wiki/Embedded_operating_system

http://en.wikipedia.org/wiki/Operating_system


technicians/engineers and some users. An interesting exception is that on electric power meters and other

items on the street, blinking lights are known to attract attention and

vandalism.

COMPONENTS USED

1. Step Down Transformer :( 230 /12V) – 2 No.

2. Diodes :( 1N4007) – 8 No.

3. Capacitors : 1000µF – 2 No., 22pF- 4 Nos.

4. Regulators : 7805 – 2 No., 7812 – 1No.

5. Light Emitting Diodes : LED`s – 6Nos.

6. ARM7LPC2148 : 16f877A – 2 Nos.

7. Crystal Oscillator : 4MHz – 2Nos.

8. Resistors :330 Ω – 2Nos.,10 KΩ- 2 Nos., 1 KΩ – 6Nos.,


9. Zigbee

10. Humidity sensor

11. ldr


RESULT


RESULT: development of board light gateway with sensor network works sucessfully.the overall circuit is designed and verified


CONCLUSION


CONCLUSION:

Along with the development of science and technology, information

technologies have been used in many fields. Energy problem is a social focus

nowadays. Energy-saving and environmental protection is the policy of

China. According to our national conditions, road lighting system of our

country is still emerging technologies. In this paper, to reach the purpose of

energy saving, it introduces an information method to deal with the problem

of road lighting. The road lighting intelligent control system is based on

wireless network control that can implement real-time monitoring for road

lighting, intelligent work without manual intervention.


REFERENCES

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[2] M.Wyss, “Why is earthquake prediction research not progressing faster?” Technonophysics, vol 338,

pp.217-223, 2001.

[3] Yong Li, “Modeling earthquake indexes derived from the earthquake warning sustem upon the

planet earth,” Physics, Mechanics & Astronomy,vol.53, pp.2293-2299, December 2010.

[4] Baorong Luo, “The recent progress in astroseismology study in Yunnan,” The Yunnan Observatory,

vol.1,pp.47-54,2002 (In Chinese).

[5] Daoyi Xu, Wenzhen Zheng, Zhensheng An, Huiwen Sun, “The Movement of Celestial Bodies and

Earthquake Forecast,” Beijing: Earthquake Press,1980. Pp.63–77 (in Chinese).

[6] Guodong Zhang, Yanben Han, Fuyuan Zhao, “Earthquake precursors detected by astronomical

observations,” Acta Seismologica Sin, 2002, pp: 82–89(In Chinese).

[7] Yongnian Zhou, “Developing trend and tasks of strong motion observation,” World Information on

Earthquake Engineering, vol 17, pp.19-26, December 2001(In Chinese). [8] Zhenghua Zhou,Yongnian

Zhou, Tao Lu, Cheng Yang, “Study on characteristics of vertical ground motion,” Eerthquake engineering

and engineering vibration, vol 23,pp. 25-29, June 2003 (In Chinese).

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