Any-Rate Precision Clocks

2

Wireline Market Overview

♦ Analog ModemsLarge installed base and growth in embedded applications

♦ VoiceTransition to VoIP to reduce service provider cost-of-ownership

♦ TimingLarge, established, diversified market

♦ PowerIncreasing electronics content driving higher power density in power supplies, motor control and lighting

Modem Voice

Timing

Power

0

500

1,000

1,500

2,000

2,500

3,000

Potential Market Size (in millions)

Market-Share Leader

Emerging Player

3

Wireline End Markets

♦ Common customer baseTelecom customers:voice, timing and powerConsumer customers:modem, voice and timingPC customers:modem, voice and power

♦ Common technologySLIC and isolation technologies:modem and voiceHigh-voltage technologies:power and voice

♦ Common market opportunitiesMotor control:power and high-voltageVoIP and telecom:high-voltage, voice and timingCommunications: modem, voice, timing and power

Common Technology andCustomer Needs

4

Core Competency

♦ Mixed-signal innovation in CMOS

♦ Unique phase-locked loop (PLL) technology

♦ Functional and system integration that enables first of a kind high-voltage architectures

5

Wireline Portfolio

♦ ModemISOmodem®

Silicon DAA♦ Voice

ProSLIC®

Voice DAA♦ Power

Digital IsolatorsPower-over-Ethernet (PoE)

♦ TimingFrequency Control SolutionsPrecision Clock ICsSiPHY® Physical Layer ICs

Applications:

Satellite Set-Top BoxesVoice-over-Broadband DSL ModemsFax MachinesSONET/SDH Optical Port Cards Communications EquipmentEnterprise ComputingTest & Measurement

6

Timing Market Challenges

♦ Timing system complexity increasing in next-generation networking, wireless infrastructure and broadcast video equipment

♦ Traditional solutions requireMany discrete high-performance componentsComplex board layout and noise isolationExtensive PLL expertise

♦ Clock IC designers must provide high performance, high integration and simplified design to help OEMs

Reduce total design costsSpeed time-to-marketImprove performance in the end product

Traditional Multi-Frequency Design

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Introducing Si53xx Any-Rate Precision Clock

♦ Family of nine highly-integrated, ultra-low jitter clock multiplier ICs

♦ DSPLL-based architecture enables any-rate frequency synthesis

♦ Improves performance and simplifies design

8

Si53xx—High-Performance Applications

Next-Generation Networking Wireless Base Stations

Test and Measurement

HDTV Video

High-Speed Data Acquisition

9

The DSPLL Advantage

♦ Patented DSPLL architecture provides frequency agilityEliminates need for discrete VCXO/VCSOs

♦ Ultra-low jitter generation 0.3 ps rms: 12 kHz to 20 MHz

♦ User-selectable loop bandwidth allows jitter performance optimization

♦ Integrated loop filter minimizes PLL sensitivity to noise

♦ Simplifies PLL design and layout

Clock Input

Clock Output

Optional Crystal/Reference Clock (required for jitter attenuation)

PhaseDetector A/D

NDigitalSignal

Processing DCO

DSPLL

Freq..

DN3

Freq..

DN2

Freq..

DN1

10

Si53xx—Any-Rate Frequency Synthesis

♦ DSPLL enables any-rate operation over a wide range of frequenciesInput: 2 kHz to 710 MHzOutput: 2 kHz to 945 MHz; select frequencies to 1.4 GHz

♦ No external component changes required

♦ Frequency flexibility allows design reuse and reduces BOM

11

Si53xx—Ultra Low Jitter/Phase Noise

♦ Jitter and phase noise comparable to best-in-class VCXO/VCSO PLLs

Configuration: CLKIN = 155.52 MHz, CLKOUT = 622.08 MHz, 800 Hz Loop Bandwidth

12

Si53xx—Feature Rich and Easy to Use♦ Selectable loop bandwidths from

60 Hz to 8.4 kHzAdjustable jitter attenuation without changing componentsOptimizes jitter performance at the application level

♦ Fault detection for clock inputsAlarm generation for loss-of-signal (LOS) and frequency offset (FOS)

♦ Hitless switchingEnables input clock switching without causing disturbance on output

♦ Selectable output formats: LVPECL, LVDS, CML or CMOS

Eliminates discrete voltage level translators

13

Si53xx vs. Competition

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Si53xx Any-Rate Precision Clock Family

12Si5316

54Si5367

54Si5365

22Si5325

22Si5322

54Si5368

54Si5366

22Si5326

22Si5323

Clock Outputs

Clock Inputs

Pin Control

µP Control

Clock Multiplication

Jitter AttenuationPart #

15

Si53xx—Summary

♦ Industry’s first low jitter, any-rate clock multiplier/jitter attenuator family♦ Industry-leading jitter performance♦ Highly integrated and easy to use

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