Announcements Troubles with Assignments… –Assignments are 20% of the final grade –Exam...

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Announcements • Troubles with Assignments… – Assignments are 20% of the final grade – Exam questions very similar (30%) • Deadline extended to 5pm Fridays, if you need it. – Place in my mailbox (rm 217), or under my door (rm 222) – Any later than that will not be graded • Come and talk to me if you need help. • mid-term: Thursday, October 27 th
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Page 1: Announcements Troubles with Assignments… –Assignments are 20% of the final grade –Exam questions very similar (30%) Deadline extended to 5pm Fridays, if.

Announcements• Troubles with Assignments…

– Assignments are 20% of the final grade– Exam questions very similar (30%)

• Deadline extended to 5pm Fridays, if you need it.– Place in my mailbox (rm 217), or under my door (rm

222)– Any later than that will not be graded

• Come and talk to me if you need help.• mid-term: Thursday, October 27th

Page 2: Announcements Troubles with Assignments… –Assignments are 20% of the final grade –Exam questions very similar (30%) Deadline extended to 5pm Fridays, if.

Adam Riess, Brian Schmidt and Saul Perlmutter

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Lecture 10 Overview

• Transistors (continued)

• The common-emitter amplifier

• Amplifier parameters

• Black box amplifier models

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Summary of useful equations

• Basic DC operating conditions:

CCCCC

VVSC

CE

BC

CBE

RIVV

eII

II

II

III

TBE

/

1

• Add a small signal:

T

Cm

bembeT

Cc

V

Ig

vgvV

Ii

mme

bee

mb

be

ggi

vr

gi

vr

1

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Using small signal models

1) Determine the DC operating conditions (in particular, the collector current, IC)

2) Calculate small signal model parameters: gm, rπ, re

3) Eliminate DC sources: replace voltage sources with shorts and current sources with open circuits

4) Replace BJT with equivalent small-signal model. Choose most convenient depending on surrounding circuitry

5) Analyze

e.g. Tmodel

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Voltage gain with small signal model

Find the gain using a small signal model:

vbe vbe

+

-

+

-

ic

re

RC

Cmbe

c

mme

e

C

ee

Ce

be

c

eebe

CeCe

Ccc

Rgv

v

ggr

r

R

ri

Ri

v

v

riv

RiRi

Riv

gain voltageso

1

gain Voltage

ic

vc

eliminate DC sources and apply T-model

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How to build a Real Common emitter amplifier

• Why bother with 2 voltage supplies? • Use a voltage divider R2/R1 to provide base-emitter voltage to correctly bias the transistor.

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DC condition: the voltage divider

• The voltage divider should provide sufficient voltage to place the transistor in active mode (base-emitter forward biased):

Cbb I

RR

V10

21

V6.0

V6.0

EEB

EBBE

RIV

VVV

• Current through resistors should be >10 times base current for stability

BB

EE

BBB

V

RI

RR

R

RR

RVV

V6.0 so

now

21

1

21

1

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Amplifier specifications

• What other parameters of an amplifier do we care about?– Voltage gain– Dynamic range– Frequency response (bandwidth)– Input impedance– output impedance

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Voltage Gain• Voltage gain• Use small signal model (short Voltage sources and capacitors)

1 since

)(

CeCcc

Eeeb

RiRiv

Rriv

Ee

C

b

c

in

out

Rr

R

v

v

v

v

E

C

b

c

R

R

v

v

voltage gain

usually re<<RE

• Voltage gain is only defined by resistors RC and RE

ground

ground

αie

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Frequency response (Bandwidth)

• Normally interested in providing a small, AC signal to the base

• Use capacitors to remove ("block") any low frequency (DC) component ("capacitively couple the signal to the base") which could affect the bias condition

• C1 forms a high-pass filter with R1in parallel with R2 (Assuming the AC impedance into the base is large).

• Cut off frequency ω0=1/RC, so to remove frequencies <fmin:

21

21min

1

2

1

RRRR

f

C

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Frequency response (Bandwidth)

• Also worthwhile to place a capacitor on the output

• C2 forms a high pass filter with RL.

• Cut off frequency ω0=1/RC, so to remove frequencies <fmin:

LRfC

min2 2

1

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Dynamic Range

• Maximum voltage output = Vbb

• Minimum = 0• Beyond this the signal becomes 'clipped' or distorted• To get the maximum possible voltage swing, both positive and negative, set VC=0.5 VBB • Maximum 'dynamic range'

VC

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rb

rOUT

Input impedance• Consider the circuit without the voltage divider resistors. What's the small signal (AC) input impedance at the base, rb?

• Including voltage divider resistors in parallel

• Input signal sees a total input impedance rIN= R1 // R2 // rb

RB

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rb

ROUT

Output impedance

Co

Co

o

oOUT R

i

Ri

i

vr

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• If RL=10kΩ and we want a low frequency cutoff of 20Hz, What is C2?• If VBB=15V and IC=2mA what is the output impedance?

Co

Co

o

oOUT R

i

Ri

i

vr

BBC VV 5.0

LRfC

min2 2

1

21

21min

1

2

1

RRRR

f

C

E

C

b

c

R

R

v

v

BB

EE

V

RI

RR

R V6.0

21

1

Cbb I

RR

V10

21

DC condition

Frequency responseImpedance Gain/Dynamic range

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• Why do we care about the input and output impedance?

• Simplest "black box" amplifier model:

Impedances

RIN

ROUT

VIN AVINVOUT

• The amplifier measures voltage across RIN, then generates a voltage which is larger by a factor A

• This voltage generator, in series with the output resistance ROUT, is connected to the output port.

• A should be a constant (i.e. gain is linear)

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• Attach an input - a source voltage VS plus source impedance RS

Impedances

RIN

ROUT

VINAVIN

VOUT

• Note the voltage divider RS + RIN.

• VIN=VS(RIN/(RIN+RS)

• We want VIN = VS regardless of source impedance

• So want RIN to be large.

• The ideal amplifier has an infinite input impedance

VS

RS

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• Attach a load - an output circuit with a resistance RL

Impedances

• Note the voltage divider ROUT + RL.

• VOUT=AVIN(RL/(RL+ROUT)

• Want VOUT=AVIN regardless of load

• We want ROUT to be small.

• The ideal amplifier has zero output impedance

RIN

ROUT

VINAVIN VOUTVS

RS

RL

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Operational Amplifier

• Integrated circuit containing ~20 transistors

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Operational Amplifier

• An op amp is a high voltage gain amplifier with high input impedance, low output impedance, and differential inputs.• Positive input at the non-inverting input produces positive output, positive input at the inverting input produces negative output. • Can model any amplifier as a "black-box" with a parallel input impedance Rin, and a voltage source with gain Av in series with an output impedance Rout.

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Ideal op-amp• Place a source and a load on the model

• Infinite internal resistance Rin (so vin=vs).• Zero output resistance Rout (so vout=Avvin).• "A" very large• No saturation• iin=0; no current flow into op-amp

-

+

voutRL

RS

So the equivalent circuit of an ideal op-amp looks like this:

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Schematics An amplifier will not work without a power supply. And a more complete diagram looks like the figure below, which also indicates the standard pin configuration.

-

+

out

V+

V-

2

3

4

6

7 1

4 5

8

top view

PinFunction

2 Inverting input

3 Non-inverting input

4 V- supply

6 Output

7 V+ supply

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Measuring Impedances

• Assuming you can only vary RL and RS, how would you measure the input and output impedances of the amplifier?

RIN

ROUT

VINAVIN VOUTVS

RS

RL

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Measuring Impedances

• With the black box model, it is simple to measure the input and output impedances of an amplifier

• To measure the input impedance, vary RS until the output voltage has dropped to half ; then RS=RIN= input impedance

•To measure the output impedance, vary RL until the output voltage has dropped to half ; then RL=ROUT= output impedance

RIN

ROUT

VINAVIN VOUTVS

RS

RL

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Cascaded Amplifiers

• Easiest way to increase amplification is to link amplifiers together

RIN1

ROUT1

VIN1A1VIN1 VOUT1 RIN2

ROUT2

VIN2A2 VIN2 VOUT2

• Ideal amplifiers; VOUT2=A1A2VIN1

• In reality, take account of voltage divider action due to input and output impedances