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Transcript of AND DESIGN 93 - GBV · ANDDESIGN93 PROCEEDINGSOFTHE ... Balteanu and G. Kovacs 1305 42.4 Circuit...
CIRCUIT THEORY
AND DESIGN 93
PROCEEDINGS OF THE
11TH EUROPEAN CONFERENCE
ON CIRCUIT THEORY AND DESIGN - ECCTD '93
DAVOS, SWITZERLAND,
AUGUST 30 - SEPTEMBER 3, I993
PART II
edited by
HERVE DEDIEU
Ecole Polytechnique Federate de Lausanne
Departement d'Electricite
CIRC
Lausanne, Switzerland
1993
ELSEVIER
AMSTERDAM • LONDON • NEW YORK • TOKYO
CONTENTSxxi
27.2 Chaotic Traffic Flow in Local Area Networks
J. H. B. Deane and D. J. Jejferies and C. Smythe 843
27.3 Design of the Noise Generator Using Chaotic Circuit
K. Suzuki and Yoshifumi Nishio and Shinsaku Mori 849
27.4 A Structural Technique for Chaos Prediction in the General Three-RegionPiecewise-Linear Dynamical SystemRoberto Gene.sio and Wenhao Li and Alberto Tesi 855
27.5 Chaos Shift-Keying: A Technique for Modulation and Demodulation of
Chaotic Carriers
Herve Dedieu and Michael Peter Kennedy and Martin Hasler 861
27.6 Laboratory Environment for Controlling Chaotic Electronic SystemsA. Dqbrowski and Z. Galias and Maciej J. Ogorzalek and L.O. Chua
. . .867
28 New Approaches to Circuit Design 873
28.1 Generalization Topological Formulae for Symbolic or Numeric-Symbolic
Generation of Network Functions
Mihai lordache 873
28.2 A DC Approach for Analog Fault Dictionary Determination
Jerzy Rutkowski 877
28.3 Decomposition Approach to Analog Fault Location
/. Rutkowski 881
28.4 A Framework for the Object-Oriented Design of Signal Processing and
Neural Network Software
X, Nie and R, Unbehauen 885
28.5 An Analog Fuzzy Logic Inference EngineLiliane Peters and S. Guo and R. Camposano 891
28.6 The Digital Transfer Operator and its Application to Signature Determi¬
nation for Built-in Self Test
A. N, Farrall and A. R. Fleming and A. G. Hall and G. E. Taylor . ... 895
29 CMOS Integrated Circuits 901
29.1 A CMOS Voltage-Controlled Floating Resistor
George Wilson and P. K. Chan 901
29.2 Non-Slew Rate Limited CMOS Op-Amp Configurations
Erik Bruun 907
29.3 A CMOS Current Conveyor Based Gyrator
Igor Mucha 911
29.4 Temperature-Drift Compensation of MOS Transconductances
Alessandro Robertini 917
29.5 A New CMOS Current Mirror Circuit with Reduced Distortion for High
Bandwidth ApplicationsR. Balmford and W. Redman- White 923
xxii CONTENTS
30 Switched Capacitance Networks 2 929
30.1 Analysis and Synthesis of Passive Linear Steady-State SC Networks for
Image ProcessingMark N. Seidel 929
30.2 Synthesis of Optimum Switched-Capacitor State-Space Decimators
Paulo J. Santos and Jose E. Franca and Jorge A. Martins 935
30.3 Fast Analysis of Nonideal Switched Capacitor Circuits Using Convolution
Hannu Jokinen and Martti Valtonen and Timo Veijola 941
30.4 High Frequency Switched Capacitor FIR Filters Using Improved Parallel
Cyclic Type Circuits
Yoshinori Hirata and Kyoko Kato and Toshiharu Kikui and Nobuaki Taka-
hashi and Tsuyoshi Takebe 947
30.5 Symbolic Analysis Approach to Settling Time Minimization in SC Net¬
works
A. Handkiewicz and P. Sniatala 953
30.6 Frequency Domain Analysis of Switched Networks by Generalized Transfer
Functions
Dalibor Biolek and Karel Zaplatdek 957
31 Digital Filter Implementations 963
31.1 A Technique for the Improvement of Minimax Optimization Algorithmsand its Application in the Design of Recursive Digital Filters
A. Antoniou 963
31.2 A Fast WLS Algorithm to Design Minimax FIR Filters
Michele L. Marchesi and P. Witzgall 969
31.3 Synthesis of Optimal Nyquist Type Signals Using Parks-McClellan Ap¬proachB. K. Turan and I. C. Goknar 975
31.4 Parallel Structures of OS CFAR Processors
Vera Behar and Christo Kabakchiev 981
31.5 On Low Power Consumption of Digital Filter Implementations
Predrag Vidas and Branko Jeren 985
31.6 Nonlinear Optimization Approach to Filter Design with Real AmplifiersVladimir Cosic and Neven Mijat 991
32 Phase Locked Loops 997
32.1 Two-Phase Lock-In Amplifier with Phase-Locked Loop Vector TrackingBrian M. McDonald and Robert B. Northrop 997
32.2 A Programmable All Digital Phase Locked LoopD. Shin and John K. Pollard 1003
32.3 Current Mode Phase Locked LoopT. Koito and M. Yamamoto 1009
CONTENTS xxiii
32.4 Small-Signal Analysis of Sub- Super- and Supersub-Harmonic Injection-Locked Oscillators Through Secondary Simplification TechniqueEnrico F. Calandra and Antonino M. Sommariva 1015
32.5 Discrete-Time Phase-Locked Loop as a Source of Random Numbers
Mieczyslaw Jessa 1021
33 Signal Processing 1027
33.1 Application of LMS-Order Updating in System Identification and LPC of
SpeechK. A. Mayyass and M. A. Khdsawneh 1027
33.2 A Comparative Study of Two Fixed-Point DSPs Implementing Algorithmsfor Parameter Coding of SpeechNick Tsakalos and Evangelos Zigouris 1033
33.3 On the Computation of the Fast Cosine Transform
C. A. Christopoulos and A. N. Skodras 1037
33.4 Maximum Entropy Algorithm for Spectral Estimation Problem with Gap8Roman Ugrinovsky 1043
33.5 Time-Varying Maximum Entropy Spectral Estimation
A. S, Kayhan 1047
33.6 On Convergence Behavior of Symmetric Weighted Median Filters
Ruikang Yang and Moncef Gabbouj and Yrjo Neuvo 1053
34 Special Session: Fundamental Aspects of Nonlinear Circuits and Sys¬tems 1059
34.1 Equilibrium Points of Mutually Coupled Symmetrical Neural Networks
Norikazu Takahashi and Tetsuo Nishi 1059
34.2 A Polynomial-Time Algorithm for Determining Quadratic Lyapunov Func¬
tions for Nonlinear SystemsLieven Vandenberghe and Stephen Boyd 1065
34.3 Approximate Methods for Solving Nonlinear Dynamic Circuit Equations
Using Differential InequalitiesStanislaw Mitkowski and Maciej J. Ogorzalek 1069
34.4 A New Algorithm Detecting All Branches of Driving-Point Characteristics
in PWL Resistive Circuits
Stefano Pastore and Amedeo Premoli 1075
35 Design Tools for Logical Circuits 1081
35.1 Optimization of Mutiple-Valued Logic Functions
AH Massoud Haidar and Mititada Morisue 1081
35.2 A Circuit Design of 54 x 54 Bit Multiplier Using New 9-2 and 6-2 Com¬
pressors
Minkyu Song and Kihong Noh and Youngserk Shim 1087
XXIVCONTENTS
35.3 An ODE Based Parallel Switch-Level Simulator
Bengt-Arne Molin and Sven Mattisson 1091
35.4 A General Approach to Testability for Digital Networks
A. G. Hall and G. E. Taylor 1097
35.5 The Integral Equation Method (IEM) as a Powerful Tool for Transient
AnalysisM. N. Sabry and M. S. Tawfik and H. Eltahawy and S. Garcia-Sabiro and
J. Besnard 1103
35.6 A Generalized Approach for Merging Nets in Gate-Matrix Layout
Chi-Yu Mao and Yu Hen Hu 1109
36 CMOS and Bipolar Integrated Circuits 1113
36.1 Principles of Compensation of Thermal Power Feedback in RF-Amplifierswith Bipolar Transistors
Eduard Schurack and Alfons Gottwald 1113
36.2 BICMOS High Frequency Linear Bandpass-Based Current-Mode Oscillator
for 3V Supply OperationJaime Ramirez-Angulo and E. Sanchez-Sinencio 1119
36.3 Low Area Accurate CMOS Current Schmitt TriggerGuiseppe Di Cataldo and G. Palmisano and G. Palumbo 1123
36.4 Analog BiCMOS Continuous-Time Delay-Line with Adjustable Delay-TimeAndrea Baschirotto and R. Alini and R. Castello and F, Montecchi ....
1129
36.5 A CMOS Four-Quadrant Analog Multiplier and its Application to Nonlin¬
ear Functions Generation
Fuji Yang and Patrick Loumeau 1135
36.6 A Monolithic High-Speed Bipolar Charge Sensitive Preamplifier for Calorime¬
ters ApplicationsAndrea Baschirotto and M. Bosetti and R. Castello and A. Gola and G,
Pessina and P, Rancoita and M. Rattagi and M. Redaelli and G. Terzi. .
1111
37 Linear Circuits 1147
37.1 Pole-Zero Cancellation and State/Output EquationsS. Atadan 1147
37.2 Waveform Relaxation as a Bounding Algorithm for RC Linear Circuits
Corneliu A. Marinov and Jukka-Pekka Santanen 1153
37.3 Application of LC One-Ports in Phase Load Symmetrization in N-Phase
Systems with Nonsinusoidal Periodical Waveforms
Marian Pasko 1159
37.4 A New Method for Solving Broadband Matching Problems
Graham Rhodes and Herve Dedieu 1165
37.5 Broadband Matching of a Passive Lowpass Load by Automatic Determi¬
nation of the Equal Minima Gain Function
Catherine Dehollain and Herve Dedieu 1171
CONTENTS xxv
38 Special Session: Periodically Switched Networks with Internally Con¬
trolled Switches 1 1177
38.1 Realization of a Switched-Capacitor AC-AC Converter
F. Ueno and T. Inoue and I. Oota and I. Harada 1177
38.2 Novel Type DC-AC Converter Using a Switched Capacitor Transformer
F. Ueno and T. Inoue and I. Oota and I. Harada 1181
38.3 Computer-Aided Analysis of Class E Cyclically Switching Circuits
A. Ioinovici 1185
38.4 Analysis and Modelling of Periodically-Switched Networks by Systematic
Decomposition of Their Circuit GraphsC. K. Tse and Y. S. Lee 1189
39 Electronic Circuits 1193
39.1 Sampling of Sinusoidal Signals for Analog-to-Digital Converter Testing
P. Carbone and D. Petri 1193
39.2 Simulation of Op-Amp Nonlinearities in Switched Capacitor S A Convert¬
ers
Dominique Morche and Freddy Balestro and Patrice Senn 1199
39.3 Realization of a Resonant AC-AC Converter Equipped with a Field-Controlled
ThyristorAdrian Zuckerberger and A. Alexandrovitz 1205
39.4 Even Harmonic Resonant ZVS-Class E Tuned Power Amplifier without RF
Choke
Minoru Iwadare and Shinsaku Mori and Kazunaga Ikeda 1211
39.5 Wide Range Single Resistor Tunable RC Current-Mode Oscillator
Dan Stiurca 1217
39.6 Measurements on an Active Resonant Circuit Using GaAs MESFETs for
Microwave Filter ApplicationsDavid Haigh 1223
40 Special Session: Image Sequence Coding 1229
40.1 A Coding Algorithm for the 3-D Hierarchical Subband Representations of
the Sequences of Images
Laurian Margarit and Radu Zaciu 1229
40.2 Generic Coding of Video Using Packet Wavelets and Adaptive Motion Es¬
timation
Frederic Dufaux and Touradj Ebrahimi and Murat Kunt 1235
40.3 Architectural Analysis of Region-Based Motion Estimation Algorithms for
Image Sequence Coding
F. Charot and C. Labit and P. Lemonnier and H. Nicolas 1241
40.4 Morphological Segmentation-Based Coding of Image Sequences
P. Salembier and L. Torres and M. Pardas and F. Marques and P. Hierro
and A. Gasull1245
xxvi CONTENTS
40.5 Vector Entropy Coding for Waveform Image Compression
B. Macq and P. Delogne 1251
40.6 Noiseless Vector Coding of DCT-Quantized Video Signals: a Modified
Pyramid Vector Coder
R. Sannino 1257
41 Nonlinear Circuits 1 1263
41.1 A Note on Hidden Modes
Liviu Gora§ 1263
41.2 New Analytical Approach for Predicting Nonlinear Performance of Continuous-
Time OTA-C Bandpass Filters
Andrzej Czarniak and Stanislaw Szczepanski 1267
41.3 Comparison of Nonlinear Behavior in Selected CMOS Transconductors Us¬
ing Differential Pairs
Andrzej Czarniak and Stanislaw Szczepanski 1271
41.4 Optimum Design of Nonlinear Microwave Circuits. Application to Fre¬
quency MultipliersM. C. E. Yagoub and H. Baudrand 1275
41.5 An Interval Approach To Finding All Equilibrium Points of Some Nonlinear
Resistive Circuits
Zygmunt Garczarczyk 1281
41.6 Relating Pseudorandom Signal Generators to Chaos in Non-linear DynamicSystems
Anthony C. Davies 1287
i
42 Design Tools 1 1293
42.1 Computer Design and Optimization of Switched-Capacitor Ladder Filters
Using Simple Performance Measures
Arnold Muralt and George S. Moschytz 1293
42.2 Transient Analysis of Circuits Including Frequency-DependentComponents
Using Transgyrator and Convolution
Per Stenius and Pauli Heikkild and Martti Valtonen 1299
42.3 BiCMOS Circuits for an Analog Fuzzy Processor
Ion E. Opris and F. Balteanu and G. Kovacs 1305
42.4 Circuit Optimization with Dynamically Controlled Transient AnalysisDidier Martin and C. Pinatel and H. Wang and A. Konczykowska .... 1311
42.5 Computer Oriented Steady-State Analysis of Frequency Modulated DC-
DC Switching ConvertersTadashx Suestugu and Shinsaku Mori 1317
42.6 Spicepipe - A Case Study of Flexible Circuit OptimizationR, M, Biemacki and John W. Bandler and S. H. Chen and P, A. Grobelny 1323
CONTENTS xxvii
43 Integrated Circuits 1 1329
43.1 Geometrical Synthesis of Inductively Peaked Multistage Wideband Ampli¬fiers
Peter Static 1329
43.2 Reconfigurable Digital Signal ProcessingHomer W. Wong and Neil W. Bergmann 1337
43.3 The Use of a lst-Order IIR Lowpass Filter to Reduce the Length of Sigma-Delta Modulator-Based Analog Adaptive Transversal Filters
Huang Qiuting 1343
43.4 Inherent Harmonic Distortion and Practical Dithering of Second-Order E-
A Modulators
Huang Qiuting and Paul T. Maguire 1349
43.5 Quantiser Gain and the Degrees of Freedom in S-A Modulator Linear
Models
Huang Qiuting and Paul T. Maguire 1355
43.6 New Modeling Method for 1-Bit Delta-Sigma Modulators
Nianxiong Tan and Sven Eriksson 1361
44 Analog and Digital Filters 1367
44.1 Analog Interpolated Finite Impulse Response Filters
Zygmunt Ciota and Andrzej Napieralski and Jean-Louis Noullet 1367
44.2 Current Mode Wave Active Simulation of a Linear Phase LC Filter Usinga Lattice Section
J. Tingleff and C. Toumazou- 1373
44.3 Lattice Structures for Orthogonal Wavelet Packet ImplementationsAndrzej Drygajlo and Benito Carnero 1379
44.4 A High Performance Bit-Serial Lattice Wave Digital Intermediate Fre¬
quency Filter ChipPeter Nilsson and Mats Torkelson and Mark Vesterbacka and Lars Wan-
hammar 1385
44.5 Construction of Low-Pass Ladder Networks with Mixed Lumped and Dis¬
tributed Elements
Ahmet Aksen and Siddik Yarman 1389
44.6 Block Lattice Digital Filters
Y. B. Jang and S. P. Kim 1395
45 Special Session: Periodically Switched Networks with Internally Con¬
trolled Switches 2 14°1
45.1 Amplifier Non-Linearity Effects in Sigma-Delta Modulators
Victor F. Dias and G. Palmisano 1401
45.2 Precise Small Signal Modelling of Current Mode Programmed DC-DC Con¬
verters
J. Kunze I405
xxviii CONTENTS
45.3 Unity Power Factor in ZVS HF Resonant Converter
D. Zadravec and F. Milhalic and M. Milanovic and K. Jezernik and R.
Filipitsch and K. Krischan and M. Rentmeister 1413
45.4 Large Signal Control of a Buck Converter Based on Time Optimal Control
B. Jammes and J.C- Marpinard and L. Martinez 1419
45.5 Lie Algebras Modeling of Bidirectional Switching Converters
L. Martinez and A. Poveda and J. Majo and L. Garcia-de-Vicuna and F.
Guinjoan and J. C. Marpinard and M. Valentin 1425
46 Special Session: Nonlinear Digital Filters 1 1431
46.1 Image Sharpening Using a Polynomial OperatorGiovanni Ramponi and Giovanni L. Sicuranza 1431
46.2 New Types of Adaptive L-Filters
^4fct'ra Taguchi and Hironori Takashima and Yutaka Murata 1437
46.3 Fast Nonlinear Algorithms for Superresolution in Geometric Feature Ex¬
traction
Vasile Buzuloiu and Dinu Colfac , 1441
46.4 Domino Logic for Stack Filter ImplementationOlli Vainio 1447
46.5 Image Restoration by One-Dimensional Adaptive Center Weighted Median
Filters
Tong Sun and Moncef Gabbouj and Yrjo Neuvo 1453
46.6 Image Enhancement Using Coupled Anisotropic Diffusion EquationsE. J. Pauwels and M. Proesmans and L. J. Van Gool and T. Moons and
A. Oosterlinck 1459
47 Special Session: Circuit Theoretic Models and Methods in Signal Pro¬
cessing 1465
47.1 Analog Systems Performing the Karhunen-Loeve Transform
Knut Hiiper 1465
47.2 Learning with Matrix Flows, Implementable on a Network Structure
J, Dehaene and J. Vandewalle 1471
47.3 Solving Partial Differential Equations by CNN
T, Roskaand T. Kozek and D. Wolf and L.O. Chua 1477
47.4 Alternative WDF Method for Numerical Integration of PDEs with Space-Varying Parameters
A. Fettweis 1483
47.5 In-Place Rank Determination by Analog Sorting Networks
Steffen Paul 1485
CONTENTS xix
48 Nonlinear Circuits 2 1491
48.1 DC Analysis of Circuits Containing Idealized Diodes Using Parametric De¬
scriptionMichal Tadeusiewicz 1491
48.2 Extension of the Lienard Theorem to the Asymmetric Case
Tosiro Koga 1497
48.3 Algebraic from Volterra Series of Non-Linear Multi-Port Networks
Torben Larsen 1503
48.4 Systematic Generation of Canonic RC-Active Oscillators Using CCII
Santiago Celma and Alfonso Carlosena and Pedro Martinez 1509
48.5 An Efficient Algorithm for Finding Multiple DC Solutions of a Broad Class
of Piecewise-Linear Electronic Circuits
M. Tadeusiewicz and K. Glowienka 1515
48.6 Step-Response Bounds for a Certain Class of Discrete-Time Systems
Mark N. Seidel and J. L. Wyatt Jr 1521
49 Design Tools 2 1527
49.1 Hierarchical Circuit Representation for Automated Analog IC Design
Krzysztof Wawryn1527
49.2 Design of a CMOS Bias Stage for Low Supply Voltage with a New Method
for Worst-Case Analysis and Design Centering
Claudia Wteser and Helmut Graeb and Kurt Antreich 1531
49.3 RAVI: A New Fast Multi-Layer Area Routing Algorithm for Analog Cell
LayoutN. D. Goharand Peter Y. K. Cheung 1537
49.4 Timing-Driven System Partitioning by Generalized Burkard's Heuristic
Minshine Shih and Ernest S. Kuh 1543
49.5 Fast and Accurate Simulation of Large Lossy Interconnect Networks Using
Circuit Partition and Recursive Convolution
Shen Lin and Ernest S. Kuh1549
49.6 A Network-Based Parallel Matrix Solver with Pipelining Gauss-Seidel Method
Naohiko Shimizu and Shuuji Hayakawa and Mamoru Tanaka 1555
50 Integrated Circuits 2!561
50.1 Complementary Translinear Circuit Techniques Yielding Cascadable Zero
Voltage in Zero Voltage Out Circuits
Luis Magram and Arie F. Arbel1561
50.2 Comparison between the Noise Performance of Current-Mode and Voltage-
Mode PostamplifiersArie F. Arbel
1565
50.3 Conditions for Frequency Insensitivity to Op-Amp Gain-Bandwidth Prod¬
uct in RC Oscillators
A. Borys and R, Wojtyna1569
XXX CONTENTS
50.4 On the Synthesis of Transconductor/Multiplier Functions Using FETs
David G. Haigh and Paul M. Radmore 1573
50.5 GIC-JFET Voltage-Controlled ImpedancesLiviu Goras and Adrian Leuciuc 1579
50.6 An Inverting Transimpedance Amplifier for Current- and Voltage-ModeApplicationsKimmo Koli and Kali Halonen 1583
51 Special Session: Recent Advances in Sigma-Delta Converters 1589
51.1 High-Order 1-Bit Sigma-Delta Converters
Tapani Ritoniemi, 1589
51.2 Low Power Oversampled A/D Converters
0. Nys and E. Dijkstra 1595
51.3 Continuous-Time Implementation of Sigma-Delta Converters for High Fre¬
quency OperationB. Hallgren 1601
51.4 Design Considerations for a Fourth-Order Switched-Capacitor S-A Modu¬
lator
F. Medeiroand B. Perez-Verdu and A. Rodriguez-Vazquez and J. L, Huer-
tas 1607
51.5 E-A Data Converter Architectures with Multibit Internal QuantizersG. Temes and B. Leung . 1613
51.6 A Monolithic ADC for Instrumentation Applications using Sigma-DeltaTechniquesA. Bertland H. Leopold and P. O'Leary and G. Winkler 1619
52 Special Session: Nonlinear Digital Filters 2 1625
52.1 Performance Analysis of Decision Based Directional Edge Detector
Emin Ananm and Haluk Aydmoijlu and I. C. Goknar 1625
52.2 Morpholograms for Abrupt Change Detection in Nonstationary SignalsMohsine Karrakchou 1629
52.3 Signal-Adaptive Maximum Likelihood Filtering of Ultrasonic SpeckleC. Kotropoulos and X. Magnisalis and I. Pitas and M.G. Strintzis
....1635
52.4 Nonlinear Multiresolution Relaxation for AlertingSylvia Gil and Thierry Pun 1639
52.5 Vector Directional Filters for Color Image ProcessingP. E, Trahanias and A. N. Venetsanopoulos 1645
53 Nonlinear Circuits 3 1651
53.1 A New Approach for Calculating the Starting-Up Process of Harmonic
Bipolar Transistor Oscillators
S. Bayer and W. Mathis 1651
CONTENTSXXXI
53.2 A Singular Bifurcation in a Piecewise-Linear Circuit
Naohiko Inaba and Masafumi Ohnishi 1655
53.3 Necessary and Sufficient Conditions for Nonlinear Resistive Circuits Con¬
taining Ideal Diodes to Have a Unique Solution
T. Nishi and Y. Kawane 1661
53.4 On Convex Hulls of polynomialsJifi Gregor 1667
53.5 A New Numerical Method for Steady State Circuit AnalysisAngelo Brambilla and Enrico Dallago and Dario D'Amore 1671
53.6 Optimally Robust Observer Design for Failure Isolation In Nonlinear Un¬
certain SystemsA. Ye. Shumsky 1677
54 Special Session: Symbolic Methods and Applications in Analog Circuit
Design 1681
54.1 Symbolic Method for Circuit Testability and Fault Diagnosis in Time Do¬
main
S. Manetti and M. C. Piccirilli 1681
54.2 A Mixed Symbolic and Numeric Method for Closed-Form Transient Anal¬
ysisBruce A. Alspaugh and Marwan M. Hassoun 1687
54.3 Symbolic Analysis on Parallel ComputersErich Wehrhahn 1693
54.4 Nested Format Symbolic Expression ApproximationF. V. Fernandez and A. Rodriguez-Vazquez and J. D. Martin and J. L.
Huertas 1699
54.5 A Computer-Aided Tool for the Automatic Generation of Design Equations
of Switched Capacitor Circuits
Maria Helena Martins and Jose E. Franca and A. S. Gargao 1705