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Analysis of the Common Emitter Amplifier Taking intoAccount Transistor Non-Linearity

Luciano da F. Costa

To cite this version:Luciano da F. Costa. Analysis of the Common Emitter Amplifier Taking into Account TransistorNon-Linearity. 2018. hal-01712254

Analysis of the Common Emitter Amplifier Taking into Account Transistor

Non-Linearity

Luciano da F. Costa∗

Sao Carlos Institute of Physics, IFSC-USP, Sao Carlos, SP, Brazil

(Dated: February 19, 2018)

The operation of a typical common emitter amplifier, including negative feedback, is studied

taking into account the non-linearity characteristic of real-world transistors. This has been accom-

plished by employing a recently proposed Early modeling approach, which allowed the analytical

equations to be obtained describing the current and voltage behavior in the adopted common emitter

circuit. Average and dispersion (coefficient of variation) of the current and voltage gains can then be

calculated and used to characterize the common emitter amplification while reflecting the transistor

non-linearity. Several interesting results were obtained, including the fact that the negative feedback

provided by the emitter resistance is not capable of completely eliminating effects of parameters dif-

ferences exhibited by transistors. Importantly, transistors with larger Early voltage Va magnitudes

tended to provide significantly enhanced linearity even when substantial negative feedback is used.

These results motivates customized design, implementation and application approaches taking into

account the parameters of the available devices.

“µηδεν αγαν.’

Delphic Proverb

I. INTRODUCTION

The common emitter design is one of the most funda-

mental amplifying circuit configurations, representing a

reference in electronics circuits be it for its central role in

research, application, or education. This circuit configu-

ration can be found in virtually almost every textbook on

electronics circuits (e.g. [9–16]). Consequently, much has

been said and written about this configuration, including

its electronic properties as voltage gain, input and output

resistance, linearity/distortion, the negative feedback ac-

tion implemented by the emitter resistance, stability with

component variations, frequency response, to name a few

among a set of issues encompassing a great deal of the

main interests in electronics. This circuit typically in-

cludes a voltage source attached through a capacitor a

to voltage divider driving the amplifier input port, an

emitter resistance for negative feedback shared by both

the input and output mesh, and a resistance load in se-

ries with an external voltage supply. Either the input

voltage or current are taken as the input signal, while

the collector voltage, or that across the load, are often

understood as the output signal.

The main purpose of the common emitter amplifier is

to produce current and/or voltage gain over the load or

∗ luciano@ifsc.usp.br, copyright LdaFcosta

output. The intrinsic parameter variability exhibited by

real-world transistors, allied to the need to improve am-

plification linearity and stability, motive the incorpora-

tion of the emitter resistance as a means to implementa

negative feedback. However, it is also possible (at the

expense of some stability loss) to consider variations of

the classic common emitter configuration devoid of the

emitter resistance, which can be considered as a means

to maximize gain and achieve wider voltage excursion

across the load (i.e. avoid the voltage drop at the emitter

resistance).

Commonly, studies of the common emitter circuit in-

volve the adoption of a model and respectively implied

equivalent circuit to represent the involved transistor.

The most often employed approaches rely on two elec-

tronically meaningful parameters, namely the current

gain β and the output resistance Ro. This type of ap-

proach, however, cannot take into account the nonlinear-

ities that are unavoidably found in any real-world tran-

sistor. These nonlinearities are a direct consequence of

the fanned structure of the base current (IB) indexed

characteristic isolines of the transistor behavior along its

operation space (VC , IC), where VC ad IC stand for the

collector voltage and current.

The above described geometrical organization of tran-

sistors action is a sole and direct consequence of the Early

effect (e.g. [8, 12, 16]), in which the base width varies in

terms of the voltage applied to the base-collector junc-

tion. This effect implies mots of the IB-indexed charac-

teristic isolines to cross at the same point (VC = Va, IC =

0) along the VC axis. An immediate implication is that

the collector output resistance will depend on IB . An-

other critically induced property regards the fact that

the local current gain β, as well as the output resis-

2

tance Ro become a function of both IB and VC . Con-

sequently, transistor modeling approaches relying on β

and Ro as parameters need to consider their respective

averages or point values. Frequently, it is assumed that

the fanned isolines can be approximated by a series of

equispaced, parallel isolines with the same inclination

small m = 1/Ro(IB). As such, this simplified device is

typically represented by an equivalent circuit involving

a variable current source in parallel with a fixed output

resistance. As an inevitable consequence, this transis-

tor model becomes intrinsically linear, which is a severe

simplification of what really happens in real-world tran-

sistors.

Recently [2, 3, 5, 7], an alternative transistor model

was proposed that is simple and yet can accurately

account for the representation of the transistor non-

linearities induces by the fanned (or radiating) charac-

teristic isolines. In addition, the two parameters used in

this model, namely the Early voltage Va and a propor-

tionality constant s, are constant for any given device,

not depending of IC or VC . These distinguishing fea-

tures are allowed by taking into account the very Early

effect that causes the fanned isolines as the geometrical

basis of the model. Actually speaking, this model also

relies on another hypothesis, verified experimentally for

hundreds of small signal BJTs [3, 7], that the angles θ of

the radiating isolines with the horizontal (VC) axis are

directly proportional to IB through the proportionality

constant s, i.e. θ = sIB , implying that Ro = 1/tan(sIB).

As IB is usually very small, in the order to µA, it is of-

ten possible to make tan(sIB) = 1/(sIB) with minimal

deviation, so that Ro(IB) = 1/(sIB).

Despite its recent introduction, the Early model has al-

ready been successfully applied to achieve more complete

and accurate modeling and studies of: stability with re-

spect to voltage supply oscillations [5], parallel combina-

tions of transistors [5], characterization of the output re-

sistance and current gain of silicon and germanium NPN

and PNP small signal transistor models [2, 3], study of

a simplified common emitter configuration [2], investiga-

tion of complementary transistor pairs in push-pull cir-

cuits [2], as well as the characterization of the effects of

reactive loads in amplification [4], among other results.

The Early approach has also allowed the identification

of the fact that the amplification in a simplified com-

mon emitter amplifier tends to be perfectly linear for

very small resistive loads [4]. In addition, it has been

found [2, 4] that the linearity of the transistors amplifi-

cation devoid of feedback tends to depend only of s (di-

rectly), and not of Va. As a matter of fact, the simplicity

and completeness of the Early model in being able to

represent in an inherently suitable geometrical way the

non-linearities of real-world transistors pave the way to a

large number of implications for transistor amplification

and even linear electronics in general.

The current work focuses on substantially extending

previous analyses [4, 5] that had addressed a simplified

version of the common emitter configuration. In those

works, the emitter was connected directly to ground, and

there was no voltage divider for polarization at the input

port, so no negative feedback can be achieved. Though

that configuration was still representative of several char-

acteristics of transistor amplification, leading to the iden-

tification of a series of interesting effects as listed above,

it did not account for the negative feedback afforded by

the inclusion of an emitter resistor RE . This is very im-

portant because much of modern electronics has relied on

negative feedback, introduced by H. S. Black [1], in or-

der to achieve improved linearity and stability to factors

such as temperature and transistor parameter variations.

These advantages are achieved at the expense of substan-

tial gain expense. Yet, a recent study [2, 6] considering

several types of commercial small signal BJTs suggested

that negative feedback may not be enough, in several

situations, to completely eliminate the relatively large

parameter variations exhibited by real-world devices. It

was also shown that negative feedback can introduce un-

wanted harmonics for certain types of non-linearities.

Th key role of negative feedback and the common emit-

ter amplifier in electronics, allied to the above mentioned

recent findings suggesting some respective limitations,

motivate a reappraisal of the classic common emitter am-

plifier configuration. Of particular interest would be to

investigate the efficacy of negative feedback in minimiz-

ing transistor non-linearity with respect to different tran-

sistor characteristics. For instance, will feedback work

more effectively for transistor with large or small current

gains β or by choosing different values for the external

circuit components? If such differences can be found, how

much can feedback action be improved by starting with

a more linear transistor? These correspond to key issues

in both discrete and integrated circuit analysis, design,

implementation and applications. These questions pro-

vide the main motivation and objectives of the present

work.

We start by presenting the “classic” common emitter

configuration, and then obtain a respective equivalent cir-

cuit by using the Early modeling methodology. Accurate

mathematical expressions are obtained that characterize

the voltages, currents and gains while taking into account

the non-linear behavior of real-world transistors. By us-

ing these equations, it becomes possible to investigate in

an objective, more complete, and accurate way how the

transistor inherent non-linearity influences the efficiency

of negative feedback in promoting linear amplification.

This is done by considering the voltage gain average and

3

coefficient of variation (closely related to the level of non-

linearity in the amplification) A number of interesting re-

spective results are obtained and discussed, and the work

is concluded by presenting some possibilities for further

related research.

II. THE CLASSIC COMMON EMITTER

CONFIGURATION

Figure 1 shows the configuration of what we will hence-

forth refer to as the “classic” common emitter circuit. A

voltage divider (resistors Ra and Rb) is used to bias the

input port, which is driven by an external signal voltage

source vi(t), attached through the decoupling capacitor

C. The load is connected between the collector and the

external voltage supply VCC , while resistor Rf is con-

nected between the emitter and ground in order to pro-

vide negative feedback. In this circuit, the base-collector

junction of transistor T is inversely biased, while the

junction base-emitter is directly biased.

FIG. 1: The “classic” common emitter configuration as adopted in

this work. The base-collector junction of transistor T is inversely

biased, while the junction base-emitter is forward biased. R is the

resistive load, and Rf provides negative feedback. The input port is

biased into an operation (quiescent) point Q by the voltage divider

implemented by Rx and Ry , receiving the input through the coupling

capacitor C, which is chosen so as to have low impedance relatively to

the input bandwidth.

First, we derive the equations for the input port, as-

suming that the forward-biased base-emitter junction is

modeled as a diode with offset voltage Vr and resistance

Rr. By using Thevenin’s theorem, we obtain the respec-

tive equivalent circuit for the input voltage and divider

as:

Rb =RxRy

Rx +Ry(1)

Vb = RxVCC

Rx +Ry(2)

Figure 2 shows the common emitter circuit in Figure 1

modified to show the input port equivalent circuit as well

as the output mesh, with the transistor replaced by its

Early equivalent circuit. Observe that the input voltage

source vi(t) is not considered as it acts differentially in

the amplification, oscillating around the operation point

Q. As Rb/(Rb + Rr) is typically very close to 1 (Rb

is much larger than Rr), it becomes possible to include

vi(t) in series along the input mesh, for simplicity’s and

generality’s sake, at the expense of nearly negligible error.

FIG. 2: The equivalent circuit of the common emitter configuration in

Figure 1 obtained by replacing the voltage divider in the input port

by its Thevenin equivalent circuit, and by replacing the output mesh

of transistor T by the respective Early equivalent circuit.

For simplicity’s sake, the above circuit can be further

simplified io the configuration shown in Figure 3. This

has been achieved by subsuming the input and output

series resistances and voltage sources, i.e. R1 = Rb +Rr,

R2 = R+Ro(IB), V2 = VCC − Va, and, in particular:

V1 = vi(t) + Vb − Vr (3)

4

FIG. 3: The common emitter equivalent circuit in Figure 2 can be

further simplified into the depicted configuration by making

R1 = Rb + Rr, R2 = R + Ro(IB), V1 = vi(t) + Vb − Vr and

V2 = VCC − Va.

Despite its seeming symmetry and simplicity, this cir-

cuit exhibits some relative complexity as a consequence

of R2 being a function of IB , i.e. R2(IB) = R+Ro(IB) =

R + 1/tan(sIB) ≈ R + 1/(sIB). The variables in this

circuit are V , IB and I. By applying Kirchhoff’s and

Ohm’s law, we have:

V1 −R1IB −Rf (I + IB) = 0

V2 −R2I −Rf (I + IB) = 0(4)

The solution for IB and I in terms of vi(t) are given as

I1 and the DC current gain Ai, as in Equations 5 and 6.

These equations describe the operation, in terms of V1

(and hence vi(t), through Equation 3), of classic common

emitter circuit as in Figure 1.

Proper operation of this circuit, without exceeding the

minimum possible values of I, requires the conditions

in Equation 8 and 9 to be obeyed at all times in or-

der to avoid cut-off or saturation (for simplicity’s aske,

the Early geometric representation is here understood to

cover the whole first quadrant, so that saturation and

cut-off occurs at the VC and IC axes, respectively.

I ≥ 0 (8)

I ≤ VCC

R+Rf(9)

As already observed, despite the seeming simplicity of

the system of equations 4, the behavior of the common

emitter configuration turns out to be relatively complex.

However, Equations 5 and 6 can be conveniently used

for obtaining almost any information about the common

emitter circuit. In this work, we will focus on two particu-

larly characteristics of this circuit, namely its AC voltage

and current gain in terms of the average and coefficient

of variation of these gains.

First, we obtain the expressions for the AC current

gain. This is done by defining the reference IB and I

values for the quiescent point Q as:

IB,Q = IB(vi(t) = 0) (10)

IQ = I(vi(t) = 0) (11)

so that:

ai(vi(t)) =I(t)− IQ

IB(t)− IB,Q(12)

where IB(t) and I(t) can be obtained from Equations 5

and 6.

The two indices of interest can now be determined

by calculating the average and standard deviation of ai,

i.e. 〈ai〉 and σai.

The voltage gain on the load can now be directly ex-

pressed as:

av(vi) =(I − IQ)R

vi(13)

Similarly as developed above, this voltage gain can be

characterized in terms of its average and standard dis-

tribution values 〈av〉 and σav. The respective coefficient

are particularly relevant, and are henceforth adopted, as

they provide a relative quantification of the gain varia-

tion, i.e.:

cai=

σai

〈ai〉(14)

cav=

σav

〈av〉(15)

The next sections study the behavior the current and

voltage gains for different circuit (Section III) and tran-

sistor parameter (Section IV) configurations. It is hence-

forth adopted that VCC = 20V , Rx = 50000Ω, Ry =

100000Ω, Rr = 30Ω, Vr = 0.6V , and V = 4V .

III. ANALYSIS IN TERMS OF CIRCUIT

PARAMETERS

In this section we apply the obtained equations describ-

ing the operation of the classic common emitter amplifier

while keeping the transistor parameters Va and s con-

stant and varying the load resistance R and the feedback

resistance Rf . Recall that the gain variation provides

an accurate quantification of the transistor amplification

non-linearity, as larger relative variations necessarily im-

ply larger distortions and more intense non-linearity.

5

IB(t) =sV1(R+Rf )−R1 −Rf − sRfV2 − ℵ

2s(RR1 +RRf +R1Rf )(5)

Ai(t) =I(t)

IB(t)=

1

2Rf(sRfV2 − sV1(R+Rf )−R1 −Rf − ℵ) (6)

with ℵ =√

4sV1(RR1 +RRf +R1Rf ) + (R1 +Rf − sRV1 + sRf (V2 − V1))2 (7)

In order to derive interpretations for typical small

signal NPN and PNP silicon BJT transistors, we use

two respective transistor parameters configurations that

can often be found experimentally in real-world silicon

BJTs [2], i.e. (Va,npn = −150, snpn = 2.5) and (Va,pnp =

−50, spnp = 10). As the current gain can be approxi-

mated as sVa, these two configurations yield about the

same gain, but have widely varying parameters Va and s.

Figure 4 shows the average AC current gain 〈ai〉 (a) as

well as the coefficient of variation of the AC voltage gain

av (b) with respect to the above mentioned NPN (a-b)

and PNP (c-d) configurations.

As expected, the two considered parameterizations

have nearly the same average gain (Figs. 4(a) and (c)).

Observe that the values given by the respective surfaces

tend to agree with the less precise estimation of the gain

as R/Rf (note that the quiescent current has been cho-

sen as half the VCC value). The coefficients of variation

obtained for the NPN and PNP cases, however, show a

marked difference of intensities, despite the fact that the

respective surfaces (i.e. Fig. 4(b) and (d)) have very simi-

lar shapes. Indeed, the NPN device has over than 3 times

less distortion, as a consequence of higher Va magnitudes

typically found in NPN types.

The coefficient of variation of the voltage gain corre-

lates strongly (positively) with the average voltage gain.

Both the amplification magnitude and non-linearity in-

crease steadily withR andRf , though tending to increase

faster with the latter.

IV. ANALYSIS IN TERMS OF TRANSISTOR

PARAMETERS

In this section, instead of investigating the behavior

of the voltage gain with the circuit parameters R and

Rf , we fix R = 1000Ω, take two feedback configurations

Rf = 300Ω and 800Ω, and systematically vary the Early

model parameters Va and s. Figure 5 presents the respec-

tively obtained results regarding the averages and coef-

ficients of variation of the voltage gain throughout the

Early parameters space (−200 ≤ Va ≤ −5, 1 ≤ s ≤ 10).

The average voltage gain surfaces resulted with sim-

ilar shapes, but showing different magnitudes (Figs. 5,

with the amplification achieved for the NPN circuit being

twice as much higher (approximately R/Rf at the high-

est values). A closer inspection reveals that the average

gain surface for R = 1000Ω and Rf = 800Ω has a flatter

top than for the other configuration. These surfaces show

that the average voltage gain increases steeply with both

Va magnitude and s, but then reach a plateau of greater

gain uniformity moving toward (Va = −200, s = 10).

Interestingly, the observed dispersions of voltage gain

(and hence larger non-linearity) verified for R = 1000Ω

and Rf = 300Ω, as shown in Fig. 5(b), present an oppo-

site tendency to that of the average voltage gain. More

specifically, the distortion decreases with both Va and s,

with this decrease being markedly more accentuated with

increase of the Va magnitude. A well-defined flat valley

of linearity is obtained around (Va = −200, s = 10).

The coefficients of variation obtained for the case R =

1000Ω and Rf = 300Ω (Fig. 5 (d)) resulted distinct in the

sense that the distortion mostly decreases as s becomes

larger. This has the interesting implication that transis-

tors with larger values of s will tend, for such situations,

to yield less distortion for this specific configuration of R

and Rf .

Perhaps the most important overall implication of the

above discussed results is the fact that, even in pres-

ence of relatively high feedback levels (e.g. Rf = 800Ω),

when almost all gain is traded-off for linearity and sta-

bility, the linearity of the amplification still varied sub-

stantially with different values of the transistor parame-

ters Va and s. This finding corroborates, for the consid-

ered configuration and ranges, the previously observed

phenomenon [6, 7] that negative feedback may not be

capable of completely eliminating transistor parameter

variation. Therefore, it becomes an interesting option to

consider the transistor parameters Va and s for circuit

design and implementation, even when adopting intense

levels of negative feedback.

V. CURRENT GAIN

Though the common emitter amplifier is typically ap-

proached with respect to voltage gain, It is also interest-

ing to consider the AC current gain as can be derived

from the analytical Equations 5 and 6.

The obtained results are qualitatively similar (though

6

with distinct intensities), so we restrict our discussion to

the analysis of the average current gain throughout the

space (Va, s), as observed for R = 1000Ω and Rf = 300Ω,

which is depicted in Figure 6.

This result shows that the average current gain for the

mentioned configuration increases in an almost linear way

with both Va and s, reaching its peak of nearly 2000 at

(Va = −200, s = 10). Though a direct consequence of

the circuit operation dynamics, it is interesting to observe

that the average current and voltage gains depend in such

distinct ways on the parameters Va and s.

VI. CONCLUDING REMARKS

Amplification is a key issue in analog/linear electron-

ics because of the non-linearity that is inherent to any

real-world amplifying devices such as transistors. As

such, much effort has been invested in devising circuits

and techniques capable of achieving satisfactory perfor-

mance under specific circumstances. The common emit-

ter circuit is probably the “quintessential” amplification

approach in electronics, acting as a reference for other

designs and development of novel techniques aimed at

improving amplification, as is the case of negative feed-

back.

The non-linearity inherent to junction transistors

stems mostly from the Early effect, which implies the

base current-indexed isolines characterizing the typical

amplification to converge into a single point along the

VC axis. The recent introduction of the Early modeling

approach [2, 3, 5, 7] paved the way to more systematic,

analytical investigations of the behavior of amplifying cir-

cuits, including the common emitter configuration. Pre-

liminary approaches were reported recently [4, 5], but

those approaches took into account a simplified common

emitter configuration devoid of negative feedback. Even

so, it was possible to achieve several interesting results,

including the relatively severe effect of the transistor non-

linear amplification, as well as its great dependence on

the transistor Early parameters Va and s.

The present work addressed the complete, classic com-

mon emitter configuration, incorporating voltage divider-

based input biasing and, more importantly, negative feed-

back as provided by a resistance Rf attached between the

collector and the ground. This resistance has to be kept

at relatively small values in order not to reduce too much

the current and voltage amplification too much.

The reported analysis was developed as follows. First,

the equivalent circuit of the classic common emitter con-

figuration was derived by using electrical circuit laws and

the Early voltage equivalent circuit for a transistor in am-

plifying mode. The base current IB and collector current

I were treated as functions of the input voltage vi(t).

Analytical solutions were obtained for IB and I, provid-

ing the complete electrical description of the considered

common emitter amplifier. The average, standard de-

viation, and coefficient of variation of the voltage and,

to a smaller extent, current amplification (gains) were

obtained and used for investigating the effect of several

circuit and transistor parameter configurations. As gain

variations are closely related to non-linearities, it was

possible to address both the overall gain, as expressed

in terms of the average of the gains obtained along vi(t)

excursions, as well as to infer the respective linearities.

Several interesting results have been reported. First,

we have that the choices of the load and feedback resis-

tance (circuit components) influence strongly both aver-

age gain (as expected) and linearity. Importantly, these

gains were found to vary with vi(t) even in presence of

relatively intense negative feedback, implying amplifying

distortion. Perhaps more importantly, the transistor in-

herent characteristics Va and s were found to strongly

influence the linearity of the amplfiication even in pres-

ence of relatively high negative feedback. Similar results

had been experimentally observed recently [2, 6]. By

providing a complete and accurate analytical framework

to characterize the common emitter circuit, the present

work not only confirmed those preliminary experimental

indications, but also showed in a more systematic and

conclusive way that, though certainly remaining an in-

teresting option, negative feedback is not enough to com-

pletely eliminate effects of transistor parameter varia-

tions. This important fact implies that, especially in

particularly critical circumstances, it may be worth taking

into account the specific characteristics of available real-

world transistors. Another interesting result concerns the

fact that the linearity can increase or decrease according

to s for different R and Rf configurations.

The implications of the above results are several and

have great potential for motivating many related further

investigations, including the study of higher power ampli-

fiers, consideration of reactive loads, as well as the sys-

tematic study and characterization of other important

electronic circuits such as current mirror, phase splitters,

and differential amplifiers, up to complete operational

amplifier configurations, to name but a few possibilities.

Acknowledgments.

Luciano da F. Costa thanks CNPq (grant

no. 307333/2013-2) for sponsorship. This work

has benefited from FAPESP grants 11/50761-2 and

2015/22308-2.

7

[1] H. S. Black. Stabilized feedback amplifiers. Bell System

Technical Journal, (1):1–18, 1934.

[2] L. da F. Costa. Characterizing complementary bipo-

lar junction transistors by early modeling, image anal-

ysis, and pattern recognition, 2018. arXiv preprint

arXiv:1801.06025.

[3] L. da F. Costa. Characterizing germanium junction tran-

sistors, Jan. 2018. https://archive.org/details/Germa-

nium.

[4] L. da F. Costa. On the effects of resistive and reactive

loads on signal amplification, Feb 2018. arXiv preprint

arXiv:1802.02279.

[5] L. da F. Costa. Towards a simple, and yet accurate, tran-

sistor equivalent circuit and its application to the analysis

and design of discrete and integrated electronic circuits,

2018. https://archive.org/details/reactive 201802.

[6] L. da F. Costa, F. N. Silva, and C. H. Comin. Electrical

Engineering, (3):1139, 2017.

[7] L. da F. Costa, F.N. Silva, and C.H. Comin. An Early

model of transistors and circuits, 2017. arXiv preprint

arXiv:1701.02269.

[8] J.M. Early. Effects of space-charge layer widening in junc-

tion transistors. Proceedings of the IRE, (11):1401–1406,

1952.

[9] P. E. Gray and C. L. Searle. Electronic Principles:

Physics, Models and Circuits. John Wiley and Sons,

1969.

[10] A. D. Gronner. Transistor Circuit Analysis. Simon and

Schuster, 1970.

[11] P. Horowitz and W. Hill. The Art of Electronics. Cam-

bridge University Press, 2015.

[12] R. C. Jaeger and T. N. Blalock. Microelectronic Circuit

Design. McGraw-Hill New York, 1997.

[13] Boylestad R. L and L. Nashelsky. Electronic Devices and

Circuit Theory. Pearson, 2008.

[14] J. M. Pettit and M. M. McWhorter. Electronic Amplifier

Circuits: Theory and Design. McGraw-Hill, 1961.

[15] A. Sedra and K. Carless Smith. Microelectronic circuits.

Oxford University Press, New York, 1998.

[16] B. G Streetman and S.K. Banerjee. Solid State Electronic

Device. Pearson, 7th edition, 2016.

8

FIG. 4: The voltage gain average 〈av〉 and coefficient of variation cav in terms of R and Rf obtained for typical NPN (a-b) and PNP (c-d)

configurations of the parameters Va and s. For NPN, the average voltage gain is given in (a), and the respective coefficient of variation in (b),

following an analogue presentation for the PNP case (c-d).

9

FIG. 5: The voltage gain average and coefficient of variation in terms of Va and s for two configurations R = 1000Ω and Rf = 300Ω (a,b) and

Rf = 800Ω (c,d). See text for discussion.

FIG. 6