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Transcript of Ana ADD1010 datasheet - futureelectronics.com Semiconductor/ADD1010SK.pdf · ADD1010 Datasheet...
ADD1010 Datasheet Doc Rev 1.04 Datasheet — 11-Aug-2010
Document information
Info Content
Author J.G.
Keywords 1010, Datasheet
Abstract
ADD Semiconductor
ADD1010 Datasheet
©Advanced Digital Design. 2010All rights reserved.
Doc Rev 1.04 Datasheet — 11-Aug-2010 2
Revision History
Revision Date Description Author
1.02 2010-03-29 Second revision J.G
1.03 2010-05-25 Max output current values updated J.G.
1.04 2010-08-11 Annex 2 updated A.M.A.
Copyright: © 2010 ADD Semiconductor. All rights reserved.
ADD Semiconductor does not warrant nor represent that any license, either expressed or implied is granted under any ADD Semiconductor patent right, copyright, mask work right or other ADD Semiconductor intellectual property right relating to any combination, machine or process in which ADD Semiconductor product and services are used. Information published by ADD Semiconductor regarding third party products or services does not constitute a license from ADD Semiconductor to use such products or services or a warranty of endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from ADD Semiconductor under the patents or other intellectual property of ADD Semiconductor. Third party trademarks are hereby acknowledged.
Liability disclaimer
ADD Semiconductor reserves the right to make changes without further notice to the product to improve reliability, functionality or design. ADD Semiconductor does not assume any liability arising out of the application or use of any product or circuits described herein. All application information is advisory and does not form part of the specification.
Life support applications
These products are not designed for its use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. ADD Semiconductor customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify ADD Semiconductor for any damages resulting from such improper use or sale.
Contact details
For your nearest distributor, please see www.addsemi.com
Receive available updates automatically by subscribing to eNews from our homepage or check our website regularly for any available updates.
Headquarters: Torre C2, Pol. Puerta Norte, A-23 Km. 509, 50820 Zaragoza (Spain)
Phone: +34 976 526 761; Fax: +34 976 361 994
www.addsemi.com
ADD Semiconductor
ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 3
Contents1. General Description .................................... 4 1.1 Block Diagram ............................................. 5 1.2 Pin Assignment ........................................... 6 2. Electrical Characteristics ......................... 11 2.1 Absolute Maximum Ratings ..................... 11 2.2 Recommended Operating Conditions .... 12 2.3 DC Characteristics .................................... 13 2.4 Power Consumption ................................. 14 2.5 Thermal data .............................................. 15 2.6 Oscillator .................................................... 16 2.7 Power-on .................................................... 18 3. Mechanical data ......................................... 19 3.1 Recommended mounting conditions ...... 20 3.1.1 Conditions of Standard Reflow ........... 20 Temperature Profile ............................................... 20 3.1.2 Manual Soldering .................................. 21 4. Annex 1 ....................................................... 22 5. Annex 2 ....................................................... 25 5.1 ADD1010 Application circuit example .... 25 5.2 Analog Front End example ...................... 26
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 4
1. General Description
ADD1010 is a Power Line Communications SOC which implements a full PLC node using FSK modulation. It includes an enhanced 8051 microcontroller, a Medium Access Controller (MAC) and a Modem circuit for Power Line medium. A complete set of Peripherals has been developed achieving a high grade of versatility, providing a low cost and small size solution for AMR & AMM system using narrow band power line communications. Features:
• Power Line Carrier Modem for 50 and 60Hz mains
• 8 Programmable Carrier Frequencies from 60 to 132.5kHz
• Baudrate Selectable: 600 to 4800 bps
• Compliant to EHS and KONNEX
• Half Duplex
• Receiver Sensitivity: Up to 44dBμVrms
• Convolutional coding, Viterbi decoding
• CRC and FEC error correction
• Enhanced 8051 core, Average speedup of 5 times
• 128Kbytes internal SRAM
• 24x8/28x4 Segments LCD Driver
• Auto Boot-loading Program from Serial Flash
• In-circuit Serial Flash Programming
• Programmable Watchdog
• 3 x UART
• SPI to Serial Flash and external RTC
• Buffered SPI to external metering IC
• Quadruple Dimmer in/out
• Power Supply 3.3v
• Pb-Free and RoHS compliant
• Ambient Temperature Range: -40°C to +85°C
Typical Applications:
• Automated Meter Reading (AMR) &
Advanced Meter Managing (AMM)
• Street lighting
• Home Automation
144‐pin plastic LQFP
(16 x 16 mm)
MARKING DIAGRAM
ADD =Customer Logo CCCCCCCCCCCCC =Customer Part number OOOOO =Country of Origin YYWW =Year/week code TTT =Control Code LL =Lead Free Code Ordering Code : ADD1010AQF144 Pb-Free
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 5
1.1 Block Diagram
JTAG Bscan
DEBUGRESET
Clock
ResetInterface
ClockInterface
PowerManagement
CODESRAM
BOOTLOADER
SPI0
XDATASRAM
SPI1
UART0
UART1
UART2
TIMER0
TIMER1
TIMER2
T11, T12, T14
WATCHDOG
GENERALPURPOSE I/O
DIMMERPERIPHERAL
LCD DRIVER
MEDIUMACCESSCONTROL
VSENSEPSENSE
EMIT(12:1)
ENABLEDC_COMP
D_IND_NIN
REC(8:1)VINVRHVRL
8051C3A Core
PLCMODEM
MUX
IDATA
128KB SRAM
SEGM(23:20)SEGM(19:0)BCKP(7:4)BCKP(3:0)
TRIAC_(3:0)
VNR
D_INIT RSTA
CLKA
CLKB
P5(3:0)
P4(5:2)
P3(1:0)
P5(5:4)
P4(1:0)
P3.4/T0
P3.5/T1
P4.6/T2
P4.7/T2EX
VDD
VSS
LDO_PD
VDEO
INTA(3:0)
INTB(3:0)
INTC(3:0)
INTD(3:0)
AVD AVS
TDITDOTCK
TMSTRST
/EWDG
DEBUG
/PROG
SECURED
P1.7/ SSN
11.059.200Hz
INT1
EMIT0
Figure 1. ADD1010 Block Diagram
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 6
1.2 Pin Assignment
The following figure illustrates the pinout of the ADD1010 LQFP144 package:
Figure 2. LQFP pin assignment
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 7
PinNo Pin Name I/O I(mA) Res HY Pin Description
1 P3_3/INT1 I/O ±5 PU - INT1 external interrupt 1
2 VCC P - - - 3.3v Power Supply
3 GND P - - - Ground
4 GND P - - - Ground (*)
5 GND P - - - Ground (*)
6 TDI I ±5 PU - JTAG Test Data In
7 TDO O ±5 - - JTAG Test Data Out
8 TCK I ±5 - - JTAG Test Clock
9 TMS I ±5 PU - JTAG Test Mode Select
10 TRST I ±5 PU - JTAG Test Reset
11 D_INIT I ±5 PD Y Initialization signal
12 RSTA I ±5 PD Y Asynchronous Reset
13 /PROG I ±5 PU Y SPI Flash programming pin
14 SECURED I ±5 PD Y Encryption enabling
15 /EWDG I ±5 PD Y Watchdog enable. Active low
16 DEBUG I ±5 PD Y Debug mode enable
17 VCC P - - - 3.3v Power Supply
18 CLKEB I/O - - - External clock reference. The user may connect CLKEB to a compatible oscillator or to one terminal of a crystal oscillator
19 GND P - - - Ground
20 CLKEA I - - - External clock reference. The user may connect CLKEA to the other terminal of the crystal oscillator or tie CLKEA to ground
21 VCC P - - - 3.3v Power Supply
22 GND P - - - Ground
23 GND P - - - Ground
24 VDE0 P - - - LDO power input.
25 VDE0 P - - - LDO power input.
26 VSS0 P - - - LDO ground
27 LDO_PD I LDO Power down
28 VDD P - - - LDO power output. A capacitor in the range 0.1μF-10μF must be connected here
29 GND P - - - Ground
30 VCC P - - - 3.3v Power Supply
31 VSENSE I ±5 - Y Voltage Amplitude tracking to avoid malfunction
32 PSENSE I ±5 - Y Power tracking to avoid malfunction
33 VNR I ±5 - Y Zero Crossing Detection signal. Used in Home Automation control pins
34 TRIAC_3 O ±5 - - Home Automation Control 3
35 TRIAC_2 O ±5 - - Home Automation Control 2
36 TRIAC_1 O ±5 - - Home Automation Control 1
37 TRIAC_0 O ±5 - - Home Automation Control 0
38 P5_5/TXD1/INTA1 I/O ±5 PU - TxD Serial Port 1 output. Can be configured as dimmer switch input
39 P5_4/RXD1/INTA0 I/O ±5 PU - RxD Serial Port 1 input. Can be configured as dimmer switch input
40 P4_7/T2EX/INTA3 I/O ±5 PU - T2EX Timer2 External input. Can be configured as dimmer switch input
41 P4_6/T2/INTA2 I/O ±5 PU - T2 Timer2 input/output. Can be configured as dimmer switch input
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 8
PinNo Pin Name I/O I(mA) Res HY Pin Description
42 P1_7/SSN I/O ±5 PU - Silicon Serial Number input. (P1.7 must not be used as generic control port since it searches for a Silicon Serial number device at start-up and could put out undesirable transient values)
43 VCC P - - - 3.3v Power Supply
44 GND P - - - Ground
45 EMIT_0 O ±X - - TXRX control output pin
46 EMIT_1 O ±X - - PLC Transmission port 1
47 EMIT_2 O ±X - - PLC Transmission port 2
48 VCC P - - - 3.3v Power Supply
49 GND P - - - Ground
50 EMIT_3 O ±X - - PLC Transmission port 3
51 EMIT_4 O ±X - - PLC Transmission port 4
52 EMIT_5 O ±X - - PLC Transmission port 5
53 EMIT_6 O ±X - - PLC Transmission port 6
54 VCC P - - - 3.3v Power Supply
55 GND P - - - Ground
56 EMIT_7 O ±X - - PLC Transmission port 7
57 EMIT_8 O ±X - - PLC Transmission port 8
58 EMIT_9 O ±X - - PLC Transmission port 9
59 EMIT_10 O ±X - - PLC Transmission port 10
60 VCC P - - - 3.3v Power Supply
61 GND P - - - Ground
62 EMIT_11 O ±X - - PLC Transmission port 11
63 EMIT_12 O ±X - - PLC Transmission port 12
64 VCC P - - - 3.3v Power Supply
65 GND P - - - Ground
66 P3_1/TXD0 I/O ±5 PU - TxD Serial Port 0 output
67 P3_0/RXD0 I/O ±5 PU - RxD Serial Port 0 input
68 P4_5/MISO1/INTB3 I/O ±5 PU - MISO1 SPI1 master in / slave out Data. Can be configured as dimmer switch input
69 P4_4/MOSI1/INTB2 I/O ±5 PU - MOSI1 SPI1 master out / slave in Data. Can be configured as dimmer switch input
70 P4_3/SPICLK1/INT
B1 I/O ±5 PU - SPICLK1 SPI1 clock input/output. Can be configured as dimmer switch input
71 P4_2/SS1/INTB0 I/O ±5 PU - SS1 SPI1 Slave Select input. Can be configured as dimmer switch input
72 P4_1/TXD2 I/O ±5 PU - TxD Serial Port 2 output
73 P4_0/RXD2 I/O ±5 PU - Rxd Serial Port 2 input
74 VCC P - - - 3.3v Power Supply
75 GND P - - - Ground
76 SEGM_23/INTC3 I/O ±5 - - LCD Segment 23. Can be configured as dimmer switch input
77 SEGM_22/INTC2 I/O ±5 - - LCD Segment 22. Can be configured as dimmer switch input
78 SEGM_21/INTC1 I/O ±5 - - LCD Segment 21. Can be configured as dimmer switch input
79 SEGM_20/INTC0 I/O ±5 - - LCD Segment 20. Can be configured as dimmer switch input
80 SEGM_19 O ±5 - - LCD Segment 19
81 SEGM_18 O ±5 - - LCD Segment 18
82 SEGM_17 O ±5 - - LCD Segment 17
83 SEGM_16 O ±5 - - LCD Segment 16
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 9
PinNo Pin Name I/O I(mA) Res HY Pin Description
84 SEGM_15 O ±5 - - LCD Segment 15
85 SEGM_14 O ±5 - - LCD Segment 14
86 SEGM_13 O ±5 - - LCD Segment 13
87 SEGM_12 O ±5 - - LCD Segment 12
88 SEGM_11 O ±5 - - LCD Segment 11
89 VDD P - - - LDO power output. A capacitor in the range 0.1μF-10μF must be connected here
90 VCC P - - - 3.3v Power Supply
91 GND P - - - Ground
92 SEGM_10 O ±5 - - LCD Segment 10
93 SEGM_9 O ±5 - - LCD Segment 9
94 SEGM_8 O ±5 - - LCD Segment 8
95 SEGM_7 O ±5 - - LCD Segment 7
96 SEGM_6 O ±5 - - LCD Segment 6
97 SEGM_5 O ±5 - - LCD Segment 5
98 SEGM_4 O ±5 - - LCD Segment 4
99 SEGM_3 O ±5 - - LCD Segment 3
100 SEGM_2 O ±5 - - LCD Segment 2
101 SEGM_1 O ±5 - - LCD Segment 1
102 SEGM_0 O ±5 - - LCD Segment 0
103 VCC P - - - 3.3v Power Supply
104 GND P - - - Ground
105 BCKP_7/SEGM_27
/INTD3 I/O ±5 - - LCD Backplane 7. Can be configured as dimmer switch input
106 BCKP_6/SEGM_26
/INTD2 I/O ±5 - - LCD Backplane 6. Can be configured as dimmer switch input
107 BCKP_5/SEGM_25
/INTD1 I/O ±5 - - LCD Backplane 5. Can be configured as dimmer switch input
108 BCKP_4/SEGM_24/INTD0 I/O ±5 - - LCD Backplane 4. Can be configured as dimmer switch input
109 BCKP_3 O ±5 - - LCD Backplane 3
110 BCKP_2 O ±5 - - LCD Backplane 2
111 BCKP_1 O ±5 - - LCD Backplane 1
112 BCKP_0 O ±5 - - LCD Backplane 0
113 GND P - - - Ground
114 DC_COMP O ±10 - - Direct Current pin, used in external comparator loop
115 VCC P - - - 3.3v Power Supply
116 ENABLE O ±10 - - External comparator latch enable signal
117 GND P - - - Ground
118 DNIN I ±5 - - External comparator negative output pin
119 DIN I ±5 - - External comparator output pin
120 REC_1 O ±5 - - Control Bias Output 1. Used in external comparator loop
121 REC_2 O ±5 - - Control Bias Output 2. Used in external comparator loop
122 REC_3 O ±5 - - Control Bias Output 3. Used in external comparator loop
123 REC_4 O ±5 - - Control Bias Output 4. Used in external comparator loop
124 REC_5 O ±5 - - Control Bias Output 5. Used in external comparator loop
125 REC_6 O ±5 - - Control Bias Output 6. Used in external comparator loop
126 REC_7 O ±5 - - Control Bias Output 7. Used in external comparator loop
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 10
PinNo Pin Name I/O I(mA) Res HY Pin Description
127 REC_8 O ±5 - - Control Bias Output 8. Used in external comparator loop
128 VCC P - - - 3.3v Power Supply
129 GND P - - - Ground
130 VRL I (**) - - Analog input Low Voltage Reference
131 VIN I (**) - - Direct-Analog Input Voltage
132 VRH I (**) - - Analog input High Voltage Reference
133 AVD1 P - - - 3.3v Analog Power Supply 1
134 AVS1 P - - - Analog Ground 1
135 AVD2 P - - - 3.3v Analog Power Supply 2
136 AVS2 P - - - Analog Ground 2
137 VCC P - - - 3.3v Power Supply
138 GND P - - - Ground
139 P5_3/MISO0 I/O ±5 PU - MISO SPI0 master in / slave out Data
140 P5_2/MOSI0 I/O ±5 PU - MOSI SPI0 master out / slave in Data
141 P5_1/SPICLK0 I/O ±5 PU - SPICLK SPI0 clock input/output
142 P5_0/SS0 I/O ±5 PU - SS SPI0 Slave Select input
143 P3_5/T1 I/O ±5 PU - T1 Timer1 external input
144 P3_4/T0 I/O ±5 PU - T0 Timer0 external input
(*) Mandatory to be tied down
(**)See application circuit
I/O: pin direction I:Input
O:output
P:Power
I(mA): nominal current +:source
-:sink
X:fixed by external resistor, see application circuits
RES: pin pullup/pulldown resistor PU:Internal pullup
PD:Internal pulldown
HY: input hysteresis
Table 1. ADD1010 pin description
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 11
2. Electrical Characteristics
2.1 Absolute Maximum Ratings
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions given in the Recommended Operating Conditions section. Exposure to the Absolute Maximum Conditions for extended periods may affect device reliability. (VSS = 0 V)
Parameter Symbol Rating Unit
Supply Voltage VCC -0.5 to 4.0 V
Input Voltage VI -0.5 to VCC+0.5(≤4.0V) V
Output Voltage VO -0.5 to VCC+0.5(<4.0V) V
Storage Temperature TST -55 to 125 ºC
Junction Temperature TJ -40 to 125 ºC
Output Current (*)1 IO ±10 (*)2 mA
Notes:
(*)1. DC current that continuously flows for 10ms or more, or average DC current.
(*)2. Applies to all the pins except EMIT pins. EMIT pins should be only used according to circuit configurations recommended by ADD.
ATTENTION Observe ESD Precautions
Precautions for handling electrostatic sensitive devices should be taken into account to avoid malfunction. Charged devices and circuit boards can discharge without detection.
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 12
2.2 Recommended Operating Conditions
Parameter Symbol Rating
Unit Min. Typ. Max.
Supply Voltage
VCC 3.00 3.30 3.60
V VDEO 3.00 3.30 3.60
VDA 3.00 3.30 3.60
Junction Temperature TJ -40 25 125 ºC
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 13
2.3 DC Characteristics
(VCC=3.3v ± 0.3v , VSS=0v , TJ=-40 to 125°C)
Parameter Condition Symbol Rating
Unit Min. Typ. Max.
Supply Voltage VCC 3.00 3.30 3.60
V
H-level Input Voltage (3.3v CMOS) VIH 2.0 - VCC+0.3
L-level Input Voltage (3.3v CMOS) VIL -0.3 - 0.8
H-level Output Voltage 3.3v I/O IOH=-100μA VOH VCC-0.2 - VCC
L-level Output Voltage 3.3v I/O IOL=100μA VOL 0 - 0.2
H-level Output V-I Characteristics
3.3v I/O VCC=3.3±0.3 IOH Refer to Annex1
mA L-level Output V-I Characteristics
3.3v I/O VCC=3.3±0.3 IOL Refer to Annex1
Internal Pull-up Resistor(*)1 3.3v I/O Rpu 10 33 80 kΩ
Internal Pull-down Resistor(*)1 3.3v I/O Rpd 10 33 80 kΩ
Junction Temperature TJ -40 - 125 ºC
Notes:
(*)1. Only applicable to pins with internal pulling. See related table.
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 14
2.4 Power Consumption
• External Driver: ADD1010 SoC consumption values when working with an external driver (see Analog Front End Example section).
Parameter Condition Symbol Rating
Unit Min. Typ. Max.
Power Consumption in reception TA=25°C, VCC=3.3v PRx25 -- 230 -- mW
Power Consumption in transmission TA=25°C, VCC=3.3v PTx25 -- 240 -- mW
Power Consumption (worst case) TA=85°C, VCC=3.6v P85 -- -- 420 mW
• Internal Driver: ADD1010 SoC consumption values when working with ADD1010 internal driver.
Parameter Condition Symbol Rating
Unit Min. Typ. Max.
Power Consumption in reception
ADD1010 working in Internal Driver mode
TA=25°C, VCC=3.3v ID_PRx25 -- 230 -- mW
Power Consumption in transmission
ADD1010 working in Internal Driver mode
TA=25°C, VCC=3.3v ID_PTx25 -- 450 -- mW
Power Consumption ADD1010 working in Internal
Driver mode (worst case)
TA=85°C, VCC=3.6v ID_P85 -- -- 595*1,*2 mW
*1.Measured using recommended external configuration.
*2.RL=0R (Load Impedance=0Ω).
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 15
2.5 Thermal data
Parameter Symbol LQFP144 Unit
Thermal resistance junction-ambient steady state RTheta-ja 53 *(1)
ºC/W 37 *(2)
Notes:
1. Mounted on 2-layer PCB.
2. Mounted on 4-layer PCB.
Theta-ja is calculated based on a standard JEDEC defined environment and is not reliable indicator of a device’s thermal performance in a non-JEDEC environment. The customer should always perform their own calculations/simulations to ensure that their system’s thermal performance is sufficient.
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 16
2.6 Oscillator
Figure 3. Internal Oscillator Cell
Parameter Test Condition Symbol
Rating Unit
Min. Typ. Max.
Crystal Oscillator frequency fundamental Xtal 11.0592 MHz
External Oscillator Capacitance See figure Cx 5 18 30 pF
H-level Input Voltage XVIH 2 - VCC+0.3
V L-level Input Voltage XVIL -0.3 - 0.8
External Oscillator Parallel Resistance Rp not needed Ω
External Oscillator Series Resistance Rs not needed
Notes:
1. The crystal should be located as close as possible to CLKEB and CLKEA pins.
2. Recommended value for Cx is 18pF. This value may depend on the specific crystal characteristics.
3. Crystal Stability/Tolerance/Ageing values must be selected according to standard PRIME requirements.
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 17
Crystal oscillation cell
Internal output pin
Oscillation control input pin
Oscillation circuit input pin Oscillation control output pinCLKEA CLKEB
Figure 4. Internal Oscillator Cell
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 18
2.7 Power-on
In power-on, D_INIT should be released before asynchronous reset signal RSTA in order to ensure proper system start up.
Not minimum time is required between both releases, Δt > 0, so a simple RC circuit is enough to satisfy this requirement.
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 19
3. Mechanical data
144-pin plastic LQFP (16x16mm) Pb-free, RoHS compliant. Ambient Temperature Range: -40ºC to +85ºC. Ordering Code: ADD1010AQF144
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 20
3.1 Recommended mounting conditions 3.1.1 Conditions of Standard Reflow
Items Contents
Method IR(Infrared Reflow) / Convection
Times 2
Floor life
Before unpacking Please use within 2 years after production
From unpacking to second reflow Within 8 days
In case over period of floor life Baking with 125°C +/- 3°C for 24hrs +2hrs/-0hrs is required. Then please use within 8 days. (please remember baking is up to 2 times)
Floor life condition
Between 5°C and 30°C and also below 70%RH required. (It is preferred lower humidity in the required temp range.)
Temperature Profile
H rank: 260°C Max
(a) Average ramp-up rate: 1°C/s to 4°C/s
(b) Preheat & Soak: 170°C to 190°C, 60s to 180s
(c) Average ramp-un rate: 1°C/s to 4°C/s
(d) Peak temperature: 260°C Max, Up to 255°C within 10s
(d’) Liquidous temperature: Up to 230°C within 40s or
Up to 225°C within 60s or
Up to 220°C within 80s
(e) Cooling: Natural cooling or forced cooling
*Temperature on the top of the package is measured
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 21
3.1.2 Manual Soldering
Items Contents
Floor life
Before unpacking Please use within 2 years after production
From unpacking to Manual Soldering Within 2 years after production (No control required for moisture adsorption because it is partial heating)
Floor life condition
Between 5°C and 30°C and also below 70%RH required. (It is preferred lower humidity in the required temp range.)
Solder Condition
Temperature of soldering iron: Max 400°C, Time: Within 5 seconds/pin
*Be careful for touching package body with iron
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 22
4. Annex 1
V‐I Characteristics 3.3 Vstandard CMOS IO L, M type
Pins marked in section 1.2 ‐ pinout table with Nominal Current I(mA)=±5
Condition: MIN Process= Slow Tj= 125°C VCC= 3.0 V
TYP Process=Typical Tj= 25°C VCC= 3.3 V
MAX Process=Fast Tj= ‐40°C VCC= 3.6 V
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 23
V‐I Characteristics 3.3 Vstandard CMOS IO H, V type
Pins marked in section 1.2 ‐ pinout table with Nominal Current I(mA)=±10
Condition: MIN Process= Slow Tj= 125°C VCC= 3.0 V
TYP Process=Typical Tj= 25°C VCC= 3.3 V
MAX Process=Fast Tj= ‐40°C VCC= 3.6 V
ADD Semiconductor ADD1010 Datasheet
©Advanced Digital Design. 2010. All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 24
V‐I Characteristics 3.3 Vstandard CMOS IO H, V type
Pins marked in section 1.2 ‐ pinout table with Nominal Current I(mA)=±X
Condition: MIN Process= Slow Tj= 125°C VCC= 3.0 V
TYP Process=Typical Tj= 25°C VCC= 3.3 V
MAX Process=Fast Tj= ‐40°C VCC= 3.6 V
v
ADD Semiconductor
ADD1010 Datasheet
©Advanced Digital Design. 2010.
All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 25 of 26
5. Annex 2
5.1 ADD1010 Application circuit example
VCC2
GND3
VPD4
TEST25
TDI6
TDO7
TCK8
TMS9
TRST10
D_INIT11
RSTA12
PROG13
SECURED14
EW15
DEBUG16
VDD 89
VCC17
CLKEB18
GND19
CLKEA20
VCC21
GNDPLL22
GND23
VDE024
VDE025
VSS026
LDO_PD27
VDD28
GND29
VCC30
VSENSE31
PSENSE32
VNR33
TRIAC334
TRIAC235
TRIA
C0
37
P55/
TXD
1/IN
TA1
38
P54/
RX
D1/
INTA
039
P47/
T2EX
/INTA
340
P46/
T2/IN
TA2
41
P17/
SSN
42
VC
C43
GN
D44
EMIT
045
EMIT
146
EMIT
247
VC
C48
GN
D49
EMIT
350
EMIT
451
EMIT
552
EMIT
653
VC
C54
GN
D55
EMIT
756
EMIT
857
EMIT
958
EMIT
1059
VC
C60
GN
D61
EMIT
1162
EMIT
1263
VC
C64
GN
D65
P31/
TXD
066
P30/
RX
D0
67
P45/
MIS
O1/
INTB
368
P44/
MO
SI1/
INTB
269
P43/
SPIC
LK1/
INTB
170
P42/
SS1/
INTB
071
P40/RXD2 73VCC 74GND 75SEGM23/INTC3 76SEGM22/INTC2 77SEGM21/INTC1 78SEGM20/INTC0 79SEGM19 80SEGM18 81SEGM17 82SEGM16 83SEGM15 84SEGM14 85SEGM13 86SEGM12 87SEGM11 88
VCC 90GND 91SEGM10 92SEGM9 93SEGM8 94SEGM7 95SEGM6 96SEGM5 97SEGM4 98SEGM3 99SEGM2 100SEGM1 101SEGM0 102VCC 103GND 104BCKP7/SEGM27/INTD3 105BCKP6/SEGM26/INTD2 106BCKP5/SEGM25/INTD1 107BCKP4/SEGM24/INTD0 108
BC
KP1
111
BC
KP0
112
GN
D11
3D
C_C
OM
P11
4V
CC
115
ENA
BLE
116
GN
D11
7D
NIN
118
DIN
119
REC
112
0R
EC2
121
REC
312
2R
EC4
123
REC
512
4R
EC6
125
REC
712
6R
EC8
127
VC
C12
8G
ND
129
VR
L13
0V
IN13
1V
RH
132
AV
D1
133
AV
S113
4A
VD
213
5A
VS2
136
VC
C13
7G
ND
138
P53/
MIS
O0
139
P52/
MO
SI0
140
P51/
SPIC
LK0
141
P50/
SS0
142
P35/
T114
3P3
4/T0
144
P33/INT11
TRIAC136
P41/
TXD
272
BC
KP3
109
BC
KP2
110
U51ADD1010
BP4BP5BP6BP7
P34/T0P35/T1
P46/
T2
P43/
SPIC
LK1
P40/RXD2
P42/
SS1
DEBUG
PSENSEVSENSE
SEG22
BP0
BP1
BP2
BP3
SEG0SEG1SEG2SEG3SEG4SEG5SEG6SEG7SEG8SEG9SEG10
SEG11SEG12SEG13SEG14SEG15SEG16SEG17SEG18SEG19SEG20SEG21
SEG23
P47/
T2EX
P31/
TXD
0P3
0/R
XD
0P4
5/M
ISO
1
P41/
TXD
2
P44/
MO
SI1
PROG
P55/
TXD
1P5
4/R
XD
1
P33
VCC
VCCC70100nF
C69100nF
C67100nF
C60100nF
C59100nF
C58100nF
C73100nF
C72100nF
C71100nF
C80100nF
C78100nF
C77100nF
C76100nF
C75100nF
C6110uF
R5310K
VCC
C6210uF
R541K
VCC
VCC
R58NM
R570R
VCC
12
Y50
11.0592MHz
C63
18pF
C65
18pF
C66
10uF
C64
10uF
C7410uF
C7910uF
R50180R
R51130R
VCC
ADC1
R52
0RC5310uF
C54100nF
VCC VCCF
C55100nF
R66
33R
R67
33R
R68
33R
R69
33R
R70
33R
R71
33R
VCC
WESECURED
RESET
SI5
SCK6
CS1
WP3
RESET7
SO 2
VCC 8
VSS 4
U50M25PE40
SS0
SPIC
LK0
MO
SI0
MIS
O0
MISO0
VCCC50100nF
MOSI0SPICLK0SS0
VCC
GND1 DQ 2U52
DS2401
D50
GREEN
R62
220R
VCC
TXR
X
R60 0RVCC
W50
Jumper
R551K
VCC
C56100nF
C57100nF
C68100nF
C52100nF
C51100nF
VCCF
VRH VRL
BP7BP6BP5BP4
RESET
P34/T0P35/T1
P46/
T2
P43/
SPIC
LK1
P40/RXD2
P42/
SS1
P33
PSENSEVSENSE
BP0
P47/
T2EX
P31/
TXD
0P3
0/R
XD
0P4
5/M
ISO
1
P41/
TXD
2
P44/
MO
SI
PROG
P55/
TXD
1P5
4/R
XD
1
BP1
N
SEG20
SEG18
SEG16
SEG14
SEG12
ADC1
SEG8
SEG6
SEG4
SEG2
SEG0
TXR
X
P
SEG23SEG22SEG21
SEG19
SEG17
SEG15
SEG13
SEG11
SEG10SEG9
SEG7
SEG5
SEG3
SEG1
DEBUG
BP2
BP3
N P
VNRTRIAC3TRIAC2TRIAC1
TRIA
C0
VNR
TRIA
C0
TRIAC1TRIAC2TRIAC3
R63
33R
R64
33R
R65
33R
R72
33R
R73
33R
R74
33R
1 Initial release 20091111 M.C.
R61
4K7
VCC
2 Updated clock circuit 20091217 M.C.
ADD Semiconductor
ADD1010 Datasheet
©Advanced Digital Design. 2010.
All rights reserved.
Doc Rev 1.04 Datasheet — 11‐Aug‐2010 26 of 26
5.2 Analog Front End example
ADC1
P
N
PHASE
NEUTRAL
150nF
C4
C868nF
C5
68nF
L2
100uH
R510K
16V
R710K
10uH
L1
C647nF
R1210K
R1110K
16V
16V
3V3
3V3R23K
R103K
R310K
R410K
R610K
R1310K
R810K
R1410K
C3
100nF
C7
100nF
D4BAT54
D2BAT54
C10100uF
Q1FDC6420C
Q2NTR4003NT1G
TVS1SM6T15CA
L
N
P
N
C9100nF
R1
1K
C1
100nF
C2100pF
D3BAT54ST1
5024X044
16V
L3
68uH
D1
PMBD7000
R1510K
TXRXTXRX
R17270K
R18270K
R9270K
Optional discharge
C814.7nF
RX CIRCUIT
TX/RX FILTER SELECT
TX CIRCUIT