An1683x Flyback Design

8/18/2019 An1683x Flyback Design

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Power Conversion

Version 1.2 , March 2000

Application Note

AN-SMPS-1683X-1

CoolSET™

TDA16831...-34 for OFF-Line Switch Mode Power Supplies

Author: Harald Zöllinger

Published by Infineon Technologies AG

http://www.infineon.com

N e v e r s t o p t h i n k i n g


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Contents:

Circuit description ....................................................................................................... 2

Operating Principles.................................................................................................... 2

Circuit diagram:........................................................................................................ 4

Design procedure for fixed frequency Flyback Converter with TDA16831...-34

operating in discontinuous current mode. ................................................................... 5

Define input parameters:.......................................................................................... 5

Input Diode Bridge: .................................................................................................. 5

Determine Input capacitor:....................................................................................... 5

Transformer Design: ................................................................................................ 7

Winding design: ....................................................................................................... 8

Output Rectifier:..................................................................................................... 10

Output Capacitor:................................................................................................... 10

Output Filter: .......................................................................................................... 11

VCC-Supply: .......................................................................................................... 11

Calculation of snubber network:............................................................................. 12

Calculation of losses: ............................................................................................. 13

Voltage regulation loop: ......................................................................................... 14

Regulation loop:..................................................................................................... 15

Transfer characteristics of regulation loop elements:............................................. 15

Transformer Construction ...................................................................................... 20

Layout Recommendation:...................................................................................... 21


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Circuit description

The TDA 1683X is a current mode pulse width modulator with an integrated CoolMOS Transistor. Itmeets the need for minimum external control circuitry for a flyback application.Current mode control means that the current through the MOS transistor and flyback transformer iscompared with a feedback signal derived from the output voltage of the flyback application. The resultof that comparision determines the on time of the MOS transistor.To minimize external circuitry the current sense circuitry is integrated within the CoolSET controller.The oscillator resistor and capacitor which determine the switching frequency are also integrated,reducing the external connections. Special efforts have been made to compensate temperaturedependancy and to minimize tolerances of the passive components.

Operating PrinciplesThe TDA1683X is designed for a current mode flyback configuration in discontinous current mode.The control circuit has a fixed frequency, and the duty cycle of integrated Cool-Mos switch iscontrolled to maintain a constant output voltage.The diagram below (Fig. 1) shows the input voltage and the primary and secondary transformercurrent.When the Cool-Mos transistor is turned on, the start of all windings on the transformer will go positive.The rectifier diode on the secondary side will be reverse-biased and will not conduct. Therefore nocurrent will flow in the secondary while the Mosfet is turned on. During this phase energy is beingstored in the primary winding inductance and the transformer may be treated as a simple seriesinductor. The diagram shows that there will be a linear increase of primary current (Ipri) while theprimary Cool-MOS switch is on.When the Cool-MOS transistor is turned off, the voltage will reverse on all windings (flyback action)until clamped by the secondary side widing through the secondary rectifier diode. Now the secondaryrectifier diode will conduct, and the magnetizing energy in the core will now transfer to the outputduring the reset interval.This current will decrease from it’s peak value to zero, as shown in the diagram (Isec). In this period thecomplete stored energy in the primary inductance will be transferred to the secondary (neglectinglosses), before the next store cycle starts. The secondary voltage is “reflected” back through thetransformer turns ratio to the primary winding and added to the input voltage (VIN+VR). Additionaltransient voltage may appear on the primary winding due to energy stored in uncoupled “leakage”inductance in the primary winding which isn’t clamped by the secondary side winding.If the flyback current does not reach zero before the next “on” -cycle the converter is operating incontinous current mode. When this system reverts to the continous operation, the transfer function ischanged to a two pole system with low output impedance and additional design rules becomeimportant.


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Voltage and Current waveforms in discontinous mode operation:

VIN = VINMIN VIN > VINMIN

Fig. 1

VINMIN + VR

VINMIN

0 T

IPEAK IPRI

VIN + VR

VIN

0

IPEAK IPRI

ISEC

IPEAKISEC

IPEAK

Light load full load

tOFF tON TOFF T tON


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Circuit diagram:

Fig. 2


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Design procedure for fixed frequency Flyback Converter withTDA16831...-34 operating in discontinuous current mode.

Procedure Example

Define input parameters:

Minimal AC input voltage : VacminMaximal AC input voltage : VacmaxLine frequency facMax. Output power: POmaxMin. Output power: POminOutput voltage: VOUTOutput ripple voltage: VOrippleReflection voltage: VREstimated efficiency: ηDC ripple voltage: Vripple

Auxiliary Voltage Vaux.Optocoupler Gain: GCUsed CoolSET

85V270V50Hz40W 1W12V0,05V

100V0,820V12V1TDA16834 for 40W @ 25°C

There are no special requirements imposed on theinput rectifier and storage capacitor in the flybackconverter. The components will be selected to meet

the power rating and hold-up requirements.Maximum input power:

η

OUT

MAX

PP = (Eq 1)

Input Diode Bridge:

ϕ cosmin ⋅=

ac

MAX PRMS

V

P I (Eq 2)

2max ⋅= acdcinpk V V (Eq 3)

Determine Input capacitor:

Minimum peak input voltage at ”no load” condition

2minmin ⋅= ac pk dc V V (Eq 4)

W W

P MAX 508,0

40==

AV

W I PRMS 98,0

6,085

50=

⋅=

V V V dcinpk 3822270 =⋅=

V V V pk dc 120285min =⋅=


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ripple pk dcdc V V V −= minmin (Eq 5)

Calculating discharging time at each half line cycle:

+⋅=90

arcsin

15 min

min

pk dc

dc

D

V

V

msT (Eq 6)

Required energy at discharging time:

D MAX IN T PW ⋅= (Eq 7)

Calculating input capacitor value:

2min

2min

2

dc pk dc

IN IN

V V

W C

−

⋅= (Eq 8)

Alternative a rule of thumb on choosing CIN

Input voltage CIN115V 2µF/W230V 1µF/W85V ...270V 2 ...3µF/W....................

IN

IN

pk dcdcC

W V V

⋅−=

22minmin (Eq 9)

Select a capacitor out of Siemens/Epcos Databookof Aluminium Electrolytic Capacitors.

The following types are preferred:

For 85°C Applications:Series B43303-........ 2000h lifetime B43501-........ 10000h lifetime

For 105°C Applications:Series B43504-........ 3000h lifetime B43505-........ 5000h lifetime

we choose a ripple voltage of 20V

V V V V dc 10020120min =−=

msV

V

msT D 1,890

120

100arcsin

15 =

+•=

WsmsW W IN 41,01,850 =⋅=

F V V

WsC IN µ 186

1000014400

41,0222

=−

⋅=

F F W µ µ 150350 =⋅

We choose 180µF 400V

V F

WsV V dc 2,99

180

41,0214400 2min =

⋅−=

µ


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Transformer Design:

Calculation of peak current on primary inductance:

maxmin

2

DV

P I

dc

MAX LPK ⋅

⋅= (Eq 10)

3

max D I I LPK LRMS ⋅= (Eq 11)

Calculating of primary inductance within limit of

maximum Duty-Cycle :

f I

V D L

LPK

dcP ⋅

⋅= minmax (Eq 12)

Select core type and inductance factor (AL) fromSiemens/Epcos ferrite Databook or CD-ROMPassive Components.

Fix maximum flux density:Bmax ≈ 0,2T ...0,3T for ferrite cores depending on corematerial.

We choose 0,2T for material N27

The primary turns can be calculated as:

L

PP

A

L N = (Eq 13)

Number of secondary turns can be calculated as:

( )

R

FDIODE OUT P

V

V V N Ns

+⋅= (Eq 14)

Note the internally limited Duty Cycle!!

Dmax = 0,5 (see datasheet TDA16834)

AV

W I LPK 14,2

47,099

502=

⋅⋅

=

A A I LRMS 85,03

5,014,2 =⋅=

H kHz A

V LP µ 217

10014,2

9947,0=

⋅⋅

=

Selected core: E 32/16/9Material = N27AL = 244 nH

s = 0,5 mmAe = 83 mm

2

AN = 108,5 mm2

lN = 64,4 mm

weight ≈ 30gPV = 190mW/g (200mT, 100kHz, 100°C)

85,29244

217==

nH

H N P

µ turns

we choose Np = 30 turns

( )81,3

100

7,01230=

+⋅=

V

V V Ns

we choose Ns = 4 turns


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Number of auxiliary turns can be calculated as:

( )

R

FDIODE auxP

aux V

V V N

N

+⋅

= (Eq 15)

Postcalculation of primary inductance, primary peakcurrent, max. flux density and gap:

lPP A N L ⋅= 2 (Eq 16)

f Lp

DV I

dc Lpk

⋅

⋅= maxmin (Eq 17)

eP

LPK P

A N

I L B

⋅⋅

=max (Eq 18)

P

eP

L

A N s

⋅⋅⋅⋅=

− 27104 π

(Eq 19)

Winding design:

(see also page 20Transformer Construction)

The primary winding of 30 turns has to be split into15+15 turns in order to get best coupling betweenprimary and secondary winding.

The effective bobbin width and winding cross sectioncan be calculated:

M BW BW e ⋅−= 2 (Eq 20)

BW

BW A A

e N Ne

⋅= (Eq 21)

Calculate copper section for primary and secondarywinding:

The winding cross section AN has to be splitted intothe number of windings.Primary winding 0,5Secondary winding 0,45Auxiliary winding 0,05

( )81,3100

7,01230

=+⋅

= V V V

N aux

we choose Naux = 4 turns

H nH LP µ 220244302 =⋅=

AkHz H

V I Lpk 12,2

100220

47,099=

⋅⋅

= µ

mT mm

A H B 187

8330

12,2220

2max =

⋅

⋅=

µ

mmmH

mms 43,0

22,0

8330104 227=

⋅⋅⋅⋅=

−π

From bobbin datasheet E32/16/9: BW = 20,1mm

Margin determined: M = 4mm

mmmmmm BW e 1,12421,20 =⋅−=


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Copper space factor f Cu :0,2 ....0,4

BW N

BW f A A

P

eCu N P ⋅

⋅⋅⋅=

5,0 (Eq 22)

( )( )( )d AWG log28277,197,9 ⋅−⋅= (Eq 23)

BW N

BW f A A

s

eCu N s ⋅

⋅⋅⋅=

45,0 (Eq 24)

BW N

BW f A A

aux

eCu N aux ⋅

⋅⋅⋅=

05,0 (Eq 25)

With the effective bobbin width we check the numberof turns per layer:

P

Pd

BWe N = (Eq 26)

We calculate the available area for each winding:

Used for calculation: f Cu =0,3

22

31,01,2030

1,123,05,1085,0mm

mm AP =⋅

⋅⋅⋅=

⇒ diameter dp ≈ 0,64mm ⇒ 22 AWG

22

20,21,204

1,123,05,10845,0mm

mm As =

⋅

⋅⋅⋅=

⇒ diameter ds 2 x 0,8mm ⇒ 2 x 20 AWG

22

24,01,204

1,123,05,10805,0mm

mm Aaux =⋅

⋅⋅⋅=

⇒ diameter da ≈ 0,64mm ⇒ 22 AWG

Primary:

1764,0

1,12==

mm

mm N P turns per layer

⇒ 2 layer needed

Secondary:

48,02

1,12=

⋅=

mm

mm N S turns per layer

Aux.:

Can be neglected !


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Output Rectifier:

The output rectifier diodes in flyback converters aresubject to a large peak and rms current stress. Thevalues depend on the load, leakage inductance,operating mode and output capacitor ESR.

Calculation of the maximum reverse voltage:

⋅+=

P

S dcinpk OUT RDIODE

N

N V V V (Eq 27)

Calculation of the maximum current:

S

P LPK SPK

N

N I I = (Eq 28)

max31 D I I SPK SRMS ⋅⋅= (Eq 29)

V V V V RDIODE 9,6230

438212 =

⋅+=

A A I SPK 9,154

30

81,2 ==

A A I SRMS 7,647,0319,15 =⋅⋅=

Output Capacitor:

Output capacitors are highly stressed in flybackconverters. Normally the capacitor will be selected for3 major parameters: capacitance value, low ESRand ripple current rating.

Max. voltage overshoot: ∆VOUT

Number of clock periods: ncp

f V

I C

OUT

OUTMAX

OUT ⋅∆

⋅=

cpn (Eq 30)

Select a capacitor out of SIEMENS/Epcos Databookof Aluminium Electrolytic Capacitors.

The following types are preferred:

For 85°C Applications:Series B41826-........ 4000h lifetime

For 105°C Applications:Series B41856-........ 2000h lifetime

To calculate the output capacitor, it is necessary to fixthe maximum voltage overshoot in case of switchingoff @ maximum load condition.After switching off the load, the regulation loopneeds about 5...10 periods of internal clock to reduce

the duty cycle.

V V OUT 5,0=∆

ncp = 5

F kHzV

AC OUT µ 333

1005,0

533,3=

⋅⋅

=

We select 470µF 25V:

B41826-A5477-M

ESR ≈ Zmax = 0,06Ω @ 100kHzIacR = 2,2A

ISRMS = 6,7A ⇒ 3 capacitor in parallel needed!


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Output Filter:

The output filter consists of one capacitor and oneinductor in a L-C filter topology.

Zero frequency of output capacitor and associatedESR:

OUT ESR

ZCOUT C R

f ⋅⋅⋅

=π 2

1 (Eq 31)

Calculating the needed inductance for substitute thezero of the output capacitor:

ZCOUT

ESROUT

f

R L

⋅⋅=

π 2 (Eq 32)

VCC-Supply:

Start-up Resistor:

ICCLmax = max. Quiescent Current

Il = VCC-Capacitor Load-Current

CVCC = Value of VCC-Capacitor

lCCL

dcstart

I I

V R

+=

max

min (Eq 33)

Start-up Time:

l

CCH VCC start

I

V C t

⋅= (Eq 34)

Internal Zener Diode:Depending on the transformer construction and loadcondition the auxiliary supply voltage varies within an

operating range. If VCC exceeds VZ (16V), theinternal zener diode conducts. In this case we haveto observe the internal power dissipation limits oruse an external zener diode on VCC pin.

kHzF

f ZCOUT 6,547006,02

1=

⋅Ω⋅⋅=

µ π

H kHz

LOUT µ π

56,036,52

06,0=

⋅⋅⋅Ω

=

ICCLmax = 80µA

Il = 40µA

CVCC = 22µF

Ω=+

= k A

V Rstart 827

4080

99

µ

R6 = R7 =1/2 Rstart = 413,5kΩ

Choose: 410kΩ

s A

V F t start 6,6

40

1222=

⋅=

µ

µ

Before the IC can be plugged into the applicationboard, the VCC capacitor has always to bedischarged!


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Calculation of snubber network:

Rdc BRDSS snub V V V V −−= max (Eq 35)

For calculating the snubber network it is neccesary toknow the leakage inductance. Most common way isto have the value of the leakage inductance inpercent of the primary inductance. If it is known thatthe transformer construction is very consistent,measuring the primary leakage inductance byshorting the secondary windings will give an exactnumber, assuming the availability of a good LCRanalyser.

% x Lp L LK ⋅=

( ) snubsnub R LK LPK

snubV V V

L I C

⋅+⋅

=2

(Eq 36)

( )

f I L

V V V R

LPK LK

Rsnub

snub R

⋅⋅⋅

−+=

2

22

5,0 (Eq 37)

V V V V V snub 118100382600 =−−=

In our example we choose 5% of primary inductancefor leakage inductance.

H H L LK µ µ 11%5220 =⋅=

( ) nF

V V V

H AC snub 9,1

118118100

1112,2 2=

⋅+⋅

= µ

≈ 2,2nF

( )Ω=

⋅⋅⋅

−+= k

kHz A H

V V V Rsnub 1,15

10012,2115,0

1001001182

22

µ ≈15k


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Calculation of losses:

Input diode bridge:

2⋅⋅= F PRMS DIN V I P (Eq 38)

Calculation of copper resistance:

P

P N PCu

A

p N l R 100

⋅⋅= (Eq 39)

Calculating of copper loss:

Cu MAX LPK Cu R D I P ⋅⋅⋅= 312 (Eq 40)

Output rectifier diode:

FDIODE SPK DDIODE V D

I P ⋅−

⋅=3

1 max (Eq 41)

MOSFET :TDA16834

COSS ≈ 40pFRDSON = 1,6Ω (@ 150°C)

Switching losses:

f V C P dcOSS SON ⋅⋅⋅= 2

min21 (Eq 42)

( ) r LPK RdcSOFF t f I V V P ⋅⋅⋅+⋅= min61 (Eq 43)

Conduction losses:

max2

31 D I RP LPK DSON D ⋅⋅⋅= (Eq 44)

W V AP DIN 96,12122,1 =⋅⋅=

Copper resistivity p 100 at 100°C = 0,0172Ωmm2 /m

Ω=Ω⋅⋅

= mmm

mmmmm RPCu 3,116

33,0

/ 2,17300644,02

2

Ω=Ω⋅⋅

= mmm

mmmmm RSCu 9,4

04,1

/ 2,1740644,02

2

mW m APPCu 2,823,1163147,049,4

2 =Ω⋅⋅⋅=

mW m APSCu 1949,43147,08,252

2 =Ω⋅⋅⋅=

∑ =+= mW mW mW PCu 2801942,82

W V P DDIODE 36,57,0

3

47,019,15 =⋅

−⋅=

mW kHzV pF PSON 25100994021 2 =⋅⋅⋅=

( ) mW nskHz AV V PSOFF 2103010012,21009961 =⋅⋅⋅+⋅=

W AP D 13,147,05,46,131 2 =⋅⋅Ω⋅=


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Voltage regulation loop:

Reference: TL431VREF =2,5V

IKAmin=1mA

Optocoupler: SFH617-3Gc = 1 ...2 ≡ CTR 100% ...200%VFD = 1,2VIFmax =10mA (maximum current limit)

Primary side:

Feedback voltage:Values from TDA16831...34 datasheet

Vrefint = 5.5V typ.

VFBmax = 4,8V

RFB = 3,7k typ.

FB

ref

FB R

V

I int

max = (Eq 45)

FB

FBref

FB R

V V I

maxint

min

−= (Eq 46)

Secondary side:

−= 121

REF

OUT

V

V R R (Eq 47)

the value of R2 can be fixed at 4,7k

( )

max3

)(

F

REF FDOUT

I

V V V R

+−≥ (Eq 48)

min

min3

4KA

FBFD

I

Gc

I RV

R

⋅+

≤ (Eq 49)

Fig. 3

Fig. 4

mAk

V I FB 5,17,3

5,5max =Ω=

mAk

V V I FB 19,0

7,3

8,45,5min =Ω

−=

k

V

V k R 86,171

5,2

127,41 =

−⋅=

( )k

mA

V V V R 83,0

10

)5,22,1(123 =

+−≥ ≈ 910R

k mA

mA RV

R 4,11

1

2,09102,1

4 =

⋅+

≤ ≈ 1,2k

FB3,7k

5,5V

VFB

R3 R1R4

R5

R2

C2

C1

TL431

Vout


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Regulation loop:

Fig. 5

Transfer characteristics of regulation loop elements:

3

73

R

k GK

C FB

⋅= Feedback

GC= Optocoupler gain

Vout

Vref

R R

RK VD =+

=21

2 Voltage Divider

( )

⋅

+⋅+

⋅⋅+⋅

⋅⋅⋅

⋅=

5

5

21

1

2

1)(

C R R

p

C R p R

R

f L

Z pF

ESR L

ESR L

L

P

PWM

PWR

η Power stage

ZPWM = Transimpedance ∆VFB / ∆ID

9

29

9

1

1)(

C L pC R p

C R p pF

ESR

ESR LC

⋅⋅+⋅⋅+

⋅⋅+= Output filter

( )

)251(121

21

2151)(

C R pC R R

R R p

C C R p pFr

⋅⋅+⋅⋅+⋅

⋅

+⋅⋅+= Regulator

_

+

KFBKVD

FPWR(p) FLC(p)

Fr(p)

Vout

Vref

VIN


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Zero’s and Poles of the transfer characteristics:

Poles of powerstage @ min. and max. load:

Ω=== 6,340

12 2

max

2

W

V

P

V R

O

OUT LH Ω=== 144

1

12 2

min

2

W

V

P

V R

O

OUT LL

5

1

C R foh

LH ⋅⋅=π

HzF

foh 7,6214106,3

1=

⋅Ω⋅=

µ π

5

1

C R fol

LL ⋅⋅=π

HzF

fol 57,11410144

1=

⋅Ω⋅=

µ π

The gain of the optocoupler stage KFB and the voltage divider KVD we use as a constant.

3

73

R

k GK

C FB

⋅= KFB = 6,6 ⇒ GFB = 16,4db

Vout

Vref

R R

RK VD =+

=21

2 KVD = 0,208 ⇒ GVD = -13,6db

With adjustment of the transfer characteristics of the regulator we want to have equal gain within the

operating range and to compensate the pole fo of the powerstage FPWR(ω).

Because of the compensation of the output capacitors zero (see page 10 Eq31, Eq32) we neglect this zeroand the LC-Filter pole.So the transfer characteristics of the power stage is reduced to a single pole response.

In order to calculate the gain of the open loop we have to select the crossover frequency.

We calculate the gain of the Power-Stage with max. output power at the selected crossover frequencyfg = 3kHz:

ZPWM of TDA16834 =1,3 V/A

( )

−⋅+

⋅+−⋅⋅=

−−21 16,011

1T

t

T

t

ON

ON

PWM ON PWM

ON ON

eeT T t t

Z t Z (formula according data sheet page 12)


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with this formula we calculate ZPWM @ max. duty cycle:

( ) A

V eensnss

s A

V t Z ns

s

ns

s

ON PWM 8,116,08508507,47,4

13,1 200

7,4

850

7,4

=

−⋅+

⋅+−⋅⋅=

−− µ µ

µ µ

Gain @ crossover frequency:

+

⋅⋅⋅⋅

⋅=2

1

1

2

1)(

fo

fg

f L R

Z fgF

p L

PWM

PWR

η

065,0

7,62

30001

1

2

8,01002206,3

8,1

1)3(

2=

+

⋅⋅⋅⋅

⋅= kHzuH R

kHzF PWR

⇒ GPWR(3kHz) = -23,7db

Transfer characteristics:

Fig. 6

1 10 100 1 103

1 104

1 105

50

0

5050

50

G PWR( )ω

Gr( )ω

G FB

G MOD

0

.1 1051 ω ( )i

.2 π

GPWR(ω)

Gain[db]

GVD

Gr(ω)

GFB


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At the crossover frequency we calculate for the open loop gain:

Gol(ω) = Gs (ω) + Gr (ω) = 0.

With the equations of the transfer characteristics we calculate the gain of the regulation loop @ fg.

The gain of the regulation loop we calculate:

Gs = GFB + GPWR + GVD = 16,4db – 23,7db – 13,6db

Gs = -20,9db

We calculate the separate components of the regulator:

Gs (ω) + Gr (ω) = 0 ⇒ Gr = 0 – (-20,9db) = 20,9db

( )

)251(121

21

)2151)(

C R pC R R

R R p

C C R p pFr

⋅⋅+⋅⋅+⋅

⋅

+⋅⋅+=

( )

21

215log20

R R

R R RGr

⋅+⋅

⋅= ⇒ 21

21105 20

R R

R R R

Gr

+⋅

⋅=

k k R 7,4172,3105 209,20

=⋅= ≈ 43k

252

1

C R fp

⋅⋅⋅=

π ⇒

fg RC

⋅⋅⋅⋅=

252

12

π fp = 2*fg

pF kHzk

C 6176432

12 =

⋅⋅⋅=

π ≈ 680pF

In order to have enough phase margin @ low load condition we select the zero frequency of compensationnetwork at the middle between min. and max. load pole of power stage.

oh

ol

f

f

ohom f f log5,0

10⋅

⋅= Hz Hz f om 92,9107,62 7,62

57,1log5,0

=⋅=⋅

( )2152

1

C C R fz

+⋅⋅⋅=

π ⇒ 2

52

11 C

fom RC −

⋅⋅⋅=

π

nF pF Hzk

C 38468092,9432

11 =−

⋅⋅⋅=

π ≈ 390nF


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Open Loop Gain

Fig. 7

Open Loop Phase

Fig. 8

1 10 100 1 103

1 104

1 105

50

0

50

70

60

Gr( )ω

Gs( )ω

G( )ω

0

.1 1051 ω ( )i

.2 π

1 10 100 1 103

1 104

1 105

180

142

104

66

28

1010

180

φr( )ω

φs( )ω

φ( )ω

0

.1 1051 ω ( )i

.2 π


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Transformer Construction

The winding topology has a considerable influence on the performance and relaibility of thetransformer.To reduce leakage inductance and proximity to acceptable limits, the use of a sandwich construction isrecommended.In order to meet international safety requirements a transformer for off-line power supply must haveadequate insulation between primary and secondary winding.This can be achived by using a margin wound construction or using triple insulated wire for thesecondary winding.The creepage distance for universal input voltage range is typically 8mm. This sets a minimum marginwidth as a half of the creepage distance to 4mm. Additional the neccesary insulation between primaryand secondary winding is provided using three layers of basic insulation tape.

Example of winding topology for margin wound transformers:

Fig. 9

Example of winding topology with triple insulated wire for secondary winding:

Fig. 10

BW* : value from bobbin datasheet

Primarysecond half

BW*

Primaryfirst half

Auxiliary

SecondaryTriple InsulatedWire

Primarysecond half

Auxiliary

Secondary

margin margin

Triple insulation

Creepagedistance

BW*

BWe

Primaryfirst half


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Layout Recommendation:

Fig. 11

In order to avoid crosstalk between Power- and Signal-Path on the board we have to use careregarding the track layout when designing the PCB.

The Power-Path (see Fig. 11) has to be as short as possible and separated from the VCC-Path andthe Feedback-Path. All GND-Paths have to be connected together at pin 8 (star ground) (1 and 14 atG-type) of TDA16831...34.


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References

[1] Keith Billings, Switch Mode Power Supply Handbook

[2] Ralph E. Tarter, Solid-State Power Conversion Handbook

[3] R. D. Middlebrook and Slobodan Cuk, Advances in Switched-Mode PowerConversion

[4] Herfurth Michael, Ansteuerschaltungen für getaktete Stromversorgungen mitErstellung eines linearisierten Signalflußplans zur Dimensionierung der Regelung

[5] Herfurth Michael, Topologie, Übertragungsverhalten und Dimensionierung häufig eingesetzter Regelverstärker

[6] TDA16831 –4Off-line SMPS Controller with 600V CoolMOS on BoardDatasheet, Infineon Technologies

Revision HistoryApplication Note AN-SMPS-1683X-1Actual Release: V1.2 Date:13.03.2000 Previous Release: V1.1Page ofactualRel.

Page ofprev. Rel.

Subjects changed since last release

24 21 Formatting


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23 of 24 AN-SMPS-1683X-1V1.2

For questions on technology, delivery and prices please contact the InfineonTechnologies Offices in Germany or the Infineon Technologies Companies and

Representatives worldwide: see the address list on the last page or our webpage at

http://www.infineon.com

CoolMOS™ and CoolSET™ are trademarks of Infineon Technologies AG.

Edition 2000-03--03Published by Infineon Technologies AG,St.-Martin-Strasse 53,D-81541 München

© Infineon Technologies AG 2000.All Rights Reserved.

Attention please!

The information herein is given to describe certain components and shall not be considered as warranted characteristics.Terms of delivery and rights to technical change reserved.

We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and chartsstated herein.

Infineon Technologies is an approved CECC manufacturer.

Information

For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office inGermany or our Infineon Technologies Representatives worldwide (see address list).

Warnings

Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your

nearest Infineon Technologies Office.

Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of InfineonTechnologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect thesafety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to supportand/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be

endangered.


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24 f 24 AN SMPS 1683X 1

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