An Operating System for Reconfigurable

Computers

An Operating System for Reconfigurable

ComputersBrandon Hamilton

MSc – University of Cape Town

Brandon HamiltonMSc – University of Cape

TownSupervisor – Prof. Michael Inggs (UCT)

Co-supervisors – Dr. Alan Langman (SKA)Dr. Hayden So (HKU)

Supervisor – Prof. Michael Inggs (UCT)Co-supervisors – Dr. Alan Langman (SKA)

Dr. Hayden So (HKU)

Reconfigurable ComputersReconfigurable Computers

CPUGeneral

SequentialLower performance

ASICSpecificParallel

High performanceProgrammable logic

devices in a system design Hardware-based logic can

be changed to perform various tasks

FPGA

Reconfigurable devices can be configured to provide the best match for thecomputational requirements at that specific time, giving much better

area – speed – power performance.

Reconfigurable Open Architecture Computing Hardware

Benefits of an Operating SystemBenefits of an Operating System

• Operating System support– File system– Network

• Familiar to both Software and Hardware engineers

• Design language independent

• Operating System support– File system– Network

• Familiar to both Software and Hardware engineers

• Design language independent

BORPHBORPH

• Berkeley Operating System for ReProgrammable Hardware

• Treats reconfigurable hardware as computational resources

• UNIX interface to hardware designs

• Hardware processes

• Berkeley Operating System for ReProgrammable Hardware

• Treats reconfigurable hardware as computational resources

• UNIX interface to hardware designs

• Hardware processes

BORPHBORPH

Using BORPHUsing BORPH

• Generate BOF file (Simulink toolchain)– Bitstream– User defined hardware constructs

• Execute BOF process– Configures FPGA– IOREG virtual files• Read/Write to user defined hardware

constructs

• Generate BOF file (Simulink toolchain)– Bitstream– User defined hardware constructs

• Execute BOF process– Configures FPGA– IOREG virtual files• Read/Write to user defined hardware

constructs

Porting BORPHPorting BORPH

• Port and install bootloader– Das U-Boot

• Device Specific code– Configuration of FPGA– Interface to FPGA and other hardware• IOREG interface to READ/WRITE

• Update to latest mainstream kernel• Adapt Simulink toolchain and system

generator

• Port and install bootloader– Das U-Boot

• Device Specific code– Configuration of FPGA– Interface to FPGA and other hardware• IOREG interface to READ/WRITE

• Update to latest mainstream kernel• Adapt Simulink toolchain and system

generator

Further ResearchFurther Research

• Hardware Accelerator model

• Hardware/Software interface

• Shared Memory–Memory Access patterns– Cache coherency

• Hardware Accelerator model

• Hardware/Software interface

• Shared Memory–Memory Access patterns– Cache coherency

Thank youThank you

References• H. K.-H. So and R. Brodersen, "A Unified Hardware/Software

Runtime Environment for FPGA-Based Reconfigurable Computers using BORPH," ACM Transactions on Embedded Computing Systems (TECS), Volume 7, Issue 2, Feb, 2008, New York, NY, USA.

• H. K.-H. So, "Runtime Filesystem Support for Reconfigurable FPGA Hardware Processes in BORPH," In Proceedings of the Sixteenth Annual IEEE Symposium on Field-Programmable Custom Computing Machine, Apr. 2008.

References• H. K.-H. So and R. Brodersen, "A Unified Hardware/Software

Runtime Environment for FPGA-Based Reconfigurable Computers using BORPH," ACM Transactions on Embedded Computing Systems (TECS), Volume 7, Issue 2, Feb, 2008, New York, NY, USA.

• H. K.-H. So, "Runtime Filesystem Support for Reconfigurable FPGA Hardware Processes in BORPH," In Proceedings of the Sixteenth Annual IEEE Symposium on Field-Programmable Custom Computing Machine, Apr. 2008.