An introduction to the wire calculus

Pawel Sobocinski

Southampton, 06/05/09

Process algebra• R. Milner (CCS, pi, ...)

• syntax-directed SOS

• bisimilarity as extensional congruence

• R.F.C. Walters (Span(Graph), ...)

• operations of monoidal categories ⤳ formal graphical representation

• internal state & dynamics important

• Wire calculus combines these features

Motivating example: 3 party synch

F0 F0F1

Motivating example: 3 party synch

F0 F0F1

(0set0)F0

0−→0

F0

(0set1)F0

1−→0

F1

(0Refl)F0

ι−→ι

F0

(1set1)F1

1−→1

F1

(1set0)F1

0−→1

F0

(1Refl)F1

ι−→ι

F1

ι

=no signal

Motivating example: 3 party synch

F0 F0F1

(0set0)F0

0−→0

F0

(0set1)F0

1−→0

F1

(0Refl)F0

ι−→ι

F0

(1set1)F1

1−→1

F1

(1set0)F1

0−→1

F0

(1Refl)F1

ι−→ι

F1

ι

=no signal

d ; I ⊗ (F0 ; F1 ; F0) ; e

Motivating example: 3 party synch

F0 F0F1

(0set0)F0

0−→0

F0

(0set1)F0

1−→0

F1

(0Refl)F0

ι−→ι

F0

(1set1)F1

1−→1

F1

(1set0)F1

0−→1

F0

(1Refl)F1

ι−→ι

F1

ι

=no signal

d ; I ⊗ (F0 ; F1 ; F0) ; e

coordination

Motivating example: 3 party synch

F0 F0F1

(0set0)F0

0−→0

F0

(0set1)F0

1−→0

F1

(0Refl)F0

ι−→ι

F0

(1set1)F1

1−→1

F1

(1set0)F1

0−→1

F0

(1Refl)F1

ι−→ι

F1

ι

=no signal

d ; I ⊗ (F0 ; F1 ; F0) ; e

coordination

dynamics

Plan of talk

• Coordination aspects

• Dynamic aspects

• Example - Petri nets

• Buffers & asynchrony

Components

• Let Σ be a set of signals

• for a -transition is a labelled transition of the form

• A -component is a reflexive & transitive LTS of -transitions with chosen node

• graphically:{ }k l...

...P

k, l ∈ N (k, l)

P�a−→�b

Q, #(�a) = k, #(�b) = l

(k, l)(k, l) P

Simulation & bisimulation

• Q. When are two components and indistinguishable by an external observer?

• Simulation: Relation s.t. if and

• Bisimulation: A simulation such that is also a simulation

• A. There exists a bisimulation that contains

R

S (v, w) ∈ S

v �a−→�b v� then ∃w�. w �a−→�b w� and (v�, w�) ∈ S

P Q

R−1

R(P,Q)

Reflexive & transitive LTSs: Iota rules

P�ι−→�ι R R

�a−→�b Q(ιL)

P�a−→�b Q

(Refl)P

�ι−→�ι P

P�a−→�b R R

�ι−→�ι Q(ιR)

P�a−→�b Q

consequence: “weak” and “strong” bisimilarities coincide

F0 F1

F0 F0F1

reason: avoid unwantedsynchronisation

on “common clock”

Wire constants• another name for one state components

• will give wire calculus expressions later

Picture SemanticsSymbol

I : (1, 1)

(d)d−→aa d

(e)e

aa−→ e

d : (0, 2)

e : (2, 0)

(Id)I

a−→a I

Connecting wires & components

Γ � P : (k, n) Γ � Q : (n, l)

Γ � P ;Q : (k, l)

Γ � P : (k, l) Γ � Q : (m, n)

Γ � P⊗Q : (km, ln)

......

......

P

Q

k l

nm...

......P Q

k ln

P�a−→�c Q R

�c−→�b S(Cut)

P ;Ra−→b Q;S

P�a−→�b Q R

�c−→�d S(Ten)

P⊗R�a�c−→�b�d

Q⊗S

Some simple bisimilarities(P ; Q) ; R ∼ P ; (Q ; R)

∀P : (m,n), P ; (�

n I) ∼ P ∼ (�

m I) ; P

......P...

...P......P ∼ ∼

(P ⊗R) ; (Q⊗ S) ∼ (P ; Q)⊗ (R ; S)(P ⊗Q)⊗R ∼ P ⊗ (Q⊗R)

......

...P Q

......

...R S

wire calculus terms up to ~ are arrows of monoidal cat.

∼ ∼

(η ⊗ I) ; (I ⊗ �) ∼ I ∼ (I ⊗ η) ; (�⊗ I)

Congruence theorem

P ⊗Q ∼ P � ⊗Q Q⊗ P ∼ Q⊗ P �

P ; R ∼ P � ; R S ; P ∼ S ; P �

then:

P, P � : (k, l) Q : (m, n) R : (l, l�) S : (k�, k)

P ∼ P �

......P ∼ ...

...P �

......P

......Q

......P �

......Q

∼...

...Q

......P

......Q

......P �

∼

......R... P ...

...R... P �∼ ......

... PS ......

... P �S∼

Dynamics

syntax-directed SOS, so:

F0 F0F1d ; I ⊗ (F0 ; F1 ; F0) ; e

Dynamics

syntax-directed SOS, so:

F0 F0F1d ; I ⊗ (F0 ; F1 ; F0) ; e

y = 1z = 0Y = 0

F0x−→z X F1

z−→y Y(Cut)

F0;F1x−→y X;Y

Dynamics

syntax-directed SOS, so:

F0 F0F1d ; I ⊗ (F0 ; F1 ; F0) ; e

y = 1z = 0Y = 0

F0x−→z X F1

z−→y Y(Cut)

F0;F1x−→y X;Y

F0x−→0 X F1

0−→1 F0(Cut)

F0;F1x−→1 X;F0

Dynamics

syntax-directed SOS, so:

F0 F0F1d ; I ⊗ (F0 ; F1 ; F0) ; e

y = 1z = 0Y = 0

F0x−→z X F1

z−→y Y(Cut)

F0;F1x−→y X;Y

F0x−→0 X F1

0−→1 F0(Cut)

F0;F1x−→1 X;F0

F0;F1x−→1 X;F0 F0

1−→0 F1(Cut)

F0;F1;F0x−→0 X;F0;F1

Dynamics

syntax-directed SOS, so:

F0 F0F1d ; I ⊗ (F0 ; F1 ; F0) ; e

y = 1z = 0Y = 0

F0x−→z X F1

z−→y Y(Cut)

F0;F1x−→y X;Y

F0x−→0 X F1

0−→1 F0(Cut)

F0;F1x−→1 X;F0

F0;F1x−→1 X;F0 F0

1−→0 F1(Cut)

F0;F1;F0x−→0 X;F0;F1

(⊗)I⊗(F0;F1;F0)

wx−−→w0 I⊗(X;F0;F1)

Dynamics

syntax-directed SOS, so:

F0 F0F1d ; I ⊗ (F0 ; F1 ; F0) ; e

y = 1z = 0Y = 0

F0x−→z X F1

z−→y Y(Cut)

F0;F1x−→y X;Y

F0x−→0 X F1

0−→1 F0(Cut)

F0;F1x−→1 X;F0

F0;F1x−→1 X;F0 F0

1−→0 F1(Cut)

F0;F1;F0x−→0 X;F0;F1

(⊗)I⊗(F0;F1;F0)

wx−−→w0 I⊗(X;F0;F1)

(Cut)(I⊗(F0;F1;F0));e

0x−→ I⊗(X;F0;F1);e

Dynamics

syntax-directed SOS, so:

F0 F0F1d ; I ⊗ (F0 ; F1 ; F0) ; e

y = 1z = 0Y = 0

F0x−→z X F1

z−→y Y(Cut)

F0;F1x−→y X;Y

F0x−→0 X F1

0−→1 F0(Cut)

F0;F1x−→1 X;F0

F0;F1x−→1 X;F0 F0

1−→0 F1(Cut)

F0;F1;F0x−→0 X;F0;F1

(⊗)I⊗(F0;F1;F0)

wx−−→w0 I⊗(X;F0;F1)

(Cut)(I⊗(F0;F1;F0));e

0x−→ I⊗(X;F0;F1);e

(Cut)d;(I⊗(F0;F1;F0));e−→ d;I⊗(F0;F0;F1);e

Flip flops - another example

Using reflexivity, a step of the system is one of:1. step of the upper component2. step of the lower component3. concurrent step (“true” concurrency!)

F0 F1

F0 F0F1

(d⊗ d) ; (I ⊗ F0 ⊗ I ⊗ F0) ; (I ⊗ F1 ⊗ I ⊗ F1) ; (e⊗ I ⊗ F0) ; e

Plan of talk

• Coordination aspects

• Dynamics aspects

• Example - Petri nets

• Buffers & asynchrony

Prefix

• like input prefix in value-passing CCS

• simple pattern matching

uv [ϕ]:(k, l) Γ � P : (k, l)

Γ � uv [ϕ]P : (k, l)x - set of signal variables

u, v ∈ x∗ #u = k #v = l vars in and are bound in .u v P

uv [ϕ] : (k, l)

- set of constraints on varsϕ

Prefix, ctd.

01P x

y [x = 0, y = 1]Pdef=

Useful abbreviations:

x�=ax Y

def= xx [x �= a]P

�ϕ|σ(Pref)

uv [ϕ]P

u|σ−−→v|σP |σ

- function that satisfies .

σ : x→ Σ� ϕ|σϕ

RecursionP [µY. P/Y ]

a−→b Q(Rec)

µY. Pa−→b Q

Γ,Y � P : (k, l)

Γ � µY. P : (k, l)

• standard

Examples - basic wiresI

def= µY. xxY

(d)d−→aa d

(e)e

aa−→ e

(Id)I

a−→a I

ddef= µY. xxY

edef= µY. xxY

Choice

• Similar to CSP choice

Γ � P : (k, l) Γ � Q : (k, l)

Γ � P+Q : (k, l)

P�a−→�b Q ( �ab �=�ι)

(+L)P+R

�a−→�b Q

P�a−→�b Q ( �ab �=�ι)

(+R)R+P

�a−→�b Q

P�ι−→�ι Q R

�ι−→�ι S(+ι)

P+R�ι−→�ι Q+S

�

Example - flip flops

(0set0)F0

0−→0

F0

(0set1)F0

1−→0

F1

(0Refl)F0

ι−→ι

F0

(1set1)F1

1−→1

F1

(1set0)F1

0−→1

F0

(1Refl)F1

ι−→ι

F1

F0def= µY. 0

0Y + 10µZ. ( 1

1Z + 01Y )

F1def= µZ. 1

1Z + 01µY. ( 0

0Y + 10Z)

Bisimilarity & dynamics

then:

P, Q, R : (k, l)

P ∼ Q

uv [ϕ]P ∼ u

v [ϕ]Q

P + R ∼ Q + R

R + P ∼ R + Q

Summary

P�ι−→�ι R R

�a−→�b Q(ιL)

P�a−→�b Q

(Refl)P

�ι−→�ι P

P�a−→�b R R

�ι−→�ι Q(ιR)

P�a−→�b Q

P�a−→�c Q R

�c−→�b S(Cut)

P ;Ra−→b Q;S

P�a−→�b Q R

�c−→�d S(Ten)

P⊗R�a�c−→�b�d

Q⊗S

P [µY. P/Y ]a−→b Q

(Rec)µY. P

a−→b Q

P�ι−→�ι Q R

�ι−→�ι S(+ι)

P+R�a−→�b Q+S

P�a−→�b Q ( �ab �=�ι)

(+L)P+R

�a−→�b Q

P�a−→�b Q ( �ab �=�ι)

(+R)R+P

�a−→�b Q

�ϕ|σ(Pref)

uv [ϕ]P

u|σ−−→v|σP |σ

P ::= x | Y | P ; P | P ⊗ P | uv [ϕ]P | P + P | µY. P

Plan of talk

• Coordination aspects

• Dynamics aspects

• Example - Petri nets

• Buffers & asynchrony

Example 2 - Petri nets

• to handle Petri nets, we will need to build up our library of wire constants

• this time, we will express them using the operators for dynamics

• we also provide SOS characterisations

Petri net conditions

� def= µY. •ι

ι•Y �• def= ι

•�

�•�

• will be modelled using the following (1,1) terms:

• events will be modelled by appropriate wiring

Events• possibly have several pre/post conditions

• need diagonals and codiagonals

∆def= µY. x

xxY(∆)

∆a−→aa ∆

∆def= µY. xxx Y

(

∆

)∆aa−→a

∆

⊥⊥⊥ def= µY. xY

��� def= µY. xY(���)

���−→a ���

(⊥⊥⊥)⊥⊥⊥

a−→ ⊥⊥⊥

Bisimulations

Example

��

�•

Conditions• possibly have several in/out events

• need linear diagonals and codiagonals

(ΛL)Λ

a−→aι Λ

(VL)V

aι−→a V

Λdef= µY. x

xιY + xιxY

Vdef= µY. xι

x Y + ιxx Y

(↓↓↓)↓↓↓

ι−→ ↓↓↓

(↑↑↑)↑↑↑−→ι ↑↑↑

↓↓↓ : (1, 0) def= µY. Y

↑↑↑ : (0, 1) def= µY. Y

Bisimulations

Example

Full abstraction

Me−→M � �M� −→ �M ��

�M� −→ P

∃M �. �M �� = P & (M � = M ∨ ∃e1, . . . , em.e1−→ · · · em−−→ M �)

Plan of talk

• Coordination aspects

• Dynamics aspects

• Example - Petri nets

• Buffers & asynchrony

Interleaving parallel operator

• commutative & associative

X | Ydef= Λ ; (X ⊗ Y ) ; V

X

Y

X

Y

“CCS-like” parallelFeedback

nb: associativity holds, but is not trivial to prove

Consequence of construction:preserves bisimilarity

fb(P )def= (d⊗V);(I⊗P );(e⊗Λ)

P

Buffers & Queues• Unordered unbounded output buffer

def=B1

def= xι

ιx0

B def= µY.B1 | YB

B1

B

• Queue

C[X]ι−→ι C[X]

σ∈Σ

C[X]σ−→ι C[X+σ] C[X+σ]

ι−→σ C[X]

Q def= µY. xι (Y ; ι

xI)

Lemma

• (cf. Selinger 1997)

•

•

•

B ; B ∼ B

Q ; Q ∼ Q

Q ; B ∼ B

Asynchronous comm.

• Can be modelled by putting an output buffer on a wire

• Different kinds of asynchrony can be studied (queues vs buffers)

• Asynchronous and synchronous communication can co-exist in the same system

Related work (lots!)• Milner - CCS

• Gadducci Montanari - Tile systems

• Laneve Montanari - Connectors

• R.F.C. Walters et. al. - Span(Graph)

• Interaction categories (Abramsky)

• SOS Formats

• Coordination languages, glue operators (Siafikis, Bliudze), REO

Conclusions• category theory for the process algebraist!

• formal graphical notation

• “weak” bisimulation does not exist -- there is only one kind of bisimilarity

• combining dynamics & coordination allows dynamic changes to wiring

• model systems with several communication paradigms