An All-Ceramic Interconnect for Use in Solid-Oxide Fuel Cell Stacks

596 MRS BULLETIN • VOLUME 30 • AUGUST 2005

IntroductionFuel cells are electrochemical devices

that directly convert chemical energy intoelectricity. Because fuel cells operate atlow voltages (less than one volt per cell),cells are stacked in series to produce us-able power. In a fuel cell stack, adjacentcells are separated by interconnects. Theinterconnects in a stack serve three impor-tant purposes. First, they distribute the airand fuel gas to the respective electrodes.Second, they must be hermetic so that theair and fuel are not permitted to physi-cally mix in the stack. Third, they providean electrical path for electrons from onecell to be transported to the adjacent cell ina stack. Solid-oxide fuel cell (SOFC) stacksemploy one of three approaches for the in-terconnects: metal interconnects, electri-cally conductive ceramic perovskites, or

nonconducting ceramic structures con-taining vias for electrical conduction. Viasare electrical conduits in a planar structurethat are processed by punching or drillingholes, then filling them with an electricallyconductive paste. This material is then cosintered with the main body of the laminated structure.

Of the three interconnect types, clearlymetal interconnects are the most widelyused. However, the metal interconnectsare not without technical issues, which arecurrently being addressed by fuel cell de-velopers and groups performing materialsresearch. New materials have shown agood coefficient of thermal expansion(CTE) match with the cell and reducedelectrical resistance of oxide scales, but thelong-term electrical conductivity of the

oxide scales must be verified. In addition,the evolution of chromium-containingspecies from the ferritic stainless steelsand subsequent deleterious reactions withthe SOFC cathode remain a concern.Other areas being studied include scaleadherence and corrosion resistance underoxidizing and reducing environments inthe fuel cell reactant streams.1,2 A seal ma-terial is typically used around the perime-ter of the cells to eliminate the possibilityof gas leakage into or out of the region ad-jacent to the cell electrodes. To maintainthis seal, it is desirable that the CTE of theinterconnect closely match that of the cell.These issues are currently being studied,with the goal of developing materialsand/or operating conditions that permitthe use of metal interconnects in SOFCstacks.

SOFCo-EFS (Alliance, Ohio) is develop-ing a novel, multilayer, planar SOFC stackdesign that combines advanced SOFC ma-terials with the manufacturing technologyand infrastructure established for multi-layer ceramic (MLC) packaging for themicroelectronics industry. The basic de-sign for the patented all-ceramic intercon-nect is illustrated in Figure 1. Theinterconnect consists of multiple denselayers of yttria-stabilized zirconia (YSZ)and provides the essential functions ofelectrical conduction, distribution of airand fuel flow, and gas separation. Electri-cal conduction is accomplished throughthe use of conductive vias that are fabri-cated into each YSZ layer; the use of con-ductive vias is well established in themicroelectronics packaging industry. Thevia diameter, spacing, and number are de-termined by the conductivity of the viamaterial and the amount of current flow-ing in an operating stack. Cosintering ofthe vias and zirconia layers during thefabrication of the interconnect presentscomplex materials issues in terms of avoid-ing adverse reactions and achieving shrink-age matching. In addition, the CTE mustalso be equal for these different materialsfor long-term stack reliability.

The flow of air and fuel through the in-terconnect is accomplished by the use ofchannels formed in selected layers. The

An All-CeramicInterconnect for Usein Solid-Oxide FuelCell StacksThomas A. Morris, Eric A. Barringer,

Steven C. Kung, and Rodger W. McKain

AbstractThis article summarizes a unique approach in which all-ceramic interconnects are

used in place of metal interconnects in solid-oxide fuel cell (SOFC) stacks.The approachcombines advanced SOFC materials with the manufacturing technology andinfrastructure established for multilayer ceramic (MLC) packaging for themicroelectronics industry.The MLC interconnect is fabricated using multiple layers ofyttria-stabilized zirconia (YSZ) tape, with each layer containing conductive vias to providefor electrical current flow through the interconnect.The all-ceramic interconnect designfacilitates uniform distribution of air and fuel gas to the respective electrodes of adjacentcells.The multilayer interconnects are fabricated using traditional MLC manufacturingprocesses. A detailed description of the processes for fabricating the all-ceramicinterconnect is presented.To aid in moving from prototype fabrication tocommercialization of these fuel cell systems, a detailed cost model has been used as aroadmap for commercial stack development. Cost model projections are presented forthree different interconnect footprint sizes.These projections show an SOFC stack costof less than $150 per kilowatt for the optimized SOFC stack design produced at highvolume.

Keywords: ceramics, layered structure, solid-oxide fuel cells, zirconia, interconnects.

Figure 1. Schematic illustration of amultilayer co-flow interconnect.

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MRS BULLETIN • VOLUME 30 • AUGUST 2005 597

channel width and depth (i.e., layer thick-ness) are determined by the reactant flowrates and the allowable pressure dropthrough the stack. The vias and air flowchannels for a typical co-flow interconnectare shown in Figure 2. Integral gas distri-bution channels and other features are in-cluded in the design to facilitate theuniform distribution of reactants acrossthe electrodes, which is essential toachieving high fuel utilization and con-trolling temperature gradients. Close CTEmatch between the interconnects andzirconia-based cells provides for effectivestack sealing and improved mechanicalintegrity during thermal transients.

Assembly of a stack using the multi-layer interconnects requires a number ofsteps to achieve the required seals andelectrical contacts. First, a seal must be ap-plied to keep air and fuel fed to the stackfrom escaping to the surrounding region,thus maintaining the effectiveness of thefuel cells. SOFCo currently uses a ceramicpaste to form the seal between cells andinterconnects. Figure 3 shows a ceramicinterconnect with a bead of paste appliedaround the outside perimeter. A conduc-tive ink is also applied to the vias to formthe electrical connection to the electrodesin the adjacent cells.

In addition to the internal stack sealing,fuel cell stacks must have good seals be-tween the manifolds and the stacks toavoid losing fuel and air to the areaaround the stacks. For a co-flow stack de-sign with a single enclosure housing theair and fuel inlets, a seal must exist thatdoes not permit air and fuel to mix in theinlet manifold. Figure 4 shows a SOFCo

short stack and matching manifold. Themanifold has inlet plenums (enclosureswithin the stacks that contain gas at ahigher pressure than the region into whichit will flow) to provide a constant-pressuresupply of air and fuel to all cells. Sealingbetween the stack and manifold is accom-plished with a ceramic-fiber gasket.

Interconnect FabricationProcesses

The multilayer interconnects are fabri-cated using established MLC manufactur-ing processes, including tape casting,punching, screen printing, lamination, ex-cising, and firing. A process flow diagramdepicting the basic steps that are used infabricating the all-ceramic interconnects isshown in Figure 5. The interconnect de-sign is well within the standard design-for-manufacturing guidelines practiced inthe microelectronics packaging industry.Furthermore, the equipment needed formanufacturing interconnects of up to20 cm is readily available.

Slip and Tape Cast Processing(Plastic–Ceramic Composites)

The initial step in the manufacture ofthe all-ceramic interconnect is the prepara-tion of a slip, or slurry, that compriseshigh-purity zirconia powder along withpoly(vinyl butyral) as the binder, butylbenzyl phthalate as the plasticizer, sodiumpoly(oxyethylene phenyl ether phos-phate) as the dispersant, and a mixture ofsolvents. The slip is prepared in a two-stage process. Zirconia powder is firstmilled to the desired surface area and par-ticle size distribution with some of the sol-

vent and dispersant before being mixedwith the remaining solvent, binder, andplasticizer. The zirconia slip used to maketape for the interconnect layers typicallyhas a viscosity of 5000–7000 cP, or roughlythe consistency of house paint.

Casting the tape can be accomplished ineither a batch or continuous process. Forlarge-volume production, continuous tapecasters are required. The zirconia slip ispoured into a reservoir behind a blade(commonly called a doctor blade) onto amoving surface. Continuous tape castershave a steel belt that loops continuouslybetween the casting end (the end with thedoctor blade) and the exit end. Often apoly(ethylene terephthalate) film is placedon the steel belt to separate it from the slipand act as the carrier. The gap between thedoctor blade and the film determines thethickness of the wet tape. The wet tapecontinues to travel along on the movingsurface through the drying section of thetape caster. Several operating variables as-sociated with the tape caster, such asspeed, temperature, and air flow, deter-mine the final thickness and properties ofthe tape.3 When the tape exits the rela-tively long caster (typically 12–24 m), it isdry to the touch and can then be cut to theappropriate size for subsequent opera-tions. Zirconia tape is further conditionedin a low-temperature oven to drive off ex-cess solvent and provide dimensional sta-bility. At this point in the process, the tapeis flexible enough for handling and doesnot crack with minor bending. This is adesirable characteristic of the tape that al-lows processing in the downstream stepswithout damaging it.

An All-Ceramic Interconnect for Use in Solid-Oxide Fuel Cell Stacks

Figure 2. (a) Photograph of an interconnect (�2.4 mm thick), showing the air flowpassages. (b) Cross section, through the YSZ layers, of a via (�380 µm in diameter).Theimage is a scanning electron micrograph in secondary electron image mode.

Figure 3. Air side of a parallel-flow10-cm.-wide ceramic interconnectready for assembly. A bead of paste isapplied around the outside perimeter,and a conductive ink is applied to thevias to form the electrical connection tothe electrodes in the adjacent cells.


Tape Blanking, Printing, andLamination

After the tape is produced, it is cut orblanked into standard sizes ready for thefirst round of punching. In this step, thetape blanks are punched with via and reg-istration holes. The registration holes areused in many of the subsequent steps as away of positioning the tape layers on the

equipment to maintain proper alignment.At present, the punching operation is accomplished with a numerical punchmachine for low-volume production of interconnects. These are cost-effective, es-pecially in a prototyping situation inwhich minor changes may be made in thecomponent design. For high-volume com-ponent production, the punching will likelybe performed using a once-through stamp-ing or gang punch operation on individualtape layers.

Following the first punching step, thevias are filled with a conductive paste anddried in a low-temperature oven. Thepaste is presently made from a cermetconsisting of powders of platinum andzirconia. The composition of the conduc-tive paste was engineered to achieve thedesired conductivity and to match theCTE of the YSZ interconnect. Finite ele-ment analysis was performed to deter-mine the optimal CTE for the filled viamaterial without introducing interfacialtensile stress to the via walls. The resultssuggested that the difference should be nomore than 0.5 10–6 from the CTE of zir-conia (i.e., 10.8 10–6). Based on thisguideline, a conductive paste was formu-lated with the required ratio of platinumto zirconia to achieve a CTE of approxi-mately 10.5 10–6. Figure 6 is a cross-sectional scanning electron microscopyimage in backscattered mode of a via,showing the distribution of platinum par-

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ticles in a zirconia matrix. The platinum iswell distributed in a continuous phasethroughout the via, thereby providing therequired electrical path.

A second punching step follows the viafilling in which the integral manifolds andflow channels are punched in the variouslayers. The punching pattern for eachlayer of the multilayer ceramic intercon-nect is unique. When combined into asingle laminated component, the individ-ual punched layers form the flow chan-nels that direct the air and fuel to therespective electrode surface. The centrallayer acts as a separator between the airand fuel sides of the interconnect. The sep-arator layer contains vias to conduct elec-tric current between the air and fuel sidesof the interconnect and serves as a her-metic seal between the air and fuel flowlayers.

After the individual layers have under-gone the second punching step, the layersare laminated together. Several differentlamination options exist: the layers can be pressed together using high-pressure thermal lamination, or they can be “glued” together by means of a solvent-assistedprocess at room temperature using a rela-tively low pressure. During the early proc-ess development stage, SOFCo engineersfound that excessive lamination pressurefrom thermal lamination caused cracksand deformation in the fired parts. Wheninsufficient pressure was used, delamina-tions were found to occur. By using alower lamination pressure in conjunctionwith a small amount of solvent, tapecracks, delaminations, and deformationswere minimized. As a result, the currentmethod used by SOFCo involves solvent-assisted lamination at room temperature.A small amount of solvent is used to assistin the lamination process by activating the


Figure 4. Manifold and stack inlet arrangement.The five-cell stack, comprised of 10 cmcomponents, is shown with fuel and air inlets.The arrays of fuel and air inlets are created bystacking interconnects with a fuel cell between two adjacent interconnects. Including theceramic end blocks, the stack is �5 cm high.The matching manifold is shown lying down topermit visual access to its internal structure.The manifold internals match with the fuel andair inlets, and a gasket is used to keep air and fuel from mixing at the stack inlet face.

Figure 5. Interconnect fabrication proc-ess flow diagram.

Figure 6. Cross-sectional scanningelectron micrograph of a via, showingthe distribution of platinum and zirconia.The platinum is well distributed in acontinuous phase throughout thezirconia, thereby providing thenecessary electrical path. Width ofimage is �40 µm.

MRS BULLETIN • VOLUME 30 • AUGUST 2005 599

binder at the tape surfaces, and an inter-mediate pressure is applied to bring theactivated surfaces together. This highlightsthe importance of interfacial chemistriesduring processing and operation.

To prepare for the next step of cofiring,the green laminates are cut or excised tosize by trimming the excess material andregistration holes. Three different excisingtechniques can be used for this applica-tion: laser cutting, diamond sawing, andhot knife excising. Laser cutting offers ac-curate and fast cutting along the beampath and is capable of achieving complexand intricate patterns on a variety of mate-rials. However, laser cutting of green lam-inates can produce debris on the cut edgethat can contaminate the interconnect. Inaddition, the cut edges may be slightlybeveled due to the shape of the beam. Ex-cising with a diamond saw can producegood edge quality on the green laminates.This technique has been widely used bythe semiconductor industry for dicing ceramic components. A hot knife is de-signed specifically for cutting multilayerceramic components in a clean-room environment. The process can producegood edge quality on the green laminatesand is completely dust-free. SOFCo cur-rently uses both hot knife excising and diamond sawing.

Cosintering ProcessThe next step in the MLC process is the

cofiring of the green laminates. When ceramic materials are fired at elevatedtemperatures, they typically exhibit con-siderable shrinkage that must be consid-ered in the fabrication processes. For theall-ceramic interconnect fabricated withYSZ, the shrinkage is approximately 21%.Because the via material is different fromthe base interconnect YSZ, its shrinkagemust match that of the YSZ. In addition,the shrinkage profiles of both materialsmust closely match each other during sin-tering. This match is required at the inter-face between the via and the adjacent YSZmaterial to maintain a gas-tight structure.The via material and YSZ tape have beenengineered to achieve the required shrink-age behavior. Upon defining the via com-position (ratio of platinum to zirconia), theparticle size distribution and surface areaof the powders were varied and sinteringtrials were performed until the totalshrinkage and shrinkage profile matchedthose of the interconnect YSZ material.

The interconnects are fired in a sequen-tial batch process that includes plasticizerburnout (PBO), binder burnout (BBO),and sintering of the laminate. PBO andBBO are performed in an oven at temper-atures of approximately 200�C and 400�C,

respectively. Sufficient air flow is requiredto achieve uniform burnout of the organicconstituents. The PBO and BBO steps canbe combined into a single heat-treatmentstep by programming the oven with asuitable temperature cycle. It has beenfound that the PBO treatment is essentialprior to sintering to relieve the residualstress of the green laminates by creatingmicroporosity. Once the stress is relieved,the interconnects can better withstand thethermal stress generated from the temper-ature gradient in the sintering furnace. Inaddition, the use of a separate BBO stepserves to eliminate the need for high airflow in the sintering furnace. Without aircirculation, a uniform temperature profilecan be maintained in the sintering fur-nace. Moreover, separation of the BBOstep from the sintering operation leads toa shorter overall cycle time for the firingprocess, thus increasing the productionoutput.

The cofiring operation is presently car-ried out by placing individual compo-nents on kiln furniture that is stacked forfiring at 1350–1450�C in the batch furnace.Figure 7 shows columns of kiln furniture,containing the interconnect laminates,stacked on the floor of a high-temperaturefurnace prior to sintering. The use of abatch furnace works well for firing rela-tively small quantities of interconnects.However, for large-volume production of interconnects, a continuous furnacewould be used. A typical production sys-tem might include a pusher plate tunnelkiln in which the stacked kiln furnituresits on ceramic plates moved continuouslythrough the furnace. The pusher platestravel at a predetermined speed to main-tain the desired heating profile for theparts.

After the interconnects are processedthrough the sintering step, a final inspec-

tion is performed. In general, an intercon-nect is considered acceptable for use in afuel cell stack when it exhibits excellentflatness and low via resistance and is withindimensional tolerances. In addition, theinterconnects must be free of cracks anddelaminations that would otherwise de-grade the performance of the stack.

Manufacturing Cost ModelUsing sources within the MLC industry,

SOFCo has established a robust produc-tion cost model that includes the mate-rials, labor, and equipment for each step in the high-volume manufacture of all-ceramic SOFC stacks. In addition, SOFCohas developed a number of models toevaluate stack performance (e.g., coupledthermal–electrochemical models) and in-tegrity (e.g., finite element structural mod-els). Using these models, SOFCo hasperformed extensive analyses for a num-ber of stack design variants, many alterna-tive low-cost materials, and differentprocess options for key manufacturingsteps. As an example, the cost model hasbeen used to evaluate the effect of increas-ing the cell and interconnect sizes, from10 cm to 15 cm to 20 cm. Figure 8 showsthat the estimated cost drops significantlyas the footprint increases. Examination ofthe cost estimates on a more detailed basisshowed that the material cost per kilowattremained about the same as the footprintincreased, but the cost per kilowatt for theremaining cost elements (labor, indirectmaterials, and manufacturing overhead)dropped substantially. This trend was pri-marily due to the increased power per re-peat unit (cell plus interconnect) as a resultof the higher cell active area. The modelhas been used to evaluate other processoptions, such as equipment type, equip-ment size, and throughput. Using thismodel, the manufacturing cost for an opti-mized SOFC stack design has been pro-jected to be less than $150 per kilowatt.

Challenges and FutureDevelopment for Low-Cost SOFC Stacks

To meet the broad commercial targetsfor cost and performance, several differentapproaches have been evaluated for re-ducing the cost of the manufactured com-ponents in the fuel cell stack. Theseapproaches include scaling up manufac-turing to larger cells and interconnects, in-troducing higher-power-density cells intostacks, and implementing lower-cost materials. While larger footprints andlower-cost materials can reduce the cost offabricated components, increased powerdensity has a direct impact on the numberof components required for a given power


Figure 7. Kiln furniture, containing fuelcell laminates, stacked on the floor of ahigh-temperature furnace prior tosintering.The inside dimensions of thefurnace are 46 mm 46 mm.�


output. For example, doubling the powerdensity of a stack will double its poweroutput at fixed operating conditions,which will cut the cost per kilowatt in half.Doubling the power density could be ac-complished by reducing the electronic re-sistance of the stack by 50% through cellmaterial improvements, better cell stack-ing procedures, and lower interconnect re-sistance. No other changes in the materialselection or fabrication processes can haveas significant an impact on the cost of thefinal product as the power density.

Larger interconnects and cells are beingevaluated for use in SOFC stacks. Designfactors such as structural integrity and air-side pressure drop are taken into con-sideration in the evaluations, as are fabri-cation factors such as ease of handling andconformance with standard manufactur-ing equipment. Currently, prototype com-ponents are being manufactured, afterwhich they will be structurally evaluatedand tested in fuel cell stacks to determinetheir acceptability for commercial use.

Greater than 90% of the material withinthe SOFCo stack is YSZ. To date, most ofthe interconnects fabricated for SOFCohave used an expensive powder from asingle supplier. Several lower-cost sourcesof YSZ for the interconnect will be evalu-ated in the near future. To qualify a newpowder, prototype parts must be madeusing the candidate powder, and produc-tion tests must demonstrate acceptableperformance.

The final area for materials substitutionfor cost reduction will be the replacementof the via materials currently in use. As

mentioned previously, the MLC inter-connect was developed using a platinum-YSZ cermet for the conducting vias. Al-though expensive, this material wasfound to be compatible with the YSZ material in terms of sintering behavior (i.e.,shrinkage match) and CTE. As a result,rapid development of the MLC inter-connect was facilitated by using the Pt-YSZ via materials. Efforts are now beingdirected toward the development and implementation of lower-cost via materials.Prototype interconnects with the fuel- andair-side vias replaced with a nickel cermetand a perovskite oxide, respectively, havebeen produced and tested. The inter-connect design and via compositions arebeing modified to optimize performance.

ConclusionSignificant progress has been made to

demonstrate the potential use of ceramicinterconnects for SOFC applications.SOFCo’s all-ceramic design uses multi-layer ceramic fabrication processes thathave been used in the microelectronicspackaging industry for years. Current im-provements to the components includethe implementation of less-expensive materials for the YSZ body of the inter-connect and for the platinum-based viamaterials as well as the incorporation oflarger components. Component fabrica-tion is moving from low-volume proto-typing to higher-volume manufacturingto support the commercialization of fuelcell power systems. SOFCo forecasts thatimplementing these improvements andmanufacturing at high volumes will lead

to an SOFC stack costing less than $150per kilowatt, thus meeting a key commer-cial target.

References1. Z.G. Yang, G. Xia, P. Singh, and J. Stevenson,“Advanced Metallic Interconnect Develop-ment” in SECA Core Annual Workshop and CoreTechnology Program Peer Review (Boston, 2004).2. S. Elangovan, in SECA Core Annual Workshopand Core Technology Program Peer Review(Boston, 2004).3. R.E. Mistler and E.R. Twiname, Tape CastingTheory and Practice (American Ceramic Society,Westerville, Ohio, 2000). ■■


Figure 8. Cost model projections for the impact of increasing the footprint for high-volumeproduction of all-ceramic solid-oxide fuel cell stacks.

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An All-Ceramic Interconnect for Use in Solid-Oxide Fuel Cell Stacks

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