An air-flow based wafer bake system for improved temperature uniformity

6
An air-flow based wafer bake system for improved temperature uniformity Wang Lan a, * , Loh Ai Poh a , Gong Zhi Ming b , Chow Siew Loong b a Department of Electrical and Computer Engineering, National University of Singapore, 4 Engineering Drive 3, Singapore 117576, Singapore b Singapore Institute of Manufacturing Technology, 71 Nanyang Drive, Singapore 638075, Singapore article info Article history: Received 11 July 2007 Received in revised form 21 January 2008 Accepted 6 April 2008 Keywords: Microlithography Wafer-baking process Post exposure bake (PEB) Temperature uniformity abstract This paper presents an innovative apparatus for wafer baking/chilling using a stream of temperature con- trolled air-flow. This apparatus takes the form of a baking chamber on which the wafer is placed. A stream of hot air is passed through the chamber below the wafer. Heat is transferred from the hot air to the wafer from the bottom surface of the wafer. If the chamber has a uniform cross-section, heat will be lost along the direction of flow and eventually the far-end of the wafer will be cooler. As a result, tem- perature uniformity across the wafer will be very poor. In our innovation, we have designed a tapered chamber through which the hot air-flows. The idea is to control the speed of the air-flow through the channel which in turn improves the coefficient of heat transfer between the hot air and the wafer. This helps tremendously in achieving temperature uniformity of the wafer. Numerical analysis and simulation results are used to support our design. We show how the gradient of the tapered channel affects temper- ature uniformity and we are able to deduce the optimal gradient under simulation conditions. Ó 2008 Elsevier Ltd. All rights reserved. 1. Introduction The increase in complexity of integrated circuits (IC), coupled with the decreasing size of individual circuit elements, is placing more stringent demands on the fabrication process. In particular, the variation in the critical dimension (CD) which is the size of the smallest feature in the design, has to be carefully controlled during the lithography process as tolerances become smaller. Among the basic semiconductor manufacturing processes, lithog- raphy is the most complicated, expensive, and critical process. Thus there is increased interest in monitoring and controlling the various steps in lithography. In particular, the primary contributor to CD variance is the post exposure bake (PEB) temperature unifor- mity [1]. Some experts attribute up to 30% of the CD error budget to PEB temperature variations from hot plate to hot plate or within the plate [2]. It has also been observed that a 1 °C variation in tem- perature during the PEB step can result in a 10 nm variation in the line width measurement [3,4]. This represents significant errors in the current submicron technologies. Temperature control at the PEB stage is critical. During PEB pro- cessing, temperatures are rapidly ramped up to a target tempera- ture and maintained at that temperature for a specific time period, followed by a rapid drop to near ambient temperature [5]. The target temperature and profile are photo-resist dependent. Steady states are typically between 90 °C and 140 °C and are held for 60 to 90 s. In addition, fast transient responses are expected and more importantly, stringent temperature uniformity over the wafer surface is also required. According to some literature, during the PEB process, the temperature uniformity over the whole sur- face of a 300-mm wafer should ideally be within 0.1 °C, which is difficult to achieve by the technologies currently used in the industry. In the current industrial practice for the PEB process, baking is performed by placing the wafers on hot plates with their temper- atures controlled by some heating devices. Generally, these hot plates have large thermal masses. To cool down the wafers after baking, the wafers are physically moved to chilling plates by ro- botic manipulators. The temperature uniformity over the 300- mm wafer which current industrial baking/chilling systems can achieve is typically within 0.2 °C. In order to achieve better tem- perature uniformity, multi-zone hot plate baking systems have been proposed [6]. In this system, the multi-zone hot plate is con- figured in a certain arrangement with many heater cartridges embedded in each zone. These heater cartridges at each zone are controlled independently. The major problems with the conven- tional baking methods based on hot plates are as follows: (1) the baking and chilling systems are bulky and complicated with the integration of mechanical, thermal, electrical, and control systems; (2) good temperature uniformity across the wafer surface is diffi- cult to achieve because the central regions and the edges of the wa- fers and the hot plates have different heat losses; (3) multi-zone hot plate design has the potential to achieve a better wafer temper- ature distribution. However, the configuration and control of the large number of heater cartridges is a complex problem yet to be 0959-1524/$ - see front matter Ó 2008 Elsevier Ltd. All rights reserved. doi:10.1016/j.jprocont.2008.04.021 * Corresponding author. E-mail addresses: [email protected] (L. Wang), [email protected] (A.P. Loh). Journal of Process Control 18 (2008) 931–936 Contents lists available at ScienceDirect Journal of Process Control journal homepage: www.elsevier.com/locate/jprocont

Transcript of An air-flow based wafer bake system for improved temperature uniformity

Page 1: An air-flow based wafer bake system for improved temperature uniformity

Journal of Process Control 18 (2008) 931–936

Contents lists available at ScienceDirect

Journal of Process Control

journal homepage: www.elsevier .com/locate / jprocont

An air-flow based wafer bake system for improved temperature uniformity

Wang Lan a,*, Loh Ai Poh a, Gong Zhi Ming b, Chow Siew Loong b

a Department of Electrical and Computer Engineering, National University of Singapore, 4 Engineering Drive 3, Singapore 117576, Singaporeb Singapore Institute of Manufacturing Technology, 71 Nanyang Drive, Singapore 638075, Singapore

a r t i c l e i n f o

Article history:Received 11 July 2007Received in revised form 21 January 2008Accepted 6 April 2008

Keywords:MicrolithographyWafer-baking processPost exposure bake (PEB)Temperature uniformity

0959-1524/$ - see front matter � 2008 Elsevier Ltd. Adoi:10.1016/j.jprocont.2008.04.021

* Corresponding author.E-mail addresses: [email protected] (L. Wang

Loh).

a b s t r a c t

This paper presents an innovative apparatus for wafer baking/chilling using a stream of temperature con-trolled air-flow. This apparatus takes the form of a baking chamber on which the wafer is placed. Astream of hot air is passed through the chamber below the wafer. Heat is transferred from the hot airto the wafer from the bottom surface of the wafer. If the chamber has a uniform cross-section, heat willbe lost along the direction of flow and eventually the far-end of the wafer will be cooler. As a result, tem-perature uniformity across the wafer will be very poor. In our innovation, we have designed a taperedchamber through which the hot air-flows. The idea is to control the speed of the air-flow through thechannel which in turn improves the coefficient of heat transfer between the hot air and the wafer. Thishelps tremendously in achieving temperature uniformity of the wafer. Numerical analysis and simulationresults are used to support our design. We show how the gradient of the tapered channel affects temper-ature uniformity and we are able to deduce the optimal gradient under simulation conditions.

� 2008 Elsevier Ltd. All rights reserved.

1. Introduction

The increase in complexity of integrated circuits (IC), coupledwith the decreasing size of individual circuit elements, is placingmore stringent demands on the fabrication process. In particular,the variation in the critical dimension (CD) which is the size ofthe smallest feature in the design, has to be carefully controlledduring the lithography process as tolerances become smaller.Among the basic semiconductor manufacturing processes, lithog-raphy is the most complicated, expensive, and critical process.Thus there is increased interest in monitoring and controlling thevarious steps in lithography. In particular, the primary contributorto CD variance is the post exposure bake (PEB) temperature unifor-mity [1]. Some experts attribute up to 30% of the CD error budgetto PEB temperature variations from hot plate to hot plate or withinthe plate [2]. It has also been observed that a 1 �C variation in tem-perature during the PEB step can result in a 10 nm variation in theline width measurement [3,4]. This represents significant errors inthe current submicron technologies.

Temperature control at the PEB stage is critical. During PEB pro-cessing, temperatures are rapidly ramped up to a target tempera-ture and maintained at that temperature for a specific timeperiod, followed by a rapid drop to near ambient temperature[5]. The target temperature and profile are photo-resist dependent.Steady states are typically between 90 �C and 140 �C and are held

ll rights reserved.

), [email protected] (A.P.

for 60 to 90 s. In addition, fast transient responses are expectedand more importantly, stringent temperature uniformity over thewafer surface is also required. According to some literature, duringthe PEB process, the temperature uniformity over the whole sur-face of a 300-mm wafer should ideally be within 0.1 �C, which isdifficult to achieve by the technologies currently used in theindustry.

In the current industrial practice for the PEB process, baking isperformed by placing the wafers on hot plates with their temper-atures controlled by some heating devices. Generally, these hotplates have large thermal masses. To cool down the wafers afterbaking, the wafers are physically moved to chilling plates by ro-botic manipulators. The temperature uniformity over the 300-mm wafer which current industrial baking/chilling systems canachieve is typically within 0.2 �C. In order to achieve better tem-perature uniformity, multi-zone hot plate baking systems havebeen proposed [6]. In this system, the multi-zone hot plate is con-figured in a certain arrangement with many heater cartridgesembedded in each zone. These heater cartridges at each zone arecontrolled independently. The major problems with the conven-tional baking methods based on hot plates are as follows: (1) thebaking and chilling systems are bulky and complicated with theintegration of mechanical, thermal, electrical, and control systems;(2) good temperature uniformity across the wafer surface is diffi-cult to achieve because the central regions and the edges of the wa-fers and the hot plates have different heat losses; (3) multi-zonehot plate design has the potential to achieve a better wafer temper-ature distribution. However, the configuration and control of thelarge number of heater cartridges is a complex problem yet to be

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Fig. 2. Schematic of the baking chamber with sloped flat bottom surface.

Table 1Dimensions of simulation mode

Items Value

Box length (mm) (L) 600Box width (mm) (W) 600Box height (inlet) (mm) (H) 78Wafer diameter (mm) 200Wafer thickness (mm) 0.7Wafer position Top center

932 L. Wang, A.P. Loh / Journal of Process Control 18 (2008) 931–936

resolved; (4) the temperature transient response is slow because ofthe large thermal mass of the hot plate; (5) the wafer temperaturecontrol is lost during transfers from the hot plate to the chill plate;(6) mechanically moving the wafer from the hot plate to the chillplate needs additional mechanical devices. The transfer could pos-sibly contaminate or damage the photo-resist coated wafers.

In this paper, a simple method within an integrated apparatus ispresented to achieve good temperature uniformity across the wa-fer surface for wafer baking and chilling by using a stream of air-flow. Fig. 1 shows a schematic drawing of the design. The bakingsystem is a chamber with a specially designed bottom surface witha certain profile. The temperature controlled air is channeledthrough the chamber. The wafer sits on the top surface of thechamber and is baked and chilled from its bottom surface. Differ-ent air-flow velocity profile along the length of the chamber canbe achieved by different profiles of the bottom surface. Duringthe baking process, hot air will be pushed through the chamberwhile during the chilling process, cooler air will be pushed in in-stead. With a specially designed profile for the bottom surface ofthe chamber, good temperature uniformity across the wafer sur-face can be achieved. Thus, both the baking and chilling processcan be achieved without moving the wafer. This has advantagesin terms of temperature control, contamination minimization andshorter processing time since no mechanical transfers are required.

In this design, the mechanisms for heat transfer from the hot airstreams to the wafer are via conduction and convection. As the hotair traverses the chamber, it loses heat energy mainly in the direc-tion of the flow. Thus, in order to increase the heat transfer coeffi-cient as the hot air traverses the chamber, the velocity of the air-flow should be increased in the same direction as the air-flow.The profiling of the bottom surface allows us to achieve a higherair-flow rate. Thus the design of this profile is important. Now con-trast this design with an un-profiled bottom surface. Suppose thesame air stream is channeled through the chamber. As it traversesthe un-profiled chamber, a similar velocity profile is maintainedthroughout. At the same time, heat is continuously lost to the sur-roundings. As the air stream gets cooler, the heat transfer to thewafer becomes less efficient. With a profiled chamber where theexit is narrower than the entrance, the convective heat transfercoefficient is increased as the velocity picks up due to the conser-vation of mass as it moves through the chamber. By careful designof the profile of the chamber, the reduced heat transfer can becompensated by an increase in the convective heat coefficient. Asimple analysis of this effect will be given in Section 3.1.

Ideally, the profile of the bottom surface should be designedsuch that compensation achieves near perfect uniformity. How-ever, the relationship between the convective heat transfer coeffi-cient and velocity profile is highly complex and nonlinear. In orderto simplify the problem, a simple profile of a constant gradient isdesigned for the bottom surface. The schematic is shown inFig. 2. The effect of different gradients on the wafer temperatureuniformity is numerically investigated using the computationalfluid dynamics package, FLUENT [7]. Table 1 shows the dimensionvalues of the model. In order to reduce the heat loss, the wholechamber is made of polycarbonate (PC) which has a much lower

Fig. 1. Schematics of baking and chilling chamber with curved bottom surface.

thermal conductivity than the silicon wafer. This helps to reduceunnecessary heat loss to the surroundings.

This paper is organised as follows. Section 2 presents the math-ematical model used in the simulation and the correspondingboundary conditions. This is followed by Section 3 which considersthe effects of the gradient of the bottom surface of the chamber, aswell as the simulation results. Conclusions are drawn in Section 4.

2. Model and analysis

This section shows the k–e turbulent model and correspondingboundary conditions which were used in the FLUENT simulation.For an internal flow, the critical Reynolds number (ReD) for corre-sponding to the onset of turbulence is 2300 [9]. Under above sim-ulation condition, the calculated Reynolds number is value is about70,000, which is much larger than this critical value. So turbulencemodel can be used. The governing Navier–Stokes equations arefirst described, followed by the k–e model, widely used in associa-tion with the Reynolds averaged Navier–Stokes equations for cal-culating various types of turbulent mean flows. Finally thecorresponding boundary conditions are introduced. Since the flowspeed is much lower than the speed of sound, incompressible flowis assumed.

2.1. Mathematical model (Navier–Stokes equations)

Turbulent flows are characterized by fluctuating velocity fields,and these fluctuations cause the transported quantities such asmomentum and energy to fluctuate as well. The standard practicein modeling this complex phenomenon is via the Navier–Stokesequations which describe how the velocity, pressure, temperature,and density of a moving fluid are related. They consist of continuityequations for the conservation of mass, conservation of momen-tum equations and conservation of energy equations. For incom-pressible flow, a simplified set of the Navier–Stokes equationsare as follows:

Continuity:oqvi

oxi¼ 0 ð1Þ

Momentum: � oPoxiþ o

oxjl ovi

oxjþ ovj

oxi

� �� qmimj

� �¼ 0 ð2Þ

Energy:o

oxi

lPr

oToxi� qmiT

0� �

¼ 0 ð3Þ

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L. Wang, A.P. Loh / Journal of Process Control 18 (2008) 931–936 933

where q: air density, kg m�3; mi: air velocity in ith direction, m/s; P:pressure, Pa; l: viscosity, kg m�1 s�1; Pr: Prandtl number of air; T:temperature, K ; qvivj: turbulent effect, Reynolds stresses; qviT

0:net rate of enthalpy in i direction.

2.2. Standard k–e model

In general the Navier–Stokes equations are very difficult tosolve exactly. In order to solve them, one approach normally usedis to apply time averaging to remove the small and high frequencyfluctuations in the flows, resulting in mean flow quantities whichare still applicable. The Reynolds averaging method can be usedto transform the equations in such a way that the small scale tur-bulent fluctuations are not directly simulated. The Reynold-aver-aged Navier–Stokes equations represent transport equations forthe mean flow quantities only.

The standard k–e model which falls within this class of turbu-lent model is a semi-empirical model [8]. Robustness, economy,and reasonable accuracy for a wide range of turbulent flows ac-count for the popularity of this approach in industrial flow andheat transfer simulations. It includes two Eqs. (4) and (5) and thesolution of these two equations allows the turbulent kinetic energy(k) and its dissipation rate (e) to be independently determined,

qDkDt¼ o

oxilþ lt

rk

� �okoxi

� �þ Gk þ Gb � qe� YM ð4Þ

qDeDt¼ o

oxilþ lt

re

� �oeoxi

� �þ C1e

ekðGk þ C3eGbÞ � C2eq

e2

kð5Þ

In the above equations, Gk: turbulence kinetic energy due to themean velocity gradients; Gb: turbulence kinetic energy due to thebuoyancy; YM: contribution of the fluctuating dilatation in com-pressible turbulence to the overall dissipation rate; lt ¼ qCl

k2

e : tur-bulent viscosity; rk = 1.0: turbulent Prandtl number for k; re = 1.3:turbulent Prandtl number for e; C1e = 1.44, C2e = 1.92, Cl = 0.09.

Based on the above mathematical formulation and heat conduc-tion equation in the solid phase, the computations were performedusing air as the medium which carries the heat. The governingequations are discretized using the first-order upwind interpola-tion scheme, and the discretized equations are solved using theSIMPLE algorithm. Typical relaxation factors were 0.3, 0.7 and 1for pressure, momentum and turbulence viscosity, respectively.For energy, the relaxation factor was 1, whereas a factor of 0.8was used for both the turbulence dissipation rate and turbulencekinetic energy. The solution was considered to have convergedwhen the energy residual was lower than 10�6 and the other termswere lower than 10�3. Grid independence is discussed later in Sec-tion 3.

2.3. Boundary conditions

The boundary conditions for the simulation model are asfollows:

� Velocity inlet: at the inlet, the velocity of the air-flow is 10 m/s andits direction is perpendicular to the inlet surface. The flow distrib-utes uniformly across the inlet. The temperature of the flow is373 K (100 �C). The turbulence intensity is set at 1% and turbulenceviscosity ratio is 1 which indicates a relatively low turbulence.

� Outflow outlet: this boundary condition is used to model flowexits where the details of the flow velocity and pressure arenot known prior to the solution of the flow problem. Hence noboundary conditions are defined here.

� Convective heat transfer across chamber walls: the convectionthermal condition is used where the chamber/ambient heattransfer coefficient is set at 5 W/(m2 K), and the free stream tem-

perature is 300 K. The thickness of the polycarbonate boardwhich is used to fabricate the chamber is 10 mm. There is noheat generation inside the chamber.

� Convective heat transfer across wafer surface: this is similar to thechamber wall boundary condition. The wafer/ambient heattransfer coefficient is set at 5 W/(m2 K), and the free stream tem-perature is 300 K. Besides the material difference, the wafer topand bottom surfaces are also assumed to have 0 mm.

3. Results and discussion

In this section, the effect of the gradient of the bottom surfaceon the temperature uniformity across the wafer surface is pre-sented and discussed. The simulations are carried out using theFLUENT package. The grid design is also introduced, followed bythe simulation results and discussion.

3.1. Effect of gradient on the heat transfer

We are only concerned with the heat transfer between the hotair flowing in the chamber and the wafer. In general, the heat fluxis given by

q ¼ hðTa � TwÞ

where h is the hot air-flow/wafer heat transfer coefficient, Ta and Tw

are the temperatures of the hot air and wafer, respectively [9–11].The heat coefficient is an unknown nonlinear function of many vari-ables, including velocity, thermal conductivity, and others and isusually determined by dimensional analysis. One widely acceptedexpression for h is

h ¼ kNuD¼ kf ðRe; PrÞ

D

where k is the thermal conductivity of air, Nu is the Nusselt numberwhich measures the enhancement of heat transfer from a surfacethat occurs in a ‘real’ situation, compared to the heat transferredif just conduction occurred. It is a function of the Reynolds (Re)and Prandtl (Pr) numbers and D is the characteristic dimension.Depending on whether the air-flow is in the laminar, turbulent ortransition regimes, f(Re,Pr) contains a term of the form Rea wherea ranges from 0.25 to 0.8 for laminar and turbulent flow, respec-tively. The Reynolds number, in turn, is related to the flow velocityvia

Re ¼ qVDl

where V is the flow velocity, q is the air density and l is theviscosity. The Prandtl number, however, is not a function of flowvelocity.

Thus, the convective heat coefficient, h, is an increasing functionof the flow velocity, V but their relationship is nonlinear. In a flowchamber with parallel walls, the flow velocity is constant through-out the length of the chamber and therefore h does not change sig-nificantly as the flow traverses the chamber. At the same time, Ta

decreases and hence the heat flux, q, drops along the length ofthe chamber. In order to maintain a constant heat flux so as to ob-tain better temperature uniformity on the wafer, a tapered cham-ber is designed so that V increases along the direction of flow. Forincompressible flows, the variation of flow velocity, V(x), as a func-tion of distance x from the entrance of the chamber can be writtenas

VðxÞ ¼ A0V0

AðxÞ

Page 4: An air-flow based wafer bake system for improved temperature uniformity

Fig. 4. Schematics of the bottom slope angle.

Fig. 5. Wafer temperature distribution (h = 0�).

934 L. Wang, A.P. Loh / Journal of Process Control 18 (2008) 931–936

where A0 and A(x) are the cross-sectional areas at the entrance andat distance, x, along the chamber, respectively, and V0 is the initialvelocity. With a linearly tapered chamber of slope h, we have

AðxÞ ¼WðH � x tan hÞ

In theory, A(x) can be designed to compensate for the loss of q alongx. But in practice, this compensation cannot be precise because theknowledge of h is limited by its nonlinear nature. Thus, in manyproblems involving flows and heat transfer, analytical solutionsare not possible and much dependence is placed on simulations.

3.2. Grid design

In complex simulations, one way of ensuring reliability in thenumerical results is to perform grid-independence tests. In thiscase, they were conducted only for the chamber with 0� slope an-gle at the bottom surface. For other chambers with non-zero slopeangles, the same grid design was used without affecting the accu-racy of the results. In order to keep the paper concise, the proce-dure of grid-independence test is omitted here. Fig. 3 shows thegrid on the wafer and chamber top surface after the grid-indepen-dence test. It can be seen that the grid size on the wafer in the cen-ter is much smaller than that of the chamber itself especially at theouter section. This was obtained by gradually expanding the gridsize by a factor of 1.1 from the wafer edge. This provides a higherresolution at the wafer boundary which is more important than thechamber itself. In the height direction, there are 25 grids and thegrids were gradually expanded from the top surface with a factorof 1.2 in order to allow a greater resolution at the bottom surfaceof the wafer. This is not shown in Fig. 3.

3.3. Simulation results

Fig. 4 shows the cross-section of the chamber in the x-direction,which corresponds to the direction of flow of the air stream. Thegradient of the bottom surface is varied by varying the angle, h,slope angle of the chamber’s bottom surface. The range of the slopeangle h is from 0� to 6.3� in this simulation model. The results arepresented in terms of the wafer temperature distribution as well asthe heat transfer coefficient in the x-direction.

Fig. 5 shows the wafer temperature distribution with h = 0. Itcan be observed that wafer’s leading edge has the highest temper-atures while the wafer at the downstream end has the lowest tem-peratures. This is not surprising, as explained earlier. Thetemperature distribution is relatively symmetrical with respectto the x-direction. The mean temperature across the wafer is

Fig. 3. Grid design of wafer and chamber top surface.

approximately 367 K and the maximum temperature differenceacross the wafer is only 0.631 K.

Fig. 6 shows the temperature profiles along the wafer diameter.The different profiles in Fig. 6 correspond to the temperatures atdifferent h values ranging from 0 to 6.3. Several observations canbe made from this figure:

(a) The average temperature increases with h.(b) The temperature at the leading edge of the wafer also

increases with h.(c) The temperature at the trailing edge may or may not be

higher than the temperature at the leading edge. For exam-ple, when h = 0, the trailing edge temperature is lower thanthat at the leading edge. This indicates insufficient compen-sation in the heat transfer. When h = 6.3, the trailing edgetemperature is higher than that at the leading edge. Thisindicates an over compensation. Overall, this implies thatthere exists an optimal h where both the temperatures atthe leading and trailing edges are equal. Under the condi-tions of the simulation, the optimal h is about 4.6�, as

366

366. 5

367

367. 5

368

368. 5

369

-0.1 -0.05 0 0.05 0.1 0.15Position (m)

T (

K)

03. 54. 65. 86. 3

Fig. 6. Temperature profile along the wafer diameter for different h values.

Page 5: An air-flow based wafer bake system for improved temperature uniformity

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0

slope angle (deg)

dT (

K)

Fig. 7. Temperature uniformity for different h values.Fig. 9. Temperature uniformity for different inlet velocity.

L. Wang, A.P. Loh / Journal of Process Control 18 (2008) 931–936 935

deduced from the Fig. 6. When h values are from 0� to 3.5�,the temperature profiles are similar where the temperatureof the leading edge is higher than that of the trailing edgeand these are not shown in Fig. 6.

Fig. 7 shows the temperature uniformity across the entire wafersurface at different h values. Here the temperature uniformity is ta-ken as the temperature difference between the maximum andminimum temperatures on the wafer surface. This figure showsthat reasonably good temperature uniformity (less than 0.2 K)can be achieved for different values of h between 3.5� and 5.1�.Also, it can be seen that there is a hump between 4� and 4.6� andthe reason for this hump needs further investigation. Fig. 8 showsthe wafer temperature distribution with h = 4.6. The maximum dif-ference in temperature across the wafer is 0.154 K which is a 4-foldimprovement from the case when h = 0. Table 2 shows the sum-mary of the simulation results where Tmax and Tmin temperatures

Fig. 8. Wafer temperature distribution (h = 4.6).

Table 2Min and max temperatures for different h values

h (deg) Tmax (K) Tmin (K) DT (K)

0.0 366.956 366.435 0.6313.5 367.481 367.287 0.1943.7 369.379 369.188 0.1913.9 367.613 367.444 .01694.2 367.678 367.493 0.1854.4 367.889 367.604 0.2854.6 367.796 367.642 0.1545.1 367.944 367.749 0.1955.5 368.098 367.829 0.2695.8 368.487 367.937 0.556.3 368.629 368.035 0.594

are the maximum and minimum temperatures, respectively, acrossthe whole surface of the wafer. DT is the magnitude of the differ-ence between Tmax and Tmin.

Fig. 9 shows the temperature uniformity on wafer diameter un-der different inlet velocities. It can be seen that the temperatureuniformity is improved significantly with increasing inlet air-flowvelocity up to 5 m/s. Once the velocity is greater than 5 m/s, theimprovement in temperature uniformity is negligible. In all theabove simulations, an inlet velocity of 10 m/s was used.

4. Conclusion

In the present study, a simple method and apparatus for waferbaking by using a stream of air-flow was presented. Wafer temper-ature distribution on wafer surface as a function of the slope angleof the chamber bottom surface was numerically investigated. Sim-ulation results show that reasonably good uniform temperaturedistribution across the wafer surface can be achieved by carefullychoosing the gradient of the bottom surface. As stated in the firstsection, the contour of the bottom surface is not limited to a lineargradient and should be nonlinear if a more precise relationship be-tween heat transfer coefficients and other physical parameters canbe established. This will be discussed in our future work which willalso include investigations into the cooling cycles using a coolerairstream. The advantage of this lies in the convenience in the bak-ing and cooling of wafers wherein no transfers between differentstations are required. However, the dynamics between the two cy-cles will have to be investigated.

Acknowledgements

The authors wish to acknowledge Prof. Arun Sadashiv Mujum-dar from the Mechanical Engineering Department, National Uni-versity of Singapore for the many useful discussions and helpthat he had extended in this work. Mr. Wang Lan also wishes toacknowledge the financial support provided by Singapore Instituteof Manufacturing Technology in this project.

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